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ARMAsmBackend.h
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1 //===-- ARMAsmBackend.h - ARM Assembler Backend -----------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
10 #define LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
11 
14 #include "llvm/MC/MCAsmBackend.h"
16 #include "llvm/MC/TargetRegistry.h"
17 
18 namespace llvm {
19 
20 class ARMAsmBackend : public MCAsmBackend {
21  bool isThumbMode; // Currently emitting Thumb code.
22 public:
24  : MCAsmBackend(Endian), isThumbMode(isThumb) {}
25 
26  unsigned getNumFixupKinds() const override {
28  }
29 
30  bool hasNOP(const MCSubtargetInfo *STI) const {
31  return STI->getFeatureBits()[ARM::HasV6T2Ops];
32  }
33 
35 
36  const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
37 
38  bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
39  const MCValue &Target) override;
40 
41  unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
42  const MCValue &Target, uint64_t Value,
43  bool IsResolved, MCContext &Ctx,
44  const MCSubtargetInfo *STI) const;
45 
46  void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
48  uint64_t Value, bool IsResolved,
49  const MCSubtargetInfo *STI) const override;
50 
51  unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;
52 
53  bool mayNeedRelaxation(const MCInst &Inst,
54  const MCSubtargetInfo &STI) const override;
55 
56  const char *reasonForFixupRelaxation(const MCFixup &Fixup,
57  uint64_t Value) const;
58 
59  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
60  const MCRelaxableFragment *DF,
61  const MCAsmLayout &Layout) const override;
62 
63  void relaxInstruction(MCInst &Inst,
64  const MCSubtargetInfo &STI) const override;
65 
66  bool writeNopData(raw_ostream &OS, uint64_t Count,
67  const MCSubtargetInfo *STI) const override;
68 
70 
71  unsigned getPointerSize() const { return 4; }
72  bool isThumb() const { return isThumbMode; }
73  void setIsThumb(bool it) { isThumbMode = it; }
74 };
75 } // end namespace llvm
76 
77 #endif
llvm::ARMAsmBackend
Definition: ARMAsmBackend.h:20
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
llvm::MCRelaxableFragment
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:271
it
into xmm2 addss xmm2 xmm1 xmm3 addss xmm3 movaps xmm0 unpcklps xmm0 ret seems silly when it could just be one addps Expand libm rounding functions main should enable SSE DAZ mode and other fast SSE modes Think about doing i64 math in SSE regs on x86 This testcase should have no SSE instructions in it
Definition: README-SSE.txt:81
ARMMCTargetDesc.h
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:72
llvm::ARMAsmBackend::getNumFixupKinds
unsigned getNumFixupKinds() const override
Get the number of target specific fixup kinds.
Definition: ARMAsmBackend.h:26
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:137
llvm::ARMAsmBackend::applyFixup
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const override
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Definition: ARMAsmBackend.cpp:1044
llvm::ARMAsmBackend::fixupNeedsRelaxation
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const override
Simple predicate for targets where !Resolved implies requiring relaxation.
Definition: ARMAsmBackend.cpp:324
llvm::Optional
Definition: APInt.h:33
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::MCAssemblerFlag
MCAssemblerFlag
Definition: MCDirectives.h:50
llvm::ARMAsmBackend::writeNopData
bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
Write an (optimal) nop sequence of Count bytes to the given output.
Definition: ARMAsmBackend.cpp:361
llvm::Data
@ Data
Definition: SIMachineScheduler.h:55
llvm::MCAsmBackend::Endian
const support::endianness Endian
Definition: MCAsmBackend.h:45
ARMFixupKinds.h
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
MCAsmBackend.h
llvm::MutableArrayRef< char >
llvm::ARMAsmBackend::reasonForFixupRelaxation
const char * reasonForFixupRelaxation(const MCFixup &Fixup, uint64_t Value) const
Definition: ARMAsmBackend.cpp:245
MCSubtargetInfo.h
llvm::MCSubtargetInfo::getFeatureBits
const FeatureBitset & getFeatureBits() const
Definition: MCSubtargetInfo.h:111
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:146
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::lltok::Kind
Kind
Definition: LLToken.h:18
DF
static RegisterPass< DebugifyFunctionPass > DF("debugify-function", "Attach debug info to a function")
llvm::ARMAsmBackend::handleAssemblerFlag
void handleAssemblerFlag(MCAssemblerFlag Flag) override
Handle any target-specific assembler flags. By default, do nothing.
Definition: ARMAsmBackend.cpp:195
llvm::ARMAsmBackend::getFixupKindInfo
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
Definition: ARMAsmBackend.cpp:69
llvm::ARMAsmBackend::isThumb
bool isThumb() const
Definition: ARMAsmBackend.h:72
llvm::MCAssembler
Definition: MCAssembler.h:60
uint64_t
llvm::ARMAsmBackend::getRelaxedOpcode
unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const
Definition: ARMAsmBackend.cpp:208
llvm::ARMAsmBackend::getPointerSize
unsigned getPointerSize() const
Definition: ARMAsmBackend.h:71
llvm::ARMAsmBackend::hasNOP
bool hasNOP(const MCSubtargetInfo *STI) const
Definition: ARMAsmBackend.h:30
llvm::ARMAsmBackend::mayNeedRelaxation
bool mayNeedRelaxation(const MCInst &Inst, const MCSubtargetInfo &STI) const override
Check whether the given instruction may need relaxation.
Definition: ARMAsmBackend.cpp:231
llvm::MCFixupKindInfo
Target independent information on a fixup kind.
Definition: MCFixupKindInfo.h:15
llvm::ARMAsmBackend::relaxInstruction
void relaxInstruction(MCInst &Inst, const MCSubtargetInfo &STI) const override
Relax the instruction in the given fragment to the next wider instruction.
Definition: ARMAsmBackend.cpp:330
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
llvm::ARMAsmBackend::shouldForceRelocation
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target) override
Hook to check if a relocation is needed for some target specific reason.
Definition: ARMAsmBackend.cpp:881
llvm::ARMAsmBackend::setIsThumb
void setIsThumb(bool it)
Definition: ARMAsmBackend.h:73
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:52
llvm::MCAsmLayout
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:28
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:325
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
llvm::ARM::NumTargetFixupKinds
@ NumTargetFixupKinds
Definition: ARMFixupKinds.h:119
llvm::ARMAsmBackend::adjustFixupValue
unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, uint64_t Value, bool IsResolved, MCContext &Ctx, const MCSubtargetInfo *STI) const
Definition: ARMAsmBackend.cpp:428
llvm::support::endianness
endianness
Definition: Endian.h:27
llvm::HexStyle::Asm
@ Asm
0ffh
Definition: MCInstPrinter.h:34
llvm::ARMAsmBackend::ARMAsmBackend
ARMAsmBackend(const Target &T, bool isThumb, support::endianness Endian)
Definition: ARMAsmBackend.h:23
llvm::MCValue
This represents an "assembler immediate".
Definition: MCValue.h:37
llvm::ARMAsmBackend::getFixupKind
Optional< MCFixupKind > getFixupKind(StringRef Name) const override
Map a relocation name used in .reloc to a fixup kind.
Definition: ARMAsmBackend.cpp:50
TargetRegistry.h
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
llvm::Value
LLVM Value Representation.
Definition: Value.h:74