LLVM 22.0.0git
|
#include "Target/ARM/MCTargetDesc/ARMAsmBackend.h"
Public Member Functions | |
ARMAsmBackend (const Target &T, llvm::endianness Endian) | |
bool | hasNOP (const MCSubtargetInfo *STI) const |
std::optional< MCFixupKind > | getFixupKind (StringRef Name) const override |
Map a relocation name used in .reloc to a fixup kind. | |
MCFixupKindInfo | getFixupKindInfo (MCFixupKind Kind) const override |
Get information on a fixup kind. | |
bool | shouldForceRelocation (const MCFixup &Fixup, const MCValue &Target) |
unsigned | adjustFixupValue (const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, uint64_t Value, bool IsResolved, MCContext &Ctx, const MCSubtargetInfo *STI) const |
std::optional< bool > | evaluateFixup (const MCFragment &, MCFixup &, MCValue &, uint64_t &) override |
void | applyFixup (const MCFragment &, const MCFixup &, const MCValue &Target, uint8_t *Data, uint64_t Value, bool IsResolved) override |
unsigned | getRelaxedOpcode (unsigned Op, const MCSubtargetInfo &STI) const |
bool | mayNeedRelaxation (unsigned Opcode, ArrayRef< MCOperand > Operands, const MCSubtargetInfo &STI) const override |
Check whether the given instruction (encoded as Opcode+Operands) may need relaxation. | |
const char * | reasonForFixupRelaxation (const MCFixup &Fixup, uint64_t Value) const |
bool | fixupNeedsRelaxationAdvanced (const MCFragment &, const MCFixup &, const MCValue &, uint64_t, bool) const override |
Target specific predicate for whether a given fixup requires the associated instruction to be relaxed. | |
void | relaxInstruction (MCInst &Inst, const MCSubtargetInfo &STI) const override |
Relax the instruction in the given fragment to the next wider instruction. | |
bool | writeNopData (raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override |
Write an (optimal) nop sequence of Count bytes to the given output. | |
unsigned | getPointerSize () const |
![]() | |
MCAsmBackend (const MCAsmBackend &)=delete | |
MCAsmBackend & | operator= (const MCAsmBackend &)=delete |
virtual | ~MCAsmBackend () |
void | setAssembler (MCAssembler *A) |
MCContext & | getContext () const |
bool | allowAutoPadding () const |
Return true if this target might automatically pad instructions and thus need to emit padding enable/disable directives around sensative code. | |
bool | allowEnhancedRelaxation () const |
Return true if this target allows an unrelaxable instruction to be emitted into RelaxableFragment and then we can increase its size in a tricky way for optimization. | |
virtual void | reset () |
lifetime management | |
std::unique_ptr< MCObjectWriter > | createObjectWriter (raw_pwrite_stream &OS) const |
Create a new MCObjectWriter instance for use by the assembler backend to emit the final object file. | |
std::unique_ptr< MCObjectWriter > | createDwoObjectWriter (raw_pwrite_stream &OS, raw_pwrite_stream &DwoOS) const |
Create an MCObjectWriter that writes two object files: a .o file which is linked into the final program and a .dwo file which is used by debuggers. | |
virtual std::unique_ptr< MCObjectTargetWriter > | createObjectTargetWriter () const =0 |
virtual unsigned | getMinimumNopSize () const |
Returns the minimum size of a nop in bytes on this target. | |
virtual unsigned | getMaximumNopSize (const MCSubtargetInfo &STI) const |
Returns the maximum size of a nop in bytes on this target. | |
virtual bool | writeNopData (raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const =0 |
Write an (optimal) nop sequence of Count bytes to the given output. | |
virtual bool | finishLayout (const MCAssembler &Asm) const |
virtual uint64_t | generateCompactUnwindEncoding (const MCDwarfFrameInfo *FI, const MCContext *Ctxt) const |
Generate the compact unwind encoding for the CFI instructions. | |
bool | isDarwinCanonicalPersonality (const MCSymbol *Sym) const |
void | maybeAddReloc (const MCFragment &, const MCFixup &, const MCValue &, uint64_t &Value, bool IsResolved) |
virtual bool | fixupNeedsRelaxation (const MCFixup &Fixup, uint64_t Value) const |
Simple predicate for targets where !Resolved implies requiring relaxation. | |
virtual bool | relaxAlign (MCFragment &F, unsigned &Size) |
virtual bool | relaxDwarfLineAddr (MCFragment &) const |
virtual bool | relaxDwarfCFA (MCFragment &) const |
virtual std::pair< bool, bool > | relaxLEB128 (MCFragment &, int64_t &Value) const |
Additional Inherited Members | |
![]() | |
static const MCSubtargetInfo * | getSubtargetInfo (const MCFragment &F) |
![]() | |
const llvm::endianness | Endian |
![]() | |
MCAsmBackend (llvm::endianness Endian) | |
![]() | |
MCAssembler * | Asm = nullptr |
bool | AllowAutoPadding = false |
bool | AllowEnhancedRelaxation = false |
Definition at line 20 of file ARMAsmBackend.h.
|
inline |
Definition at line 22 of file ARMAsmBackend.h.
unsigned ARMAsmBackend::adjustFixupValue | ( | const MCAssembler & | Asm, |
const MCFixup & | Fixup, | ||
const MCValue & | Target, | ||
uint64_t | Value, | ||
bool | IsResolved, | ||
MCContext & | Ctx, | ||
const MCSubtargetInfo * | STI | ||
) | const |
Definition at line 419 of file ARMAsmBackend.cpp.
References llvm::MCAsmBackend::Asm, assert(), llvm::MCAsmBackend::Endian, Fixup, llvm::ARM::fixup_arm_adr_pcrel_12, llvm::ARM::fixup_arm_blx, llvm::ARM::fixup_arm_condbl, llvm::ARM::fixup_arm_condbranch, llvm::ARM::fixup_arm_ldst_abs_12, llvm::ARM::fixup_arm_ldst_pcrel_12, llvm::ARM::fixup_arm_mod_imm, llvm::ARM::fixup_arm_movt_hi16, llvm::ARM::fixup_arm_movw_lo16, llvm::ARM::fixup_arm_pcrel_10, llvm::ARM::fixup_arm_pcrel_10_unscaled, llvm::ARM::fixup_arm_pcrel_9, llvm::ARM::fixup_arm_thumb_bcc, llvm::ARM::fixup_arm_thumb_bl, llvm::ARM::fixup_arm_thumb_blx, llvm::ARM::fixup_arm_thumb_br, llvm::ARM::fixup_arm_thumb_cb, llvm::ARM::fixup_arm_thumb_cp, llvm::ARM::fixup_arm_thumb_lower_0_7, llvm::ARM::fixup_arm_thumb_lower_8_15, llvm::ARM::fixup_arm_thumb_upper_0_7, llvm::ARM::fixup_arm_thumb_upper_8_15, llvm::ARM::fixup_arm_uncondbl, llvm::ARM::fixup_arm_uncondbranch, llvm::ARM::fixup_bf_branch, llvm::ARM::fixup_bf_target, llvm::ARM::fixup_bfc_target, llvm::ARM::fixup_bfcsel_else_target, llvm::ARM::fixup_bfl_target, llvm::ARM::fixup_le, llvm::ARM::fixup_t2_adr_pcrel_12, llvm::ARM::fixup_t2_condbranch, llvm::ARM::fixup_t2_ldst_pcrel_12, llvm::ARM::fixup_t2_movt_hi16, llvm::ARM::fixup_t2_movw_lo16, llvm::ARM::fixup_t2_pcrel_10, llvm::ARM::fixup_t2_pcrel_9, llvm::ARM::fixup_t2_so_imm, llvm::ARM::fixup_t2_uncondbranch, llvm::ARM::fixup_thumb_adr_pcrel_10, llvm::ARM::fixup_wls, llvm::FK_Data_1, llvm::FK_Data_2, llvm::FK_Data_4, llvm::FK_SecRel_2, llvm::FK_SecRel_4, llvm::MCAsmBackend::getContext(), llvm::ARM_AM::getSOImmVal(), llvm::ARM_AM::getT2SOImmVal(), llvm::MCSubtargetInfo::getTargetTriple(), llvm::MCSubtargetInfo::hasFeature(), I, llvm::MCContext::IsMachO, llvm::Triple::isOSBinFormatCOFF(), llvm::Triple::isOSBinFormatELF(), llvm::MCAssembler::isThumbFunc(), joinHalfWords(), llvm::little, llvm::maxIntN(), llvm::minIntN(), reasonForFixupRelaxation(), llvm::MCContext::reportError(), llvm::ARM::S_TLSCALL, and swapHalfWords().
Referenced by applyFixup().
|
overridevirtual |
Implements llvm::MCAsmBackend.
Definition at line 1101 of file ARMAsmBackend.cpp.
References adjustFixupValue(), llvm::MCAsmBackend::Asm, assert(), llvm::big, llvm::Data, llvm::MCAsmBackend::Endian, F, Fixup, llvm::MCAsmBackend::getContext(), getFixupKindContainerSizeBytes(), getFixupKindNumBytes(), llvm::MCAsmBackend::getSubtargetInfo(), Idx, llvm::mc::isRelocation(), llvm::little, llvm::MCAsmBackend::maybeAddReloc(), and shouldForceRelocation().
|
overridevirtual |
Reimplemented from llvm::MCAsmBackend.
Definition at line 1082 of file ARMAsmBackend.cpp.
References llvm::MCAsmBackend::Asm, F, Fixup, llvm::ARM::fixup_arm_thumb_blx, llvm::ARM::fixup_arm_thumb_cp, llvm::ARM::fixup_t2_adr_pcrel_12, llvm::ARM::fixup_t2_ldst_pcrel_12, llvm::ARM::fixup_t2_pcrel_10, llvm::ARM::fixup_t2_pcrel_9, llvm::ARM::fixup_thumb_adr_pcrel_10, and llvm::MCAssembler::getFragmentOffset().
|
overridevirtual |
Target specific predicate for whether a given fixup requires the associated instruction to be relaxed.
Reimplemented from llvm::MCAsmBackend.
Definition at line 315 of file ARMAsmBackend.cpp.
References llvm::MCAsmBackend::Asm, Fixup, needsInterworking(), reasonForFixupRelaxation(), and Sym.
|
overridevirtual |
Map a relocation name used in .reloc to a fixup kind.
Reimplemented from llvm::MCAsmBackend.
Reimplemented in llvm::ARMAsmBackendELF.
Definition at line 47 of file ARMAsmBackend.cpp.
|
overridevirtual |
Get information on a fixup kind.
Reimplemented from llvm::MCAsmBackend.
Definition at line 67 of file ARMAsmBackend.cpp.
References assert(), llvm::MCAsmBackend::Endian, llvm::FirstTargetFixupKind, llvm::MCAsmBackend::getFixupKindInfo(), llvm::mc::isRelocation(), llvm::little, and llvm::ARM::NumTargetFixupKinds.
|
inline |
Definition at line 63 of file ARMAsmBackend.h.
unsigned ARMAsmBackend::getRelaxedOpcode | ( | unsigned | Op, |
const MCSubtargetInfo & | STI | ||
) | const |
Definition at line 182 of file ARMAsmBackend.cpp.
References llvm::MCSubtargetInfo::hasFeature().
Referenced by mayNeedRelaxation(), and relaxInstruction().
|
inline |
Definition at line 25 of file ARMAsmBackend.h.
References llvm::MCSubtargetInfo::hasFeature().
Referenced by writeNopData().
|
overridevirtual |
Check whether the given instruction (encoded as Opcode+Operands) may need relaxation.
Reimplemented from llvm::MCAsmBackend.
Definition at line 205 of file ARMAsmBackend.cpp.
References getRelaxedOpcode().
const char * ARMAsmBackend::reasonForFixupRelaxation | ( | const MCFixup & | Fixup, |
uint64_t | Value | ||
) | const |
Definition at line 217 of file ARMAsmBackend.cpp.
References checkPCRelOffset(), Fixup, llvm::ARM::fixup_arm_thumb_bcc, llvm::ARM::fixup_arm_thumb_br, llvm::ARM::fixup_arm_thumb_cb, llvm::ARM::fixup_arm_thumb_cp, llvm::ARM::fixup_bf_branch, llvm::ARM::fixup_bf_target, llvm::ARM::fixup_bfc_target, llvm::ARM::fixup_bfcsel_else_target, llvm::ARM::fixup_bfl_target, llvm::ARM::fixup_le, llvm::ARM::fixup_thumb_adr_pcrel_10, llvm::ARM::fixup_wls, llvm_unreachable, and llvm::Offset.
Referenced by adjustFixupValue(), and fixupNeedsRelaxationAdvanced().
|
overridevirtual |
Relax the instruction in the given fragment to the next wider instruction.
[out] | Inst | The instruction to relax, which is also the relaxed instruction. |
STI | the subtarget information for the associated instruction. |
Reimplemented from llvm::MCAsmBackend.
Definition at line 329 of file ARMAsmBackend.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getRelaxedOpcode(), and llvm::MCInst::setOpcode().
Definition at line 936 of file ARMAsmBackend.cpp.
References llvm::MCAsmBackend::Asm, Fixup, llvm::ARM::fixup_arm_blx, llvm::ARM::fixup_arm_condbl, llvm::ARM::fixup_arm_thumb_blx, llvm::ARM::fixup_arm_uncondbl, needsInterworking(), and Sym.
Referenced by applyFixup().
|
overridevirtual |
Write an (optimal) nop sequence of Count bytes to the given output.
If the target cannot generate such a sequence, it should return an error.
Implements llvm::MCAsmBackend.
Definition at line 352 of file ARMAsmBackend.cpp.
References llvm::MCAsmBackend::Endian, llvm::MCSubtargetInfo::hasFeature(), hasNOP(), OS, llvm::raw_ostream::write(), and llvm::support::endian::write().