13#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVREGISTERBANKINFO_H
14#define LLVM_LIB_TARGET_SPIRV_SPIRVREGISTERBANKINFO_H
18#define GET_REGBANK_DECLARATIONS
19#include "SPIRVGenRegisterBank.inc"
23class TargetRegisterInfo;
27#define GET_TARGET_REGBANK_CLASS
28#include "SPIRVGenRegisterBank.inc"
35 LLT Ty)
const override;
Holds all the information related to register banks.
This class implements the register bank concept.
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const override
Get a register bank that covers RC.
This is an optimization pass for GlobalISel generic memory operations.