LLVM 17.0.0git
AArch64InstPrinter.h
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1//===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This class prints an AArch64 MCInst to a .s file.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
14#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
15
17#include "llvm/ADT/StringRef.h"
19#include "../Utils/AArch64BaseInfo.h"
20
21namespace llvm {
22
24public:
26 const MCRegisterInfo &MRI);
27
28 bool applyTargetSpecificCLOption(StringRef Opt) override;
29
30 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
31 const MCSubtargetInfo &STI, raw_ostream &O) override;
32 void printRegName(raw_ostream &OS, MCRegister Reg) const override;
33 void printRegName(raw_ostream &OS, MCRegister Reg, unsigned AltIdx) const;
34
35 // Autogenerated by tblgen.
36 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
38 const MCSubtargetInfo &STI, raw_ostream &O);
40 const MCSubtargetInfo &STI, raw_ostream &O);
42 unsigned OpIdx, unsigned PrintMethodIdx,
43 const MCSubtargetInfo &STI,
44 raw_ostream &O);
45
46 virtual StringRef getRegName(MCRegister Reg) const;
47
48 static const char *getRegisterName(MCRegister Reg,
49 unsigned AltIdx = AArch64::NoRegAltName);
50
51protected:
52 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
53 raw_ostream &O);
54 bool printSyspAlias(const MCInst *MI, const MCSubtargetInfo &STI,
55 raw_ostream &O);
56 bool printRangePrefetchAlias(const MCInst *MI, const MCSubtargetInfo &STI,
57 raw_ostream &O, StringRef Annot);
58 // Operand printers
59 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
60 raw_ostream &O);
61 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
62 raw_ostream &O);
63 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
64 raw_ostream &O);
65 template <int Size>
66 void printSImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
67 raw_ostream &O);
68 template <typename T> void printImmSVE(T Value, raw_ostream &O);
69 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
70 raw_ostream &O);
71 template <int Amount>
72 void printPostIncOperand(const MCInst *MI, unsigned OpNo,
73 const MCSubtargetInfo &STI, raw_ostream &O) {
74 printPostIncOperand(MI, OpNo, Amount, O);
75 }
76
77 void printVRegOperand(const MCInst *MI, unsigned OpNo,
78 const MCSubtargetInfo &STI, raw_ostream &O);
79 void printSysCROperand(const MCInst *MI, unsigned OpNo,
80 const MCSubtargetInfo &STI, raw_ostream &O);
81 void printAddSubImm(const MCInst *MI, unsigned OpNum,
82 const MCSubtargetInfo &STI, raw_ostream &O);
83 template <typename T>
84 void printLogicalImm(const MCInst *MI, unsigned OpNum,
85 const MCSubtargetInfo &STI, raw_ostream &O);
86 void printShifter(const MCInst *MI, unsigned OpNum,
87 const MCSubtargetInfo &STI, raw_ostream &O);
88 void printShiftedRegister(const MCInst *MI, unsigned OpNum,
89 const MCSubtargetInfo &STI, raw_ostream &O);
90 void printExtendedRegister(const MCInst *MI, unsigned OpNum,
91 const MCSubtargetInfo &STI, raw_ostream &O);
92 void printArithExtend(const MCInst *MI, unsigned OpNum,
93 const MCSubtargetInfo &STI, raw_ostream &O);
94
95 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
96 char SrcRegKind, unsigned Width);
97 template <char SrcRegKind, unsigned Width>
98 void printMemExtend(const MCInst *MI, unsigned OpNum,
99 const MCSubtargetInfo &STI, raw_ostream &O) {
100 printMemExtend(MI, OpNum, O, SrcRegKind, Width);
101 }
102 template <bool SignedExtend, int ExtWidth, char SrcRegKind, char Suffix>
103 void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum,
104 const MCSubtargetInfo &STI, raw_ostream &O);
105 void printCondCode(const MCInst *MI, unsigned OpNum,
106 const MCSubtargetInfo &STI, raw_ostream &O);
107 void printInverseCondCode(const MCInst *MI, unsigned OpNum,
108 const MCSubtargetInfo &STI, raw_ostream &O);
109 void printAlignedLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
110 const MCSubtargetInfo &STI, raw_ostream &O);
111 void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
112 raw_ostream &O);
113 void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
114 raw_ostream &O);
115
116 template <int Scale>
117 void printUImm12Offset(const MCInst *MI, unsigned OpNum,
118 const MCSubtargetInfo &STI, raw_ostream &O) {
119 printUImm12Offset(MI, OpNum, Scale, O);
120 }
121
122 template <int BitWidth>
123 void printAMIndexedWB(const MCInst *MI, unsigned OpNum,
124 const MCSubtargetInfo &STI, raw_ostream &O) {
125 printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
126 }
127
128 void printAMNoIndex(const MCInst *MI, unsigned OpNum,
129 const MCSubtargetInfo &STI, raw_ostream &O);
130
131 template <int Scale>
132 void printImmScale(const MCInst *MI, unsigned OpNum,
133 const MCSubtargetInfo &STI, raw_ostream &O);
134
135 template <int Scale, int Offset>
136 void printImmRangeScale(const MCInst *MI, unsigned OpNum,
137 const MCSubtargetInfo &STI, raw_ostream &O);
138
139 template <bool IsSVEPrefetch = false>
140 void printPrefetchOp(const MCInst *MI, unsigned OpNum,
141 const MCSubtargetInfo &STI, raw_ostream &O);
142
143 void printRPRFMOperand(const MCInst *MI, unsigned OpNum,
144 const MCSubtargetInfo &STI, raw_ostream &O);
145
146 void printPSBHintOp(const MCInst *MI, unsigned OpNum,
147 const MCSubtargetInfo &STI, raw_ostream &O);
148
149 void printBTIHintOp(const MCInst *MI, unsigned OpNum,
150 const MCSubtargetInfo &STI, raw_ostream &O);
151
152 void printFPImmOperand(const MCInst *MI, unsigned OpNum,
153 const MCSubtargetInfo &STI, raw_ostream &O);
154
155 void printVectorList(const MCInst *MI, unsigned OpNum,
156 const MCSubtargetInfo &STI, raw_ostream &O,
157 StringRef LayoutSuffix);
158
159 void printMatrixTileList(const MCInst *MI, unsigned OpNum,
160 const MCSubtargetInfo &STI, raw_ostream &O);
161
162 /// Print a list of vector registers where the type suffix is implicit
163 /// (i.e. attached to the instruction rather than the registers).
164 void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
165 const MCSubtargetInfo &STI,
166 raw_ostream &O);
167
168 template <unsigned NumLanes, char LaneKind>
169 void printTypedVectorList(const MCInst *MI, unsigned OpNum,
170 const MCSubtargetInfo &STI, raw_ostream &O);
171
172 template <unsigned Scale = 1>
173 void printVectorIndex(const MCInst *MI, unsigned OpNum,
174 const MCSubtargetInfo &STI, raw_ostream &O);
175 void printMatrixIndex(const MCInst *MI, unsigned OpNum,
176 const MCSubtargetInfo &STI, raw_ostream &O);
177 void printAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
178 const MCSubtargetInfo &STI, raw_ostream &O);
179 void printBarrierOption(const MCInst *MI, unsigned OpNum,
180 const MCSubtargetInfo &STI, raw_ostream &O);
181 void printBarriernXSOption(const MCInst *MI, unsigned OpNum,
182 const MCSubtargetInfo &STI, raw_ostream &O);
183 void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
184 const MCSubtargetInfo &STI, raw_ostream &O);
185 void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
186 const MCSubtargetInfo &STI, raw_ostream &O);
187 void printSystemPStateField(const MCInst *MI, unsigned OpNum,
188 const MCSubtargetInfo &STI, raw_ostream &O);
189 void printSIMDType10Operand(const MCInst *MI, unsigned OpNum,
190 const MCSubtargetInfo &STI, raw_ostream &O);
191 template <int EltSize>
192 void printPredicateAsCounter(const MCInst *MI, unsigned OpNum,
193 const MCSubtargetInfo &STI, raw_ostream &O);
194
195 template<int64_t Angle, int64_t Remainder>
196 void printComplexRotationOp(const MCInst *MI, unsigned OpNo,
197 const MCSubtargetInfo &STI, raw_ostream &O);
198 template<unsigned size>
199 void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum,
200 const MCSubtargetInfo &STI,
201 raw_ostream &O);
202 template <typename T>
203 void printImm8OptLsl(const MCInst *MI, unsigned OpNum,
204 const MCSubtargetInfo &STI, raw_ostream &O);
205 template <typename T>
206 void printSVELogicalImm(const MCInst *MI, unsigned OpNum,
207 const MCSubtargetInfo &STI, raw_ostream &O);
208 void printSVEPattern(const MCInst *MI, unsigned OpNum,
209 const MCSubtargetInfo &STI, raw_ostream &O);
210 void printSVEVecLenSpecifier(const MCInst *MI, unsigned OpNum,
211 const MCSubtargetInfo &STI, raw_ostream &O);
212
213 template <bool IsVertical>
214 void printMatrixTileVector(const MCInst *MI, unsigned OpNum,
215 const MCSubtargetInfo &STI, raw_ostream &O);
216 void printMatrixTile(const MCInst *MI, unsigned OpNum,
217 const MCSubtargetInfo &STI, raw_ostream &O);
218 template <int EltSize>
219 void printMatrix(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
220 raw_ostream &O);
221 void printSVCROp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
222 raw_ostream &O);
223 template <char = 0>
224 void printSVERegOp(const MCInst *MI, unsigned OpNum,
225 const MCSubtargetInfo &STI, raw_ostream &O);
226 void printGPR64as32(const MCInst *MI, unsigned OpNum,
227 const MCSubtargetInfo &STI, raw_ostream &O);
228 void printGPR64x8(const MCInst *MI, unsigned OpNum,
229 const MCSubtargetInfo &STI, raw_ostream &O);
230 void printSyspXzrPair(const MCInst *MI, unsigned OpNum,
231 const MCSubtargetInfo &STI, raw_ostream &O);
232 template <int Width>
233 void printZPRasFPR(const MCInst *MI, unsigned OpNum,
234 const MCSubtargetInfo &STI, raw_ostream &O);
235 template <unsigned ImmIs0, unsigned ImmIs1>
236 void printExactFPImm(const MCInst *MI, unsigned OpNum,
237 const MCSubtargetInfo &STI, raw_ostream &O);
238};
239
241public:
243 const MCRegisterInfo &MRI);
244
245 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
246 const MCSubtargetInfo &STI, raw_ostream &O) override;
247
248 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
250 const MCSubtargetInfo &STI, raw_ostream &O) override;
252 const MCSubtargetInfo &STI, raw_ostream &O) override;
254 unsigned OpIdx, unsigned PrintMethodIdx,
255 const MCSubtargetInfo &STI,
256 raw_ostream &O) override;
257
258 StringRef getRegName(MCRegister Reg) const override;
259
260 static const char *getRegisterName(MCRegister Reg,
261 unsigned AltIdx = AArch64::NoRegAltName);
262};
263
264} // end namespace llvm
265
266#endif // LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
IRTranslator LLVM IR MI
unsigned Reg
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override
Print the specified MCInst to the specified raw_ostream.
void printCustomAliasOperand(const MCInst *MI, uint64_t Address, unsigned OpIdx, unsigned PrintMethodIdx, const MCSubtargetInfo &STI, raw_ostream &O) override
std::pair< const char *, uint64_t > getMnemonic(const MCInst *MI) override
Returns a pair containing the mnemonic for MI and the number of bits left for further processing by p...
void printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O) override
static const char * getRegisterName(MCRegister Reg, unsigned AltIdx=AArch64::NoRegAltName)
bool printAliasInstr(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O) override
StringRef getRegName(MCRegister Reg) const override
void printAMIndexedWB(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printMRSSystemRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printAlignedLabel(const MCInst *MI, uint64_t Address, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale, raw_ostream &O)
void printMemExtend(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printUImm12Offset(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printMatrix(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printPrefetchOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printZPRasFPR(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
virtual void printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O)
void printPostIncOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printAMNoIndex(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale, raw_ostream &O)
void printSVCROp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printCondCode(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printBarriernXSOption(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printSystemPStateField(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printShifter(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
std::pair< const char *, uint64_t > getMnemonic(const MCInst *MI) override
Returns a pair containing the mnemonic for MI and the number of bits left for further processing by p...
void printPSBHintOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printGPR64x8(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printSIMDType10Operand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
virtual StringRef getRegName(MCRegister Reg) const
void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O, char SrcRegKind, unsigned Width)
void printMatrixTileVector(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &O)
void printSysCROperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
bool applyTargetSpecificCLOption(StringRef Opt) override
Customize the printer according to a command line option.
void printRPRFMOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printVectorList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O, StringRef LayoutSuffix)
void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
Print a list of vector registers where the type suffix is implicit (i.e.
void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printExtendedRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
virtual void printCustomAliasOperand(const MCInst *MI, uint64_t Address, unsigned OpIdx, unsigned PrintMethodIdx, const MCSubtargetInfo &STI, raw_ostream &O)
bool printRangePrefetchAlias(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &O, StringRef Annot)
void printMSRSystemRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printSVERegOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printMatrixTile(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printFPImmOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printSVEVecLenSpecifier(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printBTIHintOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printSyspXzrPair(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printArithExtend(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
virtual bool printAliasInstr(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O)
void printImmScale(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printSImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printAddSubImm(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printImmSVE(T Value, raw_ostream &O)
void printShiftedRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printComplexRotationOp(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printGPR64as32(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
bool printSyspAlias(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &O)
void printMatrixTileList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printImmRangeScale(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printTypedVectorList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override
Print the specified MCInst to the specified raw_ostream.
void printRegName(raw_ostream &OS, MCRegister Reg) const override
Print the assembler register name.
void printLogicalImm(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printMatrixIndex(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printSVEPattern(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
static const char * getRegisterName(MCRegister Reg, unsigned AltIdx=AArch64::NoRegAltName)
void printVRegOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm, raw_ostream &O)
void printPredicateAsCounter(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printVectorIndex(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printImm8OptLsl(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printInverseCondCode(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printExactFPImm(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printBarrierOption(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printSVELogicalImm(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:44
const MCInstrInfo & MII
Definition: MCInstPrinter.h:51
const MCRegisterInfo & MRI
Definition: MCInstPrinter.h:52
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:50
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:26
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24
Generic base class for all target subtargets.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
LLVM Value Representation.
Definition: Value.h:74
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:147