LLVM 20.0.0git
HexagonInstPrinter.cpp
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1//===- HexagonInstPrinter.cpp - Convert Hexagon MCInst to assembly syntax -===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This class prints an Hexagon MCInst to a .s file.
10//
11//===----------------------------------------------------------------------===//
12
13#include "HexagonInstPrinter.h"
16#include "llvm/MC/MCAsmInfo.h"
17#include "llvm/MC/MCExpr.h"
18#include "llvm/MC/MCInst.h"
19#include "llvm/Support/Debug.h"
21
22using namespace llvm;
23
24#define DEBUG_TYPE "asm-printer"
25
26#define GET_INSTRUCTION_NAME
27#include "HexagonGenAsmWriter.inc"
28
30 O << getRegisterName(Reg);
31}
32
34 StringRef Annot, const MCSubtargetInfo &STI,
35 raw_ostream &OS) {
39 HasExtender = false;
40 for (auto const &I : HexagonMCInstrInfo::bundleInstructions(*MI)) {
41 MCInst const &MCI = *I.getInst();
42 if (HexagonMCInstrInfo::isDuplex(MII, MCI)) {
44 OS << '\v';
45 HasExtender = false;
47 } else
49 HasExtender = HexagonMCInstrInfo::isImmext(MCI);
50 OS << "\n";
51 }
52
53 bool IsLoop0 = HexagonMCInstrInfo::isInnerLoop(*MI);
54 bool IsLoop1 = HexagonMCInstrInfo::isOuterLoop(*MI);
55 if (IsLoop0) {
56 OS << (IsLoop1 ? " :endloop01" : " :endloop0");
57 } else if (IsLoop1) {
58 OS << " :endloop1";
59 }
60}
61
62void HexagonInstPrinter::printOperand(MCInst const *MI, unsigned OpNo,
63 raw_ostream &O) const {
64 if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo &&
65 (HasExtender || HexagonMCInstrInfo::isConstExtended(MII, *MI)))
66 O << "#";
67 MCOperand const &MO = MI->getOperand(OpNo);
68 if (MO.isReg()) {
69 O << getRegisterName(MO.getReg());
70 } else if (MO.isExpr()) {
71 int64_t Value;
72 if (MO.getExpr()->evaluateAsAbsolute(Value))
73 O << formatImm(Value);
74 else
75 O << *MO.getExpr();
76 } else {
77 llvm_unreachable("Unknown operand");
78 }
79}
80
81void HexagonInstPrinter::printBrtarget(MCInst const *MI, unsigned OpNo,
82 raw_ostream &O) const {
83 MCOperand const &MO = MI->getOperand(OpNo);
84 assert (MO.isExpr());
85 MCExpr const &Expr = *MO.getExpr();
86 int64_t Value;
87 if (Expr.evaluateAsAbsolute(Value))
88 O << format("0x%" PRIx64, Value);
89 else {
90 if (HasExtender || HexagonMCInstrInfo::isConstExtended(MII, *MI))
91 if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo)
92 O << "##";
93 O << Expr;
94 }
95}
#define HEXAGON_PACKET_SIZE
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
void printRegName(raw_ostream &O, MCRegister Reg) const override
Print the assembler register name.
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O)
void printBrtarget(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printInst(MCInst const *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override
Print the specified MCInst to the specified raw_ostream.
static char const * getRegisterName(MCRegister Reg)
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:34
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:206
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:69
bool isReg() const
Definition: MCInst.h:61
const MCInst * getInst() const
Definition: MCInst.h:124
const MCExpr * getExpr() const
Definition: MCInst.h:114
bool isExpr() const
Definition: MCInst.h:65
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Generic base class for all target subtargets.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
LLVM Value Representation.
Definition: Value.h:74
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI)
bool isOuterLoop(MCInst const &MCI)
size_t bundleSize(MCInst const &MCI)
bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI)
iterator_range< Hexagon::PacketIterator > bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI)
bool isBundle(MCInst const &MCI)
bool isImmext(MCInst const &MCI)
bool isInnerLoop(MCInst const &MCI)
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:125