LLVM  15.0.0git
RISCVTargetStreamer.cpp
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1 //===-- RISCVTargetStreamer.cpp - RISCV Target Streamer Methods -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides RISCV specific target streamer methods.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "RISCVTargetStreamer.h"
14 #include "RISCVBaseInfo.h"
15 #include "RISCVMCTargetDesc.h"
19 
20 using namespace llvm;
21 
23 
26 
38  StringRef String) {}
40  unsigned IntValue,
41  StringRef StringValue) {}
43  assert(ABI != RISCVABI::ABI_Unknown && "Improperly initialized target ABI");
44  TargetABI = ABI;
45 }
46 
48  if (STI.hasFeature(RISCV::FeatureRV32E))
50  else
52 
53  auto ParseResult = RISCVFeatures::parseFeatureBits(
54  STI.hasFeature(RISCV::Feature64Bit), STI.getFeatureBits());
55  if (!ParseResult) {
56  report_fatal_error(ParseResult.takeError());
57  } else {
58  auto &ISAInfo = *ParseResult;
59  emitTextAttribute(RISCVAttrs::ARCH, ISAInfo->toString());
60  }
61 }
62 
63 // This part is for ascii assembly output
66  : RISCVTargetStreamer(S), OS(OS) {}
67 
69  OS << "\t.option\tpush\n";
70 }
71 
73  OS << "\t.option\tpop\n";
74 }
75 
77  OS << "\t.option\tpic\n";
78 }
79 
81  OS << "\t.option\tnopic\n";
82 }
83 
85  OS << "\t.option\trvc\n";
86 }
87 
89  OS << "\t.option\tnorvc\n";
90 }
91 
93  OS << "\t.option\trelax\n";
94 }
95 
97  OS << "\t.option\tnorelax\n";
98 }
99 
100 void RISCVTargetAsmStreamer::emitAttribute(unsigned Attribute, unsigned Value) {
101  OS << "\t.attribute\t" << Attribute << ", " << Twine(Value) << "\n";
102 }
103 
104 void RISCVTargetAsmStreamer::emitTextAttribute(unsigned Attribute,
105  StringRef String) {
106  OS << "\t.attribute\t" << Attribute << ", \"" << String << "\"\n";
107 }
108 
109 void RISCVTargetAsmStreamer::emitIntTextAttribute(unsigned Attribute,
110  unsigned IntValue,
111  StringRef StringValue) {}
112 
113 void RISCVTargetAsmStreamer::finishAttributeSection() {}
llvm::RISCVTargetStreamer::emitAttribute
virtual void emitAttribute(unsigned Attribute, unsigned Value)
Definition: RISCVTargetStreamer.cpp:35
llvm::RISCVTargetStreamer::emitDirectiveOptionRelax
virtual void emitDirectiveOptionRelax()
Definition: RISCVTargetStreamer.cpp:33
ABI
Generic address nodes are lowered to some combination of target independent and machine specific ABI
Definition: Relocation.txt:34
llvm::RISCVTargetStreamer::reset
virtual void reset()
Definition: RISCVTargetStreamer.cpp:25
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::RISCVTargetAsmStreamer::emitDirectiveOptionRVC
void emitDirectiveOptionRVC() override
Definition: RISCVTargetStreamer.cpp:84
llvm::RISCVTargetStreamer::emitTargetAttributes
void emitTargetAttributes(const MCSubtargetInfo &STI)
Definition: RISCVTargetStreamer.cpp:47
llvm::Attribute
Definition: Attributes.h:65
llvm::RISCVTargetStreamer::emitDirectiveOptionNoRVC
virtual void emitDirectiveOptionNoRVC()
Definition: RISCVTargetStreamer.cpp:32
RISCVAttributes.h
llvm::RISCVAttrs::ALIGN_16
@ ALIGN_16
Definition: RISCVAttributes.h:37
llvm::RISCVAttrs::STACK_ALIGN
@ STACK_ALIGN
Definition: RISCVAttributes.h:29
FormattedStream.h
llvm::MCStreamer
Streaming machine code generation interface.
Definition: MCStreamer.h:212
llvm::RISCVTargetStreamer::emitTextAttribute
virtual void emitTextAttribute(unsigned Attribute, StringRef String)
Definition: RISCVTargetStreamer.cpp:37
llvm::MCSubtargetInfo::hasFeature
bool hasFeature(unsigned Feature) const
Definition: MCSubtargetInfo.h:119
llvm::RISCVTargetStreamer::emitDirectiveOptionPop
virtual void emitDirectiveOptionPop()
Definition: RISCVTargetStreamer.cpp:28
llvm::RISCVAttrs::ALIGN_4
@ ALIGN_4
Definition: RISCVAttributes.h:37
llvm::MCSubtargetInfo::getFeatureBits
const FeatureBitset & getFeatureBits() const
Definition: MCSubtargetInfo.h:112
RISCVMCTargetDesc.h
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:143
llvm::MCTargetStreamer
Target specific streamer interface.
Definition: MCStreamer.h:93
llvm::RISCVFeatures::parseFeatureBits
llvm::Expected< std::unique_ptr< RISCVISAInfo > > parseFeatureBits(bool IsRV64, const FeatureBitset &FeatureBits)
Definition: RISCVBaseInfo.cpp:107
llvm::RISCVTargetAsmStreamer::emitDirectiveOptionRelax
void emitDirectiveOptionRelax() override
Definition: RISCVTargetStreamer.cpp:92
llvm::RISCVTargetStreamer::emitDirectiveOptionNoRelax
virtual void emitDirectiveOptionNoRelax()
Definition: RISCVTargetStreamer.cpp:34
RISCVTargetStreamer.h
llvm::RISCVTargetStreamer::RISCVTargetStreamer
RISCVTargetStreamer(MCStreamer &S)
Definition: RISCVTargetStreamer.cpp:22
RISCVISAInfo.h
llvm::RISCVTargetStreamer::emitDirectiveOptionPIC
virtual void emitDirectiveOptionPIC()
Definition: RISCVTargetStreamer.cpp:29
llvm::formatted_raw_ostream
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
Definition: FormattedStream.h:30
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::RISCVTargetStreamer::emitDirectiveOptionNoPIC
virtual void emitDirectiveOptionNoPIC()
Definition: RISCVTargetStreamer.cpp:30
llvm::RISCVTargetAsmStreamer::emitDirectiveOptionNoRelax
void emitDirectiveOptionNoRelax() override
Definition: RISCVTargetStreamer.cpp:96
llvm::RISCVTargetStreamer::finishAttributeSection
virtual void finishAttributeSection()
Definition: RISCVTargetStreamer.cpp:36
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::RISCVTargetAsmStreamer::RISCVTargetAsmStreamer
RISCVTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS)
Definition: RISCVTargetStreamer.cpp:64
llvm::RISCVTargetAsmStreamer::emitDirectiveOptionPop
void emitDirectiveOptionPop() override
Definition: RISCVTargetStreamer.cpp:72
llvm::RISCVAttrs::ARCH
@ ARCH
Definition: RISCVAttributes.h:30
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::RISCVTargetStreamer::finish
void finish() override
Definition: RISCVTargetStreamer.cpp:24
llvm::RISCVTargetStreamer::emitDirectiveOptionRVC
virtual void emitDirectiveOptionRVC()
Definition: RISCVTargetStreamer.cpp:31
llvm::RISCVTargetStreamer::setTargetABI
void setTargetABI(RISCVABI::ABI ABI)
Definition: RISCVTargetStreamer.cpp:42
llvm::RISCVTargetAsmStreamer::emitDirectiveOptionPIC
void emitDirectiveOptionPIC() override
Definition: RISCVTargetStreamer.cpp:76
llvm::RISCVTargetAsmStreamer::emitDirectiveOptionNoRVC
void emitDirectiveOptionNoRVC() override
Definition: RISCVTargetStreamer.cpp:88
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
llvm::RISCVTargetStreamer::emitIntTextAttribute
virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue, StringRef StringValue)
Definition: RISCVTargetStreamer.cpp:39
RISCVBaseInfo.h
llvm::RISCVABI::ABI_Unknown
@ ABI_Unknown
Definition: RISCVBaseInfo.h:355
llvm::RISCVTargetStreamer
Definition: RISCVTargetStreamer.h:20
llvm::RISCVTargetAsmStreamer::emitDirectiveOptionPush
void emitDirectiveOptionPush() override
Definition: RISCVTargetStreamer.cpp:68
llvm::pdb::String
@ String
Definition: PDBTypes.h:408
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:76
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::RISCVABI::ABI
ABI
Definition: RISCVBaseInfo.h:347
llvm::RISCVTargetAsmStreamer::emitDirectiveOptionNoPIC
void emitDirectiveOptionNoPIC() override
Definition: RISCVTargetStreamer.cpp:80
llvm::RISCVTargetStreamer::emitDirectiveOptionPush
virtual void emitDirectiveOptionPush()
Definition: RISCVTargetStreamer.cpp:27