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23 #define DEBUG_TYPE "asm-printer"
33 #define GET_INSTRUCTION_NAME
34 #define PRINT_ALIAS_INSTR
35 #include "SparcGenAsmWriter.inc"
58 switch (
MI->getOpcode()) {
59 default:
return false;
62 if (
MI->getNumOperands() != 3)
64 if (!
MI->getOperand(0).isReg())
66 switch (
MI->getOperand(0).getReg()) {
67 default:
return false;
69 if (
MI->getOperand(2).isImm() &&
70 MI->getOperand(2).getImm() == 8) {
71 switch(
MI->getOperand(1).getReg()) {
73 case SP::I7:
O <<
"\tret";
return true;
74 case SP::O7:
O <<
"\tretl";
return true;
84 case SP::V9FCMPS:
case SP::V9FCMPD:
case SP::V9FCMPQ:
85 case SP::V9FCMPES:
case SP::V9FCMPED:
case SP::V9FCMPEQ: {
87 || (
MI->getNumOperands() != 3)
88 || (!
MI->getOperand(0).isReg())
89 || (
MI->getOperand(0).getReg() != SP::FCC0))
92 switch(
MI->getOpcode()) {
94 case SP::V9FCMPS:
O <<
"\tfcmps ";
break;
95 case SP::V9FCMPD:
O <<
"\tfcmpd ";
break;
96 case SP::V9FCMPQ:
O <<
"\tfcmpq ";
break;
97 case SP::V9FCMPES:
O <<
"\tfcmpes ";
break;
98 case SP::V9FCMPED:
O <<
"\tfcmped ";
break;
99 case SP::V9FCMPEQ:
O <<
"\tfcmpeq ";
break;
120 switch (
MI->getOpcode()) {
137 assert(MO.
isExpr() &&
"Unknown operand kind in printOperand");
145 if (Modifier && !strcmp(Modifier,
"arith")) {
155 bool PrintedFirstOperand =
false;
158 PrintedFirstOperand =
true;
163 const bool SkipSecondOperand =
164 PrintedFirstOperand && ((Op2.
isReg() && Op2.
getReg() == SP::G0) ||
167 if (!SkipSecondOperand) {
168 if (PrintedFirstOperand)
177 int CC = (
int)
MI->getOperand(opNum).getImm();
178 switch (
MI->getOpcode()) {
186 case SP::MOVFCCrr:
case SP::V9MOVFCCrr:
187 case SP::MOVFCCri:
case SP::V9MOVFCCri:
188 case SP::FMOVS_FCC:
case SP::V9FMOVS_FCC:
189 case SP::FMOVD_FCC:
case SP::V9FMOVD_FCC:
190 case SP::FMOVQ_FCC:
case SP::V9FMOVQ_FCC:
192 CC = (CC < 16) ? (CC + 16) : CC;
197 CC = (CC < 32) ? (CC + 32) : CC;
213 static const char *
const TagNames[] = {
214 "#LoadLoad",
"#StoreLoad",
"#LoadStore",
"#StoreStore",
215 "#Lookaside",
"#MemIssue",
"#Sync"};
217 unsigned Imm =
MI->getOperand(opNum).getImm();
225 for (
unsigned i = 0;
i <
sizeof(TagNames) /
sizeof(
char *);
i++) {
226 if (
Imm & (1 <<
i)) {
227 O << (
First ?
"" :
" | ") << TagNames[
i];
void printMembarTag(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &O)
This is an optimization pass for GlobalISel generic memory operations.
void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &OS, const char *Modifier=nullptr)
bool printGetPCX(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &OS)
void printRegName(raw_ostream &OS, unsigned RegNo) const override
Print the assembler register name.
Instances of this class represent a single low-level machine instruction.
void printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O)
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
bool printAliasInstr(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O)
into llvm powi allowing the code generator to produce balanced multiplication trees First
const FeatureBitset & getFeatureBits() const
This class implements an extremely fast bulk output stream that can only output to a stream.
static const char * getRegisterName(unsigned RegNo)
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override
Print the specified MCInst to the specified raw_ostream.
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &OS)
std::string lower() const
bool isV9(const MCSubtargetInfo &STI) const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
StringRef - Represent a constant reference to a string, i.e.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static const char * SPARCCondCodeToString(SPCC::CondCodes CC)
const MCExpr * getExpr() const
void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &OS)
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
Instances of this class represent operands of the MCInst class.
void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &OS)
Generic base class for all target subtargets.
unsigned getReg() const
Returns the register number.