23 #define DEBUG_TYPE "asm-printer" 33 #define GET_INSTRUCTION_NAME 34 #define PRINT_ALIAS_INSTR 35 #include "SparcGenAsmWriter.inc" 48 if (!printAliasInstr(MI, STI, O) && !printSparcAliasInstr(MI, STI, O))
49 printInstruction(MI, STI, O);
50 printAnnotation(O, Annot);
57 default:
return false;
65 default:
return false;
71 case SP::I7: O <<
"\tret";
return true;
72 case SP::O7: O <<
"\tretl";
return true;
82 case SP::V9FCMPS:
case SP::V9FCMPD:
case SP::V9FCMPQ:
83 case SP::V9FCMPES:
case SP::V9FCMPED:
case SP::V9FCMPEQ: {
92 case SP::V9FCMPS: O <<
"\tfcmps ";
break;
93 case SP::V9FCMPD: O <<
"\tfcmpd ";
break;
94 case SP::V9FCMPQ: O <<
"\tfcmpq ";
break;
95 case SP::V9FCMPES: O <<
"\tfcmpes ";
break;
96 case SP::V9FCMPED: O <<
"\tfcmped ";
break;
97 case SP::V9FCMPEQ: O <<
"\tfcmpeq ";
break;
113 printRegName(O, MO.
getReg());
130 O << ((int) MO.
getImm() & 0x7f);
135 assert(MO.
isExpr() &&
"Unknown operand kind in printOperand");
145 if (Modifier && !strcmp(Modifier,
"arith")) {
174 case SP::MOVFCCrr:
case SP::V9MOVFCCrr:
175 case SP::MOVFCCri:
case SP::V9MOVFCCri:
176 case SP::FMOVS_FCC:
case SP::V9FMOVS_FCC:
177 case SP::FMOVD_FCC:
case SP::V9FMOVD_FCC:
178 case SP::FMOVQ_FCC:
case SP::V9FMOVQ_FCC:
180 CC = (CC < 16) ? (CC + 16) : CC;
185 CC = (CC < 32) ? (CC + 32) : CC;
201 static const char *
const TagNames[] = {
202 "#LoadLoad",
"#StoreLoad",
"#LoadStore",
"#StoreStore",
203 "#Lookaside",
"#MemIssue",
"#Sync"};
213 for (
unsigned i = 0; i <
sizeof(
TagNames) /
sizeof(
char *); i++) {
214 if (Imm & (1 << i)) {
215 O << (First ?
"" :
" | ") << TagNames[i];
This class represents lattice values for constants.
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
const FeatureBitset & getFeatureBits() const
void printMembarTag(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &O)
static const char * SPARCCondCodeToString(SPCC::CondCodes CC)
unsigned getReg() const
Returns the register number.
static std::string getRegisterName(const TargetRegisterInfo *TRI, unsigned Reg)
void printRegName(raw_ostream &OS, unsigned RegNo) const override
Print the assembler register name.
const MCExpr * getExpr() const
Instances of this class represent a single low-level machine instruction.
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &OS, const char *Modifier=nullptr)
unsigned getNumOperands() const
static const EnumEntry< unsigned > TagNames[]
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
const MCOperand & getOperand(unsigned i) const
bool printGetPCX(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &OS)
void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &OS)
void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI, raw_ostream &OS)
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
bool isV9(const MCSubtargetInfo &STI) const
Generic base class for all target subtargets.
LLVM_NODISCARD std::string lower() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This class implements an extremely fast bulk output stream that can only output to a stream...
StringRef - Represent a constant reference to a string, i.e.
unsigned getOpcode() const
Instances of this class represent operands of the MCInst class.
bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &OS)