9#ifndef LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
10#define LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
37 std::optional<int64_t> Offset;
38 bool IsIndexSignExt =
false;
47 IsIndexSignExt(IsIndexSignExt) {}
54 Offset = Offset.value_or(0) + VectorOff;
75 int64_t &BitOffset)
const;
80 return contains(DAG, BitSize,
Other, OtherBitSize, BitOffset);
This file provides utility analysis objects describing memory locations.
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
BaseIndexOffset()=default
bool hasValidOffset() const
void addToOffset(int64_t VectorOff)
BaseIndexOffset(SDValue Base, SDValue Index, int64_t Offset, bool IsIndexSignExt)
bool equalBaseIndex(const BaseIndexOffset &Other, const SelectionDAG &DAG) const
bool contains(const SelectionDAG &DAG, int64_t BitSize, const BaseIndexOffset &Other, int64_t OtherBitSize) const
BaseIndexOffset(SDValue Base, SDValue Index, bool IsIndexSignExt)
int64_t getOffset() const
bool equalBaseIndex(const BaseIndexOffset &Other, const SelectionDAG &DAG, int64_t &Off) const
Helper struct to store a base, index and offset that forms an address.
Represents one node in the SelectionDAG.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
This class implements an extremely fast bulk output stream that can only output to a stream.
bool match(Val *V, const Pattern &P)
This is an optimization pass for GlobalISel generic memory operations.
void dump(const SparseBitVector< ElementSize > &LHS, raw_ostream &out)
Printable print(const GCNRegPressure &RP, const GCNSubtarget *ST=nullptr)