LLVM  14.0.0git
Namespaces | Macros | Enumerations | Functions
X86MCTargetDesc.h File Reference
#include <memory>
#include <string>
#include "X86GenRegisterInfo.inc"
#include "X86GenInstrInfo.inc"
#include "X86GenSubtargetInfo.inc"
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 This is an optimization pass for GlobalISel generic memory operations.
 Flavour of dwarf regnumbers.
 Native X86 register numbers.




enum  { llvm::DWARFFlavour::X86_64 = 0, llvm::DWARFFlavour::X86_32_DarwinEH = 1, llvm::DWARFFlavour::X86_32_Generic = 2 }
enum  {
  llvm::N86::EAX = 0, llvm::N86::ECX = 1, llvm::N86::EDX = 2, llvm::N86::EBX = 3,
  llvm::N86::ESP = 4, llvm::N86::EBP = 5, llvm::N86::ESI = 6, llvm::N86::EDI = 7


std::string llvm::X86_MC::ParseX86Triple (const Triple &TT)
unsigned llvm::X86_MC::getDwarfRegFlavour (const Triple &TT, bool isEH)
void llvm::X86_MC::initLLVMToSEHAndCVRegMapping (MCRegisterInfo *MRI)
bool llvm::X86_MC::hasLockPrefix (const MCInst &MI)
 Returns true if this instruction has a LOCK prefix. More...
MCSubtargetInfollvm::X86_MC::createX86MCSubtargetInfo (const Triple &TT, StringRef CPU, StringRef FS)
 Create a X86 MCSubtargetInfo instance. More...
MCCodeEmitterllvm::createX86MCCodeEmitter (const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
MCAsmBackendllvm::createX86_32AsmBackend (const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCAsmBackendllvm::createX86_64AsmBackend (const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCTargetStreamerllvm::createX86AsmTargetStreamer (MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrinter, bool IsVerboseAsm)
 Implements X86-only directives for assembly emission. More...
MCTargetStreamerllvm::createX86ObjectTargetStreamer (MCStreamer &S, const MCSubtargetInfo &STI)
 Implements X86-only directives for object files. More...
MCStreamerllvm::createX86WinCOFFStreamer (MCContext &C, std::unique_ptr< MCAsmBackend > &&AB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&CE, bool RelaxAll, bool IncrementalLinkerCompatible)
 Construct an X86 Windows COFF machine code streamer which will generate PE/COFF format object files. More...
std::unique_ptr< MCObjectTargetWriterllvm::createX86MachObjectWriter (bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
 Construct an X86 Mach-O object writer. More...
std::unique_ptr< MCObjectTargetWriterllvm::createX86ELFObjectWriter (bool IsELF64, uint8_t OSABI, uint16_t EMachine)
 Construct an X86 ELF object writer. More...
std::unique_ptr< MCObjectTargetWriterllvm::createX86WinCOFFObjectWriter (bool Is64Bit)
 Construct an X86 Win COFF object writer. More...
MCRegister llvm::getX86SubSuperRegister (MCRegister, unsigned, bool High=false)
 Returns the sub or super register of a specific X86 register. More...
MCRegister llvm::getX86SubSuperRegisterOrZero (MCRegister, unsigned, bool High=false)
 Returns the sub or super register of a specific X86 register. More...

Macro Definition Documentation



Definition at line 138 of file X86MCTargetDesc.h.



Definition at line 139 of file X86MCTargetDesc.h.



Definition at line 133 of file X86MCTargetDesc.h.



Definition at line 142 of file X86MCTargetDesc.h.