LLVM 19.0.0git
Classes | Enumerations | Functions
llvm::AMDGPU::IsaInfo Namespace Reference

Classes

class  AMDGPUTargetID
 

Enumerations

enum  { FIXED_NUM_SGPRS_FOR_INIT_BUG = 96 , TRAP_NUM_SGPRS = 16 }
 
enum class  TargetIDSetting { Unsupported , Any , Off , On }
 

Functions

static TargetIDSetting getTargetIDSettingFromFeatureString (StringRef FeatureString)
 
unsigned getWavefrontSize (const MCSubtargetInfo *STI)
 
unsigned getLocalMemorySize (const MCSubtargetInfo *STI)
 
unsigned getAddressableLocalMemorySize (const MCSubtargetInfo *STI)
 
unsigned getEUsPerCU (const MCSubtargetInfo *STI)
 
unsigned getMaxWorkGroupsPerCU (const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
 
unsigned getMinWavesPerEU (const MCSubtargetInfo *STI)
 
unsigned getMaxWavesPerEU (const MCSubtargetInfo *STI)
 
unsigned getWavesPerEUForWorkGroup (const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
 
unsigned getMinFlatWorkGroupSize (const MCSubtargetInfo *STI)
 
unsigned getMaxFlatWorkGroupSize (const MCSubtargetInfo *STI)
 
unsigned getWavesPerWorkGroup (const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
 
unsigned getSGPRAllocGranule (const MCSubtargetInfo *STI)
 
unsigned getSGPREncodingGranule (const MCSubtargetInfo *STI)
 
unsigned getTotalNumSGPRs (const MCSubtargetInfo *STI)
 
unsigned getAddressableNumSGPRs (const MCSubtargetInfo *STI)
 
unsigned getMinNumSGPRs (const MCSubtargetInfo *STI, unsigned WavesPerEU)
 
unsigned getMaxNumSGPRs (const MCSubtargetInfo *STI, unsigned WavesPerEU, bool Addressable)
 
unsigned getNumExtraSGPRs (const MCSubtargetInfo *STI, bool VCCUsed, bool FlatScrUsed, bool XNACKUsed)
 
unsigned getNumExtraSGPRs (const MCSubtargetInfo *STI, bool VCCUsed, bool FlatScrUsed)
 
static unsigned getGranulatedNumRegisterBlocks (unsigned NumRegs, unsigned Granule)
 
unsigned getNumSGPRBlocks (const MCSubtargetInfo *STI, unsigned NumSGPRs)
 
unsigned getVGPRAllocGranule (const MCSubtargetInfo *STI, std::optional< bool > EnableWavefrontSize32)
 
unsigned getVGPREncodingGranule (const MCSubtargetInfo *STI, std::optional< bool > EnableWavefrontSize32)
 
unsigned getTotalNumVGPRs (const MCSubtargetInfo *STI)
 
unsigned getAddressableNumArchVGPRs (const MCSubtargetInfo *STI)
 
unsigned getAddressableNumVGPRs (const MCSubtargetInfo *STI)
 
unsigned getNumWavesPerEUWithNumVGPRs (const MCSubtargetInfo *STI, unsigned NumVGPRs)
 
unsigned getMinNumVGPRs (const MCSubtargetInfo *STI, unsigned WavesPerEU)
 
unsigned getMaxNumVGPRs (const MCSubtargetInfo *STI, unsigned WavesPerEU)
 
unsigned getEncodedNumVGPRBlocks (const MCSubtargetInfo *STI, unsigned NumVGPRs, std::optional< bool > EnableWavefrontSize32)
 
unsigned getAllocatedNumVGPRBlocks (const MCSubtargetInfo *STI, unsigned NumVGPRs, std::optional< bool > EnableWavefrontSize32)
 

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
FIXED_NUM_SGPRS_FOR_INIT_BUG 
TRAP_NUM_SGPRS 

Definition at line 110 of file AMDGPUBaseInfo.h.

◆ TargetIDSetting

Enumerator
Unsupported 
Any 
Off 
On 

Definition at line 117 of file AMDGPUBaseInfo.h.

Function Documentation

◆ getAddressableLocalMemorySize()

unsigned llvm::AMDGPU::IsaInfo::getAddressableLocalMemorySize ( const MCSubtargetInfo STI)
Returns
Maximum addressable local memory size in bytes for given subtarget STI.

Definition at line 896 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().

◆ getAddressableNumArchVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getAddressableNumArchVGPRs ( const MCSubtargetInfo STI)
Returns
Addressable number of architectural VGPRs for a given subtarget STI.

Definition at line 1116 of file AMDGPUBaseInfo.cpp.

Referenced by llvm::GCNSubtarget::getAddressableNumArchVGPRs(), and getAddressableNumVGPRs().

◆ getAddressableNumSGPRs()

unsigned llvm::AMDGPU::IsaInfo::getAddressableNumSGPRs ( const MCSubtargetInfo STI)

◆ getAddressableNumVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getAddressableNumVGPRs ( const MCSubtargetInfo STI)

◆ getAllocatedNumVGPRBlocks()

unsigned llvm::AMDGPU::IsaInfo::getAllocatedNumVGPRBlocks ( const MCSubtargetInfo STI,
unsigned  NumVGPRs,
std::optional< bool EnableWavefrontSize32 = std::nullopt 
)
Returns
Number of VGPR blocks that need to be allocated for the given subtarget STI when NumVGPRs are used.

Definition at line 1174 of file AMDGPUBaseInfo.cpp.

References getGranulatedNumRegisterBlocks(), and getVGPRAllocGranule().

◆ getEncodedNumVGPRBlocks()

unsigned llvm::AMDGPU::IsaInfo::getEncodedNumVGPRBlocks ( const MCSubtargetInfo STI,
unsigned  NumVGPRs,
std::optional< bool EnableWavefrontSize32 = std::nullopt 
)
Returns
Number of VGPR blocks needed for given subtarget STI when NumVGPRs are used. We actually return the number of blocks -1, since that's what we encode.

For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.

Definition at line 1167 of file AMDGPUBaseInfo.cpp.

References getGranulatedNumRegisterBlocks(), and getVGPREncodingGranule().

◆ getEUsPerCU()

unsigned llvm::AMDGPU::IsaInfo::getEUsPerCU ( const MCSubtargetInfo STI)
Returns
Number of execution units per compute unit for given subtarget STI.

Definition at line 904 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), and llvm::FeatureBitset::test().

Referenced by llvm::GCNSubtarget::GCNSubtarget(), getMaxWorkGroupsPerCU(), and getWavesPerEUForWorkGroup().

◆ getGranulatedNumRegisterBlocks()

static unsigned llvm::AMDGPU::IsaInfo::getGranulatedNumRegisterBlocks ( unsigned  NumRegs,
unsigned  Granule 
)
static

◆ getLocalMemorySize()

unsigned llvm::AMDGPU::IsaInfo::getLocalMemorySize ( const MCSubtargetInfo STI)
Returns
Local memory size in bytes for given subtarget STI.

Definition at line 880 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), and llvm::FeatureBitset::test().

◆ getMaxFlatWorkGroupSize()

unsigned llvm::AMDGPU::IsaInfo::getMaxFlatWorkGroupSize ( const MCSubtargetInfo STI)
Returns
Maximum flat work group size for given subtarget STI.

Definition at line 957 of file AMDGPUBaseInfo.cpp.

Referenced by llvm::GCNSubtarget::getMaxFlatWorkGroupSize(), and llvm::R600Subtarget::getMaxFlatWorkGroupSize().

◆ getMaxNumSGPRs()

unsigned llvm::AMDGPU::IsaInfo::getMaxNumSGPRs ( const MCSubtargetInfo STI,
unsigned  WavesPerEU,
bool  Addressable 
)
Returns
Maximum number of SGPRs that meets the given number of waves per execution unit requirement for given subtarget STI.

Definition at line 1016 of file AMDGPUBaseInfo.cpp.

References llvm::alignDown(), assert(), getAddressableNumSGPRs(), llvm::MCSubtargetInfo::getCPU(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::getIsaVersion(), getSGPRAllocGranule(), getTotalNumSGPRs(), llvm::FeatureBitset::test(), and TRAP_NUM_SGPRS.

Referenced by llvm::GCNSubtarget::getMaxNumSGPRs().

◆ getMaxNumVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getMaxNumVGPRs ( const MCSubtargetInfo STI,
unsigned  WavesPerEU 
)
Returns
Maximum number of VGPRs that meets given number of waves per execution unit requirement for given subtarget STI.

Definition at line 1158 of file AMDGPUBaseInfo.cpp.

References llvm::alignDown(), assert(), getAddressableNumVGPRs(), getTotalNumVGPRs(), and getVGPRAllocGranule().

Referenced by llvm::GCNSubtarget::getMaxNumVGPRs().

◆ getMaxWavesPerEU()

unsigned llvm::AMDGPU::IsaInfo::getMaxWavesPerEU ( const MCSubtargetInfo STI)
Returns
Maximum number of waves per execution unit for given subtarget STI without any kind of limitation.

Definition at line 938 of file AMDGPUBaseInfo.cpp.

References llvm::AMDGPU::hasGFX10_3Insts(), llvm::AMDGPU::isGFX10Plus(), and llvm::AMDGPU::isGFX90A().

Referenced by llvm::GCNSubtarget::GCNSubtarget(), getMaxWorkGroupsPerCU(), getMinNumSGPRs(), getMinNumVGPRs(), and getNumWavesPerEUWithNumVGPRs().

◆ getMaxWorkGroupsPerCU()

unsigned llvm::AMDGPU::IsaInfo::getMaxWorkGroupsPerCU ( const MCSubtargetInfo STI,
unsigned  FlatWorkGroupSize 
)

◆ getMinFlatWorkGroupSize()

unsigned llvm::AMDGPU::IsaInfo::getMinFlatWorkGroupSize ( const MCSubtargetInfo STI)
Returns
Minimum flat work group size for given subtarget STI.

Definition at line 953 of file AMDGPUBaseInfo.cpp.

Referenced by llvm::GCNSubtarget::getMinFlatWorkGroupSize(), and llvm::R600Subtarget::getMinFlatWorkGroupSize().

◆ getMinNumSGPRs()

unsigned llvm::AMDGPU::IsaInfo::getMinNumSGPRs ( const MCSubtargetInfo STI,
unsigned  WavesPerEU 
)
Returns
Minimum number of SGPRs that meets the given number of waves per execution unit requirement for given subtarget STI.

Definition at line 999 of file AMDGPUBaseInfo.cpp.

References llvm::alignDown(), assert(), getAddressableNumSGPRs(), llvm::MCSubtargetInfo::getCPU(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::getIsaVersion(), getMaxWavesPerEU(), getSGPRAllocGranule(), getTotalNumSGPRs(), llvm::FeatureBitset::test(), and TRAP_NUM_SGPRS.

Referenced by llvm::GCNSubtarget::getMinNumSGPRs().

◆ getMinNumVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getMinNumVGPRs ( const MCSubtargetInfo STI,
unsigned  WavesPerEU 
)
Returns
Minimum number of VGPRs that meets given number of waves per execution unit requirement for given subtarget STI.

Definition at line 1134 of file AMDGPUBaseInfo.cpp.

References llvm::alignDown(), assert(), getAddressableNumVGPRs(), getMaxWavesPerEU(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), getTotalNumVGPRs(), and getVGPRAllocGranule().

Referenced by getMinNumVGPRs(), and llvm::GCNSubtarget::getMinNumVGPRs().

◆ getMinWavesPerEU()

unsigned llvm::AMDGPU::IsaInfo::getMinWavesPerEU ( const MCSubtargetInfo STI)
Returns
Minimum number of waves per execution unit for given subtarget STI.

Definition at line 934 of file AMDGPUBaseInfo.cpp.

Referenced by llvm::GCNSubtarget::getMinWavesPerEU(), and llvm::R600Subtarget::getMinWavesPerEU().

◆ getNumExtraSGPRs() [1/2]

unsigned llvm::AMDGPU::IsaInfo::getNumExtraSGPRs ( const MCSubtargetInfo STI,
bool  VCCUsed,
bool  FlatScrUsed 
)
Returns
Number of extra SGPRs implicitly required by given subtarget STI when the given special registers are used. XNACK is inferred from STI.

Definition at line 1058 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), getNumExtraSGPRs(), and llvm::FeatureBitset::test().

◆ getNumExtraSGPRs() [2/2]

unsigned llvm::AMDGPU::IsaInfo::getNumExtraSGPRs ( const MCSubtargetInfo STI,
bool  VCCUsed,
bool  FlatScrUsed,
bool  XNACKUsed 
)
Returns
Number of extra SGPRs implicitly required by given subtarget STI when the given special registers are used.

Definition at line 1033 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getCPU(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::getIsaVersion(), and llvm::FeatureBitset::test().

Referenced by llvm::AMDGPUAsmPrinter::emitFunctionBodyEnd(), getNumExtraSGPRs(), and llvm::AMDGPUResourceUsageAnalysis::SIFunctionResourceInfo::getTotalNumSGPRs().

◆ getNumSGPRBlocks()

unsigned llvm::AMDGPU::IsaInfo::getNumSGPRBlocks ( const MCSubtargetInfo STI,
unsigned  NumSGPRs 
)
Returns
Number of SGPR blocks needed for given subtarget STI when NumSGPRs are used. NumSGPRs should already include any special register counts.

Definition at line 1069 of file AMDGPUBaseInfo.cpp.

References getGranulatedNumRegisterBlocks(), and getSGPREncodingGranule().

◆ getNumWavesPerEUWithNumVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getNumWavesPerEUWithNumVGPRs ( const MCSubtargetInfo STI,
unsigned  NumVGPRs 
)
Returns
Number of waves reachable for a given NumVGPRs usage for given subtarget STI.

Definition at line 1124 of file AMDGPUBaseInfo.cpp.

References llvm::alignTo(), getMaxWavesPerEU(), getTotalNumVGPRs(), and getVGPRAllocGranule().

Referenced by getMinNumVGPRs(), and llvm::GCNSubtarget::getOccupancyWithNumVGPRs().

◆ getSGPRAllocGranule()

unsigned llvm::AMDGPU::IsaInfo::getSGPRAllocGranule ( const MCSubtargetInfo STI)
Returns
SGPR allocation granularity for given subtarget STI.

Definition at line 967 of file AMDGPUBaseInfo.cpp.

References getAddressableNumSGPRs(), llvm::MCSubtargetInfo::getCPU(), and llvm::AMDGPU::getIsaVersion().

Referenced by getMaxNumSGPRs(), getMinNumSGPRs(), and llvm::GCNSubtarget::getSGPRAllocGranule().

◆ getSGPREncodingGranule()

unsigned llvm::AMDGPU::IsaInfo::getSGPREncodingGranule ( const MCSubtargetInfo STI)
Returns
SGPR encoding granularity for given subtarget STI.

Definition at line 976 of file AMDGPUBaseInfo.cpp.

Referenced by llvm::AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC1(), getNumSGPRBlocks(), and llvm::GCNSubtarget::getSGPREncodingGranule().

◆ getTargetIDSettingFromFeatureString()

static TargetIDSetting llvm::AMDGPU::IsaInfo::getTargetIDSettingFromFeatureString ( StringRef  FeatureString)
static

◆ getTotalNumSGPRs()

unsigned llvm::AMDGPU::IsaInfo::getTotalNumSGPRs ( const MCSubtargetInfo STI)
Returns
Total number of SGPRs for given subtarget STI.

Definition at line 980 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getCPU(), and llvm::AMDGPU::getIsaVersion().

Referenced by getMaxNumSGPRs(), getMinNumSGPRs(), and llvm::GCNSubtarget::getTotalNumSGPRs().

◆ getTotalNumVGPRs()

unsigned llvm::AMDGPU::IsaInfo::getTotalNumVGPRs ( const MCSubtargetInfo STI)

◆ getVGPRAllocGranule()

unsigned llvm::AMDGPU::IsaInfo::getVGPRAllocGranule ( const MCSubtargetInfo STI,
std::optional< bool EnableWavefrontSize32 = std::nullopt 
)
Returns
VGPR allocation granularity for given subtarget STI.

For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.

Definition at line 1075 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::hasGFX10_3Insts(), and llvm::FeatureBitset::test().

Referenced by getAllocatedNumVGPRBlocks(), getMaxNumVGPRs(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), llvm::GCNSubtarget::getVGPRAllocGranule(), and llvm::GCNSchedStrategy::initialize().

◆ getVGPREncodingGranule()

unsigned llvm::AMDGPU::IsaInfo::getVGPREncodingGranule ( const MCSubtargetInfo STI,
std::optional< bool EnableWavefrontSize32 = std::nullopt 
)
Returns
VGPR encoding granularity for given subtarget STI.

For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.

Definition at line 1093 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().

Referenced by llvm::AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC1(), getEncodedNumVGPRBlocks(), and llvm::GCNSubtarget::getVGPREncodingGranule().

◆ getWavefrontSize()

unsigned llvm::AMDGPU::IsaInfo::getWavefrontSize ( const MCSubtargetInfo STI)
Returns
Wavefront size for given subtarget STI.

Definition at line 871 of file AMDGPUBaseInfo.cpp.

References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().

Referenced by getWavesPerWorkGroup().

◆ getWavesPerEUForWorkGroup()

unsigned llvm::AMDGPU::IsaInfo::getWavesPerEUForWorkGroup ( const MCSubtargetInfo STI,
unsigned  FlatWorkGroupSize 
)
Returns
Number of waves per execution unit required to support the given FlatWorkGroupSize.

Definition at line 947 of file AMDGPUBaseInfo.cpp.

References llvm::divideCeil(), getEUsPerCU(), and getWavesPerWorkGroup().

Referenced by llvm::GCNSubtarget::getWavesPerEUForWorkGroup(), and llvm::R600Subtarget::getWavesPerEUForWorkGroup().

◆ getWavesPerWorkGroup()

unsigned llvm::AMDGPU::IsaInfo::getWavesPerWorkGroup ( const MCSubtargetInfo STI,
unsigned  FlatWorkGroupSize 
)
Returns
Number of waves per work group for given subtarget STI and FlatWorkGroupSize.

Definition at line 962 of file AMDGPUBaseInfo.cpp.

References llvm::divideCeil(), and getWavefrontSize().

Referenced by getMaxWorkGroupsPerCU(), and getWavesPerEUForWorkGroup().