|
LLVM 24.0.0git
|
Enumerations | |
| enum | { FIXED_NUM_SGPRS_FOR_INIT_BUG = AMDGPU::FIXED_NUM_SGPRS_FOR_INIT_BUG , TRAP_NUM_SGPRS = 16 } |
Variables | |
| static constexpr unsigned | MaxDynamicVGPRBlocks = 8 |
| Maximum number of VGPR blocks that can be allocated in dynamic VGPR mode. | |
| anonymous enum |
| Enumerator | |
|---|---|
| FIXED_NUM_SGPRS_FOR_INIT_BUG | |
| TRAP_NUM_SGPRS | |
Definition at line 161 of file AMDGPUBaseInfo.h.
| unsigned llvm::AMDGPU::IsaInfo::getAddressableLocalMemorySize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1191 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
Referenced by getLocalMemorySize().
| unsigned llvm::AMDGPU::IsaInfo::getAddressableNumArchVGPRs | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1421 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
Referenced by llvm::GCNSubtarget::getAddressableNumArchVGPRs(), and getAddressableNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getAddressableNumVGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | DynamicVGPRBlockSize ) |
STI. Definition at line 1428 of file AMDGPUBaseInfo.cpp.
References getAddressableNumArchVGPRs(), llvm::MCSubtargetInfo::getFeatureBits(), getVGPRAllocGranule(), and MaxDynamicVGPRBlocks.
Referenced by llvm::GCNSubtarget::getAddressableNumVGPRs(), getMaxNumVGPRs(), getMinNumVGPRs(), and llvm::GCNSchedStrategy::initialize().
| unsigned llvm::AMDGPU::IsaInfo::getAllocatedNumVGPRBlocks | ( | const MCSubtargetInfo & | STI, |
| unsigned | NumVGPRs, | ||
| unsigned | DynamicVGPRBlockSize, | ||
| std::optional< bool > | EnableWavefrontSize32 = std::nullopt ) |
STI when NumVGPRs are used. Definition at line 1539 of file AMDGPUBaseInfo.cpp.
References getGranulatedNumRegisterBlocks(), and getVGPRAllocGranule().
Referenced by llvm::GCNSchedStage::shouldRevertScheduling().
| unsigned llvm::AMDGPU::IsaInfo::getArchVGPRAllocGranule | ( | ) |
For subtargets with a unified VGPR file and mixed ArchVGPR/AGPR usage, returns the allocation granule for ArchVGPRs.
Definition at line 1408 of file AMDGPUBaseInfo.cpp.
Referenced by llvm::GCNRegPressure::getUnifiedVGPRNum().
| unsigned llvm::AMDGPU::IsaInfo::getEncodedNumVGPRBlocks | ( | const MCSubtargetInfo & | STI, |
| unsigned | NumVGPRs, | ||
| std::optional< bool > | EnableWavefrontSize32 = std::nullopt ) |
STI when NumVGPRs are used. We actually return the number of blocks -1, since that's what we encode.For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.
Definition at line 1532 of file AMDGPUBaseInfo.cpp.
References getGranulatedNumRegisterBlocks(), and getVGPREncodingGranule().
| unsigned llvm::AMDGPU::IsaInfo::getEUsPerCU | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1203 of file AMDGPUBaseInfo.cpp.
References assert(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), llvm::AMDGPU::isGFX1250(), and llvm::FeatureBitset::test().
Referenced by llvm::GCNSubtarget::GCNSubtarget(), getMaxWorkGroupsPerCU(), and getWavesPerEUForWorkGroup().
|
static |
Definition at line 1360 of file AMDGPUBaseInfo.cpp.
References llvm::divideCeil().
Referenced by getAllocatedNumVGPRBlocks(), getEncodedNumVGPRBlocks(), and getNumSGPRBlocks().
| unsigned llvm::AMDGPU::IsaInfo::getInstCacheLineSize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1162 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
| unsigned llvm::AMDGPU::IsaInfo::getLocalMemorySize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1179 of file AMDGPUBaseInfo.cpp.
References getAddressableLocalMemorySize(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), and llvm::FeatureBitset::test().
Referenced by llvm::GCNSubtarget::initializeSubtargetDependencies().
|
constexpr |
Definition at line 212 of file AMDGPUBaseInfo.h.
Referenced by annotateGroupSizeLoadWithRangeMD(), llvm::GCNSubtarget::getMaxFlatWorkGroupSize(), and llvm::R600Subtarget::getMaxFlatWorkGroupSize().
| unsigned llvm::AMDGPU::IsaInfo::getMaxNumSGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | WavesPerEU, | ||
| bool | Addressable ) |
STI. Definition at line 1306 of file AMDGPUBaseInfo.cpp.
References assert(), llvm::AMDGPU::getAddressableNumSGPRs(), llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), llvm::AMDGPU::getSGPRAllocGranule(), getSGPRBudgetPerWave(), getSGPRTrapHandlerReserve(), llvm::AMDGPU::getTotalNumSGPRs(), llvm::AMDGPU::parseArchAMDGCN(), and llvm::Version.
Referenced by llvm::GCNSubtarget::getMaxNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMaxNumVGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | WavesPerEU, | ||
| unsigned | DynamicVGPRBlockSize ) |
STI. Definition at line 1516 of file AMDGPUBaseInfo.cpp.
References llvm::alignDown(), assert(), getAddressableNumVGPRs(), getTotalNumVGPRs(), and getVGPRAllocGranule().
Referenced by llvm::GCNSubtarget::getMaxNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMaxWavesPerEU | ( | const MCSubtargetInfo & | STI | ) |
STI without any kind of limitation. Definition at line 1244 of file AMDGPUBaseInfo.cpp.
References llvm::AMDGPU::hasGFX10_3Insts(), llvm::AMDGPU::isGFX10Plus(), and llvm::AMDGPU::isGFX90A().
Referenced by createOccupancy(), llvm::GCNSubtarget::GCNSubtarget(), getMaxWorkGroupsPerCU(), getMinNumSGPRs(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), and getOccupancyWithNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMaxWorkGroupsPerCU | ( | const MCSubtargetInfo & | STI, |
| unsigned | FlatWorkGroupSize ) |
STI and limited by given FlatWorkGroupSize. Definition at line 1223 of file AMDGPUBaseInfo.cpp.
References assert(), getEUsPerCU(), llvm::MCSubtargetInfo::getFeatureBits(), getMaxWavesPerEU(), llvm::MCSubtargetInfo::getTargetTriple(), getWavesPerWorkGroup(), llvm::Triple::isAMDGCN(), llvm::AMDGPU::isGFX10Plus(), N, and llvm::FeatureBitset::test().
Referenced by llvm::GCNSubtarget::getMaxWorkGroupsPerCU(), and llvm::R600Subtarget::getMaxWorkGroupsPerCU().
| unsigned llvm::AMDGPU::IsaInfo::getMinFlatWorkGroupSize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1259 of file AMDGPUBaseInfo.cpp.
Referenced by llvm::GCNSubtarget::getMinFlatWorkGroupSize(), and llvm::R600Subtarget::getMinFlatWorkGroupSize().
| unsigned llvm::AMDGPU::IsaInfo::getMinNumSGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | WavesPerEU ) |
STI. Definition at line 1287 of file AMDGPUBaseInfo.cpp.
References assert(), llvm::AMDGPU::getAddressableNumSGPRs(), llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), getMaxWavesPerEU(), llvm::AMDGPU::getSGPRAllocGranule(), getSGPRBudgetPerWave(), getSGPRTrapHandlerReserve(), llvm::AMDGPU::getTotalNumSGPRs(), llvm::AMDGPU::parseArchAMDGCN(), and llvm::Version.
Referenced by llvm::GCNSubtarget::getMinNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMinNumVGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | WavesPerEU, | ||
| unsigned | DynamicVGPRBlockSize ) |
STI. Definition at line 1481 of file AMDGPUBaseInfo.cpp.
References llvm::alignDown(), assert(), getAddressableNumVGPRs(), getMaxWavesPerEU(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), getTotalNumVGPRs(), and getVGPRAllocGranule().
Referenced by getMinNumVGPRs(), and llvm::GCNSubtarget::getMinNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getMinWavesPerEU | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1242 of file AMDGPUBaseInfo.cpp.
Referenced by llvm::GCNSubtarget::getMinWavesPerEU(), and llvm::R600Subtarget::getMinWavesPerEU().
| unsigned llvm::AMDGPU::IsaInfo::getNumExtraSGPRs | ( | const MCSubtargetInfo & | STI, |
| bool | VCCUsed, | ||
| bool | FlatScrUsed ) |
STI when the given special registers are used. XNACK is inferred from STI. Definition at line 1354 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), getNumExtraSGPRs(), and llvm::FeatureBitset::test().
| unsigned llvm::AMDGPU::IsaInfo::getNumExtraSGPRs | ( | const MCSubtargetInfo & | STI, |
| bool | VCCUsed, | ||
| bool | FlatScrUsed, | ||
| bool | XNACKUsed ) |
STI when the given special registers are used. Definition at line 1329 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getCPU(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::getIsaVersion(), llvm::FeatureBitset::test(), and llvm::Version.
Referenced by getNumExtraSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getNumSGPRBlocks | ( | const MCSubtargetInfo & | STI, |
| unsigned | NumSGPRs ) |
STI when NumSGPRs are used. NumSGPRs should already include any special register counts. Definition at line 1365 of file AMDGPUBaseInfo.cpp.
References getGranulatedNumRegisterBlocks(), and getSGPREncodingGranule().
| unsigned llvm::AMDGPU::IsaInfo::getNumWavesPerEUWithNumVGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | NumVGPRs, | ||
| unsigned | DynamicVGPRBlockSize ) |
NumVGPRs usage for given subtarget STI. Definition at line 1442 of file AMDGPUBaseInfo.cpp.
References getMaxWavesPerEU(), getNumWavesPerEUWithNumVGPRs(), getTotalNumVGPRs(), and getVGPRAllocGranule().
Referenced by getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), and llvm::GCNSubtarget::getOccupancyWithNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getNumWavesPerEUWithNumVGPRs | ( | unsigned | NumVGPRs, |
| unsigned | Granule, | ||
| unsigned | MaxWaves, | ||
| unsigned | TotalNumVGPRs ) |
NumVGPRs usage, Granule size, MaxWaves possible, and TotalNumVGPRs available. Definition at line 1450 of file AMDGPUBaseInfo.cpp.
References llvm::alignTo().
| unsigned llvm::AMDGPU::IsaInfo::getOccupancyWithNumSGPRs | ( | const MCSubtargetInfo & | STI, |
| unsigned | SGPRs ) |
STI: the inverse of getMaxNumSGPRs(). Unlike getMaxNumSGPRs() the budget is not clamped to the addressable count, since the allocated count callers pass in can exceed it. Definition at line 1469 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getCPU(), getMaxWavesPerEU(), getOccupancyWithNumSGPRs(), llvm::AMDGPU::getSGPRAllocGranule(), getSGPRTrapHandlerReserve(), llvm::AMDGPU::getTotalNumSGPRs(), isSGPROccupancyLimited(), and llvm::AMDGPU::parseArchAMDGCN().
| unsigned llvm::AMDGPU::IsaInfo::getOccupancyWithNumSGPRs | ( | unsigned | SGPRs, |
| unsigned | MaxWaves, | ||
| unsigned | TotalNumSGPRs, | ||
| unsigned | Granule, | ||
| unsigned | TrapReserve ) |
MaxWaves, TotalNumSGPRs, Granule, TrapReserve). Subtarget-free core shared by the overload above and the occupancy MCExpr. Callers must check isSGPROccupancyLimited() first. Definition at line 1459 of file AMDGPUBaseInfo.cpp.
References llvm::alignTo().
Referenced by getOccupancyWithNumSGPRs(), and llvm::GCNSubtarget::getOccupancyWithNumSGPRs().
|
static |
Definition at line 1278 of file AMDGPUBaseInfo.cpp.
References llvm::alignDown(), and assert().
Referenced by getMaxNumSGPRs(), and getMinNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getSGPREncodingGranule | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1266 of file AMDGPUBaseInfo.cpp.
Referenced by llvm::AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC1(), getNumSGPRBlocks(), and llvm::GCNSubtarget::getSGPREncodingGranule().
|
static |
Definition at line 1269 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), llvm::FeatureBitset::test(), and TRAP_NUM_SGPRS.
Referenced by getMaxNumSGPRs(), getMinNumSGPRs(), and getOccupancyWithNumSGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getTotalNumVGPRs | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1410 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::isGFX10Plus(), and llvm::FeatureBitset::test().
Referenced by createOccupancy(), getMaxNumVGPRs(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), and llvm::GCNSubtarget::getTotalNumVGPRs().
| unsigned llvm::AMDGPU::IsaInfo::getVGPRAllocGranule | ( | const MCSubtargetInfo & | STI, |
| unsigned | DynamicVGPRBlockSize, | ||
| std::optional< bool > | EnableWavefrontSize32 = std::nullopt ) |
STI.For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.
Definition at line 1371 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), llvm::AMDGPU::hasGFX10_3Insts(), and llvm::FeatureBitset::test().
Referenced by createOccupancy(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), getAddressableNumVGPRs(), getAllocatedNumVGPRBlocks(), getMaxNumVGPRs(), getMinNumVGPRs(), getNumWavesPerEUWithNumVGPRs(), llvm::GCNSubtarget::getVGPRAllocGranule(), and llvm::GCNSchedStrategy::initialize().
| unsigned llvm::AMDGPU::IsaInfo::getVGPREncodingGranule | ( | const MCSubtargetInfo & | STI, |
| std::optional< bool > | EnableWavefrontSize32 = std::nullopt ) |
STI.For subtargets which support it, EnableWavefrontSize32 should match the ENABLE_WAVEFRONT_SIZE32 kernel descriptor field.
Definition at line 1393 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
Referenced by llvm::AMDGPUDisassembler::decodeCOMPUTE_PGM_RSRC1(), getEncodedNumVGPRBlocks(), and llvm::GCNSubtarget::getVGPREncodingGranule().
| unsigned llvm::AMDGPU::IsaInfo::getWavefrontSize | ( | const MCSubtargetInfo & | STI | ) |
STI. Definition at line 1170 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getFeatureBits(), and llvm::FeatureBitset::test().
Referenced by getWavesPerWorkGroup().
| unsigned llvm::AMDGPU::IsaInfo::getWavesPerEUForWorkGroup | ( | const MCSubtargetInfo & | STI, |
| unsigned | FlatWorkGroupSize ) |
FlatWorkGroupSize. Definition at line 1253 of file AMDGPUBaseInfo.cpp.
References llvm::divideCeil(), getEUsPerCU(), and getWavesPerWorkGroup().
Referenced by llvm::GCNSubtarget::getWavesPerEUForWorkGroup(), and llvm::R600Subtarget::getWavesPerEUForWorkGroup().
| unsigned llvm::AMDGPU::IsaInfo::getWavesPerWorkGroup | ( | const MCSubtargetInfo & | STI, |
| unsigned | FlatWorkGroupSize ) |
STI and FlatWorkGroupSize. Definition at line 1261 of file AMDGPUBaseInfo.cpp.
References llvm::divideCeil(), and getWavefrontSize().
Referenced by getMaxWorkGroupsPerCU(), and getWavesPerEUForWorkGroup().
| bool llvm::AMDGPU::IsaInfo::isSGPROccupancyLimited | ( | const MCSubtargetInfo & | STI | ) |
STI (true pre-GFX10). One named capability so callers don't test the version. Definition at line 1323 of file AMDGPUBaseInfo.cpp.
References llvm::MCSubtargetInfo::getCPU(), llvm::AMDGPU::getIsaVersion(), and llvm::AMDGPU::IsaVersion::Major.
Referenced by createOccupancy(), and getOccupancyWithNumSGPRs().
|
inline |
Returns true if Lhs and Rhs are incompatible (both specific but different).
Definition at line 168 of file AMDGPUBaseInfo.h.
|
staticconstexpr |
Maximum number of VGPR blocks that can be allocated in dynamic VGPR mode.
Definition at line 274 of file AMDGPUBaseInfo.h.
Referenced by getAddressableNumVGPRs().