14#ifndef LLVM_LIB_TARGET_AMDGPU_R600SUBTARGET_H
15#define LLVM_LIB_TARGET_AMDGPU_R600SUBTARGET_H
24#define GET_SUBTARGETINFO_HEADER
25#include "R600GenSubtargetInfo.inc"
35 bool CaymanISA =
false;
36 bool CFALUBug =
false;
37 bool HasVertexCache =
false;
38 bool R600ALUInst =
false;
40 short TexVTXClauseSize = 0;
53 return &FrameLowering;
Base class for AMDGPU specific classes of TargetSubtarget.
const char LLVMTargetMachineRef TM
R600 DAG Lowering interface definition.
Interface definition for R600InstrInfo.
Itinerary data supplied by a subtarget to be used by a target.
const R600RegisterInfo & getRegisterInfo() const
bool hasVertexCache() const
unsigned getMinFlatWorkGroupSize() const override
unsigned getMaxWorkGroupsPerCU(unsigned FlatWorkGroupSize) const override
short getTexVTXClauseSize() const
unsigned getMaxFlatWorkGroupSize() const override
const SelectionDAGTargetInfo * getSelectionDAGInfo() const override
unsigned getWavesPerEUForWorkGroup(unsigned FlatWorkGroupSize) const override
const R600FrameLowering * getFrameLowering() const override
bool hasCaymanISA() const
unsigned getMinWavesPerEU() const override
const R600TargetLowering * getTargetLowering() const override
const R600RegisterInfo * getRegisterInfo() const override
const R600InstrInfo * getInstrInfo() const override
bool enableSubRegLiveness() const override
R600Subtarget & initializeSubtargetDependencies(const Triple &TT, StringRef GPU, StringRef FS)
bool hasBCNT(unsigned Size) const
Align getStackAlignment() const
Generation getGeneration() const
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
const InstrItineraryData * getInstrItineraryData() const override
bool enableMachineScheduler() const override
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
StringRef - Represent a constant reference to a string, i.e.
Primary interface to the complete machine description for the target machine.
Triple - Helper class for working with autoconf configuration names.
unsigned getWavesPerEUForWorkGroup(const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
unsigned getMaxWorkGroupsPerCU(const MCSubtargetInfo *STI, unsigned FlatWorkGroupSize)
unsigned getMaxFlatWorkGroupSize(const MCSubtargetInfo *STI)
unsigned getMinFlatWorkGroupSize(const MCSubtargetInfo *STI)
unsigned getMinWavesPerEU(const MCSubtargetInfo *STI)
This is an optimization pass for GlobalISel generic memory operations.
This struct is a compact representation of a valid (non-zero power of two) alignment.