LLVM  10.0.0svn
AVRRegisterInfo.h
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1 //===-- AVRRegisterInfo.h - AVR Register Information Impl -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the AVR implementation of the TargetRegisterInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_AVR_REGISTER_INFO_H
14 #define LLVM_AVR_REGISTER_INFO_H
15 
17 
18 #define GET_REGINFO_HEADER
19 #include "AVRGenRegisterInfo.inc"
20 
21 namespace llvm {
22 
23 /// Utilities relating to AVR registers.
25 public:
27 
28 public:
29  const uint16_t *
30  getCalleeSavedRegs(const MachineFunction *MF = 0) const override;
32  CallingConv::ID CC) const override;
33  BitVector getReservedRegs(const MachineFunction &MF) const override;
34 
35  const TargetRegisterClass *
37  const MachineFunction &MF) const override;
38 
39  /// Stack Frame Processing Methods
41  unsigned FIOperandNum,
42  RegScavenger *RS = NULL) const override;
43 
44  Register getFrameRegister(const MachineFunction &MF) const override;
45 
46  const TargetRegisterClass *
48  unsigned Kind = 0) const override;
49 
50  /// Splits a 16-bit `DREGS` register into the lo/hi register pair.
51  /// \param Reg A 16-bit register to split.
52  void splitReg(unsigned Reg, unsigned &LoReg, unsigned &HiReg) const;
53 
54  bool trackLivenessAfterRegAlloc(const MachineFunction &) const override {
55  return true;
56  }
57 
59  const TargetRegisterClass *SrcRC,
60  unsigned SubReg,
61  const TargetRegisterClass *DstRC,
62  unsigned DstSubReg,
63  const TargetRegisterClass *NewRC,
64  LiveIntervals &LIS) const override;
65 };
66 
67 } // end namespace llvm
68 
69 #endif // LLVM_AVR_REGISTER_INFO_H
bool shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
This class represents lattice values for constants.
Definition: AllocatorList.h:23
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override
unsigned Reg
BitVector getReservedRegs(const MachineFunction &MF) const override
Utilities relating to AVR registers.
const TargetRegisterClass * getLargestLegalSuperClass(const TargetRegisterClass *RC, const MachineFunction &MF) const override
unsigned SubReg
const uint16_t * getCalleeSavedRegs(const MachineFunction *MF=0) const override
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const override
void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const override
Stack Frame Processing Methods.
void splitReg(unsigned Reg, unsigned &LoReg, unsigned &HiReg) const
Splits a 16-bit DREGS register into the lo/hi register pair.
Representation of each machine instruction.
Definition: MachineInstr.h:64
Register getFrameRegister(const MachineFunction &MF) const override
bool trackLivenessAfterRegAlloc(const MachineFunction &) const override
IRTranslator LLVM IR MI
Wrapper class representing virtual and physical registers.
Definition: Register.h:19