27#define DEBUG_TYPE "mccodeemitter"
31 LoongArchMCCodeEmitter(
const LoongArchMCCodeEmitter &) =
delete;
32 void operator=(
const LoongArchMCCodeEmitter &) =
delete;
38 : Ctx(ctx), MCII(MCII) {}
40 ~LoongArchMCCodeEmitter()
override {}
62 unsigned getImmOpValueSub1(
const MCInst &
MI,
unsigned OpNo,
71 unsigned getImmOpValueAsr2(
const MCInst &
MI,
unsigned OpNo,
87 return Ctx.getRegisterInfo()->getEncodingValue(MO.
getReg());
90 return static_cast<unsigned>(MO.
getImm());
94 return getExprOpValue(
MI, MO, Fixups, STI);
98LoongArchMCCodeEmitter::getImmOpValueSub1(
const MCInst &
MI,
unsigned OpNo,
101 return MI.getOperand(OpNo).getImm() - 1;
105LoongArchMCCodeEmitter::getImmOpValueAsr2(
const MCInst &
MI,
unsigned OpNo,
111 unsigned Res =
MI.getOperand(OpNo).getImm();
112 assert((Res & 3) == 0 &&
"lowest 2 bits are non-zero");
116 return getExprOpValue(
MI, MO, Fixups, STI);
123 assert(MO.
isExpr() &&
"getExprOpValue expects only expressions");
243 cast<MCSymbolRefExpr>(Expr)->getKind() ==
245 switch (
MI.getOpcode()) {
252 case LoongArch::BLTU:
253 case LoongArch::BGEU:
256 case LoongArch::BEQZ:
257 case LoongArch::BNEZ:
258 case LoongArch::BCEQZ:
259 case LoongArch::BCNEZ:
269 "Unhandled expression!");
276void LoongArchMCCodeEmitter::encodeInstruction(
296 return new LoongArchMCCodeEmitter(Ctx, MCII);
299#include "LoongArchGenMCCodeEmitter.inc"
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
VariantKind getKind() const
@ VK_LoongArch_PCALA_HI20
@ VK_LoongArch_TLS_LD_PC_HI20
@ VK_LoongArch_TLS_LE64_HI12
@ VK_LoongArch_TLS_LD_HI20
@ VK_LoongArch_GOT64_HI12
@ VK_LoongArch_PCALA_LO12
@ VK_LoongArch_TLS_IE_HI20
@ VK_LoongArch_TLS_GD_HI20
@ VK_LoongArch_ABS64_HI12
@ VK_LoongArch_TLS_LE_LO12
@ VK_LoongArch_TLS_IE64_HI12
@ VK_LoongArch_GOT_PC_HI20
@ VK_LoongArch_TLS_IE64_PC_LO20
@ VK_LoongArch_TLS_IE64_LO20
@ VK_LoongArch_TLS_IE_PC_LO12
@ VK_LoongArch_GOT64_PC_HI12
@ VK_LoongArch_TLS_IE_PC_HI20
@ VK_LoongArch_TLS_LE64_LO20
@ VK_LoongArch_PCALA64_LO20
@ VK_LoongArch_TLS_IE_LO12
@ VK_LoongArch_GOT_PC_LO12
@ VK_LoongArch_TLS_LE_HI20
@ VK_LoongArch_GOT64_LO20
@ VK_LoongArch_TLS_GD_PC_HI20
@ VK_LoongArch_GOT64_PC_LO20
@ VK_LoongArch_PCALA64_HI12
@ VK_LoongArch_TLS_IE64_PC_HI12
@ VK_LoongArch_ABS64_LO20
MCCodeEmitter - Generic instruction encoding interface.
MCCodeEmitter & operator=(const MCCodeEmitter &)=delete
virtual void encodeInstruction(const MCInst &Inst, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
Context object for machine code objects.
Base class for the full range of assembler expressions which are needed for parsing.
@ SymbolRef
References to labels and assigned expressions.
@ Target
Target specific expression.
static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, SMLoc Loc=SMLoc())
Instances of this class represent a single low-level machine instruction.
Describe properties that are true of each instruction in the target description file.
unsigned getSize() const
Return the number of bytes in the encoding of this instruction, or zero if the encoding size cannot b...
Interface to description of machine instruction set.
Instances of this class represent operands of the MCInst class.
unsigned getReg() const
Returns the register number.
const MCExpr * getExpr() const
Generic base class for all target subtargets.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ fixup_loongarch_tls_ld_pc_hi20
@ fixup_loongarch_abs64_hi12
@ fixup_loongarch_tls_ie_lo12
@ fixup_loongarch_tls_le_lo12
@ fixup_loongarch_abs_hi20
@ fixup_loongarch_tls_ie_hi20
@ fixup_loongarch_pcala64_hi12
@ fixup_loongarch_tls_gd_hi20
@ fixup_loongarch_got64_hi12
@ fixup_loongarch_tls_ie_pc_lo12
@ fixup_loongarch_pcala_hi20
@ fixup_loongarch_abs_lo12
@ fixup_loongarch_invalid
@ fixup_loongarch_got64_pc_hi12
@ fixup_loongarch_abs64_lo20
@ fixup_loongarch_pcala64_lo20
@ fixup_loongarch_tls_le64_hi12
@ fixup_loongarch_got64_lo20
@ fixup_loongarch_tls_le64_lo20
@ fixup_loongarch_got64_pc_lo20
@ fixup_loongarch_got_pc_lo12
@ fixup_loongarch_tls_gd_pc_hi20
@ fixup_loongarch_tls_ld_hi20
@ fixup_loongarch_pcala_lo12
@ fixup_loongarch_got_lo12
@ fixup_loongarch_tls_ie64_pc_hi12
@ fixup_loongarch_got_pc_hi20
@ fixup_loongarch_tls_ie64_pc_lo20
@ fixup_loongarch_got_hi20
@ fixup_loongarch_tls_le_hi20
@ fixup_loongarch_tls_ie64_lo20
@ fixup_loongarch_tls_ie64_hi12
@ fixup_loongarch_tls_ie_pc_hi20
void write(void *memory, value_type value, endianness endian)
Write a value to memory with a particular endianness.
This is an optimization pass for GlobalISel generic memory operations.
MCCodeEmitter * createLoongArchMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
MCFixupKind
Extensible enumeration to represent the type of a fixup.