LLVM 19.0.0git
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1//===- RegAllocBase.h - basic regalloc interface and driver -----*- C++ -*-===//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
9// This file defines the RegAllocBase class, which is the skeleton of a basic
10// register allocation algorithm and interface for extending it. It provides the
11// building blocks on which to construct other experimental allocators and test
12// the validity of two principles:
14// - If virtual and physical register liveness is modeled using intervals, then
15// on-the-fly interference checking is cheap. Furthermore, interferences can be
16// lazily cached and reused.
18// - Register allocation complexity, and generated code performance is
19// determined by the effectiveness of live range splitting rather than optimal
20// coloring.
22// Following the first principle, interfering checking revolves around the
23// LiveIntervalUnion data structure.
25// To fulfill the second principle, the basic allocator provides a driver for
26// incremental splitting. It essentially punts on the problem of register
27// coloring, instead driving the assignment of virtual to physical registers by
28// the cost of splitting. The basic allocator allows for heuristic reassignment
29// of registers, if a more sophisticated allocator chooses to do that.
31// This framework provides a way to engineer the compile time vs. code
32// quality trade-off without relying on a particular theoretical solver.
43namespace llvm {
45class LiveInterval;
46class LiveIntervals;
47class LiveRegMatrix;
48class MachineInstr;
49class MachineRegisterInfo;
50template<typename T> class SmallVectorImpl;
51class Spiller;
52class TargetRegisterInfo;
53class VirtRegMap;
55/// RegAllocBase provides the register allocation driver and interface that can
56/// be extended to add interesting heuristics.
58/// Register allocators must override the selectOrSplit() method to implement
59/// live range splitting. They must also override enqueue/dequeue to provide an
60/// assignment order.
62 virtual void anchor();
65 const TargetRegisterInfo *TRI = nullptr;
67 VirtRegMap *VRM = nullptr;
68 LiveIntervals *LIS = nullptr;
73 /// Inst which is a def of an original reg and whose defs are already all
74 /// dead after remat is saved in DeadRemats. The deletion of such inst is
75 /// postponed till all the allocations are done, so its remat expr is
76 /// always available for the remat of all the siblings of the original reg.
82 virtual ~RegAllocBase() = default;
84 // A RegAlloc pass should call this before allocatePhysRegs.
85 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
87 // The top-level driver. The output is a VirtRegMap that us updated with
88 // physical register assignments.
89 void allocatePhysRegs();
91 // Include spiller post optimization and removing dead defs left because of
92 // rematerialization.
93 virtual void postOptimization();
95 // Get a temporary reference to a Spiller instance.
96 virtual Spiller &spiller() = 0;
98 /// enqueue - Add VirtReg to the priority queue of unassigned registers.
99 virtual void enqueueImpl(const LiveInterval *LI) = 0;
101 /// enqueue - Add VirtReg to the priority queue of unassigned registers.
102 void enqueue(const LiveInterval *LI);
104 /// dequeue - Return the next unassigned register, or NULL.
105 virtual const LiveInterval *dequeue() = 0;
107 // A RegAlloc pass should override this to provide the allocation heuristics.
108 // Each call must guarantee forward progess by returning an available PhysReg
109 // or new set of split live virtual registers. It is up to the splitter to
110 // converge quickly toward fully spilled live ranges.
111 virtual MCRegister selectOrSplit(const LiveInterval &VirtReg,
112 SmallVectorImpl<Register> &splitLVRs) = 0;
114 // Use this group name for NamedRegionTimer.
115 static const char TimerGroupName[];
116 static const char TimerGroupDescription[];
118 /// Method called when the allocator is about to remove a LiveInterval.
119 virtual void aboutToRemoveInterval(const LiveInterval &LI) {}
122 /// VerifyEnabled - True when -verify-regalloc is given.
123 static bool VerifyEnabled;
126 void seedLiveRegs();
129} // end namespace llvm
#define F(x, y, z)
Definition: MD5.cpp:55
This file defines the SmallPtrSet class.
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:687
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
RegAllocBase provides the register allocation driver and interface that can be extended to add intere...
Definition: RegAllocBase.h:61
virtual void aboutToRemoveInterval(const LiveInterval &LI)
Method called when the allocator is about to remove a LiveInterval.
Definition: RegAllocBase.h:119
virtual MCRegister selectOrSplit(const LiveInterval &VirtReg, SmallVectorImpl< Register > &splitLVRs)=0
void enqueue(const LiveInterval *LI)
enqueue - Add VirtReg to the priority queue of unassigned registers.
virtual ~RegAllocBase()=default
void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat)
SmallPtrSet< MachineInstr *, 32 > DeadRemats
Inst which is a def of an original reg and whose defs are already all dead after remat is saved in De...
Definition: RegAllocBase.h:77
virtual Spiller & spiller()=0
const TargetRegisterInfo * TRI
Definition: RegAllocBase.h:65
LiveIntervals * LIS
Definition: RegAllocBase.h:68
static const char TimerGroupName[]
Definition: RegAllocBase.h:115
static const char TimerGroupDescription[]
Definition: RegAllocBase.h:116
LiveRegMatrix * Matrix
Definition: RegAllocBase.h:69
virtual const LiveInterval * dequeue()=0
dequeue - Return the next unassigned register, or NULL.
virtual void postOptimization()
VirtRegMap * VRM
Definition: RegAllocBase.h:67
RegisterClassInfo RegClassInfo
Definition: RegAllocBase.h:70
MachineRegisterInfo * MRI
Definition: RegAllocBase.h:66
virtual void enqueueImpl(const LiveInterval *LI)=0
enqueue - Add VirtReg to the priority queue of unassigned registers.
RegAllocBase(const RegClassFilterFunc F=allocateAllRegClasses)
Definition: RegAllocBase.h:79
static bool VerifyEnabled
VerifyEnabled - True when -verify-regalloc is given.
Definition: RegAllocBase.h:123
const RegClassFilterFunc ShouldAllocateClass
Definition: RegAllocBase.h:71
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:427
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
Spiller interface.
Definition: Spiller.h:24
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
static bool allocateAllRegClasses(const TargetRegisterInfo &, const TargetRegisterClass &)
Default register class filter function for register allocation.
std::function< bool(const TargetRegisterInfo &TRI, const TargetRegisterClass &RC)> RegClassFilterFunc