LLVM 19.0.0git
CallingConvLower.cpp
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1//===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the CCState class, used for lowering and implementing
10// calling conventions.
11//
12//===----------------------------------------------------------------------===//
13
21#include "llvm/Support/Debug.h"
25
26using namespace llvm;
27
30 bool NegativeOffsets)
31 : CallingConv(CC), IsVarArg(IsVarArg), MF(MF),
32 TRI(*MF.getSubtarget().getRegisterInfo()), Locs(Locs), Context(Context),
33 NegativeOffsets(NegativeOffsets) {
34
35 // No stack is used.
36 StackSize = 0;
37
39 UsedRegs.resize((TRI.getNumRegs()+31)/32);
40}
41
42/// Allocate space on the stack large enough to pass an argument by value.
43/// The size and alignment information of the argument is encoded in
44/// its parameter attribute.
45void CCState::HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
46 CCValAssign::LocInfo LocInfo, int MinSize,
47 Align MinAlign, ISD::ArgFlagsTy ArgFlags) {
48 Align Alignment = ArgFlags.getNonZeroByValAlign();
49 unsigned Size = ArgFlags.getByValSize();
50 if (MinSize > (int)Size)
51 Size = MinSize;
52 if (MinAlign > Alignment)
53 Alignment = MinAlign;
54 ensureMaxAlignment(Alignment);
55 MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Alignment);
57 uint64_t Offset = AllocateStack(Size, Alignment);
58 addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
59}
60
61/// Mark a register and all of its aliases as allocated.
62void CCState::MarkAllocated(MCPhysReg Reg) {
63 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
64 UsedRegs[*AI / 32] |= 1 << (*AI & 31);
65}
66
67void CCState::MarkUnallocated(MCPhysReg Reg) {
68 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
69 UsedRegs[*AI / 32] &= ~(1 << (*AI & 31));
70}
71
73 if (!isAllocated(Reg))
74 return false;
75
76 for (auto const &ValAssign : Locs)
77 if (ValAssign.isRegLoc() && TRI.regsOverlap(ValAssign.getLocReg(), Reg))
78 return false;
79 return true;
80}
81
82/// Analyze an array of argument values,
83/// incorporating info about the formals into this state.
84void
86 CCAssignFn Fn) {
87 unsigned NumArgs = Ins.size();
88
89 for (unsigned i = 0; i != NumArgs; ++i) {
90 MVT ArgVT = Ins[i].VT;
91 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
92 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this))
93 report_fatal_error("unable to allocate function argument #" + Twine(i));
94 }
95}
96
97/// Analyze the return values of a function, returning true if the return can
98/// be performed without sret-demotion and false otherwise.
100 CCAssignFn Fn) {
101 // Determine which register each value should be copied into.
102 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
103 MVT VT = Outs[i].VT;
104 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
105 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
106 return false;
107 }
108 return true;
109}
110
111/// Analyze the returned values of a return,
112/// incorporating info about the result values into this state.
114 CCAssignFn Fn) {
115 // Determine which register each value should be copied into.
116 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
117 MVT VT = Outs[i].VT;
118 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
119 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
120 report_fatal_error("unable to allocate function return #" + Twine(i));
121 }
122}
123
124/// Analyze the outgoing arguments to a call,
125/// incorporating info about the passed values into this state.
127 CCAssignFn Fn) {
128 unsigned NumOps = Outs.size();
129 for (unsigned i = 0; i != NumOps; ++i) {
130 MVT ArgVT = Outs[i].VT;
131 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
132 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
133#ifndef NDEBUG
134 dbgs() << "Call operand #" << i << " has unhandled type "
135 << ArgVT << '\n';
136#endif
137 llvm_unreachable(nullptr);
138 }
139 }
140}
141
142/// Same as above except it takes vectors of types and argument flags.
145 CCAssignFn Fn) {
146 unsigned NumOps = ArgVTs.size();
147 for (unsigned i = 0; i != NumOps; ++i) {
148 MVT ArgVT = ArgVTs[i];
149 ISD::ArgFlagsTy ArgFlags = Flags[i];
150 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
151#ifndef NDEBUG
152 dbgs() << "Call operand #" << i << " has unhandled type "
153 << ArgVT << '\n';
154#endif
155 llvm_unreachable(nullptr);
156 }
157 }
158}
159
160/// Analyze the return values of a call, incorporating info about the passed
161/// values into this state.
163 CCAssignFn Fn) {
164 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
165 MVT VT = Ins[i].VT;
166 ISD::ArgFlagsTy Flags = Ins[i].Flags;
167 if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
168#ifndef NDEBUG
169 dbgs() << "Call result #" << i << " has unhandled type "
170 << VT << '\n';
171#endif
172 llvm_unreachable(nullptr);
173 }
174 }
175}
176
177/// Same as above except it's specialized for calls that produce a single value.
179 if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
180#ifndef NDEBUG
181 dbgs() << "Call result has unhandled type "
182 << VT << '\n';
183#endif
184 llvm_unreachable(nullptr);
185 }
186}
187
189 if (!AnalyzingMustTailForwardedRegs)
190 MF.getFrameInfo().ensureMaxAlignment(Alignment);
191}
192
194 if (VT.isVector())
195 return true; // Assume -msse-regparm might be in effect.
196 if (!VT.isInteger())
197 return false;
199}
200
202 MVT VT, CCAssignFn Fn) {
203 uint64_t SavedStackSize = StackSize;
204 Align SavedMaxStackArgAlign = MaxStackArgAlign;
205 unsigned NumLocs = Locs.size();
206
207 // Set the 'inreg' flag if it is used for this calling convention.
208 ISD::ArgFlagsTy Flags;
209 if (isValueTypeInRegForCC(CallingConv, VT))
210 Flags.setInReg();
211
212 // Allocate something of this value type repeatedly until we get assigned a
213 // location in memory.
214 bool HaveRegParm;
215 do {
216 if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
217#ifndef NDEBUG
218 dbgs() << "Call has unhandled type " << VT
219 << " while computing remaining regparms\n";
220#endif
221 llvm_unreachable(nullptr);
222 }
223 HaveRegParm = Locs.back().isRegLoc();
224 } while (HaveRegParm);
225
226 // Copy all the registers from the value locations we added.
227 assert(NumLocs < Locs.size() && "CC assignment failed to add location");
228 for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
229 if (Locs[I].isRegLoc())
230 Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
231
232 // Clear the assigned values and stack memory. We leave the registers marked
233 // as allocated so that future queries don't return the same registers, i.e.
234 // when i64 and f64 are both passed in GPRs.
235 StackSize = SavedStackSize;
236 MaxStackArgAlign = SavedMaxStackArgAlign;
237 Locs.truncate(NumLocs);
238}
239
242 CCAssignFn Fn) {
243 // Oftentimes calling conventions will not user register parameters for
244 // variadic functions, so we need to assume we're not variadic so that we get
245 // all the registers that might be used in a non-variadic call.
246 SaveAndRestore SavedVarArg(IsVarArg, false);
247 SaveAndRestore SavedMustTail(AnalyzingMustTailForwardedRegs, true);
248
249 for (MVT RegVT : RegParmTypes) {
250 SmallVector<MCPhysReg, 8> RemainingRegs;
251 getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
253 const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
254 for (MCPhysReg PReg : RemainingRegs) {
255 Register VReg = MF.addLiveIn(PReg, RC);
256 Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
257 }
258 }
259}
260
262 CallingConv::ID CallerCC, MachineFunction &MF,
263 LLVMContext &C,
265 CCAssignFn CalleeFn, CCAssignFn CallerFn) {
266 if (CalleeCC == CallerCC)
267 return true;
269 CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
270 CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
271
273 CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
274 CCInfo2.AnalyzeCallResult(Ins, CallerFn);
275
276 auto AreCompatible = [](const CCValAssign &Loc1, const CCValAssign &Loc2) {
277 assert(!Loc1.isPendingLoc() && !Loc2.isPendingLoc() &&
278 "The location must have been decided by now");
279 // Must fill the same part of their locations.
280 if (Loc1.getLocInfo() != Loc2.getLocInfo())
281 return false;
282 // Must both be in the same registers, or both in memory at the same offset.
283 if (Loc1.isRegLoc() && Loc2.isRegLoc())
284 return Loc1.getLocReg() == Loc2.getLocReg();
285 if (Loc1.isMemLoc() && Loc2.isMemLoc())
286 return Loc1.getLocMemOffset() == Loc2.getLocMemOffset();
287 llvm_unreachable("Unknown location kind");
288 };
289
290 return std::equal(RVLocs1.begin(), RVLocs1.end(), RVLocs2.begin(),
291 RVLocs2.end(), AreCompatible);
292}
static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT)
uint64_t Size
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned const TargetRegisterInfo * TRI
LLVMContext & Context
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file provides utility classes that use RAII to save and restore values.
This file describes how to lower LLVM code to machine code.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
CCState - This class holds information needed while lowering arguments and return values.
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, Align MinAlign, ISD::ArgFlagsTy ArgFlags)
Allocate space on the stack large enough to pass an argument by value.
void analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)
Compute the set of registers that need to be preserved and forwarded to any musttail calls.
static bool resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)
Returns true if the results of the two calling conventions are compatible.
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
bool IsShadowAllocatedReg(MCRegister Reg) const
A shadow allocated register is a register that was allocated but wasn't added to the location list (L...
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
CheckReturn - Analyze the return values of a function, returning true if the return can be performed ...
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
int64_t AllocateStack(unsigned Size, Align Alignment)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
void getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)
Compute the remaining unused register parameters that would be used for the given value type.
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeCallOperands - Analyze the outgoing arguments to a call, incorporating info about the passed v...
void ensureMaxAlignment(Align Alignment)
CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &Locs, LLVMContext &Context, bool NegativeOffsets=false)
bool isAllocated(MCRegister Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
void addLoc(const CCValAssign &V)
void clearByValRegsInfo()
CCValAssign - Represent assignment of one arg/retval to a location.
bool isRegLoc() const
Register getLocReg() const
bool isPendingLoc() const
LocInfo getLocInfo() const
static CCValAssign getMem(unsigned ValNo, MVT ValVT, int64_t Offset, MVT LocVT, LocInfo HTP, bool IsCustom=false)
bool isMemLoc() const
int64_t getLocMemOffset() const
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
MCRegAliasIterator enumerates all registers aliasing Reg.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Machine Value Type.
bool isVector() const
Return true if this is a vector value type.
bool isInteger() const
Return true if this is an integer or a vector integer type.
void ensureMaxAlignment(Align Alignment)
Make sure the function is at least Align bytes aligned.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Register addLiveIn(MCRegister PReg, const TargetRegisterClass *RC)
addLiveIn - Add the specified physical register as a live-in value and create a corresponding virtual...
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
size_t size() const
Definition: SmallVector.h:91
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
void resize(size_type N)
Definition: SmallVector.h:651
void push_back(const T &Elt)
Definition: SmallVector.h:426
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const
Return the register class that should be used for the specified value type.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
virtual void HandleByVal(CCState *, unsigned &, Align) const
Target-specific cleanup for formal ByVal parameters.
bool regsOverlap(Register RegA, Register RegB) const
Returns true if the two registers are equal or alias each other.
virtual const TargetLowering * getTargetLowering() const
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ X86_VectorCall
MSVC calling convention that passes vectors and vector aggregates in SSE registers.
Definition: CallingConv.h:163
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
@ X86_FastCall
'fast' analog of X86_StdCall.
Definition: CallingConv.h:103
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:456
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:21
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:159
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:155
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
A and B are either alignments or offsets.
Definition: MathExtras.h:349
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
Describes a register that needs to be forwarded from the prologue to a musttail call.
unsigned getByValSize() const
Align getNonZeroByValAlign() const
A utility class that uses RAII to save and restore the value of a variable.