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14 #ifndef LLVM_LIB_TARGET_M68K_M68KINSTRINFO_H
15 #define LLVM_LIB_TARGET_M68K_M68KINSTRINFO_H
25 #define GET_INSTRINFO_HEADER
26 #include "M68kGenInstrInfo.inc"
238 virtual void anchor();
257 bool AllowModify)
const override;
262 bool AllowModify)
const;
265 int *BytesRemoved =
nullptr)
const override;
270 int *BytesAdded =
nullptr)
const override;
274 bool KillSrc)
const override;
277 unsigned &Size,
unsigned &
Offset,
332 std::pair<unsigned, unsigned>
341 #endif // LLVM_LIB_TARGET_M68K_M68KINSTRINFO_H
This is an optimization pass for GlobalISel generic memory operations.
const M68kSubtarget & Subtarget
void AddZExt(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned Reg, MVT From, MVT To) const
Add appropriate ZExt nodes.
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
bool ExpandMOVX_RR(MachineInstrBuilder &MIB, MVT MVTDst, MVT MVTSrc) const
Move across register classes without extension.
Reg
All possible values of the reg field in the ModR/M byte.
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
bool ExpandMOVEM(MachineInstrBuilder &MIB, const MCInstrDesc &Desc, bool IsRM) const
Expand all MOVEM pseudos into real MOVEMs.
bool ExpandMOVSZX_RR(MachineInstrBuilder &MIB, bool IsSigned, MVT MVTDst, MVT MVTSrc) const
Move from register and extend.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool ExpandMOVSZX_RM(MachineInstrBuilder &MIB, bool IsSigned, const MCInstrDesc &Desc, MVT MVTDst, MVT MVTSrc) const
Move from memory and extend.
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
const M68kRegisterInfo RI
unsigned const TargetRegisterInfo * TRI
std::pair< unsigned, unsigned > decomposeMachineOperandsTargetFlags(unsigned TF) const override
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
Describe properties that are true of each instruction in the target description file.
MachineOperand class - Representation of each machine instruction operand.
bool isPCRelRegisterOperandLegal(const MachineOperand &MO) const override
static M68k::CondCode GetCondFromBranchOpc(unsigned Opcode)
static const M68kInstrInfo * create(M68kSubtarget &STI)
bool ExpandPUSH_POP(MachineInstrBuilder &MIB, const MCInstrDesc &Desc, bool IsPush) const
Push/Pop to/from stack.
Representation of each machine instruction.
bool getStackSlotRange(const TargetRegisterClass *RC, unsigned SubIdx, unsigned &Size, unsigned &Offset, const MachineFunction &MF) const override
static unsigned GetCondBranchFromCond(M68k::CondCode CC)
unsigned getGlobalBaseReg(MachineFunction *MF) const
Return a virtual register initialized with the the global base register value.
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
bool AnalyzeBranchImpl(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
SmallVector< MachineOperand, 4 > Cond
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Wrapper class representing virtual and physical registers.
bool ExpandCCR(MachineInstrBuilder &MIB, bool IsToCCR) const
Moves to/from CCR.
static bool IsSETCC(unsigned SETCC)
M68kInstrInfo(const M68kSubtarget &STI)
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool IsKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
const M68kRegisterInfo & getRegisterInfo() const
TargetInstrInfo is a superset of MRegister info.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
BlockVerifier::State From
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
void AddSExt(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned Reg, MVT From, MVT To) const
Add appropriate SExt nodes.
bool expandPostRAPseudo(MachineInstr &MI) const override
static unsigned IsCMP(unsigned Op)
Wrapper class representing physical registers. Should be passed by value.
static M68k::CondCode GetOppositeBranchCondition(M68k::CondCode CC)