LLVM  9.0.0svn
RISCVAsmPrinter.cpp
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1 //===-- RISCVAsmPrinter.cpp - RISCV LLVM assembly writer ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to the RISCV assembly language.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "RISCV.h"
17 #include "RISCVTargetMachine.h"
23 #include "llvm/MC/MCAsmInfo.h"
24 #include "llvm/MC/MCInst.h"
25 #include "llvm/MC/MCStreamer.h"
26 #include "llvm/MC/MCSymbol.h"
29 using namespace llvm;
30 
31 #define DEBUG_TYPE "asm-printer"
32 
33 namespace {
34 class RISCVAsmPrinter : public AsmPrinter {
35 public:
36  explicit RISCVAsmPrinter(TargetMachine &TM,
37  std::unique_ptr<MCStreamer> Streamer)
38  : AsmPrinter(TM, std::move(Streamer)) {}
39 
40  StringRef getPassName() const override { return "RISCV Assembly Printer"; }
41 
42  void EmitInstruction(const MachineInstr *MI) override;
43 
44  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
45  unsigned AsmVariant, const char *ExtraCode,
46  raw_ostream &OS) override;
47  bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
48  unsigned AsmVariant, const char *ExtraCode,
49  raw_ostream &OS) override;
50 
51  void EmitToStreamer(MCStreamer &S, const MCInst &Inst);
52  bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
53  const MachineInstr *MI);
54 
55  // Wrapper needed for tblgenned pseudo lowering.
56  bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const {
57  return LowerRISCVMachineOperandToMCOperand(MO, MCOp, *this);
58  }
59 };
60 }
61 
62 #define GEN_COMPRESS_INSTR
63 #include "RISCVGenCompressInstEmitter.inc"
64 void RISCVAsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst) {
65  MCInst CInst;
66  bool Res = compressInst(CInst, Inst, *TM.getMCSubtargetInfo(),
67  OutStreamer->getContext());
68  AsmPrinter::EmitToStreamer(*OutStreamer, Res ? CInst : Inst);
69 }
70 
71 // Simple pseudo-instructions have their lowering (with expansion to real
72 // instructions) auto-generated.
73 #include "RISCVGenMCPseudoLowering.inc"
74 
75 void RISCVAsmPrinter::EmitInstruction(const MachineInstr *MI) {
76  // Do any auto-generated pseudo lowerings.
77  if (emitPseudoExpansionLowering(*OutStreamer, MI))
78  return;
79 
80  MCInst TmpInst;
81  LowerRISCVMachineInstrToMCInst(MI, TmpInst, *this);
82  EmitToStreamer(*OutStreamer, TmpInst);
83 }
84 
85 bool RISCVAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
86  unsigned AsmVariant,
87  const char *ExtraCode, raw_ostream &OS) {
88  if (AsmVariant != 0)
89  report_fatal_error("There are no defined alternate asm variants");
90 
91  // First try the generic code, which knows about modifiers like 'c' and 'n'.
92  if (!AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, OS))
93  return false;
94 
95  if (!ExtraCode) {
96  const MachineOperand &MO = MI->getOperand(OpNo);
97  switch (MO.getType()) {
99  OS << MO.getImm();
100  return false;
103  return false;
104  default:
105  break;
106  }
107  }
108 
109  return true;
110 }
111 
112 bool RISCVAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
113  unsigned OpNo, unsigned AsmVariant,
114  const char *ExtraCode,
115  raw_ostream &OS) {
116  if (AsmVariant != 0)
117  report_fatal_error("There are no defined alternate asm variants");
118 
119  if (!ExtraCode) {
120  const MachineOperand &MO = MI->getOperand(OpNo);
121  // For now, we only support register memory operands in registers and
122  // assume there is no addend
123  if (!MO.isReg())
124  return true;
125 
126  OS << "0(" << RISCVInstPrinter::getRegisterName(MO.getReg()) << ")";
127  return false;
128  }
129 
130  return AsmPrinter::PrintAsmMemoryOperand(MI, OpNo, AsmVariant, ExtraCode, OS);
131 }
132 
133 // Force static initialization.
134 extern "C" void LLVMInitializeRISCVAsmPrinter() {
137 }
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:139
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned getReg() const
getReg - Returns the register number.
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
Target & getTheRISCV32Target()
void LLVMInitializeRISCVAsmPrinter()
void LowerRISCVMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, const AsmPrinter &AP)
virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
RegisterAsmPrinter - Helper template for registering a target specific assembly printer, for use in the target machine initialization function.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
Streaming machine code generation interface.
Definition: MCStreamer.h:188
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
Target & getTheRISCV64Target()
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:78
static const char * getRegisterName(unsigned RegNo, unsigned AltIdx=RISCV::ABIRegAltName)
MachineOperand class - Representation of each machine instruction operand.
void EmitToStreamer(MCStreamer &S, const MCInst &Inst)
Definition: AsmPrinter.cpp:225
int64_t getImm() const
Representation of each machine instruction.
Definition: MachineInstr.h:63
bool LowerRISCVMachineOperandToMCOperand(const MachineOperand &MO, MCOperand &MCOp, const AsmPrinter &AP)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:58
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:413
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:34
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.