LLVM  14.0.0git
ARMSelectionDAGInfo.cpp
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1 //===-- ARMSelectionDAGInfo.cpp - ARM SelectionDAG Info -------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the ARMSelectionDAGInfo class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "ARMTargetMachine.h"
14 #include "ARMTargetTransformInfo.h"
16 #include "llvm/IR/DerivedTypes.h"
18 using namespace llvm;
19 
20 #define DEBUG_TYPE "arm-selectiondag-info"
21 
23  "arm-memtransfer-tploop", cl::Hidden,
24  cl::desc("Control conversion of memcpy to "
25  "Tail predicated loops (WLSTP)"),
28  "Don't convert memcpy to TP loop."),
29  clEnumValN(TPLoop::ForceEnabled, "force-enabled",
30  "Always convert memcpy to TP loop."),
31  clEnumValN(TPLoop::Allow, "allow",
32  "Allow (may be subject to certain conditions) "
33  "conversion of memcpy to TP loop.")));
34 
35 // Emit, if possible, a specialized version of the given Libcall. Typically this
36 // means selecting the appropriately aligned version, but we also convert memset
37 // of 0 into memclr.
39  SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
40  SDValue Size, unsigned Align, RTLIB::Libcall LC) const {
41  const ARMSubtarget &Subtarget =
43  const ARMTargetLowering *TLI = Subtarget.getTargetLowering();
44 
45  // Only use a specialized AEABI function if the default version of this
46  // Libcall is an AEABI function.
47  if (std::strncmp(TLI->getLibcallName(LC), "__aeabi", 7) != 0)
48  return SDValue();
49 
50  // Translate RTLIB::Libcall to AEABILibcall. We only do this in order to be
51  // able to translate memset to memclr and use the value to index the function
52  // name array.
53  enum {
54  AEABI_MEMCPY = 0,
55  AEABI_MEMMOVE,
56  AEABI_MEMSET,
57  AEABI_MEMCLR
58  } AEABILibcall;
59  switch (LC) {
60  case RTLIB::MEMCPY:
61  AEABILibcall = AEABI_MEMCPY;
62  break;
63  case RTLIB::MEMMOVE:
64  AEABILibcall = AEABI_MEMMOVE;
65  break;
66  case RTLIB::MEMSET:
67  AEABILibcall = AEABI_MEMSET;
68  if (ConstantSDNode *ConstantSrc = dyn_cast<ConstantSDNode>(Src))
69  if (ConstantSrc->getZExtValue() == 0)
70  AEABILibcall = AEABI_MEMCLR;
71  break;
72  default:
73  return SDValue();
74  }
75 
76  // Choose the most-aligned libcall variant that we can
77  enum {
78  ALIGN1 = 0,
79  ALIGN4,
80  ALIGN8
81  } AlignVariant;
82  if ((Align & 7) == 0)
83  AlignVariant = ALIGN8;
84  else if ((Align & 3) == 0)
85  AlignVariant = ALIGN4;
86  else
87  AlignVariant = ALIGN1;
88 
91  Entry.Ty = DAG.getDataLayout().getIntPtrType(*DAG.getContext());
92  Entry.Node = Dst;
93  Args.push_back(Entry);
94  if (AEABILibcall == AEABI_MEMCLR) {
95  Entry.Node = Size;
96  Args.push_back(Entry);
97  } else if (AEABILibcall == AEABI_MEMSET) {
98  // Adjust parameters for memset, EABI uses format (ptr, size, value),
99  // GNU library uses (ptr, value, size)
100  // See RTABI section 4.3.4
101  Entry.Node = Size;
102  Args.push_back(Entry);
103 
104  // Extend or truncate the argument to be an i32 value for the call.
105  if (Src.getValueType().bitsGT(MVT::i32))
106  Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
107  else if (Src.getValueType().bitsLT(MVT::i32))
108  Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
109 
110  Entry.Node = Src;
111  Entry.Ty = Type::getInt32Ty(*DAG.getContext());
112  Entry.IsSExt = false;
113  Args.push_back(Entry);
114  } else {
115  Entry.Node = Src;
116  Args.push_back(Entry);
117 
118  Entry.Node = Size;
119  Args.push_back(Entry);
120  }
121 
122  char const *FunctionNames[4][3] = {
123  { "__aeabi_memcpy", "__aeabi_memcpy4", "__aeabi_memcpy8" },
124  { "__aeabi_memmove", "__aeabi_memmove4", "__aeabi_memmove8" },
125  { "__aeabi_memset", "__aeabi_memset4", "__aeabi_memset8" },
126  { "__aeabi_memclr", "__aeabi_memclr4", "__aeabi_memclr8" }
127  };
129  CLI.setDebugLoc(dl)
130  .setChain(Chain)
131  .setLibCallee(
132  TLI->getLibcallCallingConv(LC), Type::getVoidTy(*DAG.getContext()),
133  DAG.getExternalSymbol(FunctionNames[AEABILibcall][AlignVariant],
134  TLI->getPointerTy(DAG.getDataLayout())),
135  std::move(Args))
136  .setDiscardResult();
137  std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
138 
139  return CallResult.second;
140 }
141 
142 static bool shouldGenerateInlineTPLoop(const ARMSubtarget &Subtarget,
143  const SelectionDAG &DAG,
144  ConstantSDNode *ConstantSize,
145  Align Alignment, bool IsMemcpy) {
146  auto &F = DAG.getMachineFunction().getFunction();
148  return false;
150  return true;
151  // Do not generate inline TP loop if optimizations is disabled,
152  // or if optimization for size (-Os or -Oz) is on.
153  if (F.hasOptNone() || F.hasOptSize())
154  return false;
155  // If cli option is unset, for memset always generate inline TP.
156  // For memcpy, check some conditions
157  if (!IsMemcpy)
158  return true;
159  if (!ConstantSize && Alignment >= Align(4))
160  return true;
161  if (ConstantSize &&
162  ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold() &&
163  ConstantSize->getZExtValue() <
165  return true;
166  return false;
167 }
168 
170  SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
171  SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline,
172  MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
173  const ARMSubtarget &Subtarget =
175  ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
176 
177  if (Subtarget.hasMVEIntegerOps() &&
178  shouldGenerateInlineTPLoop(Subtarget, DAG, ConstantSize, Alignment, true))
179  return DAG.getNode(ARMISD::MEMCPYLOOP, dl, MVT::Other, Chain, Dst, Src,
180  DAG.getZExtOrTrunc(Size, dl, MVT::i32));
181 
182  // Do repeated 4-byte loads and stores. To be improved.
183  // This requires 4-byte alignment.
184  if (Alignment < Align(4))
185  return SDValue();
186  // This requires the copy size to be a constant, preferably
187  // within a subtarget-specific limit.
188  if (!ConstantSize)
189  return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size,
190  Alignment.value(), RTLIB::MEMCPY);
191  uint64_t SizeVal = ConstantSize->getZExtValue();
192  if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
193  return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size,
194  Alignment.value(), RTLIB::MEMCPY);
195 
196  unsigned BytesLeft = SizeVal & 3;
197  unsigned NumMemOps = SizeVal >> 2;
198  unsigned EmittedNumMemOps = 0;
199  EVT VT = MVT::i32;
200  unsigned VTSize = 4;
201  unsigned i = 0;
202  // Emit a maximum of 4 loads in Thumb1 since we have fewer registers
203  const unsigned MaxLoadsInLDM = Subtarget.isThumb1Only() ? 4 : 6;
204  SDValue TFOps[6];
205  SDValue Loads[6];
206  uint64_t SrcOff = 0, DstOff = 0;
207 
208  // FIXME: We should invent a VMEMCPY pseudo-instruction that lowers to
209  // VLDM/VSTM and make this code emit it when appropriate. This would reduce
210  // pressure on the general purpose registers. However this seems harder to map
211  // onto the register allocator's view of the world.
212 
213  // The number of MEMCPY pseudo-instructions to emit. We use up to
214  // MaxLoadsInLDM registers per mcopy, which will get lowered into ldm/stm
215  // later on. This is a lower bound on the number of MEMCPY operations we must
216  // emit.
217  unsigned NumMEMCPYs = (NumMemOps + MaxLoadsInLDM - 1) / MaxLoadsInLDM;
218 
219  // Code size optimisation: do not inline memcpy if expansion results in
220  // more instructions than the libary call.
221  if (NumMEMCPYs > 1 && Subtarget.hasMinSize()) {
222  return SDValue();
223  }
224 
226 
227  for (unsigned I = 0; I != NumMEMCPYs; ++I) {
228  // Evenly distribute registers among MEMCPY operations to reduce register
229  // pressure.
230  unsigned NextEmittedNumMemOps = NumMemOps * (I + 1) / NumMEMCPYs;
231  unsigned NumRegs = NextEmittedNumMemOps - EmittedNumMemOps;
232 
233  Dst = DAG.getNode(ARMISD::MEMCPY, dl, VTs, Chain, Dst, Src,
234  DAG.getConstant(NumRegs, dl, MVT::i32));
235  Src = Dst.getValue(1);
236  Chain = Dst.getValue(2);
237 
238  DstPtrInfo = DstPtrInfo.getWithOffset(NumRegs * VTSize);
239  SrcPtrInfo = SrcPtrInfo.getWithOffset(NumRegs * VTSize);
240 
241  EmittedNumMemOps = NextEmittedNumMemOps;
242  }
243 
244  if (BytesLeft == 0)
245  return Chain;
246 
247  // Issue loads / stores for the trailing (1 - 3) bytes.
248  auto getRemainingValueType = [](unsigned BytesLeft) {
249  return (BytesLeft >= 2) ? MVT::i16 : MVT::i8;
250  };
251  auto getRemainingSize = [](unsigned BytesLeft) {
252  return (BytesLeft >= 2) ? 2 : 1;
253  };
254 
255  unsigned BytesLeftSave = BytesLeft;
256  i = 0;
257  while (BytesLeft) {
258  VT = getRemainingValueType(BytesLeft);
259  VTSize = getRemainingSize(BytesLeft);
260  Loads[i] = DAG.getLoad(VT, dl, Chain,
261  DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
262  DAG.getConstant(SrcOff, dl, MVT::i32)),
263  SrcPtrInfo.getWithOffset(SrcOff));
264  TFOps[i] = Loads[i].getValue(1);
265  ++i;
266  SrcOff += VTSize;
267  BytesLeft -= VTSize;
268  }
269  Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
270  makeArrayRef(TFOps, i));
271 
272  i = 0;
273  BytesLeft = BytesLeftSave;
274  while (BytesLeft) {
275  VT = getRemainingValueType(BytesLeft);
276  VTSize = getRemainingSize(BytesLeft);
277  TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
278  DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
279  DAG.getConstant(DstOff, dl, MVT::i32)),
280  DstPtrInfo.getWithOffset(DstOff));
281  ++i;
282  DstOff += VTSize;
283  BytesLeft -= VTSize;
284  }
285  return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
286  makeArrayRef(TFOps, i));
287 }
288 
290  SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
291  SDValue Size, Align Alignment, bool isVolatile,
292  MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
293  return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size,
294  Alignment.value(), RTLIB::MEMMOVE);
295 }
296 
298  SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
299  SDValue Size, Align Alignment, bool isVolatile,
300  MachinePointerInfo DstPtrInfo) const {
301 
302  const ARMSubtarget &Subtarget =
304 
305  ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
306 
307  // Generate TP loop for llvm.memset
308  if (Subtarget.hasMVEIntegerOps() &&
309  shouldGenerateInlineTPLoop(Subtarget, DAG, ConstantSize, Alignment,
310  false)) {
311  Src = DAG.getSplatBuildVector(MVT::v16i8, dl,
312  DAG.getNode(ISD::TRUNCATE, dl, MVT::i8, Src));
313  return DAG.getNode(ARMISD::MEMSETLOOP, dl, MVT::Other, Chain, Dst, Src,
314  DAG.getZExtOrTrunc(Size, dl, MVT::i32));
315  }
316 
317  return EmitSpecializedLibcall(DAG, dl, Chain, Dst, Src, Size,
318  Alignment.value(), RTLIB::MEMSET);
319 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
i
i
Definition: README.txt:29
llvm::ConstantSDNode
Definition: SelectionDAGNodes.h:1556
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::ARMISD::MEMSETLOOP
@ MEMSETLOOP
Definition: ARMISelLowering.h:316
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1086
llvm::TargetLowering::CallLoweringInfo::setChain
CallLoweringInfo & setChain(SDValue InChain)
Definition: TargetLowering.h:3791
llvm::ARMSubtarget
Definition: ARMSubtarget.h:46
llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall
SDValue EmitSpecializedLibcall(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, RTLIB::Libcall LC) const
Definition: ARMSelectionDAGInfo.cpp:38
llvm::SelectionDAG::getVTList
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
Definition: SelectionDAG.cpp:8551
llvm::cl::Hidden
@ Hidden
Definition: CommandLine.h:143
llvm::MVT::Glue
@ Glue
Definition: MachineValueType.h:262
llvm::RTLIB::Libcall
Libcall
RTLIB::Libcall enum - This enum defines all of the runtime library calls the backend can emit.
Definition: RuntimeLibcalls.h:30
llvm::ARMTargetLowering
Definition: ARMISelLowering.h:389
llvm::ARMSubtarget::getTargetLowering
const ARMTargetLowering * getTargetLowering() const override
Definition: ARMSubtarget.h:566
llvm::SelectionDAG::getStore
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
Definition: SelectionDAG.cpp:7512
llvm::SelectionDAG::getSplatBuildVector
SDValue getSplatBuildVector(EVT VT, const SDLoc &DL, SDValue Op)
Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all elements.
Definition: SelectionDAG.h:807
llvm::ARMISD::MEMCPY
@ MEMCPY
Definition: ARMISelLowering.h:309
llvm::ARMSubtarget::hasMVEIntegerOps
bool hasMVEIntegerOps() const
Definition: ARMSubtarget.h:624
llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override
Emit target-specific code that performs a memcpy.
Definition: ARMSelectionDAGInfo.cpp:169
llvm::SelectionDAG::getZExtOrTrunc
SDValue getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or trunca...
Definition: SelectionDAG.cpp:1303
llvm::ARMSubtarget::getMaxInlineSizeThreshold
unsigned getMaxInlineSizeThreshold() const
getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size that still makes it profitable t...
Definition: ARMSubtarget.h:540
SelectionDAG.h
llvm::Type::getInt32Ty
static IntegerType * getInt32Ty(LLVMContext &C)
Definition: Type.cpp:203
llvm::SelectionDAG::getContext
LLVMContext * getContext() const
Definition: SelectionDAG.h:447
F
#define F(x, y, z)
Definition: MD5.cpp:56
CommandLine.h
llvm::SelectionDAG::getLoad
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands,...
Definition: SelectionDAG.cpp:7462
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:216
llvm::ISD::ZERO_EXTEND
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition: ISDOpcodes.h:729
llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo) const override
Emit target-specific code that performs a memset.
Definition: ARMSelectionDAGInfo.cpp:297
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:35
llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemmove
SDValue EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override
Emit target-specific code that performs a memmove.
Definition: ARMSelectionDAGInfo.cpp:289
llvm::SelectionDAG::getConstant
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
Definition: SelectionDAG.cpp:1373
llvm::ISD::TRUNCATE
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition: ISDOpcodes.h:735
llvm::TargetLowering::CallLoweringInfo::setDebugLoc
CallLoweringInfo & setDebugLoc(const SDLoc &dl)
Definition: TargetLowering.h:3786
EnableMemtransferTPLoop
cl::opt< TPLoop::MemTransfer > EnableMemtransferTPLoop("arm-memtransfer-tploop", cl::Hidden, cl::desc("Control conversion of memcpy to " "Tail predicated loops (WLSTP)"), cl::init(TPLoop::ForceDisabled), cl::values(clEnumValN(TPLoop::ForceDisabled, "force-disabled", "Don't convert memcpy to TP loop."), clEnumValN(TPLoop::ForceEnabled, "force-enabled", "Always convert memcpy to TP loop."), clEnumValN(TPLoop::Allow, "allow", "Allow (may be subject to certain conditions) " "conversion of memcpy to TP loop.")))
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::TargetLowering::CallLoweringInfo::setLibCallee
CallLoweringInfo & setLibCallee(CallingConv::ID CC, Type *ResultType, SDValue Target, ArgListTy &&ArgsList)
Definition: TargetLowering.h:3797
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:626
llvm::cl::opt
Definition: CommandLine.h:1434
llvm::MVT::v16i8
@ v16i8
Definition: MachineValueType.h:80
llvm::cl::values
ValuesClass values(OptsTy... Options)
Helper to build a ValuesClass by forwarding a variable number of arguments as an initializer list to ...
Definition: CommandLine.h:699
llvm::ARMSubtarget::isThumb1Only
bool isThumb1Only() const
Definition: ARMSubtarget.h:811
uint64_t
llvm::ARMISD::MEMCPYLOOP
@ MEMCPYLOOP
Definition: ARMISelLowering.h:313
llvm::MachinePointerInfo
This class contains a discriminated union of information about pointers in memory operands,...
Definition: MachineMemOperand.h:38
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::TPLoop::ForceDisabled
@ ForceDisabled
Definition: ARMTargetTransformInfo.h:53
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::SelectionDAG::getNode
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition: SelectionDAG.cpp:8316
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:443
llvm::SDValue::getValue
SDValue getValue(unsigned R) const
Definition: SelectionDAGNodes.h:172
llvm::MVT::i8
@ i8
Definition: MachineValueType.h:44
llvm::TargetLowering::CallLoweringInfo
This structure contains all information that is necessary for lowering calls.
Definition: TargetLowering.h:3747
llvm::MVT::Other
@ Other
Definition: MachineValueType.h:42
llvm::TargetLoweringBase::ArgListEntry
Definition: TargetLowering.h:274
llvm::ConstantSDNode::getZExtValue
uint64_t getZExtValue() const
Definition: SelectionDAGNodes.h:1571
llvm::MachinePointerInfo::getWithOffset
MachinePointerInfo getWithOffset(int64_t O) const
Definition: MachineMemOperand.h:80
clEnumValN
#define clEnumValN(ENUMVAL, FLAGNAME, DESC)
Definition: CommandLine.h:674
llvm::SDVTList
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
Definition: SelectionDAGNodes.h:79
llvm::TargetLoweringBase::ArgListTy
std::vector< ArgListEntry > ArgListTy
Definition: TargetLowering.h:304
llvm::DataLayout::getIntPtrType
IntegerType * getIntPtrType(LLVMContext &C, unsigned AddressSpace=0) const
Returns an integer type with size at least as big as that of a pointer in the given address space.
Definition: DataLayout.cpp:834
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:592
shouldGenerateInlineTPLoop
static bool shouldGenerateInlineTPLoop(const ARMSubtarget &Subtarget, const SelectionDAG &DAG, ConstantSDNode *ConstantSize, Align Alignment, bool IsMemcpy)
Definition: ARMSelectionDAGInfo.cpp:142
llvm::TPLoop::ForceEnabled
@ ForceEnabled
Definition: ARMTargetTransformInfo.h:53
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
llvm::TargetLowering::CallLoweringInfo::setDiscardResult
CallLoweringInfo & setDiscardResult(bool Value=true)
Definition: TargetLowering.h:3866
llvm::SelectionDAG::getDataLayout
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:440
llvm::MVT::i32
@ i32
Definition: MachineValueType.h:46
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:138
llvm::ARMSubtarget::getMaxMemcpyTPInlineSizeThreshold
unsigned getMaxMemcpyTPInlineSizeThreshold() const
getMaxMemcpyTPInlineSizeThreshold - Returns the maximum size that still makes it profitable to inline...
Definition: ARMSubtarget.h:548
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:239
llvm::makeArrayRef
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
Definition: ArrayRef.h:476
llvm::Type::getVoidTy
static Type * getVoidTy(LLVMContext &C)
Definition: Type.cpp:186
llvm::TPLoop::Allow
@ Allow
Definition: ARMTargetTransformInfo.h:53
llvm::ARMSubtarget::hasMinSize
bool hasMinSize() const
Definition: ARMSubtarget.h:810
ARMTargetTransformInfo.h
DerivedTypes.h
llvm::MVT::i16
@ i16
Definition: MachineValueType.h:45
llvm::SelectionDAG::getMachineFunction
MachineFunction & getMachineFunction() const
Definition: SelectionDAG.h:437
llvm::SelectionDAG::getExternalSymbol
SDValue getExternalSymbol(const char *Sym, EVT VT)
Definition: SelectionDAG.cpp:1736
llvm::AMDGPU::HSAMD::Kernel::Key::Args
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Definition: AMDGPUMetadata.h:389
llvm::cl::desc
Definition: CommandLine.h:414
ARMTargetMachine.h
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition: ISDOpcodes.h:52