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13 #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H
14 #define LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H
53 #include "MipsGenDAGISel.inc"
98 unsigned MinSizeInBits)
const;
130 bool selectVecAddAsVecSubIfProfitable(
SDNode *
Node);
132 void Select(
SDNode *
N)
override;
143 bool SelectInlineAsmMemoryOperand(
const SDValue &
Op,
144 unsigned ConstraintID,
145 std::vector<SDValue> &OutOps)
override;
This is an optimization pass for GlobalISel generic memory operations.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
MipsDAGToDAGISel(MipsTargetMachine &TM, CodeGenOpt::Level OL)
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Represents one node in the SelectionDAG.
const MipsSubtarget * Subtarget
Keep a pointer to the MipsSubtarget around so that we can make the right decision when generating cod...
Represent the analysis usage information of a pass.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
MipsDAGToDAGISel()=delete
Class for arbitrary precision integers.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruc...
SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
Level
Code generation optimization level.
SDNode * getGlobalBaseReg()
getGlobalBaseReg - Output the instructions required to put the GOT address into a register.