LLVM 19.0.0git
SPIRVISelLowering.h
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1//===-- SPIRVISelLowering.h - SPIR-V DAG Lowering Interface -----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the interfaces that SPIR-V uses to lower LLVM code into a
10// selection DAG.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H
15#define LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H
16
18
19namespace llvm {
20class SPIRVSubtarget;
21
23public:
25 const SPIRVSubtarget &STI)
26 : TargetLowering(TM) {}
27
28 // Stop IRTranslator breaking up FMA instrs to preserve types information.
30 EVT) const override {
31 return true;
32 }
33
34 // prevent creation of jump tables
35 bool areJTsAllowed(const Function *) const override { return false; }
36
37 // This is to prevent sexts of non-i64 vector indices which are generated
38 // within general IRTranslator hence type generation for it is omitted.
39 MVT getVectorIdxTy(const DataLayout &DL) const override {
40 return MVT::getIntegerVT(32);
41 }
44 EVT VT) const override;
46 EVT VT) const override;
47 bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
49 unsigned Intrinsic) const override;
50};
51} // namespace llvm
52
53#endif // LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
#define I(x, y, z)
Definition: MD5.cpp:58
const char LLVMTargetMachineRef TM
This file describes how to lower LLVM code to machine code.
This class represents a function call, abstracting a target machine's calling convention.
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:110
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
Machine Value Type.
static MVT getIntegerVT(unsigned BitWidth)
SPIRVTargetLowering(const TargetMachine &TM, const SPIRVSubtarget &STI)
bool areJTsAllowed(const Function *) const override
Return true if lowering to a jump table is allowed.
MVT getVectorIdxTy(const DataLayout &DL) const override
Returns the type to be used for the index operand of: ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT...
unsigned getNumRegistersForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const override
Certain targets require unusual breakdowns of certain types.
MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const override
Certain combinations of ABIs, Targets and features require that types are legal for some operations a...
bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, MachineFunction &MF, unsigned Intrinsic) const override
Given an intrinsic, checks if on the target the intrinsic will need to map to a MemIntrinsicNode (tou...
bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF, EVT) const override
Return true if an FMA operation is faster than a pair of fmul and fadd instructions.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:76
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Extended Value Type.
Definition: ValueTypes.h:34