Functions
constexpr bool	isLegalArithImmed (const uint64_t C)

std::optional< RegOrConstant >	getAArch64VectorSplat (const MachineInstr &MI, const MachineRegisterInfo &MRI)

std::optional< int64_t >	getAArch64VectorSplatScalar (const MachineInstr &MI, const MachineRegisterInfo &MRI)

bool	isCMN (const MachineInstr *MaybeSub, const CmpInst::Predicate &Pred, const MachineRegisterInfo &MRI)

bool	tryEmitBZero (MachineInstr &MI, MachineIRBuilder &MIRBuilder, bool MinSize)
	Replace a G_MEMSET with a value of 0 with a G_BZERO instruction if it is supported and beneficial to do so.

std::tuple< uint16_t, Register >	extractPtrauthBlendDiscriminators (Register Disc, MachineRegisterInfo &MRI)
	Analyze a ptrauth discriminator value to try to find the constant integer and address parts, cracking a ptrauth_blend intrinsic if there is one.

void	changeFCMPPredToAArch64CC (const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, AArch64CC::CondCode &CondCode2)
	Find the AArch64 condition codes necessary to represent `P` for a scalar floating point comparison.

void	changeVectorFCMPPredToAArch64CC (const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, AArch64CC::CondCode &CondCode2, bool &Invert)
	Find the AArch64 condition codes necessary to represent `P` for a vector floating point comparison.

Function Documentation

◆ changeFCMPPredToAArch64CC()

void llvm::AArch64GISelUtils::changeFCMPPredToAArch64CC	(	const CmpInst::Predicate	P,
		AArch64CC::CondCode &	CondCode,
		AArch64CC::CondCode &	CondCode2
	)

Find the AArch64 condition codes necessary to represent P for a scalar floating point comparison.

Parameters

[out]	CondCode	is the first condition code.
[out]	CondCode2	is the second condition code if necessary. AArch64CC::AL otherwise.

Definition at line 126 of file AArch64GlobalISelUtils.cpp.

Referenced by changeVectorFCMPPredToAArch64CC().

◆ changeVectorFCMPPredToAArch64CC()

void llvm::AArch64GISelUtils::changeVectorFCMPPredToAArch64CC	(	const CmpInst::Predicate	P,
		AArch64CC::CondCode &	CondCode,
		AArch64CC::CondCode &	CondCode2,
		bool &	Invert
	)

Find the AArch64 condition codes necessary to represent P for a vector floating point comparison.

Parameters

[out]	CondCode	- The first condition code.
[out]	CondCode2	- The second condition code if necessary. AArch64CC::AL otherwise.
[out]	Invert	- True if the comparison must be inverted with a NOT.

Definition at line 186 of file AArch64GlobalISelUtils.cpp.

References changeFCMPPredToAArch64CC(), llvm::CmpInst::FCMP_ORD, llvm::CmpInst::FCMP_UEQ, llvm::CmpInst::FCMP_UGE, llvm::CmpInst::FCMP_UGT, llvm::CmpInst::FCMP_ULE, llvm::CmpInst::FCMP_ULT, llvm::CmpInst::FCMP_UNO, llvm::AArch64CC::GE, llvm::CmpInst::getInversePredicate(), llvm::AArch64CC::MI, and P.

◆ extractPtrauthBlendDiscriminators()

std::tuple< uint16_t, Register > llvm::AArch64GISelUtils::extractPtrauthBlendDiscriminators	(	Register	Disc,
		MachineRegisterInfo &	MRI
	)

Analyze a ptrauth discriminator value to try to find the constant integer and address parts, cracking a ptrauth_blend intrinsic if there is one.

Returns: integer/address disc. parts, with NoRegister if no address disc.

Definition at line 98 of file AArch64GlobalISelUtils.cpp.

References llvm::getIConstantVRegVal(), llvm::MachineOperand::getIntrinsicID(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), and MRI.

◆ getAArch64VectorSplat()

std::optional< RegOrConstant > llvm::AArch64GISelUtils::getAArch64VectorSplat	(	const MachineInstr &	MI,
		const MachineRegisterInfo &	MRI
	)

Returns: A value when MI is a vector splat of a Register or constant. Checks for generic opcodes and AArch64-specific generic opcodes.

Definition at line 19 of file AArch64GlobalISelUtils.cpp.

References llvm::getAnyConstantVRegValWithLookThrough(), llvm::getVectorSplat(), MI, MRI, and llvm::Splat.

Referenced by getAArch64VectorSplatScalar().

◆ getAArch64VectorSplatScalar()

std::optional< int64_t > llvm::AArch64GISelUtils::getAArch64VectorSplatScalar	(	const MachineInstr &	MI,
		const MachineRegisterInfo &	MRI
	)

Returns: A value when MI is a constant vector splat. Checks for generic opcodes and AArch64-specific generic opcodes.

Definition at line 33 of file AArch64GlobalISelUtils.cpp.

References getAArch64VectorSplat(), MI, MRI, and llvm::Splat.

Referenced by getVectorShiftImm().

◆ isCMN()

bool llvm::AArch64GISelUtils::isCMN	(	const MachineInstr *	MaybeSub,
		const CmpInst::Predicate &	Pred,
		const MachineRegisterInfo &	MRI
	)

Returns: true if MaybeSub and Pred are part of a CMN tree for an integer compare.

Definition at line 41 of file AArch64GlobalISelUtils.cpp.

References llvm::getIConstantVRegValWithLookThrough(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::CmpInst::isEquality(), and MRI.

◆ isLegalArithImmed()

constexpr bool llvm::AArch64GISelUtils::isLegalArithImmed ( const uint64_t C )

constexpr

Returns: true if C is a legal immediate operand for an arithmetic instruction.

Definition at line 28 of file AArch64GlobalISelUtils.h.

References llvm::CallingConv::C.

◆ tryEmitBZero()

bool llvm::AArch64GISelUtils::tryEmitBZero	(	MachineInstr &	MI,
		MachineIRBuilder &	MIRBuilder,
		bool	MinSize
	)

Replace a G_MEMSET with a value of 0 with a G_BZERO instruction if it is supported and beneficial to do so.

Note: This only applies on Darwin.

Returns: true if MI was replaced with a G_BZERO.

Definition at line 61 of file AArch64GlobalISelUtils.cpp.

References llvm::MachineInstrBuilder::addMemOperand(), assert(), llvm::MachineIRBuilder::buildInstr(), llvm::getIConstantVRegValWithLookThrough(), llvm::MachineIRBuilder::getMF(), llvm::MachineIRBuilder::getMRI(), llvm::MachineFunction::getSubtarget(), llvm::TargetSubtargetInfo::getTargetLowering(), MI, MRI, llvm::MachineIRBuilder::setInstrAndDebugLoc(), and Size.

Functions