29#define GET_GICOMBINER_DEPS
30#include "AArch64GenO0PreLegalizeGICombiner.inc"
31#undef GET_GICOMBINER_DEPS
33#define DEBUG_TYPE "aarch64-O0-prelegalizer-combiner"
38#define GET_GICOMBINER_TYPES
39#include "AArch64GenO0PreLegalizeGICombiner.inc"
40#undef GET_GICOMBINER_TYPES
42class AArch64O0PreLegalizerCombinerImpl :
public Combiner {
45 const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig;
50 AArch64O0PreLegalizerCombinerImpl(
53 const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig,
56 static const char *
getName() {
return "AArch64O0PreLegalizerCombiner"; }
63#define GET_GICOMBINER_CLASS_MEMBERS
64#include "AArch64GenO0PreLegalizeGICombiner.inc"
65#undef GET_GICOMBINER_CLASS_MEMBERS
68#define GET_GICOMBINER_IMPL
69#include "AArch64GenO0PreLegalizeGICombiner.inc"
70#undef GET_GICOMBINER_IMPL
72AArch64O0PreLegalizerCombinerImpl::AArch64O0PreLegalizerCombinerImpl(
75 const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig,
77 :
Combiner(MF, CInfo, TPC, &VT, CSEInfo),
78 Helper(Observer,
B,
true, &VT), RuleConfig(RuleConfig),
79 STI(STI), Libcalls(Libcalls),
81#include
"AArch64GenO0PreLegalizeGICombiner.inc"
86bool AArch64O0PreLegalizerCombinerImpl::tryCombineAll(
MachineInstr &
MI)
const {
87 if (tryCombineAllImpl(
MI))
90 unsigned Opc =
MI.getOpcode();
92 case TargetOpcode::G_SHUFFLE_VECTOR:
94 case TargetOpcode::G_MEMCPY_INLINE:
96 case TargetOpcode::G_MEMCPY:
97 case TargetOpcode::G_MEMMOVE:
98 case TargetOpcode::G_MEMSET: {
100 unsigned MaxLen = 32;
104 if (
Opc == TargetOpcode::G_MEMSET)
106 CInfo.EnableMinSize);
117class AArch64O0PreLegalizerCombiner :
public MachineFunctionPass {
121 AArch64O0PreLegalizerCombiner();
123 StringRef getPassName()
const override {
124 return "AArch64O0PreLegalizerCombiner";
127 bool runOnMachineFunction(MachineFunction &MF)
override;
129 void getAnalysisUsage(AnalysisUsage &AU)
const override;
132 AArch64O0PreLegalizerCombinerImplRuleConfig RuleConfig;
136void AArch64O0PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU)
const {
140 AU.
addRequired<GISelValueTrackingAnalysisLegacy>();
146AArch64O0PreLegalizerCombiner::AArch64O0PreLegalizerCombiner()
147 : MachineFunctionPass(
ID) {
148 if (!RuleConfig.parseCommandLineOption())
152bool AArch64O0PreLegalizerCombiner::runOnMachineFunction(
MachineFunction &MF) {
155 auto &TPC = getAnalysis<TargetPassConfig>();
159 &getAnalysis<GISelValueTrackingAnalysisLegacy>().get(MF);
163 getAnalysis<LibcallLoweringInfoWrapper>().getLibcallLowering(
168 F.hasOptSize(),
F.hasMinSize());
171 CInfo.MaxIterations = 1;
173 AArch64O0PreLegalizerCombinerImpl Impl(MF, CInfo, &TPC, *VT,
174 nullptr, RuleConfig, ST,
176 return Impl.combineMachineInstrs();
179char AArch64O0PreLegalizerCombiner::ID = 0;
181 "Combine AArch64 machine instrs before legalization",
188 "Combine AArch64 machine instrs before legalization",
false,
193 return new AArch64O0PreLegalizerCombiner();
#define GET_GICOMBINER_CONSTRUCTOR_INITS
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
This contains common combine transformations that may be used in a combine pass,or by the target else...
Option class for Targets to specify which operations are combined how and when.
This contains the base class for all Combiners generated by TableGen.
Provides analysis for querying information about KnownBits during GISel passes.
Contains matchers for matching SSA Machine Instructions.
This file declares the MachineIRBuilder class.
#define INITIALIZE_PASS_DEPENDENCY(depName)
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
static StringRef getName(Value *V)
Target-Independent Code Generator Pass Configuration Options pass.
AnalysisUsage & addRequired()
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
LLVM_ABI void setPreservesCFG()
This function should be called by the pass, iff they do not:
bool tryEmitMemcpyInline(MachineInstr &MI) const
Emit loads and stores that perform the given memcpy.
bool tryCombineShuffleVector(MachineInstr &MI) const
Try to combine G_SHUFFLE_VECTOR into G_CONCAT_VECTORS.
bool tryCombineMemCpyFamily(MachineInstr &MI, unsigned MaxLen=0) const
Optimize memcpy intrinsics et al, e.g.
FunctionPass class - This class is used to implement most global optimizations.
The actual analysis pass wrapper.
To use KnownBitsInfo analysis in a pass, KnownBitsInfo &Info = getAnalysis<GISelValueTrackingInfoAnal...
Tracks which library functions to use for a particular subtarget.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Function & getFunction()
Return the LLVM function that this machine code represents.
const MachineFunctionProperties & getProperties() const
Get the function properties.
Representation of each machine instruction.
Target-Independent Code Generator Pass Configuration Options.
bool tryEmitBZero(MachineInstr &MI, MachineIRBuilder &MIRBuilder, const LibcallLoweringInfo &Libcalls, bool MinSize)
Replace a G_MEMSET with a value of 0 with a G_BZERO instruction if it is supported and beneficial to ...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
FunctionPass * createAArch64O0PreLegalizerCombiner()
LLVM_ABI void report_fatal_error(Error Err, bool gen_crash_diag=true)
LLVM_ABI void getSelectionDAGFallbackAnalysisUsage(AnalysisUsage &AU)
Modify analysis usage so it preserves passes required for the SelectionDAG fallback.