LLVM 19.0.0git
NVPTXInstPrinter.cpp
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1//===-- NVPTXInstPrinter.cpp - PTX assembly instruction printing ----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Print MCInst instructions to .ptx format.
10//
11//===----------------------------------------------------------------------===//
12
15#include "NVPTX.h"
16#include "llvm/MC/MCExpr.h"
17#include "llvm/MC/MCInst.h"
18#include "llvm/MC/MCInstrInfo.h"
20#include "llvm/MC/MCSymbol.h"
23#include <cctype>
24using namespace llvm;
25
26#define DEBUG_TYPE "asm-printer"
27
28#include "NVPTXGenAsmWriter.inc"
29
31 const MCRegisterInfo &MRI)
32 : MCInstPrinter(MAI, MII, MRI) {}
33
35 // Decode the virtual register
36 // Must be kept in sync with NVPTXAsmPrinter::encodeVirtualRegister
37 unsigned RCId = (Reg.id() >> 28);
38 switch (RCId) {
39 default: report_fatal_error("Bad virtual register encoding");
40 case 0:
41 // This is actually a physical register, so defer to the autogenerated
42 // register printer
43 OS << getRegisterName(Reg);
44 return;
45 case 1:
46 OS << "%p";
47 break;
48 case 2:
49 OS << "%rs";
50 break;
51 case 3:
52 OS << "%r";
53 break;
54 case 4:
55 OS << "%rd";
56 break;
57 case 5:
58 OS << "%f";
59 break;
60 case 6:
61 OS << "%fd";
62 break;
63 case 7:
64 OS << "%rq";
65 break;
66 }
67
68 unsigned VReg = Reg.id() & 0x0FFFFFFF;
69 OS << VReg;
70}
71
73 StringRef Annot, const MCSubtargetInfo &STI,
74 raw_ostream &OS) {
76
77 // Next always print the annotation.
78 printAnnotation(OS, Annot);
79}
80
81void NVPTXInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
82 raw_ostream &O) {
83 const MCOperand &Op = MI->getOperand(OpNo);
84 if (Op.isReg()) {
85 unsigned Reg = Op.getReg();
86 printRegName(O, Reg);
87 } else if (Op.isImm()) {
88 markup(O, Markup::Immediate) << formatImm(Op.getImm());
89 } else {
90 assert(Op.isExpr() && "Unknown operand kind in printOperand");
91 Op.getExpr()->print(O, &MAI);
92 }
93}
94
96 const char *Modifier) {
97 const MCOperand &MO = MI->getOperand(OpNum);
98 int64_t Imm = MO.getImm();
99
100 if (strcmp(Modifier, "ftz") == 0) {
101 // FTZ flag
103 O << ".ftz";
104 } else if (strcmp(Modifier, "sat") == 0) {
105 // SAT flag
107 O << ".sat";
108 } else if (strcmp(Modifier, "relu") == 0) {
109 // RELU flag
111 O << ".relu";
112 } else if (strcmp(Modifier, "base") == 0) {
113 // Default operand
114 switch (Imm & NVPTX::PTXCvtMode::BASE_MASK) {
115 default:
116 return;
118 break;
120 O << ".rni";
121 break;
123 O << ".rzi";
124 break;
126 O << ".rmi";
127 break;
129 O << ".rpi";
130 break;
132 O << ".rn";
133 break;
135 O << ".rz";
136 break;
138 O << ".rm";
139 break;
141 O << ".rp";
142 break;
144 O << ".rna";
145 break;
146 }
147 } else {
148 llvm_unreachable("Invalid conversion modifier");
149 }
150}
151
153 const char *Modifier) {
154 const MCOperand &MO = MI->getOperand(OpNum);
155 int64_t Imm = MO.getImm();
156
157 if (strcmp(Modifier, "ftz") == 0) {
158 // FTZ flag
160 O << ".ftz";
161 } else if (strcmp(Modifier, "base") == 0) {
162 switch (Imm & NVPTX::PTXCmpMode::BASE_MASK) {
163 default:
164 return;
166 O << ".eq";
167 break;
169 O << ".ne";
170 break;
172 O << ".lt";
173 break;
175 O << ".le";
176 break;
178 O << ".gt";
179 break;
181 O << ".ge";
182 break;
184 O << ".lo";
185 break;
187 O << ".ls";
188 break;
190 O << ".hi";
191 break;
193 O << ".hs";
194 break;
196 O << ".equ";
197 break;
199 O << ".neu";
200 break;
202 O << ".ltu";
203 break;
205 O << ".leu";
206 break;
208 O << ".gtu";
209 break;
211 O << ".geu";
212 break;
214 O << ".num";
215 break;
217 O << ".nan";
218 break;
219 }
220 } else {
221 llvm_unreachable("Empty Modifier");
222 }
223}
224
226 raw_ostream &O, const char *Modifier) {
227 if (Modifier) {
228 const MCOperand &MO = MI->getOperand(OpNum);
229 int Imm = (int) MO.getImm();
230 if (!strcmp(Modifier, "sem")) {
231 switch (Imm) {
233 break;
235 O << ".volatile";
236 break;
238 O << ".relaxed.sys";
239 break;
241 O << ".acquire.sys";
242 break;
244 O << ".release.sys";
245 break;
247 O << ".mmio.relaxed.sys";
248 break;
249 default:
252 OS << "NVPTX LdStCode Printer does not support \"" << Imm
253 << "\" sem modifier.";
254 report_fatal_error(OS.str());
255 break;
256 }
257 } else if (!strcmp(Modifier, "addsp")) {
258 switch (Imm) {
260 O << ".global";
261 break;
263 O << ".shared";
264 break;
266 O << ".local";
267 break;
269 O << ".param";
270 break;
272 O << ".const";
273 break;
275 break;
276 default:
277 llvm_unreachable("Wrong Address Space");
278 }
279 } else if (!strcmp(Modifier, "sign")) {
281 O << "s";
282 else if (Imm == NVPTX::PTXLdStInstCode::Unsigned)
283 O << "u";
284 else if (Imm == NVPTX::PTXLdStInstCode::Untyped)
285 O << "b";
286 else if (Imm == NVPTX::PTXLdStInstCode::Float)
287 O << "f";
288 else
289 llvm_unreachable("Unknown register type");
290 } else if (!strcmp(Modifier, "vec")) {
292 O << ".v2";
293 else if (Imm == NVPTX::PTXLdStInstCode::V4)
294 O << ".v4";
295 } else
296 llvm_unreachable("Unknown Modifier");
297 } else
298 llvm_unreachable("Empty Modifier");
299}
300
302 const char *Modifier) {
303 const MCOperand &MO = MI->getOperand(OpNum);
304 int Imm = (int)MO.getImm();
305 if (Modifier == nullptr || strcmp(Modifier, "version") == 0) {
306 O << Imm; // Just print out PTX version
307 } else if (strcmp(Modifier, "aligned") == 0) {
308 // PTX63 requires '.aligned' in the name of the instruction.
309 if (Imm >= 63)
310 O << ".aligned";
311 } else
312 llvm_unreachable("Unknown Modifier");
313}
314
316 raw_ostream &O, const char *Modifier) {
317 printOperand(MI, OpNum, O);
318
319 if (Modifier && !strcmp(Modifier, "add")) {
320 O << ", ";
321 printOperand(MI, OpNum + 1, O);
322 } else {
323 if (MI->getOperand(OpNum + 1).isImm() &&
324 MI->getOperand(OpNum + 1).getImm() == 0)
325 return; // don't print ',0' or '+0'
326 O << "+";
327 printOperand(MI, OpNum + 1, O);
328 }
329}
330
332 raw_ostream &O, const char *Modifier) {
333 const MCOperand &Op = MI->getOperand(OpNum);
334 assert(Op.isExpr() && "Call prototype is not an MCExpr?");
335 const MCExpr *Expr = Op.getExpr();
336 const MCSymbol &Sym = cast<MCSymbolRefExpr>(Expr)->getSymbol();
337 O << Sym.getName();
338}
339
341 raw_ostream &O, const char *Modifier) {
342 const MCOperand &MO = MI->getOperand(OpNum);
343 int64_t Imm = MO.getImm();
344
345 switch (Imm) {
346 default:
347 return;
349 break;
351 O << ".f4e";
352 break;
354 O << ".b4e";
355 break;
357 O << ".rc8";
358 break;
360 O << ".ecl";
361 break;
363 O << ".ecr";
364 break;
366 O << ".rc16";
367 break;
368 }
369}
unsigned const MachineRegisterInfo * MRI
Symbol * Sym
Definition: ELF_riscv.cpp:479
IRTranslator LLVM IR MI
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
This class represents an Operation in the Expression.
bool print(raw_ostream &OS, DIDumpOptions DumpOpts, const DWARFExpression *Expr, DWARFUnit *U) const
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:34
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:45
WithMarkup markup(raw_ostream &OS, Markup M) const
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:51
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:26
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
int64_t getImm() const
Definition: MCInst.h:80
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Generic base class for all target subtargets.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printMemOperand(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O)
void printLdStCode(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printProtoIdent(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printRegName(raw_ostream &OS, MCRegister Reg) const override
Print the assembler register name.
static const char * getRegisterName(MCRegister Reg)
void printPrmtMode(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &OS) override
Print the specified MCInst to the specified raw_ostream.
void printMmaCode(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier=nullptr)
NVPTXInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
Definition: SmallString.h:26
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:691
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:167