LLVM  10.0.0svn
Public Member Functions | Static Public Member Functions | List of all members
llvm::AMDGPUCallLowering Class Reference

#include "Target/AMDGPU/AMDGPUCallLowering.h"

Inheritance diagram for llvm::AMDGPUCallLowering:
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Collaboration diagram for llvm::AMDGPUCallLowering:
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Public Member Functions

 AMDGPUCallLowering (const AMDGPUTargetLowering &TLI)
 
bool lowerReturn (MachineIRBuilder &B, const Value *Val, ArrayRef< Register > VRegs) const override
 This hook behaves as the extended lowerReturn function, but for targets that do not support swifterror value promotion. More...
 
bool lowerFormalArgumentsKernel (MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register >> VRegs) const
 
bool lowerFormalArguments (MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register >> VRegs) const override
 This hook must be implemented to lower the incoming (formal) arguments, described by VRegs, for GlobalISel. More...
 
- Public Member Functions inherited from llvm::CallLowering
 CallLowering (const TargetLowering *TLI)
 
virtual ~CallLowering ()=default
 
virtual bool supportSwiftError () const
 
virtual bool lowerReturn (MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, Register SwiftErrorVReg) const
 This hook must be implemented to lower outgoing return values, described by Val, into the specified virtual registers VRegs. More...
 
virtual bool lowerCall (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const
 This hook must be implemented to lower the given call instruction, including argument and return value marshalling. More...
 
bool lowerCall (MachineIRBuilder &MIRBuilder, ImmutableCallSite CS, ArrayRef< Register > ResRegs, ArrayRef< ArrayRef< Register >> ArgRegs, Register SwiftErrorVReg, std::function< unsigned()> GetCalleeReg) const
 Lower the given call instruction, including argument and return value marshalling. More...
 

Static Public Member Functions

static CCAssignFnCCAssignFnForCall (CallingConv::ID CC, bool IsVarArg)
 
static CCAssignFnCCAssignFnForReturn (CallingConv::ID CC, bool IsVarArg)
 

Additional Inherited Members

- Protected Member Functions inherited from llvm::CallLowering
const TargetLoweringgetTLI () const
 Getter for generic TargetLowering class. More...
 
template<class XXXTargetLowering >
const XXXTargetLowering * getTLI () const
 Getter for target specific TargetLowering class. More...
 
template<typename FuncInfoTy >
void setArgFlags (ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const
 
Register packRegs (ArrayRef< Register > SrcRegs, Type *PackedTy, MachineIRBuilder &MIRBuilder) const
 Generate instructions for packing SrcRegs into one big register corresponding to the aggregate type PackedTy. More...
 
void unpackRegs (ArrayRef< Register > DstRegs, Register SrcReg, Type *PackedTy, MachineIRBuilder &MIRBuilder) const
 Generate instructions for unpacking SrcReg into the DstRegs corresponding to the aggregate type PackedTy. More...
 
bool handleAssignments (MachineIRBuilder &MIRBuilder, SmallVectorImpl< ArgInfo > &Args, ValueHandler &Handler) const
 Invoke Handler::assignArg on each of the given Args and then use Callback to move them to the assigned locations. More...
 
bool handleAssignments (CCState &CCState, SmallVectorImpl< CCValAssign > &ArgLocs, MachineIRBuilder &MIRBuilder, SmallVectorImpl< ArgInfo > &Args, ValueHandler &Handler) const
 
bool analyzeArgInfo (CCState &CCState, SmallVectorImpl< ArgInfo > &Args, CCAssignFn &AssignFnFixed, CCAssignFn &AssignFnVarArg) const
 Analyze passed or returned values from a call, supplied in ArgInfo, incorporating info about the passed values into CCState. More...
 
bool resultsCompatible (CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &InArgs, CCAssignFn &CalleeAssignFnFixed, CCAssignFn &CalleeAssignFnVarArg, CCAssignFn &CallerAssignFnFixed, CCAssignFn &CallerAssignFnVarArg) const
 

Detailed Description

Definition at line 25 of file AMDGPUCallLowering.h.

Constructor & Destructor Documentation

◆ AMDGPUCallLowering()

AMDGPUCallLowering::AMDGPUCallLowering ( const AMDGPUTargetLowering TLI)

Member Function Documentation

◆ CCAssignFnForCall()

CCAssignFn * AMDGPUCallLowering::CCAssignFnForCall ( CallingConv::ID  CC,
bool  IsVarArg 
)
static

◆ CCAssignFnForReturn()

CCAssignFn * AMDGPUCallLowering::CCAssignFnForReturn ( CallingConv::ID  CC,
bool  IsVarArg 
)
static

◆ lowerFormalArguments()

bool AMDGPUCallLowering::lowerFormalArguments ( MachineIRBuilder MIRBuilder,
const Function F,
ArrayRef< ArrayRef< Register >>  VRegs 
) const
overridevirtual

This hook must be implemented to lower the incoming (formal) arguments, described by VRegs, for GlobalISel.

Each argument must end up in the related virtual registers described by VRegs. In other words, the first argument should end up in VRegs[0], the second in VRegs[1], and so on. For each argument, there will be one register for each non-aggregate type, as returned by computeValueLLTs. MIRBuilder is set to the proper insertion for the argument lowering.

Returns
True if the lowering succeeded, false otherwise.

Reimplemented from llvm::CallLowering.

Definition at line 548 of file AMDGPUCallLowering.cpp.

References llvm::SIMachineFunctionInfo::addImplicitBufferPtr(), llvm::MachineBasicBlock::addLiveIn(), llvm::MachineFunction::addLiveIn(), llvm::SITargetLowering::allocateSpecialInputSGPRs(), llvm::SITargetLowering::allocateSpecialInputVGPRs(), llvm::SITargetLowering::allocateSystemSGPRs(), llvm::CallingConv::AMDGPU_KERNEL, llvm::CallingConv::AMDGPU_PS, Arg, llvm::Function::args(), llvm::MachineBasicBlock::begin(), llvm::MachineIRBuilder::buildCopy(), llvm::MachineIRBuilder::buildUndef(), llvm::AMDGPUTargetLowering::CCAssignFnForCall(), llvm::countTrailingZeros(), E, llvm::MachineBasicBlock::empty(), llvm::AttributeList::FirstArgIndex, llvm::Function::getCallingConv(), llvm::Function::getContext(), llvm::Module::getDataLayout(), llvm::SIMachineFunctionInfo::getFrameOffsetReg(), llvm::MachineFunction::getInfo(), llvm::MachineIRBuilder::getMBB(), llvm::MachineIRBuilder::getMF(), llvm::GlobalValue::getParent(), llvm::SIMachineFunctionInfo::getPSInputAddr(), llvm::SIMachineFunctionInfo::getPSInputEnable(), llvm::MachineFunction::getRegInfo(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), llvm::MachineFunction::getSubtarget(), llvm::DataLayout::getTypeStoreSize(), llvm::CallLowering::handleAssignments(), llvm::SIMachineFunctionInfo::hasImplicitBufferPtr(), I, Info, llvm::AMDGPU::isEntryFunctionCC(), llvm::SIMachineFunctionInfo::isPSInputAllocated(), llvm::AMDGPU::isShader(), llvm::Function::isVarArg(), lowerFormalArgumentsKernel(), llvm::SIMachineFunctionInfo::markPSInputAllocated(), llvm::SIMachineFunctionInfo::markPSInputEnabled(), packSplitRegsToOrigType(), llvm::CallLowering::setArgFlags(), llvm::MachineIRBuilder::setInstr(), llvm::MachineIRBuilder::setMBB(), llvm::size(), TRI, and llvm::ZB_Undefined.

◆ lowerFormalArgumentsKernel()

bool AMDGPUCallLowering::lowerFormalArgumentsKernel ( MachineIRBuilder B,
const Function F,
ArrayRef< ArrayRef< Register >>  VRegs 
) const

◆ lowerReturn()

bool AMDGPUCallLowering::lowerReturn ( MachineIRBuilder MIRBuilder,
const Value Val,
ArrayRef< Register VRegs 
) const
overridevirtual

This hook behaves as the extended lowerReturn function, but for targets that do not support swifterror value promotion.

Reimplemented from llvm::CallLowering.

Definition at line 289 of file AMDGPUCallLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineFunction::addLiveIn(), llvm::MachineInstrBuilder::addUse(), assert(), llvm::MachineIRBuilder::buildConstant(), llvm::MachineIRBuilder::buildCopy(), llvm::MachineIRBuilder::buildGEP(), llvm::MachineIRBuilder::buildInstr(), llvm::MachineIRBuilder::buildInstrNoInsert(), llvm::MachineIRBuilder::buildLoad(), AMDGPUAS::CONSTANT_ADDRESS, llvm::MachineRegisterInfo::createVirtualRegister(), llvm::ArrayRef< T >::empty(), F(), llvm::PointerType::get(), llvm::UndefValue::get(), llvm::Function::getCallingConv(), llvm::Module::getDataLayout(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::getLLTForType(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineIRBuilder::getMF(), llvm::GlobalValue::getParent(), llvm::SIMachineFunctionInfo::getPreloadedReg(), llvm::MachineFunction::getRegInfo(), llvm::SIRegisterInfo::getReturnAddressReg(), llvm::MachineFunction::getSubtarget(), llvm::DataLayout::getTypeStoreSize(), llvm::MachineIRBuilder::insertInstr(), llvm::AMDGPU::isKernel(), llvm::AMDGPU::isShader(), llvm::AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, llvm::SIMachineFunctionInfo::returnsVoid(), llvm::LLT::scalar(), llvm::SIMachineFunctionInfo::setIfReturnsVoid(), llvm::ARM_MB::ST, and TRI.


The documentation for this class was generated from the following files: