LLVM 19.0.0git
WebAssemblyDebugFixup.cpp
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1//===-- WebAssemblyDebugFixup.cpp - Debug Fixup ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// Several prior passes may "stackify" registers, here we ensure any references
11/// in such registers in debug_value instructions become stack relative also.
12/// This is done in a separate pass such that not all previous passes need to
13/// track stack depth when values get stackified.
14///
15//===----------------------------------------------------------------------===//
16
18#include "WebAssembly.h"
28#include "llvm/CodeGen/Passes.h"
29#include "llvm/Support/Debug.h"
31using namespace llvm;
32
33#define DEBUG_TYPE "wasm-debug-fixup"
34
35namespace {
36class WebAssemblyDebugFixup final : public MachineFunctionPass {
37 StringRef getPassName() const override { return "WebAssembly Debug Fixup"; }
38
39 void getAnalysisUsage(AnalysisUsage &AU) const override {
40 AU.setPreservesCFG();
42 }
43
44 bool runOnMachineFunction(MachineFunction &MF) override;
45
46public:
47 static char ID; // Pass identification, replacement for typeid
48 WebAssemblyDebugFixup() : MachineFunctionPass(ID) {}
49};
50} // end anonymous namespace
51
52char WebAssemblyDebugFixup::ID = 0;
54 WebAssemblyDebugFixup, DEBUG_TYPE,
55 "Ensures debug_value's that have been stackified become stack relative",
56 false, false)
57
59 return new WebAssemblyDebugFixup();
60}
61
62// At this very end of the compilation pipeline, if any DBG_VALUEs with
63// registers remain, it means they are dangling info which we failed to update
64// when their corresponding def instruction was transformed/moved/splitted etc.
65// Because Wasm cannot access values in LLVM virtual registers in the debugger,
66// these dangling DBG_VALUEs in effect kill the effect of any previous DBG_VALUE
67// associated with the variable, which will appear as "optimized out".
69 const TargetInstrInfo *TII) {
70 for (auto &MI : llvm::make_early_inc_range(MBB)) {
71 if (MI.isDebugValue() && MI.getDebugOperand(0).isReg() &&
72 !MI.isUndefDebugValue()) {
73 LLVM_DEBUG(dbgs() << "Warning: dangling DBG_VALUE set to undef: " << MI
74 << "\n");
75 MI.setDebugValueUndef();
76 }
77 }
78}
79
80bool WebAssemblyDebugFixup::runOnMachineFunction(MachineFunction &MF) {
81 LLVM_DEBUG(dbgs() << "********** Debug Fixup **********\n"
82 "********** Function: "
83 << MF.getName() << '\n');
84
86 const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
87
88 struct StackElem {
89 unsigned Reg;
90 MachineInstr *DebugValue;
91 };
92 std::vector<StackElem> Stack;
93 for (MachineBasicBlock &MBB : MF) {
94 // We may insert into this list.
95 for (auto MII = MBB.begin(); MII != MBB.end(); ++MII) {
96 MachineInstr &MI = *MII;
97 if (MI.isDebugValue()) {
98 auto &MO = MI.getOperand(0);
99 // Also check if not a $noreg: likely a DBG_VALUE we just inserted.
100 if (MO.isReg() && MO.getReg().isValid() &&
101 MFI.isVRegStackified(MO.getReg())) {
102 // Found a DBG_VALUE with a stackified register we will
103 // change into a stack operand.
104 // Search for register rather than assume it is on top (which it
105 // typically is if it appears right after the def), since
106 // DBG_VALUE's may shift under some circumstances.
107 for (auto &Elem : reverse(Stack)) {
108 if (MO.getReg() == Elem.Reg) {
109 auto Depth = static_cast<unsigned>(&Elem - &Stack[0]);
110 LLVM_DEBUG(dbgs() << "Debug Value VReg " << MO.getReg()
111 << " -> Stack Relative " << Depth << "\n");
112 MO.ChangeToTargetIndex(WebAssembly::TI_OPERAND_STACK, Depth);
113 // Save the DBG_VALUE instruction that defined this stackified
114 // variable since later we need it to construct another one on
115 // pop.
116 Elem.DebugValue = &MI;
117 break;
118 }
119 }
120 // If the Reg was not found, we have a DBG_VALUE outside of its
121 // def-use range, and we leave it unmodified as reg, which means
122 // it will be culled later.
123 }
124 } else {
125 // Track stack depth.
126 for (MachineOperand &MO : reverse(MI.explicit_uses())) {
127 if (MO.isReg() && MFI.isVRegStackified(MO.getReg())) {
128 auto Prev = Stack.back();
129 Stack.pop_back();
130 assert(Prev.Reg == MO.getReg() &&
131 "WebAssemblyDebugFixup: Pop: Register not matched!");
132 // We should not put a DBG_VALUE after a terminator; debug ranges
133 // are terminated at the end of a BB anyway.
134 if (Prev.DebugValue && !MI.isTerminator()) {
135 // This stackified reg is a variable that started life at
136 // Prev.DebugValue, so now that we're popping it we must insert
137 // a $noreg DBG_VALUE for the variable to end it, right after
138 // the current instruction.
139 BuildMI(*Prev.DebugValue->getParent(), std::next(MII),
140 Prev.DebugValue->getDebugLoc(),
141 TII->get(WebAssembly::DBG_VALUE), false, Register(),
142 Prev.DebugValue->getOperand(2).getMetadata(),
143 Prev.DebugValue->getOperand(3).getMetadata());
144 }
145 }
146 }
147 for (MachineOperand &MO : MI.defs()) {
148 if (MO.isReg() && MFI.isVRegStackified(MO.getReg())) {
149 Stack.push_back({MO.getReg(), nullptr});
150 }
151 }
152 }
153 }
154 assert(Stack.empty() &&
155 "WebAssemblyDebugFixup: Stack not empty at end of basic block!");
156
158 }
159
160 return true;
161}
MachineBasicBlock & MBB
#define LLVM_DEBUG(X)
Definition: Debug.h:101
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
unsigned Reg
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:38
This builds on the llvm/ADT/GraphTraits.h file to find the strongly connected components (SCCs) of a ...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static void setDanglingDebugValuesUndef(MachineBasicBlock &MBB, const TargetInstrInfo *TII)
#define DEBUG_TYPE
This file provides WebAssembly-specific target descriptions.
This file declares WebAssembly-specific per-machine-function information.
This file declares the WebAssembly-specific subclass of TargetSubtarget.
This file contains the declaration of the WebAssembly-specific utility functions.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.
Represent the analysis usage information of a pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:269
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Representation of each machine instruction.
Definition: MachineInstr.h:68
MachineOperand class - Representation of each machine instruction operand.
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
TargetInstrInfo - Interface to description of machine instruction set.
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
Definition: STLExtras.h:665
auto reverse(ContainerTy &&C)
Definition: STLExtras.h:428
FunctionPass * createWebAssemblyDebugFixup()
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163