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14 #ifndef LLVM_LIB_CODEGEN_SPLITKIT_H
15 #define LLVM_LIB_CODEGEN_SPLITKIT_H
40 class MachineBlockFrequencyInfo;
41 class MachineDominatorTree;
42 class MachineLoopInfo;
43 class MachineRegisterInfo;
44 class TargetInstrInfo;
45 class TargetRegisterInfo;
70 unsigned Num =
MBB.getNumber();
72 if (LastInsertPoint[Num].first.isValid() &&
73 !LastInsertPoint[Num].second.isValid())
74 return LastInsertPoint[Num].first;
75 return computeLastInsertPoint(CurLI,
MBB);
155 unsigned NumGapBlocks;
161 unsigned NumThroughBlocks;
167 void calcLiveBlockInfo();
189 bool isOriginalEndpoint(
SlotIndex Idx)
const;
210 return getUseBlocks().size() - NumGapBlocks + getNumThroughBlocks();
228 bool shouldSplitSingleBlock(
const BlockInfo &BI,
bool SingleInstrs)
const;
304 unsigned OpenIdx = 0;
307 ComplementSpillMode SpillMode = SM_Partition;
318 RegAssignMap RegAssign;
346 return LICalc[SpillMode != SM_Partition && RegIdx != 0];
355 void addDeadDef(LiveInterval &LI, VNInfo *VNI,
bool Original);
365 VNInfo *defValue(
unsigned RegIdx,
const VNInfo *ParentVNI, SlotIndex Idx,
372 void forceRecompute(
unsigned RegIdx,
const VNInfo &ParentVNI);
376 void forceRecomputeVNI(
const VNInfo &ParentVNI);
380 VNInfo *defFromParent(
unsigned RegIdx,
const VNInfo *ParentVNI,
381 SlotIndex UseIdx, MachineBasicBlock &
MBB,
386 void removeBackCopies(SmallVectorImpl<VNInfo*> &
Copies);
390 MachineBasicBlock *findShallowDominator(MachineBasicBlock *
MBB,
391 MachineBasicBlock *DefMBB);
394 void computeRedundantBackCopies(DenseSet<unsigned> &NotToHoistSet,
395 SmallVectorImpl<VNInfo *> &BackCopies);
404 bool transferValues();
411 void extendPHIRange(MachineBasicBlock &
B, LiveIntervalCalc &LIC,
413 ArrayRef<SlotIndex> Undefs);
417 void extendPHIKillRanges();
420 void rewriteAssigned(
bool ExtendRanges);
423 void deleteRematVictims();
428 SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
430 bool Late,
unsigned RegIdx);
432 SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
434 unsigned SubIdx, LiveInterval &DestLI,
bool Late, SlotIndex
Def);
439 SplitEditor(SplitAnalysis &SA, AAResults &
AA, LiveIntervals &LIS,
440 VirtRegMap &VRM, MachineDominatorTree &MDT,
441 MachineBlockFrequencyInfo &MBFI, VirtRegAuxInfo &VRAI);
444 void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition);
455 void selectIntv(
unsigned Idx);
529 void splitLiveThroughBlock(
unsigned MBBNum,
559 #endif // LLVM_LIB_CODEGEN_SPLITKIT_H
unsigned getNumLiveBlocks() const
getNumLiveBlocks - Return the number of blocks where CurLI is live.
bool LiveIn
Current reg is live in.
This is an optimization pass for GlobalISel generic memory operations.
SlotIndex FirstInstr
First instr accessing current reg.
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
bool isOneInstr() const
isOneInstr - Returns true when this BlockInfo describes a single instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
SlotIndex getFirstSplitPoint(unsigned Num)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Calculate auxiliary information for a virtual register such as its spill weight and allocation hint.
Additional information about basic blocks where the current variable is live.
Determines the latest safe point in a block in which we can insert a split, spill or other instructio...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
ArrayRef< SlotIndex > getUseSlots() const
getUseSlots - Return an array of SlotIndexes of instructions using CurLI.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
void dump(const SparseBitVector< ElementSize > &LHS, raw_ostream &out)
SplitEditor - Edit machine code and LiveIntervals for live range splitting.
SlotIndex FirstDef
First non-phi valno->def, or SlotIndex().
unsigned const TargetRegisterInfo * TRI
SlotIndex getInstructionIndex(const MachineInstr &Instr) const
Returns the base index of the given instruction.
static void clear(coro::Shape &Shape)
@ SM_Size
SM_Size - Overlap intervals to minimize the number of inserted COPY instructions.
TargetInstrInfo - Interface to description of machine instruction set.
const LiveIntervals & LIS
const MachineLoopInfo & Loops
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const
Return the first index in the given basic block.
@ SM_Partition
SM_Partition(Default) - Try to create the complement interval so it doesn't overlap any other interva...
MachineBasicBlock::iterator getLastSplitPointIter(MachineBasicBlock *BB)
const HexagonInstrInfo * TII
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
This class implements an extremely fast bulk output stream that can only output to a stream.
LiveInterval - This class represents the liveness of a register, or stack slot.
SlotIndex - An opaque wrapper around machine indexes.
SlotIndex LastInstr
Last instr accessing current reg.
const BitVector & getThroughBlocks() const
getThroughBlocks - Return the set of through blocks.
bool LiveOut
Current reg is live out.
ArrayRef< BlockInfo > getUseBlocks() const
getUseBlocks - Return an array of BlockInfo objects for the basic blocks where CurLI has uses.
static bool isSameInstr(SlotIndex A, SlotIndex B)
isSameInstr - Return true if A and B refer to the same instruction.
const LiveInterval & getParent() const
getParent - Return the last analyzed interval.
SlotIndex getLastInsertPoint(const LiveInterval &CurLI, const MachineBasicBlock &MBB)
Return the base index of the last valid insert point for \pCurLI in \pMBB.
SI Optimize VGPR LiveRange
const MachineFunction & MF
MachineInstrBundleIterator< MachineInstr > iterator
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
#define LLVM_LIBRARY_VISIBILITY
LLVM_LIBRARY_VISIBILITY - If a class marked with this attribute is linked into a shared library,...
unsigned const MachineRegisterInfo * MRI
const TargetInstrInfo & TII
MachineBasicBlock * getBlockNumbered(unsigned N) const
getBlockNumbered - MachineBasicBlocks are automatically numbered when they are inserted into the mach...
bool test(unsigned Idx) const
ComplementSpillMode
ComplementSpillMode - Select how the complement live range should be created.
unsigned getNumThroughBlocks() const
getNumThroughBlocks - Return the number of through blocks.
bool isThroughBlock(unsigned MBB) const
isThroughBlock - Return true if CurLI is live through MBB without uses.
unsigned currentIntv() const
currentIntv - Return the current interval index.
SlotIndex getLastSplitPoint(unsigned Num)
PointerIntPair - This class implements a pair of a pointer and small integer.
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
SlotIndex getFirstInsertPoint(MachineBasicBlock &MBB)
Return the base index of the first insert point in \pMBB.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
SlotIndex getLastSplitPoint(MachineBasicBlock *BB)
MachineBasicBlock::iterator getLastInsertPointIter(const LiveInterval &CurLI, MachineBasicBlock &MBB)
Returns the last insert point as an iterator for \pCurLI in \pMBB.
SplitAnalysis - Analyze a LiveInterval, looking for live range splitting opportunities.