24#define DEBUG_TYPE "arc-expand-pseudos"
45char ARCExpandPseudos::ID = 0;
67 isUInt<6>(
SI.getOperand(2).getImm()) ? ARC::ADD_rru6 : ARC::ADD_rrlimm;
68 BuildMI(*
SI.getParent(), SI,
SI.getDebugLoc(),
TII->get(AddOpc), AddrReg)
95 BuildMI(*
MI.getParent(),
MI,
MI.getDebugLoc(),
TII->get(ARC::MOV_cc_ru6), Rb)
105 MI.eraseFromParent();
128 MI.eraseFromParent();
134 bool Expanded =
false;
135 for (
auto &
MBB : MF) {
139 switch (
MBBI->getOpcode()) {
143 expandStore(MF,
MBBI);
147 expandCTLZ(MF,
MBBI);
151 expandCTTZ(MF,
MBBI);
164 return new ARCExpandPseudos();
static unsigned getMappedOp(unsigned PseudoOp)
MachineBasicBlock MachineBasicBlock::iterator MBBI
const HexagonInstrInfo * TII
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
const ARCInstrInfo * getInstrInfo() const override
FunctionPass class - This class is used to implement most global optimizations.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & add(const MachineOperand &MO) const
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Wrapper class representing virtual and physical registers.
StringRef - Represent a constant reference to a string, i.e.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
FunctionPass * createARCExpandPseudosPass()