LLVM 20.0.0git
LanaiAsmPrinter.cpp
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1//===-- LanaiAsmPrinter.cpp - Lanai LLVM assembly writer ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains a printer that converts from our internal representation
10// of machine-dependent LLVM code to the Lanai assembly language.
11//
12//===----------------------------------------------------------------------===//
13
14#include "LanaiAluCode.h"
15#include "LanaiCondCode.h"
16#include "LanaiMCInstLower.h"
17#include "LanaiTargetMachine.h"
23#include "llvm/IR/Mangler.h"
24#include "llvm/MC/MCAsmInfo.h"
25#include "llvm/MC/MCInst.h"
27#include "llvm/MC/MCStreamer.h"
28#include "llvm/MC/MCSymbol.h"
31
32#define DEBUG_TYPE "asm-printer"
33
34using namespace llvm;
35
36namespace {
37class LanaiAsmPrinter : public AsmPrinter {
38public:
39 explicit LanaiAsmPrinter(TargetMachine &TM,
40 std::unique_ptr<MCStreamer> Streamer)
41 : AsmPrinter(TM, std::move(Streamer)) {}
42
43 StringRef getPassName() const override { return "Lanai Assembly Printer"; }
44
45 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
46 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
47 const char *ExtraCode, raw_ostream &O) override;
48 void emitInstruction(const MachineInstr *MI) override;
50 const MachineBasicBlock *MBB) const override;
51
52private:
53 void customEmitInstruction(const MachineInstr *MI);
54 void emitCallInstruction(const MachineInstr *MI);
55};
56} // end of anonymous namespace
57
58void LanaiAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
59 raw_ostream &O) {
60 const MachineOperand &MO = MI->getOperand(OpNum);
61
62 switch (MO.getType()) {
65 break;
66
68 O << MO.getImm();
69 break;
70
72 O << *MO.getMBB()->getSymbol();
73 break;
74
76 O << *getSymbol(MO.getGlobal());
77 break;
78
80 MCSymbol *BA = GetBlockAddressSymbol(MO.getBlockAddress());
81 O << BA->getName();
82 break;
83 }
84
86 O << *GetExternalSymbolSymbol(MO.getSymbolName());
87 break;
88
90 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_'
91 << MO.getIndex();
92 break;
93
95 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
96 << MO.getIndex();
97 return;
98
99 default:
100 llvm_unreachable("<unknown operand type>");
101 }
102}
103
104// PrintAsmOperand - Print out an operand for an inline asm expression.
105bool LanaiAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
106 const char *ExtraCode, raw_ostream &O) {
107 // Does this asm operand have a single letter operand modifier?
108 if (ExtraCode && ExtraCode[0]) {
109 if (ExtraCode[1])
110 return true; // Unknown modifier.
111
112 switch (ExtraCode[0]) {
113 // The highest-numbered register of a pair.
114 case 'H': {
115 if (OpNo == 0)
116 return true;
117 const MachineOperand &FlagsOP = MI->getOperand(OpNo - 1);
118 if (!FlagsOP.isImm())
119 return true;
120 const InlineAsm::Flag Flags(FlagsOP.getImm());
121 const unsigned NumVals = Flags.getNumOperandRegisters();
122 if (NumVals != 2)
123 return true;
124 unsigned RegOp = OpNo + 1;
125 if (RegOp >= MI->getNumOperands())
126 return true;
127 const MachineOperand &MO = MI->getOperand(RegOp);
128 if (!MO.isReg())
129 return true;
130 Register Reg = MO.getReg();
132 return false;
133 }
134 default:
135 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
136 }
137 }
138 printOperand(MI, OpNo, O);
139 return false;
140}
141
142//===----------------------------------------------------------------------===//
143void LanaiAsmPrinter::emitCallInstruction(const MachineInstr *MI) {
144 assert((MI->getOpcode() == Lanai::CALL || MI->getOpcode() == Lanai::CALLR) &&
145 "Unsupported call function");
146
147 LanaiMCInstLower MCInstLowering(OutContext, *this);
148 MCSubtargetInfo STI = getSubtargetInfo();
149 // Insert save rca instruction immediately before the call.
150 // TODO: We should generate a pc-relative mov instruction here instead
151 // of pc + 16 (should be mov .+16 %rca).
152 OutStreamer->emitInstruction(MCInstBuilder(Lanai::ADD_I_LO)
153 .addReg(Lanai::RCA)
154 .addReg(Lanai::PC)
155 .addImm(16),
156 STI);
157
158 // Push rca onto the stack.
159 // st %rca, [--%sp]
160 OutStreamer->emitInstruction(MCInstBuilder(Lanai::SW_RI)
161 .addReg(Lanai::RCA)
162 .addReg(Lanai::SP)
163 .addImm(-4)
164 .addImm(LPAC::makePreOp(LPAC::ADD)),
165 STI);
166
167 // Lower the call instruction.
168 if (MI->getOpcode() == Lanai::CALL) {
169 MCInst TmpInst;
170 MCInstLowering.Lower(MI, TmpInst);
171 TmpInst.setOpcode(Lanai::BT);
172 OutStreamer->emitInstruction(TmpInst, STI);
173 } else {
174 OutStreamer->emitInstruction(MCInstBuilder(Lanai::ADD_R)
175 .addReg(Lanai::PC)
176 .addReg(MI->getOperand(0).getReg())
177 .addReg(Lanai::R0)
179 STI);
180 }
181}
182
183void LanaiAsmPrinter::customEmitInstruction(const MachineInstr *MI) {
184 LanaiMCInstLower MCInstLowering(OutContext, *this);
185 MCSubtargetInfo STI = getSubtargetInfo();
186 MCInst TmpInst;
187 MCInstLowering.Lower(MI, TmpInst);
188 OutStreamer->emitInstruction(TmpInst, STI);
189}
190
191void LanaiAsmPrinter::emitInstruction(const MachineInstr *MI) {
192 Lanai_MC::verifyInstructionPredicates(MI->getOpcode(),
193 getSubtargetInfo().getFeatureBits());
194
196 MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
197
198 do {
199 if (I->isCall()) {
200 emitCallInstruction(&*I);
201 continue;
202 }
203
204 customEmitInstruction(&*I);
205 } while ((++I != E) && I->isInsideBundle());
206}
207
208// isBlockOnlyReachableByFallthough - Return true if the basic block has
209// exactly one predecessor and the control transfer mechanism between
210// the predecessor and this block is a fall-through.
211// FIXME: could the overridden cases be handled in analyzeBranch?
212bool LanaiAsmPrinter::isBlockOnlyReachableByFallthrough(
213 const MachineBasicBlock *MBB) const {
214 // The predecessor has to be immediately before this block.
215 const MachineBasicBlock *Pred = *MBB->pred_begin();
216
217 // If the predecessor is a switch statement, assume a jump table
218 // implementation, so it is not a fall through.
219 if (const BasicBlock *B = Pred->getBasicBlock())
220 if (isa<SwitchInst>(B->getTerminator()))
221 return false;
222
223 // Check default implementation
225 return false;
226
227 // Otherwise, check the last instruction.
228 // Check if the last terminator is an unconditional branch.
230 while (I != Pred->begin() && !(--I)->isTerminator()) {
231 }
232
233 return !I->isBarrier();
234}
235
236// Force static initialization.
239}
MachineBasicBlock & MBB
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:128
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
IRTranslator LLVM IR MI
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiAsmPrinter()
#define I(x, y, z)
Definition: MD5.cpp:58
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:86
virtual void emitInstruction(const MachineInstr *)
Targets should implement this to emit instructions.
Definition: AsmPrinter.h:561
virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const
Return true if the basic block has exactly one predecessor and the control transfer mechanism between...
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.
LLVM Basic Block Representation.
Definition: BasicBlock.h:61
static const char * getRegisterName(MCRegister Reg)
MCInstBuilder & addReg(MCRegister Reg)
Add a new register operand.
Definition: MCInstBuilder.h:37
MCInstBuilder & addImm(int64_t Val)
Add a new integer immediate operand.
Definition: MCInstBuilder.h:43
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:185
void setOpcode(unsigned Op)
Definition: MCInst.h:198
Generic base class for all target subtargets.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
StringRef getName() const
getName - Get the symbol name.
Definition: MCSymbol.h:205
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
Instructions::const_iterator const_instr_iterator
Representation of each machine instruction.
Definition: MachineInstr.h:69
MachineOperand class - Representation of each machine instruction operand.
const GlobalValue * getGlobal() const
int64_t getImm() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
MachineBasicBlock * getMBB() const
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
const BlockAddress * getBlockAddress() const
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const char * getSymbolName() const
Register getReg() const
getReg - Returns the register number.
@ MO_Immediate
Immediate operand.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
@ MO_GlobalAddress
Address of a global value.
@ MO_BlockAddress
Address of a basic block.
@ MO_MachineBasicBlock
MachineBasicBlock reference.
@ MO_Register
Register operand.
@ MO_ExternalSymbol
Name of external global symbol.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:51
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static unsigned makePreOp(unsigned AluOp)
Definition: LanaiAluCode.h:61
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Target & getTheLanaiTarget()
RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...