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37 #define DEBUG_TYPE "ppc-vsx-copy"
63 return IsRegInClass(
Reg, &PPC::VSRCRegClass,
MRI);
67 return IsRegInClass(
Reg, &PPC::VRRCRegClass,
MRI);
71 return IsRegInClass(
Reg, &PPC::F8RCRegClass,
MRI);
75 return IsRegInClass(
Reg, &PPC::VSFRCRegClass,
MRI);
79 return IsRegInClass(
Reg, &PPC::VSSRCRegClass,
MRI);
103 "Unknown source for a VSX copy");
107 TII->get(TargetOpcode::SUBREG_TO_REG), NewVReg)
115 }
else if (!IsVSReg(DstMO.
getReg(),
MRI) &&
124 "Unknown destination for a VSX copy");
149 bool Changed =
false;
165 "PowerPC VSX Copy Legalization",
false,
false)
167 char PPCVSXCopy::
ID = 0;
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
This is an optimization pass for GlobalISel generic memory operations.
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
const MachineInstrBuilder & add(const MachineOperand &MO) const
Reg
All possible values of the reg field in the ModR/M byte.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void initializePPCVSXCopyPass(PassRegistry &)
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
bool contains(Register Reg) const
Return true if the specified register is included in this register class.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
TargetInstrInfo - Interface to description of machine instruction set.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
void setSubReg(unsigned subReg)
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Represent the analysis usage information of a pass.
const HexagonInstrInfo * TII
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
MachineOperand class - Representation of each machine instruction operand.
const PPCInstrInfo * getInstrInfo() const override
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
FunctionPass * createPPCVSXCopyPass()
const TargetRegisterClass * getRegClass(Register Reg) const
Return the register class of the specified virtual register.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Representation of each machine instruction.
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
Register getReg() const
getReg - Returns the register number.
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void setReg(Register Reg)
Change the register this operand corresponds to.
FunctionPass class - This class is used to implement most global optimizations.
bool hasSubClassEq(const TargetRegisterClass *RC) const
Returns true if RC is a sub-class of or equal to this class.