LLVM  10.0.0svn
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1 //===-- RISCVMCTargetDesc.cpp - RISCV Target Descriptions -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// This file provides RISCV-specific target descriptions.
10 ///
11 //===----------------------------------------------------------------------===//
13 #include "RISCVMCTargetDesc.h"
14 #include "RISCVELFStreamer.h"
15 #include "RISCVInstPrinter.h"
16 #include "RISCVMCAsmInfo.h"
17 #include "RISCVTargetStreamer.h"
19 #include "Utils/RISCVBaseInfo.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/CodeGen/Register.h"
22 #include "llvm/MC/MCAsmInfo.h"
23 #include "llvm/MC/MCInstrInfo.h"
24 #include "llvm/MC/MCRegisterInfo.h"
25 #include "llvm/MC/MCStreamer.h"
31 #include "RISCVGenInstrInfo.inc"
34 #include "RISCVGenRegisterInfo.inc"
37 #include "RISCVGenSubtargetInfo.inc"
39 using namespace llvm;
42  MCInstrInfo *X = new MCInstrInfo();
43  InitRISCVMCInstrInfo(X);
44  return X;
45 }
49  InitRISCVMCRegisterInfo(X, RISCV::X1);
50  return X;
51 }
54  const Triple &TT) {
55  MCAsmInfo *MAI = new RISCVMCAsmInfo(TT);
57  Register SP = MRI.getDwarfRegNum(RISCV::X2, true);
58  MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0);
59  MAI->addInitialFrameState(Inst);
61  return MAI;
62 }
65  StringRef CPU, StringRef FS) {
66  std::string CPUName = CPU;
67  if (CPUName.empty())
68  CPUName = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32";
69  return createRISCVMCSubtargetInfoImpl(TT, CPUName, FS);
70 }
73  unsigned SyntaxVariant,
74  const MCAsmInfo &MAI,
75  const MCInstrInfo &MII,
76  const MCRegisterInfo &MRI) {
77  return new RISCVInstPrinter(MAI, MII, MRI);
78 }
80 static MCTargetStreamer *
82  const Triple &TT = STI.getTargetTriple();
83  if (TT.isOSBinFormatELF())
84  return new RISCVTargetELFStreamer(S, STI);
85  return nullptr;
86 }
90  MCInstPrinter *InstPrint,
91  bool isVerboseAsm) {
92  return new RISCVTargetAsmStreamer(S, OS);
93 }
95 extern "C" void LLVMInitializeRISCVTargetMC() {
107  // Register the asm target streamer.
109  }
110 }
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
MCAsmBackend * createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
This class represents lattice values for constants.
Definition: AllocatorList.h:23
static MCSubtargetInfo * createRISCVMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
bool isOSBinFormatELF() const
Tests whether the OS uses the ELF binary format.
Definition: Triple.h:623
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
Target specific streamer interface.
Definition: MCStreamer.h:91
static MCTargetStreamer * createRISCVAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.
static void RegisterAsmTargetStreamer(Target &T, Target::AsmTargetStreamerCtorTy Fn)
const Triple & getTargetTriple() const
Target & getTheRISCV32Target()
static MCTargetStreamer * createRISCVObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
MCCodeEmitter * createRISCVMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
int getDwarfRegNum(MCRegister RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.
Streaming machine code generation interface.
Definition: MCStreamer.h:196
unsigned const MachineRegisterInfo * MRI
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:480
Target & getTheRISCV64Target()
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:23
static MCAsmInfo * createRISCVMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT)
static void RegisterMCAsmInfo(Target &T, Target::MCAsmInfoCtorFnTy Fn)
RegisterMCAsmInfo - Register a MCAsmInfo implementation for the given target.
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target...
static void RegisterObjectTargetStreamer(Target &T, Target::ObjectTargetStreamerCtorTy Fn)
static MCRegisterInfo * createRISCVMCRegisterInfo(const Triple &TT)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:43
void addInitialFrameState(const MCCFIInstruction &Inst)
Definition: MCAsmInfo.cpp:73
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.
static MCInstPrinter * createRISCVMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.
Target - Wrapper for Target specific information.
void LLVMInitializeRISCVTargetMC()
static MCInstrInfo * createRISCVMCInstrInfo()
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:39
bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition: Triple.cpp:1292
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target. ...
Generic base class for all target subtargets.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
Wrapper class representing virtual and physical registers.
Definition: Register.h:19