LLVM 17.0.0git
RISCVRegisterBankInfo.cpp
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1//===-- RISCVRegisterBankInfo.cpp -------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9/// This file implements the targeting of the RegisterBankInfo class for RISC-V.
10/// \todo This should be generated by TableGen.
11//===----------------------------------------------------------------------===//
12
19
20#define GET_TARGET_REGBANK_IMPL
21#include "RISCVGenRegisterBank.inc"
22
23using namespace llvm;
24
unsigned const TargetRegisterInfo * TRI
This file declares the targeting of the RegisterBankInfo class for RISC-V.
RISCVRegisterBankInfo(const TargetRegisterInfo &TRI)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18