LLVM
15.0.0git
lib
Target
RISCV
RISCVRegisterBankInfo.cpp
Go to the documentation of this file.
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//===-- RISCVRegisterBankInfo.cpp -------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the RegisterBankInfo class for RISCV.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "
RISCVRegisterBankInfo.h
"
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#include "
MCTargetDesc/RISCVMCTargetDesc.h
"
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#include "
llvm/CodeGen/MachineRegisterInfo.h
"
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#include "
llvm/CodeGen/RegisterBank.h
"
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#include "
llvm/CodeGen/RegisterBankInfo.h
"
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#include "
llvm/CodeGen/TargetRegisterInfo.h
"
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#define GET_TARGET_REGBANK_IMPL
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#include "RISCVGenRegisterBank.inc"
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using namespace
llvm
;
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RISCVRegisterBankInfo::RISCVRegisterBankInfo
(
const
TargetRegisterInfo
&
TRI
) {}
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:
AddressRanges.h:17
RegisterBankInfo.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition:
TargetRegisterInfo.h:234
TRI
unsigned const TargetRegisterInfo * TRI
Definition:
MachineSink.cpp:1628
MachineRegisterInfo.h
RISCVMCTargetDesc.h
llvm::RISCVRegisterBankInfo::RISCVRegisterBankInfo
RISCVRegisterBankInfo(const TargetRegisterInfo &TRI)
Definition:
RISCVRegisterBankInfo.cpp:25
RegisterBank.h
TargetRegisterInfo.h
RISCVRegisterBankInfo.h
Generated on Sun Jul 3 2022 13:21:41 for LLVM by
1.8.17