LLVM 20.0.0git
Mips16FrameLowering.cpp
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1//===- Mips16FrameLowering.cpp - Mips16 Frame Information -----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Mips16 implementation of TargetFrameLowering class.
10//
11//===----------------------------------------------------------------------===//
12
13#include "Mips16FrameLowering.h"
15#include "Mips16InstrInfo.h"
16#include "MipsInstrInfo.h"
17#include "MipsRegisterInfo.h"
18#include "MipsSubtarget.h"
19#include "llvm/ADT/BitVector.h"
26#include "llvm/IR/DebugLoc.h"
27#include "llvm/MC/MCContext.h"
28#include "llvm/MC/MCDwarf.h"
33#include <cstdint>
34#include <vector>
35
36using namespace llvm;
37
39 : MipsFrameLowering(STI, STI.getStackAlignment()) {}
40
42 MachineBasicBlock &MBB) const {
44 const Mips16InstrInfo &TII =
45 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
47
48 // Debug location must be unknown since the first debug location is used
49 // to determine the end of the prologue.
50 DebugLoc dl;
51
52 uint64_t StackSize = MFI.getStackSize();
53
54 // No need to allocate space on the stack.
55 if (StackSize == 0 && !MFI.adjustsStack()) return;
56
58
59 // Adjust stack.
60 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
61
62 // emit ".cfi_def_cfa_offset StackSize"
63 unsigned CFIIndex =
64 MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize));
65 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
66 .addCFIIndex(CFIIndex);
67
68 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
69
70 if (!CSI.empty()) {
71 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
72
73 for (const CalleeSavedInfo &I : CSI) {
74 int64_t Offset = MFI.getObjectOffset(I.getFrameIdx());
75 Register Reg = I.getReg();
76 unsigned DReg = MRI->getDwarfRegNum(Reg, true);
77 unsigned CFIIndex = MF.addFrameInst(
79 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
80 .addCFIIndex(CFIIndex);
81 }
82 }
83 if (hasFP(MF))
84 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
86}
87
89 MachineBasicBlock &MBB) const {
92 const Mips16InstrInfo &TII =
93 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
94 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
95 uint64_t StackSize = MFI.getStackSize();
96
97 if (!StackSize)
98 return;
99
100 if (hasFP(MF))
101 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
102 .addReg(Mips::S0);
103
104 // Adjust stack.
105 // assumes stacksize multiple of 8
106 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI);
107}
108
113
114 //
115 // Registers RA, S0,S1 are the callee saved registers and they
116 // will be saved with the "save" instruction
117 // during emitPrologue
118 //
119 for (const CalleeSavedInfo &I : CSI) {
120 // Add the callee-saved register as live-in. Do not add if the register is
121 // RA and return address is taken, because it has already been added in
122 // method MipsTargetLowering::lowerRETURNADDR.
123 // It's killed at the spill, unless the register is RA and return address
124 // is taken.
125 Register Reg = I.getReg();
126 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
128 if (!IsRAAndRetAddrIsTaken)
129 MBB.addLiveIn(Reg);
130 }
131
132 return true;
133}
134
138 //
139 // Registers RA,S0,S1 are the callee saved registers and they will be restored
140 // with the restore instruction during emitEpilogue.
141 // We need to override this virtual function, otherwise llvm will try and
142 // restore the registers on it's on from the stack.
143 //
144
145 return true;
146}
147
148bool
150 const MachineFrameInfo &MFI = MF.getFrameInfo();
151 // Reserve call frame if the size of the maximum call frame fits into 15-bit
152 // immediate field and there are no variable sized objects on the stack.
153 return isInt<15>(MFI.getMaxCallFrameSize()) && !MFI.hasVarSizedObjects();
154}
155
157 BitVector &SavedRegs,
158 RegScavenger *RS) const {
160 const Mips16InstrInfo &TII =
161 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
162 const MipsRegisterInfo &RI = TII.getRegisterInfo();
163 const BitVector Reserved = RI.getReservedRegs(MF);
164 bool SaveS2 = Reserved[Mips::S2];
165 if (SaveS2)
166 SavedRegs.set(Mips::S2);
167 if (hasFP(MF))
168 SavedRegs.set(Mips::S0);
169}
170
171const MipsFrameLowering *
173 return new Mips16FrameLowering(ST);
174}
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator MBBI
This file implements the BitVector class.
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned const TargetRegisterInfo * TRI
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
BitVector & set()
Definition: BitVector.h:351
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
A debug info location.
Definition: DebugLoc.h:33
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:600
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:573
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:414
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
uint64_t getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
unsigned addFrameInst(const MCCFIInstruction &Inst)
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
MCContext & getContext() const
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Mips16FrameLowering(const MipsSubtarget &STI)
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
const MipsSubtarget & STI
BitVector getReservedRegs(const MachineFunction &MF) const override
const MipsInstrInfo * getInstrInfo() const override
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:480
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
const MipsFrameLowering * createMips16FrameLowering(const MipsSubtarget &ST)
Create MipsFrameLowering objects.