LLVM  16.0.0git
MipsAsmPrinter.cpp
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1 //===- MipsAsmPrinter.cpp - Mips LLVM Assembly Printer --------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to GAS-format MIPS assembly language.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsAsmPrinter.h"
20 #include "Mips.h"
21 #include "MipsMCInstLower.h"
22 #include "MipsMachineFunction.h"
23 #include "MipsSubtarget.h"
24 #include "MipsTargetMachine.h"
25 #include "MipsTargetStreamer.h"
27 #include "llvm/ADT/SmallString.h"
28 #include "llvm/ADT/StringRef.h"
29 #include "llvm/ADT/Triple.h"
30 #include "llvm/ADT/Twine.h"
31 #include "llvm/BinaryFormat/ELF.h"
41 #include "llvm/IR/Attributes.h"
42 #include "llvm/IR/BasicBlock.h"
43 #include "llvm/IR/DataLayout.h"
44 #include "llvm/IR/Function.h"
45 #include "llvm/IR/InlineAsm.h"
46 #include "llvm/IR/Instructions.h"
47 #include "llvm/MC/MCContext.h"
48 #include "llvm/MC/MCExpr.h"
49 #include "llvm/MC/MCInst.h"
50 #include "llvm/MC/MCInstBuilder.h"
52 #include "llvm/MC/MCSectionELF.h"
53 #include "llvm/MC/MCSymbol.h"
54 #include "llvm/MC/MCSymbolELF.h"
55 #include "llvm/MC/TargetRegistry.h"
56 #include "llvm/Support/Casting.h"
61 #include <cassert>
62 #include <cstdint>
63 #include <map>
64 #include <memory>
65 #include <string>
66 #include <vector>
67 
68 using namespace llvm;
69 
70 #define DEBUG_TYPE "mips-asm-printer"
71 
73 
74 MipsTargetStreamer &MipsAsmPrinter::getTargetStreamer() const {
75  return static_cast<MipsTargetStreamer &>(*OutStreamer->getTargetStreamer());
76 }
77 
80 
82  if (Subtarget->inMips16Mode())
83  for (const auto &I : MipsFI->StubsNeeded) {
84  const char *Symbol = I.first;
85  const Mips16HardFloatInfo::FuncSignature *Signature = I.second;
86  if (StubsNeeded.find(Symbol) == StubsNeeded.end())
87  StubsNeeded[Symbol] = Signature;
88  }
89  MCP = MF.getConstantPool();
90 
91  // In NaCl, all indirect jump targets must be aligned to bundle size.
92  if (Subtarget->isTargetNaCl())
93  NaClAlignIndirectJumpTargets(MF);
94 
96 
97  emitXRayTable();
98 
99  return true;
100 }
101 
102 bool MipsAsmPrinter::lowerOperand(const MachineOperand &MO, MCOperand &MCOp) {
103  MCOp = MCInstLowering.LowerOperand(MO);
104  return MCOp.isValid();
105 }
106 
107 #include "MipsGenMCPseudoLowering.inc"
108 
109 // Lower PseudoReturn/PseudoIndirectBranch/PseudoIndirectBranch64 to JR, JR_MM,
110 // JALR, or JALR64 as appropriate for the target.
111 void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,
112  const MachineInstr *MI) {
113  bool HasLinkReg = false;
114  bool InMicroMipsMode = Subtarget->inMicroMipsMode();
115  MCInst TmpInst0;
116 
117  if (Subtarget->hasMips64r6()) {
118  // MIPS64r6 should use (JALR64 ZERO_64, $rs)
119  TmpInst0.setOpcode(Mips::JALR64);
120  HasLinkReg = true;
121  } else if (Subtarget->hasMips32r6()) {
122  // MIPS32r6 should use (JALR ZERO, $rs)
123  if (InMicroMipsMode)
124  TmpInst0.setOpcode(Mips::JRC16_MMR6);
125  else {
126  TmpInst0.setOpcode(Mips::JALR);
127  HasLinkReg = true;
128  }
129  } else if (Subtarget->inMicroMipsMode())
130  // microMIPS should use (JR_MM $rs)
131  TmpInst0.setOpcode(Mips::JR_MM);
132  else {
133  // Everything else should use (JR $rs)
134  TmpInst0.setOpcode(Mips::JR);
135  }
136 
137  MCOperand MCOp;
138 
139  if (HasLinkReg) {
140  unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
141  TmpInst0.addOperand(MCOperand::createReg(ZeroReg));
142  }
143 
144  lowerOperand(MI->getOperand(0), MCOp);
145  TmpInst0.addOperand(MCOp);
146 
147  EmitToStreamer(OutStreamer, TmpInst0);
148 }
149 
150 // If there is an MO_JALR operand, insert:
151 //
152 // .reloc tmplabel, R_{MICRO}MIPS_JALR, symbol
153 // tmplabel:
154 //
155 // This is an optimization hint for the linker which may then replace
156 // an indirect call with a direct branch.
158  MCContext &OutContext,
159  TargetMachine &TM,
160  MCStreamer &OutStreamer,
161  const MipsSubtarget &Subtarget) {
162  for (const MachineOperand &MO :
163  llvm::drop_begin(MI.operands(), MI.getDesc().getNumOperands())) {
164  if (MO.isMCSymbol() && (MO.getTargetFlags() & MipsII::MO_JALR)) {
165  MCSymbol *Callee = MO.getMCSymbol();
166  if (Callee && !Callee->getName().empty()) {
167  MCSymbol *OffsetLabel = OutContext.createTempSymbol();
168  const MCExpr *OffsetExpr =
169  MCSymbolRefExpr::create(OffsetLabel, OutContext);
170  const MCExpr *CaleeExpr =
171  MCSymbolRefExpr::create(Callee, OutContext);
172  OutStreamer.emitRelocDirective(
173  *OffsetExpr,
174  Subtarget.inMicroMipsMode() ? "R_MICROMIPS_JALR" : "R_MIPS_JALR",
175  CaleeExpr, SMLoc(), *TM.getMCSubtargetInfo());
176  OutStreamer.emitLabel(OffsetLabel);
177  return;
178  }
179  }
180  }
181 }
182 
184  // FIXME: Enable feature predicate checks once all the test pass.
185  // Mips_MC::verifyInstructionPredicates(MI->getOpcode(),
186  // getSubtargetInfo().getFeatureBits());
187 
188  MipsTargetStreamer &TS = getTargetStreamer();
189  unsigned Opc = MI->getOpcode();
191 
192  if (MI->isDebugValue()) {
193  SmallString<128> Str;
194  raw_svector_ostream OS(Str);
195 
197  return;
198  }
199  if (MI->isDebugLabel())
200  return;
201 
202  // If we just ended a constant pool, mark it as such.
203  if (InConstantPool && Opc != Mips::CONSTPOOL_ENTRY) {
204  OutStreamer->emitDataRegion(MCDR_DataRegionEnd);
205  InConstantPool = false;
206  }
207  if (Opc == Mips::CONSTPOOL_ENTRY) {
208  // CONSTPOOL_ENTRY - This instruction represents a floating
209  // constant pool in the function. The first operand is the ID#
210  // for this instruction, the second is the index into the
211  // MachineConstantPool that this is, the third is the size in
212  // bytes of this constant pool entry.
213  // The required alignment is specified on the basic block holding this MI.
214  //
215  unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
216  unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
217 
218  // If this is the first entry of the pool, mark it.
219  if (!InConstantPool) {
220  OutStreamer->emitDataRegion(MCDR_DataRegion);
221  InConstantPool = true;
222  }
223 
224  OutStreamer->emitLabel(GetCPISymbol(LabelId));
225 
226  const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
227  if (MCPE.isMachineConstantPoolEntry())
229  else
231  return;
232  }
233 
234  switch (Opc) {
235  case Mips::PATCHABLE_FUNCTION_ENTER:
237  return;
238  case Mips::PATCHABLE_FUNCTION_EXIT:
240  return;
241  case Mips::PATCHABLE_TAIL_CALL:
243  return;
244  }
245 
246  if (EmitJalrReloc &&
247  (MI->isReturn() || MI->isCall() || MI->isIndirectBranch())) {
249  }
250 
252  MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
253 
254  do {
255  // Do any auto-generated pseudo lowerings.
256  if (emitPseudoExpansionLowering(*OutStreamer, &*I))
257  continue;
258 
259  // Skip the BUNDLE pseudo instruction and lower the contents
260  if (I->isBundle())
261  continue;
262 
263  if (I->getOpcode() == Mips::PseudoReturn ||
264  I->getOpcode() == Mips::PseudoReturn64 ||
265  I->getOpcode() == Mips::PseudoIndirectBranch ||
266  I->getOpcode() == Mips::PseudoIndirectBranch64 ||
267  I->getOpcode() == Mips::TAILCALLREG ||
268  I->getOpcode() == Mips::TAILCALLREG64) {
269  emitPseudoIndirectBranch(*OutStreamer, &*I);
270  continue;
271  }
272 
273  // The inMips16Mode() test is not permanent.
274  // Some instructions are marked as pseudo right now which
275  // would make the test fail for the wrong reason but
276  // that will be fixed soon. We need this here because we are
277  // removing another test for this situation downstream in the
278  // callchain.
279  //
280  if (I->isPseudo() && !Subtarget->inMips16Mode()
281  && !isLongBranchPseudo(I->getOpcode()))
282  llvm_unreachable("Pseudo opcode found in emitInstruction()");
283 
284  MCInst TmpInst0;
285  MCInstLowering.Lower(&*I, TmpInst0);
286  EmitToStreamer(*OutStreamer, TmpInst0);
287  } while ((++I != E) && I->isInsideBundle()); // Delay slot check
288 }
289 
290 //===----------------------------------------------------------------------===//
291 //
292 // Mips Asm Directives
293 //
294 // -- Frame directive "frame Stackpointer, Stacksize, RARegister"
295 // Describe the stack frame.
296 //
297 // -- Mask directives "(f)mask bitmask, offset"
298 // Tells the assembler which registers are saved and where.
299 // bitmask - contain a little endian bitset indicating which registers are
300 // saved on function prologue (e.g. with a 0x80000000 mask, the
301 // assembler knows the register 31 (RA) is saved at prologue.
302 // offset - the position before stack pointer subtraction indicating where
303 // the first saved register on prologue is located. (e.g. with a
304 //
305 // Consider the following function prologue:
306 //
307 // .frame $fp,48,$ra
308 // .mask 0xc0000000,-8
309 // addiu $sp, $sp, -48
310 // sw $ra, 40($sp)
311 // sw $fp, 36($sp)
312 //
313 // With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
314 // 30 (FP) are saved at prologue. As the save order on prologue is from
315 // left to right, RA is saved first. A -8 offset means that after the
316 // stack pointer subtration, the first register in the mask (RA) will be
317 // saved at address 48-8=40.
318 //
319 //===----------------------------------------------------------------------===//
320 
321 //===----------------------------------------------------------------------===//
322 // Mask directives
323 //===----------------------------------------------------------------------===//
324 
325 // Create a bitmask with all callee saved registers for CPU or Floating Point
326 // registers. For CPU registers consider RA, GP and FP for saving if necessary.
328  // CPU and FPU Saved Registers Bitmasks
329  unsigned CPUBitmask = 0, FPUBitmask = 0;
330  int CPUTopSavedRegOff, FPUTopSavedRegOff;
331 
332  // Set the CPU and FPU Bitmasks
333  const MachineFrameInfo &MFI = MF->getFrameInfo();
335  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
336  // size of stack area to which FP callee-saved regs are saved.
337  unsigned CPURegSize = TRI->getRegSizeInBits(Mips::GPR32RegClass) / 8;
338  unsigned FGR32RegSize = TRI->getRegSizeInBits(Mips::FGR32RegClass) / 8;
339  unsigned AFGR64RegSize = TRI->getRegSizeInBits(Mips::AFGR64RegClass) / 8;
340  bool HasAFGR64Reg = false;
341  unsigned CSFPRegsSize = 0;
342 
343  for (const auto &I : CSI) {
344  Register Reg = I.getReg();
345  unsigned RegNum = TRI->getEncodingValue(Reg);
346 
347  // If it's a floating point register, set the FPU Bitmask.
348  // If it's a general purpose register, set the CPU Bitmask.
349  if (Mips::FGR32RegClass.contains(Reg)) {
350  FPUBitmask |= (1 << RegNum);
351  CSFPRegsSize += FGR32RegSize;
352  } else if (Mips::AFGR64RegClass.contains(Reg)) {
353  FPUBitmask |= (3 << RegNum);
354  CSFPRegsSize += AFGR64RegSize;
355  HasAFGR64Reg = true;
356  } else if (Mips::GPR32RegClass.contains(Reg))
357  CPUBitmask |= (1 << RegNum);
358  }
359 
360  // FP Regs are saved right below where the virtual frame pointer points to.
361  FPUTopSavedRegOff = FPUBitmask ?
362  (HasAFGR64Reg ? -AFGR64RegSize : -FGR32RegSize) : 0;
363 
364  // CPU Regs are saved below FP Regs.
365  CPUTopSavedRegOff = CPUBitmask ? -CSFPRegsSize - CPURegSize : 0;
366 
367  MipsTargetStreamer &TS = getTargetStreamer();
368  // Print CPUBitmask
369  TS.emitMask(CPUBitmask, CPUTopSavedRegOff);
370 
371  // Print FPUBitmask
372  TS.emitFMask(FPUBitmask, FPUTopSavedRegOff);
373 }
374 
375 //===----------------------------------------------------------------------===//
376 // Frame and Set directives
377 //===----------------------------------------------------------------------===//
378 
379 /// Frame Directive
382 
383  Register stackReg = RI.getFrameRegister(*MF);
384  unsigned returnReg = RI.getRARegister();
385  unsigned stackSize = MF->getFrameInfo().getStackSize();
386 
387  getTargetStreamer().emitFrame(stackReg, stackSize, returnReg);
388 }
389 
390 /// Emit Set directives.
392  switch (static_cast<MipsTargetMachine &>(TM).getABI().GetEnumValue()) {
393  case MipsABIInfo::ABI::O32: return "abi32";
394  case MipsABIInfo::ABI::N32: return "abiN32";
395  case MipsABIInfo::ABI::N64: return "abi64";
396  default: llvm_unreachable("Unknown Mips ABI");
397  }
398 }
399 
401  MipsTargetStreamer &TS = getTargetStreamer();
402 
403  // NaCl sandboxing requires that indirect call instructions are masked.
404  // This means that function entry points should be bundle-aligned.
405  if (Subtarget->isTargetNaCl())
407 
408  if (Subtarget->inMicroMipsMode()) {
410  TS.setUsesMicroMips();
412  } else
414 
415  if (Subtarget->inMips16Mode())
417  else
419 
421  OutStreamer->emitLabel(CurrentFnSym);
422 }
423 
424 /// EmitFunctionBodyStart - Targets can override this to emit stuff before
425 /// the first basic block in the function.
427  MipsTargetStreamer &TS = getTargetStreamer();
428 
430 
431  bool IsNakedFunction = MF->getFunction().hasFnAttribute(Attribute::Naked);
432  if (!IsNakedFunction)
434 
435  if (!IsNakedFunction)
437 
438  if (!Subtarget->inMips16Mode()) {
442  }
443 }
444 
445 /// EmitFunctionBodyEnd - Targets can override this to emit stuff after
446 /// the last basic block in the function.
448  MipsTargetStreamer &TS = getTargetStreamer();
449 
450  // There are instruction for this macros, but they must
451  // always be at the function end, and we can't emit and
452  // break with BB logic.
453  if (!Subtarget->inMips16Mode()) {
454  TS.emitDirectiveSetAt();
457  }
459  // Make sure to terminate any constant pools that were at the end
460  // of the function.
461  if (!InConstantPool)
462  return;
463  InConstantPool = false;
464  OutStreamer->emitDataRegion(MCDR_DataRegionEnd);
465 }
466 
469  MipsTargetStreamer &TS = getTargetStreamer();
470  if (MBB.empty())
471  TS.emitDirectiveInsn();
472 }
473 
474 /// isBlockOnlyReachableByFallthough - Return true if the basic block has
475 /// exactly one predecessor and the control transfer mechanism between
476 /// the predecessor and this block is a fall-through.
478  MBB) const {
479  // The predecessor has to be immediately before this block.
480  const MachineBasicBlock *Pred = *MBB->pred_begin();
481 
482  // If the predecessor is a switch statement, assume a jump table
483  // implementation, so it is not a fall through.
484  if (const BasicBlock *bb = Pred->getBasicBlock())
485  if (isa<SwitchInst>(bb->getTerminator()))
486  return false;
487 
488  // If this is a landing pad, it isn't a fall through. If it has no preds,
489  // then nothing falls through to it.
490  if (MBB->isEHPad() || MBB->pred_empty())
491  return false;
492 
493  // If there isn't exactly one predecessor, it can't be a fall through.
495  ++PI2;
496 
497  if (PI2 != MBB->pred_end())
498  return false;
499 
500  // The predecessor has to be immediately before this block.
501  if (!Pred->isLayoutSuccessor(MBB))
502  return false;
503 
504  // If the block is completely empty, then it definitely does fall through.
505  if (Pred->empty())
506  return true;
507 
508  // Otherwise, check the last instruction.
509  // Check if the last terminator is an unconditional branch.
511  while (I != Pred->begin() && !(--I)->isTerminator()) ;
512 
513  return !I->isBarrier();
514 }
515 
516 // Print out an operand for an inline asm expression.
517 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
518  const char *ExtraCode, raw_ostream &O) {
519  // Does this asm operand have a single letter operand modifier?
520  if (ExtraCode && ExtraCode[0]) {
521  if (ExtraCode[1] != 0) return true; // Unknown modifier.
522 
523  const MachineOperand &MO = MI->getOperand(OpNum);
524  switch (ExtraCode[0]) {
525  default:
526  // See if this is a generic print operand
527  return AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O);
528  case 'X': // hex const int
529  if (!MO.isImm())
530  return true;
531  O << "0x" << Twine::utohexstr(MO.getImm());
532  return false;
533  case 'x': // hex const int (low 16 bits)
534  if (!MO.isImm())
535  return true;
536  O << "0x" << Twine::utohexstr(MO.getImm() & 0xffff);
537  return false;
538  case 'd': // decimal const int
539  if (!MO.isImm())
540  return true;
541  O << MO.getImm();
542  return false;
543  case 'm': // decimal const int minus 1
544  if (!MO.isImm())
545  return true;
546  O << MO.getImm() - 1;
547  return false;
548  case 'y': // exact log2
549  if (!MO.isImm())
550  return true;
551  if (!isPowerOf2_64(MO.getImm()))
552  return true;
553  O << Log2_64(MO.getImm());
554  return false;
555  case 'z':
556  // $0 if zero, regular printing otherwise
557  if (MO.isImm() && MO.getImm() == 0) {
558  O << "$0";
559  return false;
560  }
561  // If not, call printOperand as normal.
562  break;
563  case 'D': // Second part of a double word register operand
564  case 'L': // Low order register of a double word register operand
565  case 'M': // High order register of a double word register operand
566  {
567  if (OpNum == 0)
568  return true;
569  const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
570  if (!FlagsOP.isImm())
571  return true;
572  unsigned Flags = FlagsOP.getImm();
573  unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
574  // Number of registers represented by this operand. We are looking
575  // for 2 for 32 bit mode and 1 for 64 bit mode.
576  if (NumVals != 2) {
577  if (Subtarget->isGP64bit() && NumVals == 1 && MO.isReg()) {
578  Register Reg = MO.getReg();
580  return false;
581  }
582  return true;
583  }
584 
585  unsigned RegOp = OpNum;
586  if (!Subtarget->isGP64bit()){
587  // Endianness reverses which register holds the high or low value
588  // between M and L.
589  switch(ExtraCode[0]) {
590  case 'M':
591  RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
592  break;
593  case 'L':
594  RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;
595  break;
596  case 'D': // Always the second part
597  RegOp = OpNum + 1;
598  }
599  if (RegOp >= MI->getNumOperands())
600  return true;
601  const MachineOperand &MO = MI->getOperand(RegOp);
602  if (!MO.isReg())
603  return true;
604  Register Reg = MO.getReg();
606  return false;
607  }
608  break;
609  }
610  case 'w':
611  // Print MSA registers for the 'f' constraint
612  // In LLVM, the 'w' modifier doesn't need to do anything.
613  // We can just call printOperand as normal.
614  break;
615  }
616  }
617 
618  printOperand(MI, OpNum, O);
619  return false;
620 }
621 
623  unsigned OpNum,
624  const char *ExtraCode,
625  raw_ostream &O) {
626  assert(OpNum + 1 < MI->getNumOperands() && "Insufficient operands");
627  const MachineOperand &BaseMO = MI->getOperand(OpNum);
628  const MachineOperand &OffsetMO = MI->getOperand(OpNum + 1);
629  assert(BaseMO.isReg() &&
630  "Unexpected base pointer for inline asm memory operand.");
631  assert(OffsetMO.isImm() &&
632  "Unexpected offset for inline asm memory operand.");
633  int Offset = OffsetMO.getImm();
634 
635  // Currently we are expecting either no ExtraCode or 'D','M','L'.
636  if (ExtraCode) {
637  switch (ExtraCode[0]) {
638  case 'D':
639  Offset += 4;
640  break;
641  case 'M':
642  if (Subtarget->isLittle())
643  Offset += 4;
644  break;
645  case 'L':
646  if (!Subtarget->isLittle())
647  Offset += 4;
648  break;
649  default:
650  return true; // Unknown modifier.
651  }
652  }
653 
654  O << Offset << "($" << MipsInstPrinter::getRegisterName(BaseMO.getReg())
655  << ")";
656 
657  return false;
658 }
659 
661  raw_ostream &O) {
662  const MachineOperand &MO = MI->getOperand(opNum);
663  bool closeP = false;
664 
665  if (MO.getTargetFlags())
666  closeP = true;
667 
668  switch(MO.getTargetFlags()) {
669  case MipsII::MO_GPREL: O << "%gp_rel("; break;
670  case MipsII::MO_GOT_CALL: O << "%call16("; break;
671  case MipsII::MO_GOT: O << "%got("; break;
672  case MipsII::MO_ABS_HI: O << "%hi("; break;
673  case MipsII::MO_ABS_LO: O << "%lo("; break;
674  case MipsII::MO_HIGHER: O << "%higher("; break;
675  case MipsII::MO_HIGHEST: O << "%highest(("; break;
676  case MipsII::MO_TLSGD: O << "%tlsgd("; break;
677  case MipsII::MO_GOTTPREL: O << "%gottprel("; break;
678  case MipsII::MO_TPREL_HI: O << "%tprel_hi("; break;
679  case MipsII::MO_TPREL_LO: O << "%tprel_lo("; break;
680  case MipsII::MO_GPOFF_HI: O << "%hi(%neg(%gp_rel("; break;
681  case MipsII::MO_GPOFF_LO: O << "%lo(%neg(%gp_rel("; break;
682  case MipsII::MO_GOT_DISP: O << "%got_disp("; break;
683  case MipsII::MO_GOT_PAGE: O << "%got_page("; break;
684  case MipsII::MO_GOT_OFST: O << "%got_ofst("; break;
685  }
686 
687  switch (MO.getType()) {
689  O << '$'
691  break;
692 
694  O << MO.getImm();
695  break;
696 
698  MO.getMBB()->getSymbol()->print(O, MAI);
699  return;
700 
702  PrintSymbolOperand(MO, O);
703  break;
704 
707  O << BA->getName();
708  break;
709  }
710 
712  O << getDataLayout().getPrivateGlobalPrefix() << "CPI"
713  << getFunctionNumber() << "_" << MO.getIndex();
714  if (MO.getOffset())
715  O << "+" << MO.getOffset();
716  break;
717 
718  default:
719  llvm_unreachable("<unknown operand type>");
720  }
721 
722  if (closeP) O << ")";
723 }
724 
725 void MipsAsmPrinter::
727  // Load/Store memory operands -- imm($reg)
728  // If PIC target the target is loaded as the
729  // pattern lw $25,%call16($28)
730 
731  // opNum can be invalid if instruction has reglist as operand.
732  // MemOperand is always last operand of instruction (base + offset).
733  switch (MI->getOpcode()) {
734  default:
735  break;
736  case Mips::SWM32_MM:
737  case Mips::LWM32_MM:
738  opNum = MI->getNumOperands() - 2;
739  break;
740  }
741 
742  printOperand(MI, opNum+1, O);
743  O << "(";
744  printOperand(MI, opNum, O);
745  O << ")";
746 }
747 
748 void MipsAsmPrinter::
750  // when using stack locations for not load/store instructions
751  // print the same way as all normal 3 operand instructions.
752  printOperand(MI, opNum, O);
753  O << ", ";
754  printOperand(MI, opNum+1, O);
755 }
756 
757 void MipsAsmPrinter::
759  const char *Modifier) {
760  const MachineOperand &MO = MI->getOperand(opNum);
762 }
763 
764 void MipsAsmPrinter::
766  for (int i = opNum, e = MI->getNumOperands(); i != e; ++i) {
767  if (i != opNum) O << ", ";
768  printOperand(MI, i, O);
769  }
770 }
771 
773  MipsTargetStreamer &TS = getTargetStreamer();
774 
775  // MipsTargetStreamer has an initialization order problem when emitting an
776  // object file directly (see MipsTargetELFStreamer for full details). Work
777  // around it by re-initializing the PIC state here.
779 
780  // Compute MIPS architecture attributes based on the default subtarget
781  // that we'd have constructed. Module level directives aren't LTO
782  // clean anyhow.
783  // FIXME: For ifunc related functions we could iterate over and look
784  // for a feature string that doesn't match the default one.
785  const Triple &TT = TM.getTargetTriple();
788  const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
789  const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM, std::nullopt);
790 
791  bool IsABICalls = STI.isABICalls();
792  const MipsABIInfo &ABI = MTM.getABI();
793  if (IsABICalls) {
795  // FIXME: This condition should be a lot more complicated that it is here.
796  // Ideally it should test for properties of the ABI and not the ABI
797  // itself.
798  // For the moment, I'm only correcting enough to make MIPS-IV work.
799  if (!isPositionIndependent() && STI.hasSym32())
801  }
802 
803  // Tell the assembler which ABI we are using
804  std::string SectionName = std::string(".mdebug.") + getCurrentABIString();
805  OutStreamer->switchSection(
807 
808  // NaN: At the moment we only support:
809  // 1. .nan legacy (default)
810  // 2. .nan 2008
811  STI.isNaN2008() ? TS.emitDirectiveNaN2008()
812  : TS.emitDirectiveNaNLegacy();
813 
814  // TODO: handle O64 ABI
815 
816  TS.updateABIInfo(STI);
817 
818  // We should always emit a '.module fp=...' but binutils 2.24 does not accept
819  // it. We therefore emit it when it contradicts the ABI defaults (-mfpxx or
820  // -mfp64) and omit it otherwise.
821  if ((ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit())) ||
822  STI.useSoftFloat())
824 
825  // We should always emit a '.module [no]oddspreg' but binutils 2.24 does not
826  // accept it. We therefore emit it when it contradicts the default or an
827  // option has changed the default (i.e. FPXX) and omit it otherwise.
828  if (ABI.IsO32() && (!STI.useOddSPReg() || STI.isABI_FPXX()))
830 
831  // Switch to the .text section.
832  OutStreamer->switchSection(getObjFileLowering().getTextSection());
833 }
834 
835 void MipsAsmPrinter::emitInlineAsmStart() const {
836  MipsTargetStreamer &TS = getTargetStreamer();
837 
838  // GCC's choice of assembler options for inline assembly code ('at', 'macro'
839  // and 'reorder') is different from LLVM's choice for generated code ('noat',
840  // 'nomacro' and 'noreorder').
841  // In order to maintain compatibility with inline assembly code which depends
842  // on GCC's assembler options being used, we have to switch to those options
843  // for the duration of the inline assembly block and then switch back.
845  TS.emitDirectiveSetAt();
848  OutStreamer->addBlankLine();
849 }
850 
851 void MipsAsmPrinter::emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
852  const MCSubtargetInfo *EndInfo) const {
853  OutStreamer->addBlankLine();
854  getTargetStreamer().emitDirectiveSetPop();
855 }
856 
857 void MipsAsmPrinter::EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol) {
858  MCInst I;
859  I.setOpcode(Mips::JAL);
860  I.addOperand(
862  OutStreamer->emitInstruction(I, STI);
863 }
864 
865 void MipsAsmPrinter::EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode,
866  unsigned Reg) {
867  MCInst I;
868  I.setOpcode(Opcode);
869  I.addOperand(MCOperand::createReg(Reg));
870  OutStreamer->emitInstruction(I, STI);
871 }
872 
873 void MipsAsmPrinter::EmitInstrRegReg(const MCSubtargetInfo &STI,
874  unsigned Opcode, unsigned Reg1,
875  unsigned Reg2) {
876  MCInst I;
877  //
878  // Because of the current td files for Mips32, the operands for MTC1
879  // appear backwards from their normal assembly order. It's not a trivial
880  // change to fix this in the td file so we adjust for it here.
881  //
882  if (Opcode == Mips::MTC1) {
883  unsigned Temp = Reg1;
884  Reg1 = Reg2;
885  Reg2 = Temp;
886  }
887  I.setOpcode(Opcode);
888  I.addOperand(MCOperand::createReg(Reg1));
889  I.addOperand(MCOperand::createReg(Reg2));
890  OutStreamer->emitInstruction(I, STI);
891 }
892 
893 void MipsAsmPrinter::EmitInstrRegRegReg(const MCSubtargetInfo &STI,
894  unsigned Opcode, unsigned Reg1,
895  unsigned Reg2, unsigned Reg3) {
896  MCInst I;
897  I.setOpcode(Opcode);
898  I.addOperand(MCOperand::createReg(Reg1));
899  I.addOperand(MCOperand::createReg(Reg2));
900  I.addOperand(MCOperand::createReg(Reg3));
901  OutStreamer->emitInstruction(I, STI);
902 }
903 
904 void MipsAsmPrinter::EmitMovFPIntPair(const MCSubtargetInfo &STI,
905  unsigned MovOpc, unsigned Reg1,
906  unsigned Reg2, unsigned FPReg1,
907  unsigned FPReg2, bool LE) {
908  if (!LE) {
909  unsigned temp = Reg1;
910  Reg1 = Reg2;
911  Reg2 = temp;
912  }
913  EmitInstrRegReg(STI, MovOpc, Reg1, FPReg1);
914  EmitInstrRegReg(STI, MovOpc, Reg2, FPReg2);
915 }
916 
917 void MipsAsmPrinter::EmitSwapFPIntParams(const MCSubtargetInfo &STI,
919  bool LE, bool ToFP) {
920  using namespace Mips16HardFloatInfo;
921 
922  unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1;
923  switch (PV) {
924  case FSig:
925  EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
926  break;
927  case FFSig:
928  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F14, LE);
929  break;
930  case FDSig:
931  EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
932  EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
933  break;
934  case DSig:
935  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
936  break;
937  case DDSig:
938  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
939  EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
940  break;
941  case DFSig:
942  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
943  EmitInstrRegReg(STI, MovOpc, Mips::A2, Mips::F14);
944  break;
945  case NoSig:
946  return;
947  }
948 }
949 
950 void MipsAsmPrinter::EmitSwapFPIntRetval(
952  bool LE) {
953  using namespace Mips16HardFloatInfo;
954 
955  unsigned MovOpc = Mips::MFC1;
956  switch (RV) {
957  case FRet:
958  EmitInstrRegReg(STI, MovOpc, Mips::V0, Mips::F0);
959  break;
960  case DRet:
961  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
962  break;
963  case CFRet:
964  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
965  break;
966  case CDRet:
967  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
968  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F2, Mips::F3, LE);
969  break;
970  case NoFPRet:
971  break;
972  }
973 }
974 
975 void MipsAsmPrinter::EmitFPCallStub(
976  const char *Symbol, const Mips16HardFloatInfo::FuncSignature *Signature) {
977  using namespace Mips16HardFloatInfo;
978 
979  MCSymbol *MSymbol = OutContext.getOrCreateSymbol(StringRef(Symbol));
980  bool LE = getDataLayout().isLittleEndian();
981  // Construct a local MCSubtargetInfo here.
982  // This is because the MachineFunction won't exist (but have not yet been
983  // freed) and since we're at the global level we can use the default
984  // constructed subtarget.
985  std::unique_ptr<MCSubtargetInfo> STI(TM.getTarget().createMCSubtargetInfo(
988 
989  //
990  // .global xxxx
991  //
992  OutStreamer->emitSymbolAttribute(MSymbol, MCSA_Global);
993  const char *RetType;
994  //
995  // make the comment field identifying the return and parameter
996  // types of the floating point stub
997  // # Stub function to call rettype xxxx (params)
998  //
999  switch (Signature->RetSig) {
1000  case FRet:
1001  RetType = "float";
1002  break;
1003  case DRet:
1004  RetType = "double";
1005  break;
1006  case CFRet:
1007  RetType = "complex";
1008  break;
1009  case CDRet:
1010  RetType = "double complex";
1011  break;
1012  case NoFPRet:
1013  RetType = "";
1014  break;
1015  }
1016  const char *Parms;
1017  switch (Signature->ParamSig) {
1018  case FSig:
1019  Parms = "float";
1020  break;
1021  case FFSig:
1022  Parms = "float, float";
1023  break;
1024  case FDSig:
1025  Parms = "float, double";
1026  break;
1027  case DSig:
1028  Parms = "double";
1029  break;
1030  case DDSig:
1031  Parms = "double, double";
1032  break;
1033  case DFSig:
1034  Parms = "double, float";
1035  break;
1036  case NoSig:
1037  Parms = "";
1038  break;
1039  }
1040  OutStreamer->AddComment("\t# Stub function to call " + Twine(RetType) + " " +
1041  Twine(Symbol) + " (" + Twine(Parms) + ")");
1042  //
1043  // probably not necessary but we save and restore the current section state
1044  //
1045  OutStreamer->pushSection();
1046  //
1047  // .section mips16.call.fpxxxx,"ax",@progbits
1048  //
1050  ".mips16.call.fp." + std::string(Symbol), ELF::SHT_PROGBITS,
1052  OutStreamer->switchSection(M, nullptr);
1053  //
1054  // .align 2
1055  //
1056  OutStreamer->emitValueToAlignment(Align(4));
1057  MipsTargetStreamer &TS = getTargetStreamer();
1058  //
1059  // .set nomips16
1060  // .set nomicromips
1061  //
1064  //
1065  // .ent __call_stub_fp_xxxx
1066  // .type __call_stub_fp_xxxx,@function
1067  // __call_stub_fp_xxxx:
1068  //
1069  std::string x = "__call_stub_fp_" + std::string(Symbol);
1070  MCSymbolELF *Stub =
1071  cast<MCSymbolELF>(OutContext.getOrCreateSymbol(StringRef(x)));
1072  TS.emitDirectiveEnt(*Stub);
1073  MCSymbol *MType =
1074  OutContext.getOrCreateSymbol("__call_stub_fp_" + Twine(Symbol));
1075  OutStreamer->emitSymbolAttribute(MType, MCSA_ELF_TypeFunction);
1076  OutStreamer->emitLabel(Stub);
1077 
1078  // Only handle non-pic for now.
1080  "should not be here if we are compiling pic");
1082  //
1083  // We need to add a MipsMCExpr class to MCTargetDesc to fully implement
1084  // stubs without raw text but this current patch is for compiler generated
1085  // functions and they all return some value.
1086  // The calling sequence for non pic is different in that case and we need
1087  // to implement %lo and %hi in order to handle the case of no return value
1088  // See the corresponding method in Mips16HardFloat for details.
1089  //
1090  // mov the return address to S2.
1091  // we have no stack space to store it and we are about to make another call.
1092  // We need to make sure that the enclosing function knows to save S2
1093  // This should have already been handled.
1094  //
1095  // Mov $18, $31
1096 
1097  EmitInstrRegRegReg(*STI, Mips::OR, Mips::S2, Mips::RA, Mips::ZERO);
1098 
1099  EmitSwapFPIntParams(*STI, Signature->ParamSig, LE, true);
1100 
1101  // Jal xxxx
1102  //
1103  EmitJal(*STI, MSymbol);
1104 
1105  // fix return values
1106  EmitSwapFPIntRetval(*STI, Signature->RetSig, LE);
1107  //
1108  // do the return
1109  // if (Signature->RetSig == NoFPRet)
1110  // llvm_unreachable("should not be any stubs here with no return value");
1111  // else
1112  EmitInstrReg(*STI, Mips::JR, Mips::S2);
1113 
1115  OutStreamer->emitLabel(Tmp);
1118  const MCExpr *T_min_E = MCBinaryExpr::createSub(T, E, OutContext);
1119  OutStreamer->emitELFSize(Stub, T_min_E);
1120  TS.emitDirectiveEnd(x);
1121  OutStreamer->popSection();
1122 }
1123 
1125  // Emit needed stubs
1126  //
1127  for (std::map<
1128  const char *,
1129  const Mips16HardFloatInfo::FuncSignature *>::const_iterator
1130  it = StubsNeeded.begin();
1131  it != StubsNeeded.end(); ++it) {
1132  const char *Symbol = it->first;
1133  const Mips16HardFloatInfo::FuncSignature *Signature = it->second;
1134  EmitFPCallStub(Symbol, Signature);
1135  }
1136  // return to the text section
1138 }
1139 
1140 void MipsAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind) {
1141  const uint8_t NoopsInSledCount = Subtarget->isGP64bit() ? 15 : 11;
1142  // For mips32 we want to emit the following pattern:
1143  //
1144  // .Lxray_sled_N:
1145  // ALIGN
1146  // B .tmpN
1147  // 11 NOP instructions (44 bytes)
1148  // ADDIU T9, T9, 52
1149  // .tmpN
1150  //
1151  // We need the 44 bytes (11 instructions) because at runtime, we'd
1152  // be patching over the full 48 bytes (12 instructions) with the following
1153  // pattern:
1154  //
1155  // ADDIU SP, SP, -8
1156  // NOP
1157  // SW RA, 4(SP)
1158  // SW T9, 0(SP)
1159  // LUI T9, %hi(__xray_FunctionEntry/Exit)
1160  // ORI T9, T9, %lo(__xray_FunctionEntry/Exit)
1161  // LUI T0, %hi(function_id)
1162  // JALR T9
1163  // ORI T0, T0, %lo(function_id)
1164  // LW T9, 0(SP)
1165  // LW RA, 4(SP)
1166  // ADDIU SP, SP, 8
1167  //
1168  // We add 52 bytes to t9 because we want to adjust the function pointer to
1169  // the actual start of function i.e. the address just after the noop sled.
1170  // We do this because gp displacement relocation is emitted at the start of
1171  // of the function i.e after the nop sled and to correctly calculate the
1172  // global offset table address, t9 must hold the address of the instruction
1173  // containing the gp displacement relocation.
1174  // FIXME: Is this correct for the static relocation model?
1175  //
1176  // For mips64 we want to emit the following pattern:
1177  //
1178  // .Lxray_sled_N:
1179  // ALIGN
1180  // B .tmpN
1181  // 15 NOP instructions (60 bytes)
1182  // .tmpN
1183  //
1184  // We need the 60 bytes (15 instructions) because at runtime, we'd
1185  // be patching over the full 64 bytes (16 instructions) with the following
1186  // pattern:
1187  //
1188  // DADDIU SP, SP, -16
1189  // NOP
1190  // SD RA, 8(SP)
1191  // SD T9, 0(SP)
1192  // LUI T9, %highest(__xray_FunctionEntry/Exit)
1193  // ORI T9, T9, %higher(__xray_FunctionEntry/Exit)
1194  // DSLL T9, T9, 16
1195  // ORI T9, T9, %hi(__xray_FunctionEntry/Exit)
1196  // DSLL T9, T9, 16
1197  // ORI T9, T9, %lo(__xray_FunctionEntry/Exit)
1198  // LUI T0, %hi(function_id)
1199  // JALR T9
1200  // ADDIU T0, T0, %lo(function_id)
1201  // LD T9, 0(SP)
1202  // LD RA, 8(SP)
1203  // DADDIU SP, SP, 16
1204  //
1205  OutStreamer->emitCodeAlignment(Align(4), &getSubtargetInfo());
1206  auto CurSled = OutContext.createTempSymbol("xray_sled_", true);
1207  OutStreamer->emitLabel(CurSled);
1209 
1210  // Emit "B .tmpN" instruction, which jumps over the nop sled to the actual
1211  // start of function
1212  const MCExpr *TargetExpr = MCSymbolRefExpr::create(
1213  Target, MCSymbolRefExpr::VariantKind::VK_None, OutContext);
1215  .addReg(Mips::ZERO)
1216  .addReg(Mips::ZERO)
1217  .addExpr(TargetExpr));
1218 
1219  for (int8_t I = 0; I < NoopsInSledCount; I++)
1221  .addReg(Mips::ZERO)
1222  .addReg(Mips::ZERO)
1223  .addImm(0));
1224 
1225  OutStreamer->emitLabel(Target);
1226 
1227  if (!Subtarget->isGP64bit()) {
1229  MCInstBuilder(Mips::ADDiu)
1230  .addReg(Mips::T9)
1231  .addReg(Mips::T9)
1232  .addImm(0x34));
1233  }
1234 
1235  recordSled(CurSled, MI, Kind, 2);
1236 }
1237 
1239  EmitSled(MI, SledKind::FUNCTION_ENTER);
1240 }
1241 
1243  EmitSled(MI, SledKind::FUNCTION_EXIT);
1244 }
1245 
1247  EmitSled(MI, SledKind::TAIL_CALL);
1248 }
1249 
1251  raw_ostream &OS) {
1252  // TODO: implement
1253 }
1254 
1255 // Emit .dtprelword or .dtpreldword directive
1256 // and value for debug thread local expression.
1257 void MipsAsmPrinter::emitDebugValue(const MCExpr *Value, unsigned Size) const {
1258  if (auto *MipsExpr = dyn_cast<MipsMCExpr>(Value)) {
1259  if (MipsExpr && MipsExpr->getKind() == MipsMCExpr::MEK_DTPREL) {
1260  switch (Size) {
1261  case 4:
1262  OutStreamer->emitDTPRel32Value(MipsExpr->getSubExpr());
1263  break;
1264  case 8:
1265  OutStreamer->emitDTPRel64Value(MipsExpr->getSubExpr());
1266  break;
1267  default:
1268  llvm_unreachable("Unexpected size of expression value.");
1269  }
1270  return;
1271  }
1272  }
1274 }
1275 
1276 // Align all targets of indirect branches on bundle size. Used only if target
1277 // is NaCl.
1278 void MipsAsmPrinter::NaClAlignIndirectJumpTargets(MachineFunction &MF) {
1279  // Align all blocks that are jumped to through jump table.
1280  if (MachineJumpTableInfo *JtInfo = MF.getJumpTableInfo()) {
1281  const std::vector<MachineJumpTableEntry> &JT = JtInfo->getJumpTables();
1282  for (const auto &I : JT) {
1283  const std::vector<MachineBasicBlock *> &MBBs = I.MBBs;
1284 
1285  for (MachineBasicBlock *MBB : MBBs)
1287  }
1288  }
1289 
1290  // If basic block address is taken, block can be target of indirect branch.
1291  for (auto &MBB : MF) {
1292  if (MBB.hasAddressTaken())
1294  }
1295 }
1296 
1297 bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
1298  return (Opcode == Mips::LONG_BRANCH_LUi
1299  || Opcode == Mips::LONG_BRANCH_LUi2Op
1300  || Opcode == Mips::LONG_BRANCH_LUi2Op_64
1301  || Opcode == Mips::LONG_BRANCH_ADDiu
1302  || Opcode == Mips::LONG_BRANCH_ADDiu2Op
1303  || Opcode == Mips::LONG_BRANCH_DADDiu
1304  || Opcode == Mips::LONG_BRANCH_DADDiu2Op);
1305 }
1306 
1307 // Force static initialization.
1313 }
i
i
Definition: README.txt:29
FFSig
@ FFSig
Definition: Mips16HardFloat.cpp:98
ABI
Generic address nodes are lowered to some combination of target independent and machine specific ABI
Definition: Relocation.txt:34
llvm::MCContext::getObjectFileInfo
const MCObjectFileInfo * getObjectFileInfo() const
Definition: MCContext.h:451
llvm::AsmPrinter::isPositionIndependent
bool isPositionIndependent() const
Definition: AsmPrinter.cpp:375
llvm::MachineOperand::MO_BlockAddress
@ MO_BlockAddress
Address of a basic block.
Definition: MachineOperand.h:62
llvm::MipsTargetMachine
Definition: MipsTargetMachine.h:28
llvm::MipsFunctionInfo::StubsNeeded
std::map< const char *, const Mips16HardFloatInfo::FuncSignature * > StubsNeeded
Definition: MipsMachineFunction.h:87
llvm::MachineBasicBlock::pred_begin
pred_iterator pred_begin()
Definition: MachineBasicBlock.h:353
MipsBaseInfo.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:109
MachineInstr.h
llvm::MachineOperand::MO_Immediate
@ MO_Immediate
Immediate operand.
Definition: MachineOperand.h:52
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::MipsTargetStreamer::emitDirectiveOptionPic0
virtual void emitDirectiveOptionPic0()
Definition: MipsTargetStreamer.cpp:80
llvm::MachineConstantPoolEntry::Val
union llvm::MachineConstantPoolEntry::@193 Val
The constant itself.
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::MipsTargetMachine::getABI
const MipsABIInfo & getABI() const
Definition: MipsTargetMachine.h:77
llvm::ELF::SHF_EXECINSTR
@ SHF_EXECINSTR
Definition: ELF.h:1071
llvm::MipsAsmPrinter::PrintDebugValueComment
void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS)
Definition: MipsAsmPrinter.cpp:1250
it
into xmm2 addss xmm2 xmm1 xmm3 addss xmm3 movaps xmm0 unpcklps xmm0 ret seems silly when it could just be one addps Expand libm rounding functions main should enable SSE DAZ mode and other fast SSE modes Think about doing i64 math in SSE regs on x86 This testcase should have no SSE instructions in it
Definition: README-SSE.txt:81
llvm::drop_begin
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
Definition: STLExtras.h:387
llvm::Mips16HardFloatInfo::FPParamVariant
FPParamVariant
Definition: Mips16HardFloatInfo.h:31
llvm::ISD::OR
@ OR
Definition: ISDOpcodes.h:667
llvm::AsmPrinter::emitBasicBlockEnd
virtual void emitBasicBlockEnd(const MachineBasicBlock &MBB)
Targets can override this to emit stuff at the end of a basic block.
Definition: AsmPrinter.cpp:3748
llvm::MCOperand::createExpr
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:162
llvm::MachineBasicBlock::getBasicBlock
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
Definition: MachineBasicBlock.h:209
llvm::AsmPrinter::recordSled
void recordSled(MCSymbol *Sled, const MachineInstr &MI, SledKind Kind, uint8_t Version=0)
Definition: AsmPrinter.cpp:3978
llvm::MipsABIInfo
Definition: MipsABIInfo.h:22
llvm::HexagonISD::JT
@ JT
Definition: HexagonISelLowering.h:52
T
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:76
llvm::MachineFunction::getContext
MCContext & getContext() const
Definition: MachineFunction.h:609
llvm::MipsTargetStreamer::emitDirectiveEnt
virtual void emitDirectiveEnt(const MCSymbol &Symbol)
Definition: MipsTargetStreamer.cpp:76
StringRef.h
llvm::MipsTargetStreamer::emitDirectiveSetMips16
virtual void emitDirectiveSetMips16()
Definition: MipsTargetStreamer.cpp:54
llvm::MipsAsmPrinter::printRegisterList
void printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:765
llvm::MachineConstantPoolEntry::MachineCPVal
MachineConstantPoolValue * MachineCPVal
Definition: MachineConstantPool.h:72
llvm::AsmPrinter::MAI
const MCAsmInfo * MAI
Target Asm Printer information.
Definition: AsmPrinter.h:90
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:150
MCSectionELF.h
llvm::Mips::CondCode
CondCode
Definition: MipsInstPrinter.h:32
InlineAsm.h
llvm::MachineOperand::getBlockAddress
const BlockAddress * getBlockAddress() const
Definition: MachineOperand.h:577
ErrorHandling.h
llvm::AsmPrinter::emitGlobalConstant
void emitGlobalConstant(const DataLayout &DL, const Constant *CV, AliasMapTy *AliasList=nullptr)
EmitGlobalConstant - Print a general LLVM constant to the .s file.
Definition: AsmPrinter.cpp:3493
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::MipsTargetStreamer::setPic
virtual void setPic(bool Value)
Definition: MipsTargetStreamer.h:28
llvm::MipsSubtarget::hasMips64r6
bool hasMips64r6() const
Definition: MipsSubtarget.h:279
llvm::MipsII::MO_JALR
@ MO_JALR
Helper operand used to generate R_MIPS_JALR.
Definition: MipsBaseInfo.h:95
MCInstBuilder.h
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
MachineBasicBlock.h
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:127
llvm::MachineBasicBlock::const_pred_iterator
std::vector< MachineBasicBlock * >::const_iterator const_pred_iterator
Definition: MachineBasicBlock.h:342
llvm::MipsTargetStreamer::emitFrame
virtual void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg)
Definition: MipsTargetStreamer.cpp:83
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:237
llvm::MCRegisterInfo::getEncodingValue
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
Definition: MCRegisterInfo.h:553
MCObjectFileInfo.h
llvm::MipsII::MO_TPREL_HI
@ MO_TPREL_HI
MO_TPREL_HI/LO - Represents the hi and low part of the offset from.
Definition: MipsBaseInfo.h:73
EmitJalrReloc
cl::opt< bool > EmitJalrReloc
llvm::MipsAsmPrinter::PrintAsmMemoryOperand
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
Definition: MipsAsmPrinter.cpp:622
llvm::MipsAsmPrinter::LowerPATCHABLE_FUNCTION_EXIT
void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI)
Definition: MipsAsmPrinter.cpp:1242
llvm::MachineOperand::isMCSymbol
bool isMCSymbol() const
Definition: MachineOperand.h:349
MachineJumpTableInfo.h
llvm::AsmPrinter::PrintSymbolOperand
virtual void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &OS)
Print the MachineOperand as a symbol.
Definition: AsmPrinterInlineAsm.cpp:457
llvm::AsmPrinter::emitAlignment
void emitAlignment(Align Alignment, const GlobalObject *GV=nullptr, unsigned MaxBytesToEmit=0) const
Emit an alignment directive to the specified power of two boundary.
Definition: AsmPrinter.cpp:2829
llvm::MipsAsmPrinter::MipsFI
const MipsFunctionInfo * MipsFI
Definition: MipsAsmPrinter.h:118
llvm::MipsTargetStreamer::emitDirectiveModuleFP
virtual void emitDirectiveModuleFP()
Definition: MipsTargetStreamer.cpp:151
llvm::AsmPrinter::SledKind
SledKind
Definition: AsmPrinter.h:335
llvm::MipsSubtarget::hasSym32
bool hasSym32() const
Definition: MipsSubtarget.h:297
llvm::MipsTargetStreamer::emitDirectiveInsn
virtual void emitDirectiveInsn()
Definition: MipsTargetStreamer.cpp:82
llvm::MipsII::MO_GOTTPREL
@ MO_GOTTPREL
MO_GOTTPREL - Represents the offset from the thread pointer (Initial.
Definition: MipsBaseInfo.h:69
llvm::MipsSubtarget::useOddSPReg
bool useOddSPReg() const
Definition: MipsSubtarget.h:288
llvm::ELF::SHT_PROGBITS
@ SHT_PROGBITS
Definition: ELF.h:980
llvm::MipsAsmPrinter::MCInstLowering
MipsMCInstLower MCInstLowering
Definition: MipsAsmPrinter.h:119
llvm::max
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:337
llvm::MipsTargetMachine::isLittleEndian
bool isLittleEndian() const
Definition: MipsTargetMachine.h:76
llvm::MipsTargetStreamer::emitDirectiveSetNoAt
virtual void emitDirectiveSetNoAt()
Definition: MipsTargetStreamer.cpp:74
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::MCSectionELF
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:26
MipsTargetMachine.h
llvm::MipsSubtarget::isNaN2008
bool isNaN2008() const
Definition: MipsSubtarget.h:290
DSig
@ DSig
Definition: Mips16HardFloat.cpp:99
llvm::MipsTargetStreamer::emitDirectiveSetAt
virtual void emitDirectiveSetAt()
Definition: MipsTargetStreamer.cpp:70
llvm::MachineOperand::getOffset
int64_t getOffset() const
Return the offset from the symbol in this operand.
Definition: MachineOperand.h:609
llvm::MipsTargetStreamer::emitDirectiveSetNoMacro
virtual void emitDirectiveSetNoMacro()
Definition: MipsTargetStreamer.cpp:59
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::MipsII::MO_TLSGD
@ MO_TLSGD
MO_TLSGD - Represents the offset into the global offset table at which.
Definition: MipsBaseInfo.h:58
llvm::MipsFunctionInfo
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
Definition: MipsMachineFunction.h:25
llvm::MachineOperand::getMCSymbol
MCSymbol * getMCSymbol() const
Definition: MachineOperand.h:582
llvm::MachineOperand::MO_Register
@ MO_Register
Register operand.
Definition: MachineOperand.h:51
llvm::AsmPrinter::EmitToStreamer
void EmitToStreamer(MCStreamer &S, const MCInst &Inst)
Definition: AsmPrinter.cpp:403
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
llvm::MipsInstPrinter::getRegisterName
static const char * getRegisterName(unsigned RegNo)
llvm::MipsTargetStreamer::emitDirectiveSetNoMips16
virtual void emitDirectiveSetNoMips16()
Definition: MipsTargetStreamer.cpp:55
llvm::MCInst::setOpcode
void setOpcode(unsigned Op)
Definition: MCInst.h:197
llvm::MCSymbolELF
Definition: MCSymbolELF.h:14
llvm::MipsTargetStreamer::emitDirectiveSetMacro
virtual void emitDirectiveSetMacro()
Definition: MipsTargetStreamer.cpp:58
llvm::MachineBasicBlock::getSymbol
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
Definition: MachineBasicBlock.cpp:58
llvm::MCStreamer
Streaming machine code generation interface.
Definition: MCStreamer.h:212
llvm::MipsAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER
void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI)
Definition: MipsAsmPrinter.cpp:1238
llvm::MipsAsmPrinter::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: MipsAsmPrinter.cpp:78
bb
< i1 > br i1 label label bb bb
Definition: README.txt:978
llvm::MCDR_DataRegion
@ MCDR_DataRegion
.data_region
Definition: MCDirectives.h:61
llvm::MCContext::getOrCreateSymbol
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:201
llvm::MipsMCInstLower::Initialize
void Initialize(MCContext *C)
Definition: MipsMCInstLower.cpp:31
llvm::Log2_64
unsigned Log2_64(uint64_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition: MathExtras.h:553
llvm::MipsII::MO_GOT_OFST
@ MO_GOT_OFST
Definition: MipsBaseInfo.h:81
ELF.h
TargetMachine.h
llvm::MipsAsmPrinter::emitBasicBlockEnd
void emitBasicBlockEnd(const MachineBasicBlock &MBB) override
Targets can override this to emit stuff at the end of a basic block.
Definition: MipsAsmPrinter.cpp:467
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::MipsAsmPrinter::emitFunctionBodyEnd
void emitFunctionBodyEnd() override
EmitFunctionBodyEnd - Targets can override this to emit stuff after the last basic block in the funct...
Definition: MipsAsmPrinter.cpp:447
llvm::MipsTargetStreamer::emitMask
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)
Definition: MipsTargetStreamer.cpp:85
SmallString.h
MipsTargetStreamer.h
llvm::MachineOperand::MO_GlobalAddress
@ MO_GlobalAddress
Address of a global value.
Definition: MachineOperand.h:61
llvm::Triple::str
const std::string & str() const
Definition: Triple.h:413
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::getImm
int64_t getImm() const
Definition: MachineOperand.h:546
DRet
@ DRet
Definition: Mips16HardFloat.cpp:65
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:755
llvm::MipsAsmPrinter::emitFunctionEntryLabel
void emitFunctionEntryLabel() override
EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.
Definition: MipsAsmPrinter.cpp:400
llvm::MipsSubtarget::inMips16Mode
bool inMips16Mode() const
Definition: MipsSubtarget.h:303
llvm::AsmPrinter::OutStreamer
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
Definition: AsmPrinter.h:99
llvm::MCStreamer::emitRelocDirective
virtual Optional< std::pair< bool, std::string > > emitRelocDirective(const MCExpr &Offset, StringRef Name, const MCExpr *Expr, SMLoc Loc, const MCSubtargetInfo &STI)
Record a relocation described by the .reloc directive.
Definition: MCStreamer.h:1089
Twine.h
MCSymbolELF.h
MCContext.h
Y
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
llvm::MCStreamer::emitLabel
virtual void emitLabel(MCSymbol *Symbol, SMLoc Loc=SMLoc())
Emit a label for Symbol into the current section.
Definition: MCStreamer.cpp:423
MCSymbol.h
llvm::MCObjectFileInfo::isPositionIndependent
bool isPositionIndependent() const
Definition: MCObjectFileInfo.h:439
Mips.h
llvm::MCContext::getELFSection
MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)
Definition: MCContext.h:564
MCInst.h
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::MipsII::MO_HIGHEST
@ MO_HIGHEST
Definition: MipsBaseInfo.h:86
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
llvm::Mips16HardFloatInfo::FuncSignature
Definition: Mips16HardFloatInfo.h:33
llvm::MipsAsmPrinter::PrintAsmOperand
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.
Definition: MipsAsmPrinter.cpp:517
llvm::AsmPrinter::CurrentFnSym
MCSymbol * CurrentFnSym
The symbol for the current function.
Definition: AsmPrinter.h:121
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::MipsABIInfo::ABI::O32
@ O32
llvm::AArch64CC::LE
@ LE
Definition: AArch64BaseInfo.h:268
llvm::X86AS::FS
@ FS
Definition: X86.h:200
llvm::MipsAsmPrinter::printMemOperand
void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:726
llvm::MipsMCInstLower::Lower
void Lower(const MachineInstr *MI, MCInst &OutMI) const
Definition: MipsMCInstLower.cpp:315
llvm::MipsTargetStreamer::emitDirectiveSetNoReorder
virtual void emitDirectiveSetNoReorder()
Definition: MipsTargetStreamer.cpp:57
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:585
llvm::MCSymbol::getName
StringRef getName() const
getName - Get the symbol name.
Definition: MCSymbol.h:198
Align
uint64_t Align
Definition: ELFObjHandler.cpp:82
llvm::MipsAsmPrinter::Subtarget
const MipsSubtarget * Subtarget
Definition: MipsAsmPrinter.h:117
llvm::MipsII::MO_ABS_LO
@ MO_ABS_LO
Definition: MipsBaseInfo.h:53
llvm::MCObjectFileInfo::getTextSection
MCSection * getTextSection() const
Definition: MCObjectFileInfo.h:263
FDSig
@ FDSig
Definition: Mips16HardFloat.cpp:98
llvm::MCSymbol::print
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:58
llvm::Mips16HardFloatInfo::FuncSignature::RetSig
FPReturnVariant RetSig
Definition: Mips16HardFloatInfo.h:35
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::MipsAsmPrinter::printFCCOperand
void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier=nullptr)
Definition: MipsAsmPrinter.cpp:758
llvm::MCInst::addOperand
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
llvm::SmallString< 128 >
llvm::MipsSubtarget::isABI_FPXX
bool isABI_FPXX() const
Definition: MipsSubtarget.h:237
llvm::MIPS_NACL_BUNDLE_ALIGN
static const Align MIPS_NACL_BUNDLE_ALIGN
Definition: MipsMCNaCl.h:18
llvm::MachineBasicBlock::setAlignment
void setAlignment(Align A)
Set alignment of the basic block.
Definition: MachineBasicBlock.h:559
llvm::MipsSubtarget::isLittle
bool isLittle() const
Definition: MipsSubtarget.h:284
llvm::MipsII::MO_GOT_CALL
@ MO_GOT_CALL
MO_GOT_CALL - Represents the offset into the global offset table at which the address of a call site ...
Definition: MipsBaseInfo.h:44
llvm::AsmPrinter::emitMachineConstantPoolValue
virtual void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV)
Definition: AsmPrinter.cpp:3513
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:657
llvm::Mips16HardFloatInfo::FPReturnVariant
FPReturnVariant
Definition: Mips16HardFloatInfo.h:25
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:629
BasicBlock.h
llvm::cl::opt< bool >
llvm::MipsAsmPrinter::getCurrentABIString
const char * getCurrentABIString() const
Emit Set directives.
Definition: MipsAsmPrinter.cpp:391
llvm::MipsABIInfo::ABI::N64
@ N64
llvm::RISCVFenceField::O
@ O
Definition: RISCVBaseInfo.h:264
llvm::MipsAsmPrinter::isBlockOnlyReachableByFallthrough
bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const override
isBlockOnlyReachableByFallthough - Return true if the basic block has exactly one predecessor and the...
Definition: MipsAsmPrinter.cpp:477
llvm::MipsSubtarget::hasMips32r6
bool hasMips32r6() const
Definition: MipsSubtarget.h:271
llvm::Twine::utohexstr
static Twine utohexstr(const uint64_t &Val)
Definition: Twine.h:404
llvm::MipsAsmPrinter::printMemOperandEA
void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:749
llvm::MachineBasicBlock::pred_end
pred_iterator pred_end()
Definition: MachineBasicBlock.h:355
llvm::MachineOperand::getTargetFlags
unsigned getTargetFlags() const
Definition: MachineOperand.h:220
llvm::AsmPrinter::GetCPISymbol
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
Definition: AsmPrinter.cpp:3549
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:320
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
CDRet
@ CDRet
Definition: Mips16HardFloat.cpp:65
llvm::MachineBasicBlock::hasAddressTaken
bool hasAddressTaken() const
Test whether this block is used as as something other than the target of a terminator,...
Definition: MachineBasicBlock.h:227
MipsTargetInfo.h
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:127
llvm::MCOperand::isValid
bool isValid() const
Definition: MCInst.h:60
llvm::AsmPrinter::GetBlockAddressSymbol
MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const
Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.
Definition: AsmPrinter.cpp:3539
MipsInstPrinter.h
llvm::DataLayout::isLittleEndian
bool isLittleEndian() const
Layout endianness...
Definition: DataLayout.h:244
llvm::TargetRegisterInfo::getFrameRegister
virtual Register getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:53
LLVMInitializeMipsAsmPrinter
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsAsmPrinter()
Definition: MipsAsmPrinter.cpp:1308
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::MipsAsmPrinter::printOperand
void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:660
MipsMachineFunction.h
FRet
@ FRet
Definition: Mips16HardFloat.cpp:65
DDSig
@ DDSig
Definition: Mips16HardFloat.cpp:99
llvm::MCInstBuilder
Definition: MCInstBuilder.h:21
MachineConstantPool.h
llvm::StringRef::lower
std::string lower() const
Definition: StringRef.cpp:112
llvm::MipsTargetStreamer::emitDirectiveNaN2008
virtual void emitDirectiveNaN2008()
Definition: MipsTargetStreamer.cpp:78
llvm::MachineOperand::getType
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
Definition: MachineOperand.h:218
llvm::ELF::SHF_ALLOC
@ SHF_ALLOC
Definition: ELF.h:1068
llvm::MipsAsmPrinter::emitDebugValue
void emitDebugValue(const MCExpr *Value, unsigned Size) const override
Emit the directive and value for debug thread local expression.
Definition: MipsAsmPrinter.cpp:1257
llvm::MipsAsmPrinter::emitFrameDirective
void emitFrameDirective()
Frame Directive.
Definition: MipsAsmPrinter.cpp:380
llvm::MachineFunction::getConstantPool
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
Definition: MachineFunction.h:689
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineConstantPoolEntry::isMachineConstantPoolEntry
bool isMachineConstantPoolEntry() const
isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry is indeed a target specific ...
Definition: MachineConstantPool.h:93
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
MipsMCNaCl.h
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:673
llvm::MCBinaryExpr::createSub
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:610
llvm::AsmPrinter::MF
MachineFunction * MF
The current machine function.
Definition: AsmPrinter.h:102
llvm::MipsII::MO_GOT_DISP
@ MO_GOT_DISP
Definition: MipsBaseInfo.h:79
MipsMCTargetDesc.h
llvm::getTheMipsTarget
Target & getTheMipsTarget()
Definition: MipsTargetInfo.cpp:13
llvm::AsmPrinter::OutContext
MCContext & OutContext
This is the context for the output file that we are streaming.
Definition: AsmPrinter.h:94
llvm::MipsAsmPrinter::emitStartOfAsmFile
void emitStartOfAsmFile(Module &M) override
This virtual method can be overridden by targets that want to emit something at the start of their fi...
Definition: MipsAsmPrinter.cpp:772
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:359
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:66
RA
SI optimize exec mask operations pre RA
Definition: SIOptimizeExecMaskingPreRA.cpp:71
llvm::MipsTargetStreamer::emitDirectiveAbiCalls
virtual void emitDirectiveAbiCalls()
Definition: MipsTargetStreamer.cpp:77
llvm::MipsTargetStreamer::emitDirectiveNaNLegacy
virtual void emitDirectiveNaNLegacy()
Definition: MipsTargetStreamer.cpp:79
llvm::MipsABIInfo::ABI::N32
@ N32
llvm::MCSymbolRefExpr
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:192
llvm::MachineBasicBlock::pred_empty
bool pred_empty() const
Definition: MachineBasicBlock.h:368
llvm::MachineFunction
Definition: MachineFunction.h:257
Triple.h
llvm::MipsII::MO_TPREL_LO
@ MO_TPREL_LO
Definition: MipsBaseInfo.h:74
llvm::AsmPrinter::emitDebugValue
virtual void emitDebugValue(const MCExpr *Value, unsigned Size) const
Emit the directive and value for debug thread local expression.
Definition: AsmPrinter.cpp:880
llvm::AsmPrinter::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: AsmPrinter.h:387
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:787
llvm::MipsII::MO_GOT
@ MO_GOT
MO_GOT - Represents the offset into the global offset table at which the address the relocation entry...
Definition: MipsBaseInfo.h:38
llvm::MCRegisterInfo::getRARegister
MCRegister getRARegister() const
This method should return the register where the return address can be found.
Definition: MCRegisterInfo.h:437
llvm::MachineOperand::getMBB
MachineBasicBlock * getMBB() const
Definition: MachineOperand.h:561
DataLayout.h
llvm::MachineBasicBlock::isEHPad
bool isEHPad() const
Returns true if the block is a landing pad.
Definition: MachineBasicBlock.h:576
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::MipsTargetStreamer::updateABIInfo
void updateABIInfo(const PredicateLibrary &P)
Definition: MipsTargetStreamer.h:174
llvm::MipsAsmPrinter::LowerPATCHABLE_TAIL_CALL
void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI)
Definition: MipsAsmPrinter.cpp:1246
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
NoFPRet
@ NoFPRet
Definition: Mips16HardFloat.cpp:65
llvm::MCOperand::createReg
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:134
llvm::AsmPrinter::SledKind::FUNCTION_EXIT
@ FUNCTION_EXIT
TargetLoweringObjectFile.h
llvm::MachineOperand::MO_MachineBasicBlock
@ MO_MachineBasicBlock
MachineBasicBlock reference.
Definition: MachineOperand.h:55
TargetSubtargetInfo.h
llvm::TargetMachine::getTargetFeatureString
StringRef getTargetFeatureString() const
Definition: TargetMachine.h:128
llvm::getTheMips64elTarget
Target & getTheMips64elTarget()
Definition: MipsTargetInfo.cpp:25
llvm::MipsTargetStreamer::emitDirectiveModuleOddSPReg
virtual void emitDirectiveModuleOddSPReg()
Definition: MipsTargetStreamer.cpp:153
llvm::getTheMips64Target
Target & getTheMips64Target()
Definition: MipsTargetInfo.cpp:21
llvm::MipsAsmPrinter::emitFunctionBodyStart
void emitFunctionBodyStart() override
EmitFunctionBodyStart - Targets can override this to emit stuff before the first basic block in the f...
Definition: MipsAsmPrinter.cpp:426
llvm::MipsSubtarget
Definition: MipsSubtarget.h:39
CFRet
@ CFRet
Definition: Mips16HardFloat.cpp:65
llvm::MCContext::createTempSymbol
MCSymbol * createTempSymbol()
Create a temporary symbol with a unique name.
Definition: MCContext.cpp:318
emitDirectiveRelocJalr
static void emitDirectiveRelocJalr(const MachineInstr &MI, MCContext &OutContext, TargetMachine &TM, MCStreamer &OutStreamer, const MipsSubtarget &Subtarget)
Definition: MipsAsmPrinter.cpp:157
MipsMCInstLower.h
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MipsSubtarget::inMicroMipsMode
bool inMicroMipsMode() const
Definition: MipsSubtarget.h:314
llvm::AsmPrinter::SledKind::TAIL_CALL
@ TAIL_CALL
MipsAsmPrinter.h
Callee
amdgpu Simplify well known AMD library false FunctionCallee Callee
Definition: AMDGPULibCalls.cpp:187
llvm::MipsTargetStreamer::emitFMask
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)
Definition: MipsTargetStreamer.cpp:86
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
Attributes.h
llvm::MipsSubtarget::isGP64bit
bool isGP64bit() const
Definition: MipsSubtarget.h:292
llvm::MipsII::MO_GPOFF_LO
@ MO_GPOFF_LO
Definition: MipsBaseInfo.h:78
llvm::MipsMCExpr::MEK_DTPREL
@ MEK_DTPREL
Definition: MipsMCExpr.h:24
llvm::Target::createMCSubtargetInfo
MCSubtargetInfo * createMCSubtargetInfo(StringRef TheTriple, StringRef CPU, StringRef Features) const
createMCSubtargetInfo - Create a MCSubtargetInfo implementation.
Definition: TargetRegistry.h:468
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
llvm::MipsTargetStreamer::emitDirectiveSetMicroMips
virtual void emitDirectiveSetMicroMips()
Definition: MipsTargetStreamer.cpp:51
llvm::MachineConstantPoolEntry
This class is a data container for one entry in a MachineConstantPool.
Definition: MachineConstantPool.h:67
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:623
llvm::TargetRegisterInfo::getRegSizeInBits
unsigned getRegSizeInBits(const TargetRegisterClass &RC) const
Return the size in bits of a register from class RC.
Definition: TargetRegisterInfo.h:280
llvm::MipsAsmPrinter::printSavedRegsBitmask
void printSavedRegsBitmask()
Definition: MipsAsmPrinter.cpp:327
llvm::MachineConstantPool::getConstants
const std::vector< MachineConstantPoolEntry > & getConstants() const
Definition: MachineConstantPool.h:145
llvm::MipsTargetStreamer::forbidModuleDirective
void forbidModuleDirective()
Definition: MipsTargetStreamer.h:167
DFSig
@ DFSig
Definition: Mips16HardFloat.cpp:99
llvm::AsmPrinter::getSubtargetInfo
const MCSubtargetInfo & getSubtargetInfo() const
Return information about subtarget.
Definition: AsmPrinter.cpp:398
llvm::ilist_iterator
Iterator for intrusive lists based on ilist_node.
Definition: ilist_iterator.h:57
MachineFrameInfo.h
llvm::DataLayout::getPrivateGlobalPrefix
StringRef getPrivateGlobalPrefix() const
Definition: DataLayout.h:334
llvm::SectionName
Definition: DWARFSection.h:21
MipsABIInfo.h
llvm::MachineOperand::getIndex
int getIndex() const
Definition: MachineOperand.h:566
Casting.h
llvm::Mips::MipsFCCToString
const char * MipsFCCToString(Mips::CondCode CC)
Definition: MipsInstPrinter.cpp:36
llvm::MipsTargetStreamer
Definition: MipsTargetStreamer.h:24
Function.h
llvm::MipsTargetStreamer::setUsesMicroMips
virtual void setUsesMicroMips()
Definition: MipsTargetStreamer.cpp:53
x
TODO unsigned x
Definition: README.txt:10
llvm::MipsSubtarget::isABICalls
bool isABICalls() const
Definition: MipsSubtarget.h:285
llvm::Mips16HardFloatInfo::FuncSignature::ParamSig
FPParamVariant ParamSig
Definition: Mips16HardFloatInfo.h:34
llvm::MipsAsmPrinter::emitInstruction
void emitInstruction(const MachineInstr *MI) override
Targets should implement this to emit instructions.
Definition: MipsAsmPrinter.cpp:183
llvm::MCSymbolRefExpr::create
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:386
llvm::MachineBasicBlock::isLayoutSuccessor
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
Definition: MachineBasicBlock.cpp:928
llvm::MCSA_Global
@ MCSA_Global
.type _foo, @gnu_unique_object
Definition: MCDirectives.h:30
llvm::MIPS_MC::selectMipsCPU
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
Definition: MipsMCTargetDesc.cpp:49
llvm::MachineOperand::isImm
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Definition: MachineOperand.h:322
llvm::MCSA_ELF_TypeFunction
@ MCSA_ELF_TypeFunction
.type _foo, STT_FUNC # aka @function
Definition: MCDirectives.h:23
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:106
llvm::MipsII::MO_ABS_HI
@ MO_ABS_HI
MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol address.
Definition: MipsBaseInfo.h:52
llvm::MipsII::MO_GPOFF_HI
@ MO_GPOFF_HI
Definition: MipsBaseInfo.h:77
Instructions.h
llvm::TargetMachine::getTargetCPU
StringRef getTargetCPU() const
Definition: TargetMachine.h:127
llvm::AsmPrinter::TM
TargetMachine & TM
Target machine description.
Definition: AsmPrinter.h:87
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:305
llvm::InlineAsm::getNumOperandRegisters
static unsigned getNumOperandRegisters(unsigned Flag)
getNumOperandRegisters - Extract the number of registers field from the inline asm operand flag.
Definition: InlineAsm.h:363
llvm::MipsSubtarget::isTargetNaCl
bool isTargetNaCl() const
Definition: MipsSubtarget.h:355
llvm::MipsII::MO_GPREL
@ MO_GPREL
MO_GPREL - Represents the offset from the current gp value to be used for the relocatable object file...
Definition: MipsBaseInfo.h:48
llvm::MipsTargetStreamer::emitDirectiveSetPop
virtual void emitDirectiveSetPop()
Definition: MipsTargetStreamer.cpp:107
llvm::MipsTargetStreamer::emitDirectiveEnd
virtual void emitDirectiveEnd(StringRef Name)
Definition: MipsTargetStreamer.cpp:75
llvm::AsmPrinter::getObjFileLowering
const TargetLoweringObjectFile & getObjFileLowering() const
Return information about object file lowering.
Definition: AsmPrinter.cpp:384
llvm::TargetMachine::getTargetTriple
const Triple & getTargetTriple() const
Definition: TargetMachine.h:126
NoSig
@ NoSig
Definition: Mips16HardFloat.cpp:99
llvm::MipsAsmPrinter::emitEndOfAsmFile
void emitEndOfAsmFile(Module &M) override
This virtual method can be overridden by targets that want to emit something at the end of their file...
Definition: MipsAsmPrinter.cpp:1124
MipsSubtarget.h
llvm::MachineFunction::getDataLayout
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Definition: MachineFunction.cpp:285
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:277
llvm::raw_svector_ostream
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:659
llvm::AsmPrinter::getDataLayout
const DataLayout & getDataLayout() const
Return information about data layout.
Definition: AsmPrinter.cpp:388
llvm::AsmPrinter::SledKind::FUNCTION_ENTER
@ FUNCTION_ENTER
MachineOperand.h
llvm::MipsSubtarget::isFP64bit
bool isFP64bit() const
Definition: MipsSubtarget.h:287
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
llvm::AsmPrinter::emitXRayTable
void emitXRayTable()
Emit a table with all XRay instrumentation points.
Definition: AsmPrinter.cpp:3898
llvm::MipsTargetStreamer::emitDirectiveSetReorder
virtual void emitDirectiveSetReorder()
Definition: MipsTargetStreamer.cpp:56
llvm::MachineFunction::getJumpTableInfo
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
Definition: MachineFunction.h:680
llvm::RegisterAsmPrinter
RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...
Definition: TargetRegistry.h:1420
llvm::MipsMCInstLower::LowerOperand
MCOperand LowerOperand(const MachineOperand &MO, int64_t offset=0) const
Definition: MipsMCInstLower.cpp:177
llvm::MipsSubtarget::useSoftFloat
bool useSoftFloat() const
Definition: MipsSubtarget.h:336
llvm::TargetMachine::getTarget
const Target & getTarget() const
Definition: TargetMachine.h:124
llvm::MipsII::MO_HIGHER
@ MO_HIGHER
MO_HIGHER/HIGHEST - Represents the highest or higher half word of a 64-bit symbol address.
Definition: MipsBaseInfo.h:85
llvm::MachineJumpTableInfo
Definition: MachineJumpTableInfo.h:42
FSig
@ FSig
Definition: Mips16HardFloat.cpp:98
raw_ostream.h
MachineFunction.h
llvm::MachineInstrBundleIterator< const MachineInstr >
llvm::isPowerOf2_64
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
Definition: MathExtras.h:463
llvm::MCDR_DataRegionEnd
@ MCDR_DataRegionEnd
.end_data_region
Definition: MCDirectives.h:65
TargetRegistry.h
llvm::MachineFunction::getAlignment
Align getAlignment() const
getAlignment - Return the alignment of the function.
Definition: MachineFunction.h:705
MCExpr.h
llvm::MipsTargetStreamer::emitDirectiveSetNoMicroMips
virtual void emitDirectiveSetNoMicroMips()
Definition: MipsTargetStreamer.cpp:52
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:77
llvm::AsmPrinter::getFunctionNumber
unsigned getFunctionNumber() const
Return a unique ID for the current function.
Definition: AsmPrinter.cpp:380
llvm::MachineConstantPoolEntry::ConstVal
const Constant * ConstVal
Definition: MachineConstantPool.h:71
llvm::MipsII::MO_GOT_PAGE
@ MO_GOT_PAGE
Definition: MipsBaseInfo.h:80
llvm::MipsTargetStreamer::emitDirectiveSetPush
virtual void emitDirectiveSetPush()
Definition: MipsTargetStreamer.cpp:108
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
TargetRegisterInfo.h
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:307
llvm::AsmPrinter::PrintAsmOperand
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.
Definition: AsmPrinterInlineAsm.cpp:467
llvm::MachineOperand::MO_ConstantPoolIndex
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
Definition: MachineOperand.h:57
llvm::getTheMipselTarget
Target & getTheMipselTarget()
Definition: MipsTargetInfo.cpp:17