LLVM  15.0.0git
MipsAsmPrinter.cpp
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1 //===- MipsAsmPrinter.cpp - Mips LLVM Assembly Printer --------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to GAS-format MIPS assembly language.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsAsmPrinter.h"
20 #include "Mips.h"
21 #include "MipsMCInstLower.h"
22 #include "MipsMachineFunction.h"
23 #include "MipsSubtarget.h"
24 #include "MipsTargetMachine.h"
25 #include "MipsTargetStreamer.h"
27 #include "llvm/ADT/SmallString.h"
28 #include "llvm/ADT/StringRef.h"
29 #include "llvm/ADT/Triple.h"
30 #include "llvm/ADT/Twine.h"
31 #include "llvm/BinaryFormat/ELF.h"
41 #include "llvm/IR/Attributes.h"
42 #include "llvm/IR/BasicBlock.h"
43 #include "llvm/IR/DataLayout.h"
44 #include "llvm/IR/Function.h"
45 #include "llvm/IR/InlineAsm.h"
46 #include "llvm/IR/Instructions.h"
47 #include "llvm/MC/MCContext.h"
48 #include "llvm/MC/MCExpr.h"
49 #include "llvm/MC/MCInst.h"
50 #include "llvm/MC/MCInstBuilder.h"
52 #include "llvm/MC/MCSectionELF.h"
53 #include "llvm/MC/MCSymbol.h"
54 #include "llvm/MC/MCSymbolELF.h"
55 #include "llvm/MC/TargetRegistry.h"
56 #include "llvm/Support/Casting.h"
61 #include <cassert>
62 #include <cstdint>
63 #include <map>
64 #include <memory>
65 #include <string>
66 #include <vector>
67 
68 using namespace llvm;
69 
70 #define DEBUG_TYPE "mips-asm-printer"
71 
73 
74 MipsTargetStreamer &MipsAsmPrinter::getTargetStreamer() const {
75  return static_cast<MipsTargetStreamer &>(*OutStreamer->getTargetStreamer());
76 }
77 
80 
82  if (Subtarget->inMips16Mode())
83  for (const auto &I : MipsFI->StubsNeeded) {
84  const char *Symbol = I.first;
85  const Mips16HardFloatInfo::FuncSignature *Signature = I.second;
86  if (StubsNeeded.find(Symbol) == StubsNeeded.end())
87  StubsNeeded[Symbol] = Signature;
88  }
89  MCP = MF.getConstantPool();
90 
91  // In NaCl, all indirect jump targets must be aligned to bundle size.
92  if (Subtarget->isTargetNaCl())
93  NaClAlignIndirectJumpTargets(MF);
94 
96 
97  emitXRayTable();
98 
99  return true;
100 }
101 
102 bool MipsAsmPrinter::lowerOperand(const MachineOperand &MO, MCOperand &MCOp) {
103  MCOp = MCInstLowering.LowerOperand(MO);
104  return MCOp.isValid();
105 }
106 
107 #include "MipsGenMCPseudoLowering.inc"
108 
109 // Lower PseudoReturn/PseudoIndirectBranch/PseudoIndirectBranch64 to JR, JR_MM,
110 // JALR, or JALR64 as appropriate for the target.
111 void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,
112  const MachineInstr *MI) {
113  bool HasLinkReg = false;
114  bool InMicroMipsMode = Subtarget->inMicroMipsMode();
115  MCInst TmpInst0;
116 
117  if (Subtarget->hasMips64r6()) {
118  // MIPS64r6 should use (JALR64 ZERO_64, $rs)
119  TmpInst0.setOpcode(Mips::JALR64);
120  HasLinkReg = true;
121  } else if (Subtarget->hasMips32r6()) {
122  // MIPS32r6 should use (JALR ZERO, $rs)
123  if (InMicroMipsMode)
124  TmpInst0.setOpcode(Mips::JRC16_MMR6);
125  else {
126  TmpInst0.setOpcode(Mips::JALR);
127  HasLinkReg = true;
128  }
129  } else if (Subtarget->inMicroMipsMode())
130  // microMIPS should use (JR_MM $rs)
131  TmpInst0.setOpcode(Mips::JR_MM);
132  else {
133  // Everything else should use (JR $rs)
134  TmpInst0.setOpcode(Mips::JR);
135  }
136 
137  MCOperand MCOp;
138 
139  if (HasLinkReg) {
140  unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
141  TmpInst0.addOperand(MCOperand::createReg(ZeroReg));
142  }
143 
144  lowerOperand(MI->getOperand(0), MCOp);
145  TmpInst0.addOperand(MCOp);
146 
147  EmitToStreamer(OutStreamer, TmpInst0);
148 }
149 
150 // If there is an MO_JALR operand, insert:
151 //
152 // .reloc tmplabel, R_{MICRO}MIPS_JALR, symbol
153 // tmplabel:
154 //
155 // This is an optimization hint for the linker which may then replace
156 // an indirect call with a direct branch.
158  MCContext &OutContext,
159  TargetMachine &TM,
160  MCStreamer &OutStreamer,
161  const MipsSubtarget &Subtarget) {
162  for (const MachineOperand &MO :
163  llvm::drop_begin(MI.operands(), MI.getDesc().getNumOperands())) {
164  if (MO.isMCSymbol() && (MO.getTargetFlags() & MipsII::MO_JALR)) {
165  MCSymbol *Callee = MO.getMCSymbol();
166  if (Callee && !Callee->getName().empty()) {
167  MCSymbol *OffsetLabel = OutContext.createTempSymbol();
168  const MCExpr *OffsetExpr =
169  MCSymbolRefExpr::create(OffsetLabel, OutContext);
170  const MCExpr *CaleeExpr =
171  MCSymbolRefExpr::create(Callee, OutContext);
172  OutStreamer.emitRelocDirective(
173  *OffsetExpr,
174  Subtarget.inMicroMipsMode() ? "R_MICROMIPS_JALR" : "R_MIPS_JALR",
175  CaleeExpr, SMLoc(), *TM.getMCSubtargetInfo());
176  OutStreamer.emitLabel(OffsetLabel);
177  return;
178  }
179  }
180  }
181 }
182 
184  MipsTargetStreamer &TS = getTargetStreamer();
185  unsigned Opc = MI->getOpcode();
187 
188  if (MI->isDebugValue()) {
189  SmallString<128> Str;
190  raw_svector_ostream OS(Str);
191 
193  return;
194  }
195  if (MI->isDebugLabel())
196  return;
197 
198  // If we just ended a constant pool, mark it as such.
199  if (InConstantPool && Opc != Mips::CONSTPOOL_ENTRY) {
200  OutStreamer->emitDataRegion(MCDR_DataRegionEnd);
201  InConstantPool = false;
202  }
203  if (Opc == Mips::CONSTPOOL_ENTRY) {
204  // CONSTPOOL_ENTRY - This instruction represents a floating
205  // constant pool in the function. The first operand is the ID#
206  // for this instruction, the second is the index into the
207  // MachineConstantPool that this is, the third is the size in
208  // bytes of this constant pool entry.
209  // The required alignment is specified on the basic block holding this MI.
210  //
211  unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
212  unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
213 
214  // If this is the first entry of the pool, mark it.
215  if (!InConstantPool) {
216  OutStreamer->emitDataRegion(MCDR_DataRegion);
217  InConstantPool = true;
218  }
219 
220  OutStreamer->emitLabel(GetCPISymbol(LabelId));
221 
222  const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
223  if (MCPE.isMachineConstantPoolEntry())
225  else
227  return;
228  }
229 
230  switch (Opc) {
231  case Mips::PATCHABLE_FUNCTION_ENTER:
233  return;
234  case Mips::PATCHABLE_FUNCTION_EXIT:
236  return;
237  case Mips::PATCHABLE_TAIL_CALL:
239  return;
240  }
241 
242  if (EmitJalrReloc &&
243  (MI->isReturn() || MI->isCall() || MI->isIndirectBranch())) {
245  }
246 
248  MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
249 
250  do {
251  // Do any auto-generated pseudo lowerings.
252  if (emitPseudoExpansionLowering(*OutStreamer, &*I))
253  continue;
254 
255  // Skip the BUNDLE pseudo instruction and lower the contents
256  if (I->isBundle())
257  continue;
258 
259  if (I->getOpcode() == Mips::PseudoReturn ||
260  I->getOpcode() == Mips::PseudoReturn64 ||
261  I->getOpcode() == Mips::PseudoIndirectBranch ||
262  I->getOpcode() == Mips::PseudoIndirectBranch64 ||
263  I->getOpcode() == Mips::TAILCALLREG ||
264  I->getOpcode() == Mips::TAILCALLREG64) {
265  emitPseudoIndirectBranch(*OutStreamer, &*I);
266  continue;
267  }
268 
269  // The inMips16Mode() test is not permanent.
270  // Some instructions are marked as pseudo right now which
271  // would make the test fail for the wrong reason but
272  // that will be fixed soon. We need this here because we are
273  // removing another test for this situation downstream in the
274  // callchain.
275  //
276  if (I->isPseudo() && !Subtarget->inMips16Mode()
277  && !isLongBranchPseudo(I->getOpcode()))
278  llvm_unreachable("Pseudo opcode found in emitInstruction()");
279 
280  MCInst TmpInst0;
281  MCInstLowering.Lower(&*I, TmpInst0);
282  EmitToStreamer(*OutStreamer, TmpInst0);
283  } while ((++I != E) && I->isInsideBundle()); // Delay slot check
284 }
285 
286 //===----------------------------------------------------------------------===//
287 //
288 // Mips Asm Directives
289 //
290 // -- Frame directive "frame Stackpointer, Stacksize, RARegister"
291 // Describe the stack frame.
292 //
293 // -- Mask directives "(f)mask bitmask, offset"
294 // Tells the assembler which registers are saved and where.
295 // bitmask - contain a little endian bitset indicating which registers are
296 // saved on function prologue (e.g. with a 0x80000000 mask, the
297 // assembler knows the register 31 (RA) is saved at prologue.
298 // offset - the position before stack pointer subtraction indicating where
299 // the first saved register on prologue is located. (e.g. with a
300 //
301 // Consider the following function prologue:
302 //
303 // .frame $fp,48,$ra
304 // .mask 0xc0000000,-8
305 // addiu $sp, $sp, -48
306 // sw $ra, 40($sp)
307 // sw $fp, 36($sp)
308 //
309 // With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
310 // 30 (FP) are saved at prologue. As the save order on prologue is from
311 // left to right, RA is saved first. A -8 offset means that after the
312 // stack pointer subtration, the first register in the mask (RA) will be
313 // saved at address 48-8=40.
314 //
315 //===----------------------------------------------------------------------===//
316 
317 //===----------------------------------------------------------------------===//
318 // Mask directives
319 //===----------------------------------------------------------------------===//
320 
321 // Create a bitmask with all callee saved registers for CPU or Floating Point
322 // registers. For CPU registers consider RA, GP and FP for saving if necessary.
324  // CPU and FPU Saved Registers Bitmasks
325  unsigned CPUBitmask = 0, FPUBitmask = 0;
326  int CPUTopSavedRegOff, FPUTopSavedRegOff;
327 
328  // Set the CPU and FPU Bitmasks
329  const MachineFrameInfo &MFI = MF->getFrameInfo();
331  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
332  // size of stack area to which FP callee-saved regs are saved.
333  unsigned CPURegSize = TRI->getRegSizeInBits(Mips::GPR32RegClass) / 8;
334  unsigned FGR32RegSize = TRI->getRegSizeInBits(Mips::FGR32RegClass) / 8;
335  unsigned AFGR64RegSize = TRI->getRegSizeInBits(Mips::AFGR64RegClass) / 8;
336  bool HasAFGR64Reg = false;
337  unsigned CSFPRegsSize = 0;
338 
339  for (const auto &I : CSI) {
340  Register Reg = I.getReg();
341  unsigned RegNum = TRI->getEncodingValue(Reg);
342 
343  // If it's a floating point register, set the FPU Bitmask.
344  // If it's a general purpose register, set the CPU Bitmask.
345  if (Mips::FGR32RegClass.contains(Reg)) {
346  FPUBitmask |= (1 << RegNum);
347  CSFPRegsSize += FGR32RegSize;
348  } else if (Mips::AFGR64RegClass.contains(Reg)) {
349  FPUBitmask |= (3 << RegNum);
350  CSFPRegsSize += AFGR64RegSize;
351  HasAFGR64Reg = true;
352  } else if (Mips::GPR32RegClass.contains(Reg))
353  CPUBitmask |= (1 << RegNum);
354  }
355 
356  // FP Regs are saved right below where the virtual frame pointer points to.
357  FPUTopSavedRegOff = FPUBitmask ?
358  (HasAFGR64Reg ? -AFGR64RegSize : -FGR32RegSize) : 0;
359 
360  // CPU Regs are saved below FP Regs.
361  CPUTopSavedRegOff = CPUBitmask ? -CSFPRegsSize - CPURegSize : 0;
362 
363  MipsTargetStreamer &TS = getTargetStreamer();
364  // Print CPUBitmask
365  TS.emitMask(CPUBitmask, CPUTopSavedRegOff);
366 
367  // Print FPUBitmask
368  TS.emitFMask(FPUBitmask, FPUTopSavedRegOff);
369 }
370 
371 //===----------------------------------------------------------------------===//
372 // Frame and Set directives
373 //===----------------------------------------------------------------------===//
374 
375 /// Frame Directive
378 
379  Register stackReg = RI.getFrameRegister(*MF);
380  unsigned returnReg = RI.getRARegister();
381  unsigned stackSize = MF->getFrameInfo().getStackSize();
382 
383  getTargetStreamer().emitFrame(stackReg, stackSize, returnReg);
384 }
385 
386 /// Emit Set directives.
388  switch (static_cast<MipsTargetMachine &>(TM).getABI().GetEnumValue()) {
389  case MipsABIInfo::ABI::O32: return "abi32";
390  case MipsABIInfo::ABI::N32: return "abiN32";
391  case MipsABIInfo::ABI::N64: return "abi64";
392  default: llvm_unreachable("Unknown Mips ABI");
393  }
394 }
395 
397  MipsTargetStreamer &TS = getTargetStreamer();
398 
399  // NaCl sandboxing requires that indirect call instructions are masked.
400  // This means that function entry points should be bundle-aligned.
401  if (Subtarget->isTargetNaCl())
403 
404  if (Subtarget->inMicroMipsMode()) {
406  TS.setUsesMicroMips();
408  } else
410 
411  if (Subtarget->inMips16Mode())
413  else
415 
417  OutStreamer->emitLabel(CurrentFnSym);
418 }
419 
420 /// EmitFunctionBodyStart - Targets can override this to emit stuff before
421 /// the first basic block in the function.
423  MipsTargetStreamer &TS = getTargetStreamer();
424 
426 
427  bool IsNakedFunction = MF->getFunction().hasFnAttribute(Attribute::Naked);
428  if (!IsNakedFunction)
430 
431  if (!IsNakedFunction)
433 
434  if (!Subtarget->inMips16Mode()) {
438  }
439 }
440 
441 /// EmitFunctionBodyEnd - Targets can override this to emit stuff after
442 /// the last basic block in the function.
444  MipsTargetStreamer &TS = getTargetStreamer();
445 
446  // There are instruction for this macros, but they must
447  // always be at the function end, and we can't emit and
448  // break with BB logic.
449  if (!Subtarget->inMips16Mode()) {
450  TS.emitDirectiveSetAt();
453  }
455  // Make sure to terminate any constant pools that were at the end
456  // of the function.
457  if (!InConstantPool)
458  return;
459  InConstantPool = false;
460  OutStreamer->emitDataRegion(MCDR_DataRegionEnd);
461 }
462 
465  MipsTargetStreamer &TS = getTargetStreamer();
466  if (MBB.empty())
467  TS.emitDirectiveInsn();
468 }
469 
470 /// isBlockOnlyReachableByFallthough - Return true if the basic block has
471 /// exactly one predecessor and the control transfer mechanism between
472 /// the predecessor and this block is a fall-through.
474  MBB) const {
475  // The predecessor has to be immediately before this block.
476  const MachineBasicBlock *Pred = *MBB->pred_begin();
477 
478  // If the predecessor is a switch statement, assume a jump table
479  // implementation, so it is not a fall through.
480  if (const BasicBlock *bb = Pred->getBasicBlock())
481  if (isa<SwitchInst>(bb->getTerminator()))
482  return false;
483 
484  // If this is a landing pad, it isn't a fall through. If it has no preds,
485  // then nothing falls through to it.
486  if (MBB->isEHPad() || MBB->pred_empty())
487  return false;
488 
489  // If there isn't exactly one predecessor, it can't be a fall through.
491  ++PI2;
492 
493  if (PI2 != MBB->pred_end())
494  return false;
495 
496  // The predecessor has to be immediately before this block.
497  if (!Pred->isLayoutSuccessor(MBB))
498  return false;
499 
500  // If the block is completely empty, then it definitely does fall through.
501  if (Pred->empty())
502  return true;
503 
504  // Otherwise, check the last instruction.
505  // Check if the last terminator is an unconditional branch.
507  while (I != Pred->begin() && !(--I)->isTerminator()) ;
508 
509  return !I->isBarrier();
510 }
511 
512 // Print out an operand for an inline asm expression.
513 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
514  const char *ExtraCode, raw_ostream &O) {
515  // Does this asm operand have a single letter operand modifier?
516  if (ExtraCode && ExtraCode[0]) {
517  if (ExtraCode[1] != 0) return true; // Unknown modifier.
518 
519  const MachineOperand &MO = MI->getOperand(OpNum);
520  switch (ExtraCode[0]) {
521  default:
522  // See if this is a generic print operand
523  return AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O);
524  case 'X': // hex const int
525  if (!MO.isImm())
526  return true;
527  O << "0x" << Twine::utohexstr(MO.getImm());
528  return false;
529  case 'x': // hex const int (low 16 bits)
530  if (!MO.isImm())
531  return true;
532  O << "0x" << Twine::utohexstr(MO.getImm() & 0xffff);
533  return false;
534  case 'd': // decimal const int
535  if (!MO.isImm())
536  return true;
537  O << MO.getImm();
538  return false;
539  case 'm': // decimal const int minus 1
540  if (!MO.isImm())
541  return true;
542  O << MO.getImm() - 1;
543  return false;
544  case 'y': // exact log2
545  if (!MO.isImm())
546  return true;
547  if (!isPowerOf2_64(MO.getImm()))
548  return true;
549  O << Log2_64(MO.getImm());
550  return false;
551  case 'z':
552  // $0 if zero, regular printing otherwise
553  if (MO.isImm() && MO.getImm() == 0) {
554  O << "$0";
555  return false;
556  }
557  // If not, call printOperand as normal.
558  break;
559  case 'D': // Second part of a double word register operand
560  case 'L': // Low order register of a double word register operand
561  case 'M': // High order register of a double word register operand
562  {
563  if (OpNum == 0)
564  return true;
565  const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
566  if (!FlagsOP.isImm())
567  return true;
568  unsigned Flags = FlagsOP.getImm();
569  unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
570  // Number of registers represented by this operand. We are looking
571  // for 2 for 32 bit mode and 1 for 64 bit mode.
572  if (NumVals != 2) {
573  if (Subtarget->isGP64bit() && NumVals == 1 && MO.isReg()) {
574  Register Reg = MO.getReg();
576  return false;
577  }
578  return true;
579  }
580 
581  unsigned RegOp = OpNum;
582  if (!Subtarget->isGP64bit()){
583  // Endianness reverses which register holds the high or low value
584  // between M and L.
585  switch(ExtraCode[0]) {
586  case 'M':
587  RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
588  break;
589  case 'L':
590  RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;
591  break;
592  case 'D': // Always the second part
593  RegOp = OpNum + 1;
594  }
595  if (RegOp >= MI->getNumOperands())
596  return true;
597  const MachineOperand &MO = MI->getOperand(RegOp);
598  if (!MO.isReg())
599  return true;
600  Register Reg = MO.getReg();
602  return false;
603  }
604  break;
605  }
606  case 'w':
607  // Print MSA registers for the 'f' constraint
608  // In LLVM, the 'w' modifier doesn't need to do anything.
609  // We can just call printOperand as normal.
610  break;
611  }
612  }
613 
614  printOperand(MI, OpNum, O);
615  return false;
616 }
617 
619  unsigned OpNum,
620  const char *ExtraCode,
621  raw_ostream &O) {
622  assert(OpNum + 1 < MI->getNumOperands() && "Insufficient operands");
623  const MachineOperand &BaseMO = MI->getOperand(OpNum);
624  const MachineOperand &OffsetMO = MI->getOperand(OpNum + 1);
625  assert(BaseMO.isReg() &&
626  "Unexpected base pointer for inline asm memory operand.");
627  assert(OffsetMO.isImm() &&
628  "Unexpected offset for inline asm memory operand.");
629  int Offset = OffsetMO.getImm();
630 
631  // Currently we are expecting either no ExtraCode or 'D','M','L'.
632  if (ExtraCode) {
633  switch (ExtraCode[0]) {
634  case 'D':
635  Offset += 4;
636  break;
637  case 'M':
638  if (Subtarget->isLittle())
639  Offset += 4;
640  break;
641  case 'L':
642  if (!Subtarget->isLittle())
643  Offset += 4;
644  break;
645  default:
646  return true; // Unknown modifier.
647  }
648  }
649 
650  O << Offset << "($" << MipsInstPrinter::getRegisterName(BaseMO.getReg())
651  << ")";
652 
653  return false;
654 }
655 
657  raw_ostream &O) {
658  const MachineOperand &MO = MI->getOperand(opNum);
659  bool closeP = false;
660 
661  if (MO.getTargetFlags())
662  closeP = true;
663 
664  switch(MO.getTargetFlags()) {
665  case MipsII::MO_GPREL: O << "%gp_rel("; break;
666  case MipsII::MO_GOT_CALL: O << "%call16("; break;
667  case MipsII::MO_GOT: O << "%got("; break;
668  case MipsII::MO_ABS_HI: O << "%hi("; break;
669  case MipsII::MO_ABS_LO: O << "%lo("; break;
670  case MipsII::MO_HIGHER: O << "%higher("; break;
671  case MipsII::MO_HIGHEST: O << "%highest(("; break;
672  case MipsII::MO_TLSGD: O << "%tlsgd("; break;
673  case MipsII::MO_GOTTPREL: O << "%gottprel("; break;
674  case MipsII::MO_TPREL_HI: O << "%tprel_hi("; break;
675  case MipsII::MO_TPREL_LO: O << "%tprel_lo("; break;
676  case MipsII::MO_GPOFF_HI: O << "%hi(%neg(%gp_rel("; break;
677  case MipsII::MO_GPOFF_LO: O << "%lo(%neg(%gp_rel("; break;
678  case MipsII::MO_GOT_DISP: O << "%got_disp("; break;
679  case MipsII::MO_GOT_PAGE: O << "%got_page("; break;
680  case MipsII::MO_GOT_OFST: O << "%got_ofst("; break;
681  }
682 
683  switch (MO.getType()) {
685  O << '$'
687  break;
688 
690  O << MO.getImm();
691  break;
692 
694  MO.getMBB()->getSymbol()->print(O, MAI);
695  return;
696 
698  PrintSymbolOperand(MO, O);
699  break;
700 
703  O << BA->getName();
704  break;
705  }
706 
708  O << getDataLayout().getPrivateGlobalPrefix() << "CPI"
709  << getFunctionNumber() << "_" << MO.getIndex();
710  if (MO.getOffset())
711  O << "+" << MO.getOffset();
712  break;
713 
714  default:
715  llvm_unreachable("<unknown operand type>");
716  }
717 
718  if (closeP) O << ")";
719 }
720 
721 void MipsAsmPrinter::
723  // Load/Store memory operands -- imm($reg)
724  // If PIC target the target is loaded as the
725  // pattern lw $25,%call16($28)
726 
727  // opNum can be invalid if instruction has reglist as operand.
728  // MemOperand is always last operand of instruction (base + offset).
729  switch (MI->getOpcode()) {
730  default:
731  break;
732  case Mips::SWM32_MM:
733  case Mips::LWM32_MM:
734  opNum = MI->getNumOperands() - 2;
735  break;
736  }
737 
738  printOperand(MI, opNum+1, O);
739  O << "(";
740  printOperand(MI, opNum, O);
741  O << ")";
742 }
743 
744 void MipsAsmPrinter::
746  // when using stack locations for not load/store instructions
747  // print the same way as all normal 3 operand instructions.
748  printOperand(MI, opNum, O);
749  O << ", ";
750  printOperand(MI, opNum+1, O);
751 }
752 
753 void MipsAsmPrinter::
755  const char *Modifier) {
756  const MachineOperand &MO = MI->getOperand(opNum);
758 }
759 
760 void MipsAsmPrinter::
762  for (int i = opNum, e = MI->getNumOperands(); i != e; ++i) {
763  if (i != opNum) O << ", ";
764  printOperand(MI, i, O);
765  }
766 }
767 
769  MipsTargetStreamer &TS = getTargetStreamer();
770 
771  // MipsTargetStreamer has an initialization order problem when emitting an
772  // object file directly (see MipsTargetELFStreamer for full details). Work
773  // around it by re-initializing the PIC state here.
775 
776  // Compute MIPS architecture attributes based on the default subtarget
777  // that we'd have constructed. Module level directives aren't LTO
778  // clean anyhow.
779  // FIXME: For ifunc related functions we could iterate over and look
780  // for a feature string that doesn't match the default one.
781  const Triple &TT = TM.getTargetTriple();
784  const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
785  const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM, None);
786 
787  bool IsABICalls = STI.isABICalls();
788  const MipsABIInfo &ABI = MTM.getABI();
789  if (IsABICalls) {
791  // FIXME: This condition should be a lot more complicated that it is here.
792  // Ideally it should test for properties of the ABI and not the ABI
793  // itself.
794  // For the moment, I'm only correcting enough to make MIPS-IV work.
795  if (!isPositionIndependent() && STI.hasSym32())
797  }
798 
799  // Tell the assembler which ABI we are using
800  std::string SectionName = std::string(".mdebug.") + getCurrentABIString();
801  OutStreamer->switchSection(
803 
804  // NaN: At the moment we only support:
805  // 1. .nan legacy (default)
806  // 2. .nan 2008
807  STI.isNaN2008() ? TS.emitDirectiveNaN2008()
808  : TS.emitDirectiveNaNLegacy();
809 
810  // TODO: handle O64 ABI
811 
812  TS.updateABIInfo(STI);
813 
814  // We should always emit a '.module fp=...' but binutils 2.24 does not accept
815  // it. We therefore emit it when it contradicts the ABI defaults (-mfpxx or
816  // -mfp64) and omit it otherwise.
817  if ((ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit())) ||
818  STI.useSoftFloat())
820 
821  // We should always emit a '.module [no]oddspreg' but binutils 2.24 does not
822  // accept it. We therefore emit it when it contradicts the default or an
823  // option has changed the default (i.e. FPXX) and omit it otherwise.
824  if (ABI.IsO32() && (!STI.useOddSPReg() || STI.isABI_FPXX()))
826 
827  // Switch to the .text section.
828  OutStreamer->switchSection(getObjFileLowering().getTextSection());
829 }
830 
831 void MipsAsmPrinter::emitInlineAsmStart() const {
832  MipsTargetStreamer &TS = getTargetStreamer();
833 
834  // GCC's choice of assembler options for inline assembly code ('at', 'macro'
835  // and 'reorder') is different from LLVM's choice for generated code ('noat',
836  // 'nomacro' and 'noreorder').
837  // In order to maintain compatibility with inline assembly code which depends
838  // on GCC's assembler options being used, we have to switch to those options
839  // for the duration of the inline assembly block and then switch back.
841  TS.emitDirectiveSetAt();
844  OutStreamer->addBlankLine();
845 }
846 
847 void MipsAsmPrinter::emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
848  const MCSubtargetInfo *EndInfo) const {
849  OutStreamer->addBlankLine();
850  getTargetStreamer().emitDirectiveSetPop();
851 }
852 
853 void MipsAsmPrinter::EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol) {
854  MCInst I;
855  I.setOpcode(Mips::JAL);
856  I.addOperand(
858  OutStreamer->emitInstruction(I, STI);
859 }
860 
861 void MipsAsmPrinter::EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode,
862  unsigned Reg) {
863  MCInst I;
864  I.setOpcode(Opcode);
865  I.addOperand(MCOperand::createReg(Reg));
866  OutStreamer->emitInstruction(I, STI);
867 }
868 
869 void MipsAsmPrinter::EmitInstrRegReg(const MCSubtargetInfo &STI,
870  unsigned Opcode, unsigned Reg1,
871  unsigned Reg2) {
872  MCInst I;
873  //
874  // Because of the current td files for Mips32, the operands for MTC1
875  // appear backwards from their normal assembly order. It's not a trivial
876  // change to fix this in the td file so we adjust for it here.
877  //
878  if (Opcode == Mips::MTC1) {
879  unsigned Temp = Reg1;
880  Reg1 = Reg2;
881  Reg2 = Temp;
882  }
883  I.setOpcode(Opcode);
884  I.addOperand(MCOperand::createReg(Reg1));
885  I.addOperand(MCOperand::createReg(Reg2));
886  OutStreamer->emitInstruction(I, STI);
887 }
888 
889 void MipsAsmPrinter::EmitInstrRegRegReg(const MCSubtargetInfo &STI,
890  unsigned Opcode, unsigned Reg1,
891  unsigned Reg2, unsigned Reg3) {
892  MCInst I;
893  I.setOpcode(Opcode);
894  I.addOperand(MCOperand::createReg(Reg1));
895  I.addOperand(MCOperand::createReg(Reg2));
896  I.addOperand(MCOperand::createReg(Reg3));
897  OutStreamer->emitInstruction(I, STI);
898 }
899 
900 void MipsAsmPrinter::EmitMovFPIntPair(const MCSubtargetInfo &STI,
901  unsigned MovOpc, unsigned Reg1,
902  unsigned Reg2, unsigned FPReg1,
903  unsigned FPReg2, bool LE) {
904  if (!LE) {
905  unsigned temp = Reg1;
906  Reg1 = Reg2;
907  Reg2 = temp;
908  }
909  EmitInstrRegReg(STI, MovOpc, Reg1, FPReg1);
910  EmitInstrRegReg(STI, MovOpc, Reg2, FPReg2);
911 }
912 
913 void MipsAsmPrinter::EmitSwapFPIntParams(const MCSubtargetInfo &STI,
915  bool LE, bool ToFP) {
916  using namespace Mips16HardFloatInfo;
917 
918  unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1;
919  switch (PV) {
920  case FSig:
921  EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
922  break;
923  case FFSig:
924  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F14, LE);
925  break;
926  case FDSig:
927  EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
928  EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
929  break;
930  case DSig:
931  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
932  break;
933  case DDSig:
934  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
935  EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
936  break;
937  case DFSig:
938  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
939  EmitInstrRegReg(STI, MovOpc, Mips::A2, Mips::F14);
940  break;
941  case NoSig:
942  return;
943  }
944 }
945 
946 void MipsAsmPrinter::EmitSwapFPIntRetval(
948  bool LE) {
949  using namespace Mips16HardFloatInfo;
950 
951  unsigned MovOpc = Mips::MFC1;
952  switch (RV) {
953  case FRet:
954  EmitInstrRegReg(STI, MovOpc, Mips::V0, Mips::F0);
955  break;
956  case DRet:
957  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
958  break;
959  case CFRet:
960  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
961  break;
962  case CDRet:
963  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
964  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F2, Mips::F3, LE);
965  break;
966  case NoFPRet:
967  break;
968  }
969 }
970 
971 void MipsAsmPrinter::EmitFPCallStub(
972  const char *Symbol, const Mips16HardFloatInfo::FuncSignature *Signature) {
973  using namespace Mips16HardFloatInfo;
974 
976  bool LE = getDataLayout().isLittleEndian();
977  // Construct a local MCSubtargetInfo here.
978  // This is because the MachineFunction won't exist (but have not yet been
979  // freed) and since we're at the global level we can use the default
980  // constructed subtarget.
981  std::unique_ptr<MCSubtargetInfo> STI(TM.getTarget().createMCSubtargetInfo(
984 
985  //
986  // .global xxxx
987  //
988  OutStreamer->emitSymbolAttribute(MSymbol, MCSA_Global);
989  const char *RetType;
990  //
991  // make the comment field identifying the return and parameter
992  // types of the floating point stub
993  // # Stub function to call rettype xxxx (params)
994  //
995  switch (Signature->RetSig) {
996  case FRet:
997  RetType = "float";
998  break;
999  case DRet:
1000  RetType = "double";
1001  break;
1002  case CFRet:
1003  RetType = "complex";
1004  break;
1005  case CDRet:
1006  RetType = "double complex";
1007  break;
1008  case NoFPRet:
1009  RetType = "";
1010  break;
1011  }
1012  const char *Parms;
1013  switch (Signature->ParamSig) {
1014  case FSig:
1015  Parms = "float";
1016  break;
1017  case FFSig:
1018  Parms = "float, float";
1019  break;
1020  case FDSig:
1021  Parms = "float, double";
1022  break;
1023  case DSig:
1024  Parms = "double";
1025  break;
1026  case DDSig:
1027  Parms = "double, double";
1028  break;
1029  case DFSig:
1030  Parms = "double, float";
1031  break;
1032  case NoSig:
1033  Parms = "";
1034  break;
1035  }
1036  OutStreamer->AddComment("\t# Stub function to call " + Twine(RetType) + " " +
1037  Twine(Symbol) + " (" + Twine(Parms) + ")");
1038  //
1039  // probably not necessary but we save and restore the current section state
1040  //
1041  OutStreamer->pushSection();
1042  //
1043  // .section mips16.call.fpxxxx,"ax",@progbits
1044  //
1046  ".mips16.call.fp." + std::string(Symbol), ELF::SHT_PROGBITS,
1048  OutStreamer->switchSection(M, nullptr);
1049  //
1050  // .align 2
1051  //
1052  OutStreamer->emitValueToAlignment(4);
1053  MipsTargetStreamer &TS = getTargetStreamer();
1054  //
1055  // .set nomips16
1056  // .set nomicromips
1057  //
1060  //
1061  // .ent __call_stub_fp_xxxx
1062  // .type __call_stub_fp_xxxx,@function
1063  // __call_stub_fp_xxxx:
1064  //
1065  std::string x = "__call_stub_fp_" + std::string(Symbol);
1066  MCSymbolELF *Stub =
1067  cast<MCSymbolELF>(OutContext.getOrCreateSymbol(StringRef(x)));
1068  TS.emitDirectiveEnt(*Stub);
1069  MCSymbol *MType =
1070  OutContext.getOrCreateSymbol("__call_stub_fp_" + Twine(Symbol));
1071  OutStreamer->emitSymbolAttribute(MType, MCSA_ELF_TypeFunction);
1072  OutStreamer->emitLabel(Stub);
1073 
1074  // Only handle non-pic for now.
1076  "should not be here if we are compiling pic");
1078  //
1079  // We need to add a MipsMCExpr class to MCTargetDesc to fully implement
1080  // stubs without raw text but this current patch is for compiler generated
1081  // functions and they all return some value.
1082  // The calling sequence for non pic is different in that case and we need
1083  // to implement %lo and %hi in order to handle the case of no return value
1084  // See the corresponding method in Mips16HardFloat for details.
1085  //
1086  // mov the return address to S2.
1087  // we have no stack space to store it and we are about to make another call.
1088  // We need to make sure that the enclosing function knows to save S2
1089  // This should have already been handled.
1090  //
1091  // Mov $18, $31
1092 
1093  EmitInstrRegRegReg(*STI, Mips::OR, Mips::S2, Mips::RA, Mips::ZERO);
1094 
1095  EmitSwapFPIntParams(*STI, Signature->ParamSig, LE, true);
1096 
1097  // Jal xxxx
1098  //
1099  EmitJal(*STI, MSymbol);
1100 
1101  // fix return values
1102  EmitSwapFPIntRetval(*STI, Signature->RetSig, LE);
1103  //
1104  // do the return
1105  // if (Signature->RetSig == NoFPRet)
1106  // llvm_unreachable("should not be any stubs here with no return value");
1107  // else
1108  EmitInstrReg(*STI, Mips::JR, Mips::S2);
1109 
1111  OutStreamer->emitLabel(Tmp);
1114  const MCExpr *T_min_E = MCBinaryExpr::createSub(T, E, OutContext);
1115  OutStreamer->emitELFSize(Stub, T_min_E);
1116  TS.emitDirectiveEnd(x);
1117  OutStreamer->popSection();
1118 }
1119 
1121  // Emit needed stubs
1122  //
1123  for (std::map<
1124  const char *,
1125  const Mips16HardFloatInfo::FuncSignature *>::const_iterator
1126  it = StubsNeeded.begin();
1127  it != StubsNeeded.end(); ++it) {
1128  const char *Symbol = it->first;
1129  const Mips16HardFloatInfo::FuncSignature *Signature = it->second;
1130  EmitFPCallStub(Symbol, Signature);
1131  }
1132  // return to the text section
1134 }
1135 
1136 void MipsAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind) {
1137  const uint8_t NoopsInSledCount = Subtarget->isGP64bit() ? 15 : 11;
1138  // For mips32 we want to emit the following pattern:
1139  //
1140  // .Lxray_sled_N:
1141  // ALIGN
1142  // B .tmpN
1143  // 11 NOP instructions (44 bytes)
1144  // ADDIU T9, T9, 52
1145  // .tmpN
1146  //
1147  // We need the 44 bytes (11 instructions) because at runtime, we'd
1148  // be patching over the full 48 bytes (12 instructions) with the following
1149  // pattern:
1150  //
1151  // ADDIU SP, SP, -8
1152  // NOP
1153  // SW RA, 4(SP)
1154  // SW T9, 0(SP)
1155  // LUI T9, %hi(__xray_FunctionEntry/Exit)
1156  // ORI T9, T9, %lo(__xray_FunctionEntry/Exit)
1157  // LUI T0, %hi(function_id)
1158  // JALR T9
1159  // ORI T0, T0, %lo(function_id)
1160  // LW T9, 0(SP)
1161  // LW RA, 4(SP)
1162  // ADDIU SP, SP, 8
1163  //
1164  // We add 52 bytes to t9 because we want to adjust the function pointer to
1165  // the actual start of function i.e. the address just after the noop sled.
1166  // We do this because gp displacement relocation is emitted at the start of
1167  // of the function i.e after the nop sled and to correctly calculate the
1168  // global offset table address, t9 must hold the address of the instruction
1169  // containing the gp displacement relocation.
1170  // FIXME: Is this correct for the static relocation model?
1171  //
1172  // For mips64 we want to emit the following pattern:
1173  //
1174  // .Lxray_sled_N:
1175  // ALIGN
1176  // B .tmpN
1177  // 15 NOP instructions (60 bytes)
1178  // .tmpN
1179  //
1180  // We need the 60 bytes (15 instructions) because at runtime, we'd
1181  // be patching over the full 64 bytes (16 instructions) with the following
1182  // pattern:
1183  //
1184  // DADDIU SP, SP, -16
1185  // NOP
1186  // SD RA, 8(SP)
1187  // SD T9, 0(SP)
1188  // LUI T9, %highest(__xray_FunctionEntry/Exit)
1189  // ORI T9, T9, %higher(__xray_FunctionEntry/Exit)
1190  // DSLL T9, T9, 16
1191  // ORI T9, T9, %hi(__xray_FunctionEntry/Exit)
1192  // DSLL T9, T9, 16
1193  // ORI T9, T9, %lo(__xray_FunctionEntry/Exit)
1194  // LUI T0, %hi(function_id)
1195  // JALR T9
1196  // ADDIU T0, T0, %lo(function_id)
1197  // LD T9, 0(SP)
1198  // LD RA, 8(SP)
1199  // DADDIU SP, SP, 16
1200  //
1201  OutStreamer->emitCodeAlignment(4, &getSubtargetInfo());
1202  auto CurSled = OutContext.createTempSymbol("xray_sled_", true);
1203  OutStreamer->emitLabel(CurSled);
1205 
1206  // Emit "B .tmpN" instruction, which jumps over the nop sled to the actual
1207  // start of function
1208  const MCExpr *TargetExpr = MCSymbolRefExpr::create(
1209  Target, MCSymbolRefExpr::VariantKind::VK_None, OutContext);
1211  .addReg(Mips::ZERO)
1212  .addReg(Mips::ZERO)
1213  .addExpr(TargetExpr));
1214 
1215  for (int8_t I = 0; I < NoopsInSledCount; I++)
1217  .addReg(Mips::ZERO)
1218  .addReg(Mips::ZERO)
1219  .addImm(0));
1220 
1221  OutStreamer->emitLabel(Target);
1222 
1223  if (!Subtarget->isGP64bit()) {
1225  MCInstBuilder(Mips::ADDiu)
1226  .addReg(Mips::T9)
1227  .addReg(Mips::T9)
1228  .addImm(0x34));
1229  }
1230 
1231  recordSled(CurSled, MI, Kind, 2);
1232 }
1233 
1235  EmitSled(MI, SledKind::FUNCTION_ENTER);
1236 }
1237 
1239  EmitSled(MI, SledKind::FUNCTION_EXIT);
1240 }
1241 
1243  EmitSled(MI, SledKind::TAIL_CALL);
1244 }
1245 
1247  raw_ostream &OS) {
1248  // TODO: implement
1249 }
1250 
1251 // Emit .dtprelword or .dtpreldword directive
1252 // and value for debug thread local expression.
1253 void MipsAsmPrinter::emitDebugValue(const MCExpr *Value, unsigned Size) const {
1254  if (auto *MipsExpr = dyn_cast<MipsMCExpr>(Value)) {
1255  if (MipsExpr && MipsExpr->getKind() == MipsMCExpr::MEK_DTPREL) {
1256  switch (Size) {
1257  case 4:
1258  OutStreamer->emitDTPRel32Value(MipsExpr->getSubExpr());
1259  break;
1260  case 8:
1261  OutStreamer->emitDTPRel64Value(MipsExpr->getSubExpr());
1262  break;
1263  default:
1264  llvm_unreachable("Unexpected size of expression value.");
1265  }
1266  return;
1267  }
1268  }
1270 }
1271 
1272 // Align all targets of indirect branches on bundle size. Used only if target
1273 // is NaCl.
1274 void MipsAsmPrinter::NaClAlignIndirectJumpTargets(MachineFunction &MF) {
1275  // Align all blocks that are jumped to through jump table.
1276  if (MachineJumpTableInfo *JtInfo = MF.getJumpTableInfo()) {
1277  const std::vector<MachineJumpTableEntry> &JT = JtInfo->getJumpTables();
1278  for (const auto &I : JT) {
1279  const std::vector<MachineBasicBlock *> &MBBs = I.MBBs;
1280 
1281  for (MachineBasicBlock *MBB : MBBs)
1283  }
1284  }
1285 
1286  // If basic block address is taken, block can be target of indirect branch.
1287  for (auto &MBB : MF) {
1288  if (MBB.hasAddressTaken())
1290  }
1291 }
1292 
1293 bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
1294  return (Opcode == Mips::LONG_BRANCH_LUi
1295  || Opcode == Mips::LONG_BRANCH_LUi2Op
1296  || Opcode == Mips::LONG_BRANCH_LUi2Op_64
1297  || Opcode == Mips::LONG_BRANCH_ADDiu
1298  || Opcode == Mips::LONG_BRANCH_ADDiu2Op
1299  || Opcode == Mips::LONG_BRANCH_DADDiu
1300  || Opcode == Mips::LONG_BRANCH_DADDiu2Op);
1301 }
1302 
1303 // Force static initialization.
1309 }
i
i
Definition: README.txt:29
FFSig
@ FFSig
Definition: Mips16HardFloat.cpp:97
ABI
Generic address nodes are lowered to some combination of target independent and machine specific ABI
Definition: Relocation.txt:34
llvm::MCContext::getObjectFileInfo
const MCObjectFileInfo * getObjectFileInfo() const
Definition: MCContext.h:450
llvm::AsmPrinter::isPositionIndependent
bool isPositionIndependent() const
Definition: AsmPrinter.cpp:373
llvm::MachineOperand::MO_BlockAddress
@ MO_BlockAddress
Address of a basic block.
Definition: MachineOperand.h:62
llvm::MipsTargetMachine
Definition: MipsTargetMachine.h:27
llvm::MipsFunctionInfo::StubsNeeded
std::map< const char *, const Mips16HardFloatInfo::FuncSignature * > StubsNeeded
Definition: MipsMachineFunction.h:87
llvm::MachineBasicBlock::pred_begin
pred_iterator pred_begin()
Definition: MachineBasicBlock.h:326
MipsBaseInfo.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:104
MachineInstr.h
llvm::MachineOperand::MO_Immediate
@ MO_Immediate
Immediate operand.
Definition: MachineOperand.h:52
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
llvm::MipsTargetStreamer::emitDirectiveOptionPic0
virtual void emitDirectiveOptionPic0()
Definition: MipsTargetStreamer.cpp:80
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::MipsTargetMachine::getABI
const MipsABIInfo & getABI() const
Definition: MipsTargetMachine.h:75
llvm::MipsAsmPrinter::PrintDebugValueComment
void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS)
Definition: MipsAsmPrinter.cpp:1246
it
into xmm2 addss xmm2 xmm1 xmm3 addss xmm3 movaps xmm0 unpcklps xmm0 ret seems silly when it could just be one addps Expand libm rounding functions main should enable SSE DAZ mode and other fast SSE modes Think about doing i64 math in SSE regs on x86 This testcase should have no SSE instructions in it
Definition: README-SSE.txt:81
llvm::drop_begin
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
Definition: STLExtras.h:280
llvm::Mips16HardFloatInfo::FPParamVariant
FPParamVariant
Definition: Mips16HardFloatInfo.h:31
llvm::ISD::OR
@ OR
Definition: ISDOpcodes.h:667
llvm::AsmPrinter::emitBasicBlockEnd
virtual void emitBasicBlockEnd(const MachineBasicBlock &MBB)
Targets can override this to emit stuff at the end of a basic block.
Definition: AsmPrinter.cpp:3541
llvm::MCOperand::createExpr
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:162
llvm::MachineBasicBlock::getBasicBlock
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
Definition: MachineBasicBlock.h:205
llvm::AsmPrinter::recordSled
void recordSled(MCSymbol *Sled, const MachineInstr &MI, SledKind Kind, uint8_t Version=0)
Definition: AsmPrinter.cpp:3770
llvm::MipsABIInfo
Definition: MipsABIInfo.h:22
llvm::HexagonISD::JT
@ JT
Definition: HexagonISelLowering.h:52
T
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:76
llvm::MachineFunction::getContext
MCContext & getContext() const
Definition: MachineFunction.h:608
llvm::MipsTargetStreamer::emitDirectiveEnt
virtual void emitDirectiveEnt(const MCSymbol &Symbol)
Definition: MipsTargetStreamer.cpp:76
StringRef.h
llvm::MipsTargetStreamer::emitDirectiveSetMips16
virtual void emitDirectiveSetMips16()
Definition: MipsTargetStreamer.cpp:54
llvm::MipsAsmPrinter::printRegisterList
void printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:761
llvm::MachineConstantPoolEntry::MachineCPVal
MachineConstantPoolValue * MachineCPVal
Definition: MachineConstantPool.h:72
llvm::AsmPrinter::MAI
const MCAsmInfo * MAI
Target Asm Printer information.
Definition: AsmPrinter.h:87
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:145
MCSectionELF.h
llvm::AsmPrinter::emitGlobalConstant
void emitGlobalConstant(const DataLayout &DL, const Constant *CV)
Print a general LLVM constant to the .s file.
Definition: AsmPrinter.cpp:3295
llvm::Mips::CondCode
CondCode
Definition: MipsInstPrinter.h:32
InlineAsm.h
llvm::MachineOperand::getBlockAddress
const BlockAddress * getBlockAddress() const
Definition: MachineOperand.h:577
ErrorHandling.h
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::MipsTargetStreamer::setPic
virtual void setPic(bool Value)
Definition: MipsTargetStreamer.h:28
llvm::MipsSubtarget::hasMips64r6
bool hasMips64r6() const
Definition: MipsSubtarget.h:279
llvm::MipsII::MO_JALR
@ MO_JALR
Helper operand used to generate R_MIPS_JALR.
Definition: MipsBaseInfo.h:95
MCInstBuilder.h
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
MachineBasicBlock.h
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:125
llvm::MachineBasicBlock::const_pred_iterator
std::vector< MachineBasicBlock * >::const_iterator const_pred_iterator
Definition: MachineBasicBlock.h:315
llvm::MipsTargetStreamer::emitFrame
virtual void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg)
Definition: MipsTargetStreamer.cpp:83
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:234
llvm::MCRegisterInfo::getEncodingValue
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
Definition: MCRegisterInfo.h:553
MCObjectFileInfo.h
llvm::MipsII::MO_TPREL_HI
@ MO_TPREL_HI
MO_TPREL_HI/LO - Represents the hi and low part of the offset from.
Definition: MipsBaseInfo.h:73
EmitJalrReloc
cl::opt< bool > EmitJalrReloc
llvm::MipsAsmPrinter::PrintAsmMemoryOperand
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
Definition: MipsAsmPrinter.cpp:618
llvm::MipsAsmPrinter::LowerPATCHABLE_FUNCTION_EXIT
void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI)
Definition: MipsAsmPrinter.cpp:1238
llvm::MachineOperand::isMCSymbol
bool isMCSymbol() const
Definition: MachineOperand.h:349
MachineJumpTableInfo.h
llvm::MachineConstantPoolEntry::Val
union llvm::MachineConstantPoolEntry::@189 Val
The constant itself.
llvm::AsmPrinter::PrintSymbolOperand
virtual void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &OS)
Print the MachineOperand as a symbol.
Definition: AsmPrinterInlineAsm.cpp:457
llvm::AsmPrinter::emitAlignment
void emitAlignment(Align Alignment, const GlobalObject *GV=nullptr, unsigned MaxBytesToEmit=0) const
Emit an alignment directive to the specified power of two boundary.
Definition: AsmPrinter.cpp:2676
llvm::MipsAsmPrinter::MipsFI
const MipsFunctionInfo * MipsFI
Definition: MipsAsmPrinter.h:118
llvm::MipsTargetStreamer::emitDirectiveModuleFP
virtual void emitDirectiveModuleFP()
Definition: MipsTargetStreamer.cpp:151
llvm::AsmPrinter::SledKind
SledKind
Definition: AsmPrinter.h:324
llvm::MipsSubtarget::hasSym32
bool hasSym32() const
Definition: MipsSubtarget.h:297
llvm::MipsTargetStreamer::emitDirectiveInsn
virtual void emitDirectiveInsn()
Definition: MipsTargetStreamer.cpp:82
llvm::MipsII::MO_GOTTPREL
@ MO_GOTTPREL
MO_GOTTPREL - Represents the offset from the thread pointer (Initial.
Definition: MipsBaseInfo.h:69
llvm::MipsSubtarget::useOddSPReg
bool useOddSPReg() const
Definition: MipsSubtarget.h:288
llvm::ELF::SHF_ALLOC
@ SHF_ALLOC
Definition: ELF.h:1038
llvm::MipsAsmPrinter::MCInstLowering
MipsMCInstLower MCInstLowering
Definition: MipsAsmPrinter.h:119
llvm::max
Expected< ExpressionValue > max(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:337
llvm::MipsTargetMachine::isLittleEndian
bool isLittleEndian() const
Definition: MipsTargetMachine.h:74
llvm::MipsTargetStreamer::emitDirectiveSetNoAt
virtual void emitDirectiveSetNoAt()
Definition: MipsTargetStreamer.cpp:74
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::MCSectionELF
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:26
MipsTargetMachine.h
llvm::MipsSubtarget::isNaN2008
bool isNaN2008() const
Definition: MipsSubtarget.h:290
DSig
@ DSig
Definition: Mips16HardFloat.cpp:98
llvm::MipsTargetStreamer::emitDirectiveSetAt
virtual void emitDirectiveSetAt()
Definition: MipsTargetStreamer.cpp:70
llvm::MachineOperand::getOffset
int64_t getOffset() const
Return the offset from the symbol in this operand.
Definition: MachineOperand.h:609
llvm::MipsTargetStreamer::emitDirectiveSetNoMacro
virtual void emitDirectiveSetNoMacro()
Definition: MipsTargetStreamer.cpp:59
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1628
llvm::MipsII::MO_TLSGD
@ MO_TLSGD
MO_TLSGD - Represents the offset into the global offset table at which.
Definition: MipsBaseInfo.h:58
llvm::MipsFunctionInfo
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
Definition: MipsMachineFunction.h:25
llvm::MachineOperand::getMCSymbol
MCSymbol * getMCSymbol() const
Definition: MachineOperand.h:582
llvm::MachineOperand::MO_Register
@ MO_Register
Register operand.
Definition: MachineOperand.h:51
llvm::AsmPrinter::EmitToStreamer
void EmitToStreamer(MCStreamer &S, const MCInst &Inst)
Definition: AsmPrinter.cpp:401
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
llvm::MipsInstPrinter::getRegisterName
static const char * getRegisterName(unsigned RegNo)
llvm::MipsTargetStreamer::emitDirectiveSetNoMips16
virtual void emitDirectiveSetNoMips16()
Definition: MipsTargetStreamer.cpp:55
llvm::MCInst::setOpcode
void setOpcode(unsigned Op)
Definition: MCInst.h:197
llvm::MCSymbolELF
Definition: MCSymbolELF.h:14
llvm::MipsTargetStreamer::emitDirectiveSetMacro
virtual void emitDirectiveSetMacro()
Definition: MipsTargetStreamer.cpp:58
llvm::MachineBasicBlock::getSymbol
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
Definition: MachineBasicBlock.cpp:57
llvm::MCStreamer
Streaming machine code generation interface.
Definition: MCStreamer.h:212
llvm::MipsAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER
void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI)
Definition: MipsAsmPrinter.cpp:1234
llvm::MipsAsmPrinter::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: MipsAsmPrinter.cpp:78
bb
< i1 > br i1 label label bb bb
Definition: README.txt:978
llvm::MCDR_DataRegion
@ MCDR_DataRegion
.data_region
Definition: MCDirectives.h:60
llvm::MCContext::getOrCreateSymbol
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:207
llvm::MipsMCInstLower::Initialize
void Initialize(MCContext *C)
Definition: MipsMCInstLower.cpp:31
llvm::Log2_64
unsigned Log2_64(uint64_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition: MathExtras.h:629
llvm::MipsII::MO_GOT_OFST
@ MO_GOT_OFST
Definition: MipsBaseInfo.h:81
ELF.h
TargetMachine.h
llvm::MipsAsmPrinter::emitBasicBlockEnd
void emitBasicBlockEnd(const MachineBasicBlock &MBB) override
Targets can override this to emit stuff at the end of a basic block.
Definition: MipsAsmPrinter.cpp:463
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::MipsAsmPrinter::emitFunctionBodyEnd
void emitFunctionBodyEnd() override
EmitFunctionBodyEnd - Targets can override this to emit stuff after the last basic block in the funct...
Definition: MipsAsmPrinter.cpp:443
llvm::MipsTargetStreamer::emitMask
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)
Definition: MipsTargetStreamer.cpp:85
SmallString.h
MipsTargetStreamer.h
llvm::MachineOperand::MO_GlobalAddress
@ MO_GlobalAddress
Address of a global value.
Definition: MachineOperand.h:61
llvm::Triple::str
const std::string & str() const
Definition: Triple.h:404
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::getImm
int64_t getImm() const
Definition: MachineOperand.h:546
DRet
@ DRet
Definition: Mips16HardFloat.cpp:64
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:754
llvm::MipsAsmPrinter::emitFunctionEntryLabel
void emitFunctionEntryLabel() override
EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.
Definition: MipsAsmPrinter.cpp:396
llvm::MipsSubtarget::inMips16Mode
bool inMips16Mode() const
Definition: MipsSubtarget.h:303
llvm::AsmPrinter::OutStreamer
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
Definition: AsmPrinter.h:96
llvm::MCStreamer::emitRelocDirective
virtual Optional< std::pair< bool, std::string > > emitRelocDirective(const MCExpr &Offset, StringRef Name, const MCExpr *Expr, SMLoc Loc, const MCSubtargetInfo &STI)
Record a relocation described by the .reloc directive.
Definition: MCStreamer.h:1084
Twine.h
MCSymbolELF.h
MCContext.h
Y
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
llvm::MCStreamer::emitLabel
virtual void emitLabel(MCSymbol *Symbol, SMLoc Loc=SMLoc())
Emit a label for Symbol into the current section.
Definition: MCStreamer.cpp:423
MCSymbol.h
llvm::MCObjectFileInfo::isPositionIndependent
bool isPositionIndependent() const
Definition: MCObjectFileInfo.h:437
Mips.h
llvm::MCContext::getELFSection
MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)
Definition: MCContext.h:563
MCInst.h
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::MipsII::MO_HIGHEST
@ MO_HIGHEST
Definition: MipsBaseInfo.h:86
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:48
llvm::Mips16HardFloatInfo::FuncSignature
Definition: Mips16HardFloatInfo.h:33
llvm::MipsAsmPrinter::PrintAsmOperand
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.
Definition: MipsAsmPrinter.cpp:513
llvm::AsmPrinter::CurrentFnSym
MCSymbol * CurrentFnSym
The symbol for the current function.
Definition: AsmPrinter.h:118
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:54
llvm::MipsABIInfo::ABI::O32
@ O32
llvm::AArch64CC::LE
@ LE
Definition: AArch64BaseInfo.h:268
llvm::MipsAsmPrinter::printMemOperand
void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:722
llvm::MipsMCInstLower::Lower
void Lower(const MachineInstr *MI, MCInst &OutMI) const
Definition: MipsMCInstLower.cpp:315
llvm::MipsTargetStreamer::emitDirectiveSetNoReorder
virtual void emitDirectiveSetNoReorder()
Definition: MipsTargetStreamer.cpp:57
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:577
llvm::MCSymbol::getName
StringRef getName() const
getName - Get the symbol name.
Definition: MCSymbol.h:198
llvm::MipsAsmPrinter::Subtarget
const MipsSubtarget * Subtarget
Definition: MipsAsmPrinter.h:117
llvm::MipsII::MO_ABS_LO
@ MO_ABS_LO
Definition: MipsBaseInfo.h:53
llvm::MCObjectFileInfo::getTextSection
MCSection * getTextSection() const
Definition: MCObjectFileInfo.h:267
FDSig
@ FDSig
Definition: Mips16HardFloat.cpp:97
llvm::MCSymbol::print
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:58
llvm::Mips16HardFloatInfo::FuncSignature::RetSig
FPReturnVariant RetSig
Definition: Mips16HardFloatInfo.h:35
llvm::None
const NoneType None
Definition: None.h:24
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::MipsAsmPrinter::printFCCOperand
void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier=nullptr)
Definition: MipsAsmPrinter.cpp:754
llvm::MCInst::addOperand
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
llvm::SmallString< 128 >
llvm::MipsSubtarget::isABI_FPXX
bool isABI_FPXX() const
Definition: MipsSubtarget.h:237
llvm::MIPS_NACL_BUNDLE_ALIGN
static const Align MIPS_NACL_BUNDLE_ALIGN
Definition: MipsMCNaCl.h:18
llvm::MachineBasicBlock::setAlignment
void setAlignment(Align A)
Set alignment of the basic block.
Definition: MachineBasicBlock.h:532
llvm::MipsSubtarget::isLittle
bool isLittle() const
Definition: MipsSubtarget.h:284
llvm::MipsII::MO_GOT_CALL
@ MO_GOT_CALL
MO_GOT_CALL - Represents the offset into the global offset table at which the address of a call site ...
Definition: MipsBaseInfo.h:44
llvm::AsmPrinter::emitMachineConstantPoolValue
virtual void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV)
Definition: AsmPrinter.cpp:3306
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:656
llvm::Mips16HardFloatInfo::FPReturnVariant
FPReturnVariant
Definition: Mips16HardFloatInfo.h:25
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:626
BasicBlock.h
llvm::cl::opt< bool >
llvm::MipsAsmPrinter::getCurrentABIString
const char * getCurrentABIString() const
Emit Set directives.
Definition: MipsAsmPrinter.cpp:387
llvm::MipsABIInfo::ABI::N64
@ N64
llvm::RISCVFenceField::O
@ O
Definition: RISCVBaseInfo.h:240
llvm::MipsAsmPrinter::isBlockOnlyReachableByFallthrough
bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const override
isBlockOnlyReachableByFallthough - Return true if the basic block has exactly one predecessor and the...
Definition: MipsAsmPrinter.cpp:473
llvm::MipsSubtarget::hasMips32r6
bool hasMips32r6() const
Definition: MipsSubtarget.h:271
llvm::Twine::utohexstr
static Twine utohexstr(const uint64_t &Val)
Definition: Twine.h:408
llvm::MipsAsmPrinter::printMemOperandEA
void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:745
llvm::MachineBasicBlock::pred_end
pred_iterator pred_end()
Definition: MachineBasicBlock.h:328
llvm::MachineOperand::getTargetFlags
unsigned getTargetFlags() const
Definition: MachineOperand.h:220
llvm::AsmPrinter::GetCPISymbol
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
Definition: AsmPrinter.cpp:3342
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:320
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
CDRet
@ CDRet
Definition: Mips16HardFloat.cpp:64
llvm::MachineBasicBlock::hasAddressTaken
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
Definition: MachineBasicBlock.h:220
MipsTargetInfo.h
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:126
llvm::MCOperand::isValid
bool isValid() const
Definition: MCInst.h:60
llvm::AsmPrinter::GetBlockAddressSymbol
MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const
Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.
Definition: AsmPrinter.cpp:3332
MipsInstPrinter.h
llvm::DataLayout::isLittleEndian
bool isLittleEndian() const
Layout endianness...
Definition: DataLayout.h:244
llvm::TargetRegisterInfo::getFrameRegister
virtual Register getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
LLVMInitializeMipsAsmPrinter
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsAsmPrinter()
Definition: MipsAsmPrinter.cpp:1304
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::MipsAsmPrinter::printOperand
void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:656
MipsMachineFunction.h
FRet
@ FRet
Definition: Mips16HardFloat.cpp:64
DDSig
@ DDSig
Definition: Mips16HardFloat.cpp:98
llvm::MCInstBuilder
Definition: MCInstBuilder.h:21
MachineConstantPool.h
llvm::StringRef::lower
LLVM_NODISCARD std::string lower() const
Definition: StringRef.cpp:112
llvm::MipsTargetStreamer::emitDirectiveNaN2008
virtual void emitDirectiveNaN2008()
Definition: MipsTargetStreamer.cpp:78
llvm::MachineOperand::getType
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
Definition: MachineOperand.h:218
llvm::MipsAsmPrinter::emitDebugValue
void emitDebugValue(const MCExpr *Value, unsigned Size) const override
Emit the directive and value for debug thread local expression.
Definition: MipsAsmPrinter.cpp:1253
llvm::MipsAsmPrinter::emitFrameDirective
void emitFrameDirective()
Frame Directive.
Definition: MipsAsmPrinter.cpp:376
llvm::MachineFunction::getConstantPool
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
Definition: MachineFunction.h:688
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineConstantPoolEntry::isMachineConstantPoolEntry
bool isMachineConstantPoolEntry() const
isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry is indeed a target specific ...
Definition: MachineConstantPool.h:93
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
llvm::X86AS::FS
@ FS
Definition: X86.h:192
MipsMCNaCl.h
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:672
llvm::MCBinaryExpr::createSub
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:610
llvm::AsmPrinter::MF
MachineFunction * MF
The current machine function.
Definition: AsmPrinter.h:99
llvm::MipsII::MO_GOT_DISP
@ MO_GOT_DISP
Definition: MipsBaseInfo.h:79
MipsMCTargetDesc.h
llvm::getTheMipsTarget
Target & getTheMipsTarget()
Definition: MipsTargetInfo.cpp:13
llvm::AsmPrinter::OutContext
MCContext & OutContext
This is the context for the output file that we are streaming.
Definition: AsmPrinter.h:91
llvm::MipsAsmPrinter::emitStartOfAsmFile
void emitStartOfAsmFile(Module &M) override
This virtual method can be overridden by targets that want to emit something at the start of their fi...
Definition: MipsAsmPrinter.cpp:768
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:359
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::MipsTargetStreamer::emitDirectiveAbiCalls
virtual void emitDirectiveAbiCalls()
Definition: MipsTargetStreamer.cpp:77
llvm::MipsTargetStreamer::emitDirectiveNaNLegacy
virtual void emitDirectiveNaNLegacy()
Definition: MipsTargetStreamer.cpp:79
llvm::MipsABIInfo::ABI::N32
@ N32
llvm::MCSymbolRefExpr
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:192
llvm::MachineBasicBlock::pred_empty
bool pred_empty() const
Definition: MachineBasicBlock.h:341
llvm::MachineFunction
Definition: MachineFunction.h:257
Triple.h
llvm::MipsII::MO_TPREL_LO
@ MO_TPREL_LO
Definition: MipsBaseInfo.h:74
llvm::AsmPrinter::emitDebugValue
virtual void emitDebugValue(const MCExpr *Value, unsigned Size) const
Emit the directive and value for debug thread local expression.
Definition: AsmPrinter.cpp:874
llvm::AsmPrinter::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: AsmPrinter.h:376
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:779
llvm::MipsII::MO_GOT
@ MO_GOT
MO_GOT - Represents the offset into the global offset table at which the address the relocation entry...
Definition: MipsBaseInfo.h:38
llvm::MCRegisterInfo::getRARegister
MCRegister getRARegister() const
This method should return the register where the return address can be found.
Definition: MCRegisterInfo.h:437
llvm::MachineOperand::getMBB
MachineBasicBlock * getMBB() const
Definition: MachineOperand.h:561
DataLayout.h
llvm::MachineBasicBlock::isEHPad
bool isEHPad() const
Returns true if the block is a landing pad.
Definition: MachineBasicBlock.h:549
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::MipsTargetStreamer::updateABIInfo
void updateABIInfo(const PredicateLibrary &P)
Definition: MipsTargetStreamer.h:174
llvm::MipsAsmPrinter::LowerPATCHABLE_TAIL_CALL
void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI)
Definition: MipsAsmPrinter.cpp:1242
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
NoFPRet
@ NoFPRet
Definition: Mips16HardFloat.cpp:64
llvm::MCOperand::createReg
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:134
llvm::AsmPrinter::SledKind::FUNCTION_EXIT
@ FUNCTION_EXIT
TargetLoweringObjectFile.h
llvm::MachineOperand::MO_MachineBasicBlock
@ MO_MachineBasicBlock
MachineBasicBlock reference.
Definition: MachineOperand.h:55
TargetSubtargetInfo.h
llvm::TargetMachine::getTargetFeatureString
StringRef getTargetFeatureString() const
Definition: TargetMachine.h:128
llvm::getTheMips64elTarget
Target & getTheMips64elTarget()
Definition: MipsTargetInfo.cpp:25
llvm::MipsTargetStreamer::emitDirectiveModuleOddSPReg
virtual void emitDirectiveModuleOddSPReg()
Definition: MipsTargetStreamer.cpp:153
llvm::getTheMips64Target
Target & getTheMips64Target()
Definition: MipsTargetInfo.cpp:21
llvm::MipsAsmPrinter::emitFunctionBodyStart
void emitFunctionBodyStart() override
EmitFunctionBodyStart - Targets can override this to emit stuff before the first basic block in the f...
Definition: MipsAsmPrinter.cpp:422
llvm::MipsSubtarget
Definition: MipsSubtarget.h:39
CFRet
@ CFRet
Definition: Mips16HardFloat.cpp:64
llvm::MCContext::createTempSymbol
MCSymbol * createTempSymbol()
Create a temporary symbol with a unique name.
Definition: MCContext.cpp:324
emitDirectiveRelocJalr
static void emitDirectiveRelocJalr(const MachineInstr &MI, MCContext &OutContext, TargetMachine &TM, MCStreamer &OutStreamer, const MipsSubtarget &Subtarget)
Definition: MipsAsmPrinter.cpp:157
MipsMCInstLower.h
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MipsSubtarget::inMicroMipsMode
bool inMicroMipsMode() const
Definition: MipsSubtarget.h:314
llvm::AsmPrinter::SledKind::TAIL_CALL
@ TAIL_CALL
MipsAsmPrinter.h
Callee
amdgpu Simplify well known AMD library false FunctionCallee Callee
Definition: AMDGPULibCalls.cpp:186
llvm::MipsTargetStreamer::emitFMask
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)
Definition: MipsTargetStreamer.cpp:86
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
Attributes.h
llvm::MipsSubtarget::isGP64bit
bool isGP64bit() const
Definition: MipsSubtarget.h:292
llvm::MipsII::MO_GPOFF_LO
@ MO_GPOFF_LO
Definition: MipsBaseInfo.h:78
llvm::MipsMCExpr::MEK_DTPREL
@ MEK_DTPREL
Definition: MipsMCExpr.h:24
llvm::Target::createMCSubtargetInfo
MCSubtargetInfo * createMCSubtargetInfo(StringRef TheTriple, StringRef CPU, StringRef Features) const
createMCSubtargetInfo - Create a MCSubtargetInfo implementation.
Definition: TargetRegistry.h:455
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
llvm::MipsTargetStreamer::emitDirectiveSetMicroMips
virtual void emitDirectiveSetMicroMips()
Definition: MipsTargetStreamer.cpp:51
llvm::MachineConstantPoolEntry
This class is a data container for one entry in a MachineConstantPool.
Definition: MachineConstantPool.h:67
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:622
llvm::TargetRegisterInfo::getRegSizeInBits
unsigned getRegSizeInBits(const TargetRegisterClass &RC) const
Return the size in bits of a register from class RC.
Definition: TargetRegisterInfo.h:277
llvm::MipsAsmPrinter::printSavedRegsBitmask
void printSavedRegsBitmask()
Definition: MipsAsmPrinter.cpp:323
llvm::MachineConstantPool::getConstants
const std::vector< MachineConstantPoolEntry > & getConstants() const
Definition: MachineConstantPool.h:145
llvm::MipsTargetStreamer::forbidModuleDirective
void forbidModuleDirective()
Definition: MipsTargetStreamer.h:167
DFSig
@ DFSig
Definition: Mips16HardFloat.cpp:98
llvm::AsmPrinter::getSubtargetInfo
const MCSubtargetInfo & getSubtargetInfo() const
Return information about subtarget.
Definition: AsmPrinter.cpp:396
llvm::ilist_iterator
Iterator for intrusive lists based on ilist_node.
Definition: ilist_iterator.h:57
MachineFrameInfo.h
llvm::DataLayout::getPrivateGlobalPrefix
StringRef getPrivateGlobalPrefix() const
Definition: DataLayout.h:334
llvm::SectionName
Definition: DWARFSection.h:21
MipsABIInfo.h
llvm::MachineOperand::getIndex
int getIndex() const
Definition: MachineOperand.h:566
Casting.h
llvm::Mips::MipsFCCToString
const char * MipsFCCToString(Mips::CondCode CC)
Definition: MipsInstPrinter.cpp:36
llvm::MipsTargetStreamer
Definition: MipsTargetStreamer.h:24
Function.h
llvm::MipsTargetStreamer::setUsesMicroMips
virtual void setUsesMicroMips()
Definition: MipsTargetStreamer.cpp:53
x
TODO unsigned x
Definition: README.txt:10
llvm::MipsSubtarget::isABICalls
bool isABICalls() const
Definition: MipsSubtarget.h:285
llvm::Mips16HardFloatInfo::FuncSignature::ParamSig
FPParamVariant ParamSig
Definition: Mips16HardFloatInfo.h:34
llvm::MipsAsmPrinter::emitInstruction
void emitInstruction(const MachineInstr *MI) override
Targets should implement this to emit instructions.
Definition: MipsAsmPrinter.cpp:183
llvm::MCSymbolRefExpr::create
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:386
llvm::MachineBasicBlock::isLayoutSuccessor
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
Definition: MachineBasicBlock.cpp:913
llvm::MCSA_Global
@ MCSA_Global
.type _foo, @gnu_unique_object
Definition: MCDirectives.h:30
llvm::MIPS_MC::selectMipsCPU
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
Definition: MipsMCTargetDesc.cpp:48
llvm::MachineOperand::isImm
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Definition: MachineOperand.h:322
llvm::MCSA_ELF_TypeFunction
@ MCSA_ELF_TypeFunction
.type _foo, STT_FUNC # aka @function
Definition: MCDirectives.h:23
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:83
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:105
llvm::MipsII::MO_ABS_HI
@ MO_ABS_HI
MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol address.
Definition: MipsBaseInfo.h:52
llvm::MipsII::MO_GPOFF_HI
@ MO_GPOFF_HI
Definition: MipsBaseInfo.h:77
Instructions.h
llvm::TargetMachine::getTargetCPU
StringRef getTargetCPU() const
Definition: TargetMachine.h:127
llvm::AsmPrinter::TM
TargetMachine & TM
Target machine description.
Definition: AsmPrinter.h:84
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:278
llvm::InlineAsm::getNumOperandRegisters
static unsigned getNumOperandRegisters(unsigned Flag)
getNumOperandRegisters - Extract the number of registers field from the inline asm operand flag.
Definition: InlineAsm.h:355
llvm::ELF::SHT_PROGBITS
@ SHT_PROGBITS
Definition: ELF.h:955
llvm::MipsSubtarget::isTargetNaCl
bool isTargetNaCl() const
Definition: MipsSubtarget.h:355
llvm::MipsII::MO_GPREL
@ MO_GPREL
MO_GPREL - Represents the offset from the current gp value to be used for the relocatable object file...
Definition: MipsBaseInfo.h:48
llvm::MipsTargetStreamer::emitDirectiveSetPop
virtual void emitDirectiveSetPop()
Definition: MipsTargetStreamer.cpp:107
llvm::MipsTargetStreamer::emitDirectiveEnd
virtual void emitDirectiveEnd(StringRef Name)
Definition: MipsTargetStreamer.cpp:75
llvm::AsmPrinter::getObjFileLowering
const TargetLoweringObjectFile & getObjFileLowering() const
Return information about object file lowering.
Definition: AsmPrinter.cpp:382
llvm::TargetMachine::getTargetTriple
const Triple & getTargetTriple() const
Definition: TargetMachine.h:126
NoSig
@ NoSig
Definition: Mips16HardFloat.cpp:98
llvm::MipsAsmPrinter::emitEndOfAsmFile
void emitEndOfAsmFile(Module &M) override
This virtual method can be overridden by targets that want to emit something at the end of their file...
Definition: MipsAsmPrinter.cpp:1120
MipsSubtarget.h
llvm::MachineFunction::getDataLayout
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Definition: MachineFunction.cpp:285
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:250
llvm::raw_svector_ostream
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:662
llvm::AsmPrinter::getDataLayout
const DataLayout & getDataLayout() const
Return information about data layout.
Definition: AsmPrinter.cpp:386
llvm::AsmPrinter::SledKind::FUNCTION_ENTER
@ FUNCTION_ENTER
MachineOperand.h
llvm::MipsSubtarget::isFP64bit
bool isFP64bit() const
Definition: MipsSubtarget.h:287
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
llvm::AsmPrinter::emitXRayTable
void emitXRayTable()
Emit a table with all XRay instrumentation points.
Definition: AsmPrinter.cpp:3691
llvm::MipsTargetStreamer::emitDirectiveSetReorder
virtual void emitDirectiveSetReorder()
Definition: MipsTargetStreamer.cpp:56
llvm::MachineFunction::getJumpTableInfo
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
Definition: MachineFunction.h:679
llvm::RegisterAsmPrinter
RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...
Definition: TargetRegistry.h:1381
llvm::MipsMCInstLower::LowerOperand
MCOperand LowerOperand(const MachineOperand &MO, int64_t offset=0) const
Definition: MipsMCInstLower.cpp:177
llvm::MipsSubtarget::useSoftFloat
bool useSoftFloat() const
Definition: MipsSubtarget.h:336
llvm::TargetMachine::getTarget
const Target & getTarget() const
Definition: TargetMachine.h:124
llvm::MipsII::MO_HIGHER
@ MO_HIGHER
MO_HIGHER/HIGHEST - Represents the highest or higher half word of a 64-bit symbol address.
Definition: MipsBaseInfo.h:85
llvm::MachineJumpTableInfo
Definition: MachineJumpTableInfo.h:42
FSig
@ FSig
Definition: Mips16HardFloat.cpp:97
raw_ostream.h
MachineFunction.h
llvm::MachineInstrBundleIterator< const MachineInstr >
llvm::isPowerOf2_64
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
Definition: MathExtras.h:496
llvm::MCDR_DataRegionEnd
@ MCDR_DataRegionEnd
.end_data_region
Definition: MCDirectives.h:64
TargetRegistry.h
llvm::MachineFunction::getAlignment
Align getAlignment() const
getAlignment - Return the alignment of the function.
Definition: MachineFunction.h:704
MCExpr.h
llvm::MipsTargetStreamer::emitDirectiveSetNoMicroMips
virtual void emitDirectiveSetNoMicroMips()
Definition: MipsTargetStreamer.cpp:52
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:76
llvm::AsmPrinter::getFunctionNumber
unsigned getFunctionNumber() const
Return a unique ID for the current function.
Definition: AsmPrinter.cpp:378
llvm::MachineConstantPoolEntry::ConstVal
const Constant * ConstVal
Definition: MachineConstantPool.h:71
llvm::MipsII::MO_GOT_PAGE
@ MO_GOT_PAGE
Definition: MipsBaseInfo.h:80
llvm::MipsTargetStreamer::emitDirectiveSetPush
virtual void emitDirectiveSetPush()
Definition: MipsTargetStreamer.cpp:108
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
TargetRegisterInfo.h
llvm::ELF::SHF_EXECINSTR
@ SHF_EXECINSTR
Definition: ELF.h:1041
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:280
llvm::AsmPrinter::PrintAsmOperand
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.
Definition: AsmPrinterInlineAsm.cpp:467
llvm::MachineOperand::MO_ConstantPoolIndex
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
Definition: MachineOperand.h:57
llvm::getTheMipselTarget
Target & getTheMipselTarget()
Definition: MipsTargetInfo.cpp:17