LLVM  14.0.0git
MipsAsmPrinter.cpp
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1 //===- MipsAsmPrinter.cpp - Mips LLVM Assembly Printer --------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to GAS-format MIPS assembly language.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsAsmPrinter.h"
20 #include "Mips.h"
21 #include "MipsMCInstLower.h"
22 #include "MipsMachineFunction.h"
23 #include "MipsSubtarget.h"
24 #include "MipsTargetMachine.h"
25 #include "MipsTargetStreamer.h"
27 #include "llvm/ADT/SmallString.h"
28 #include "llvm/ADT/StringRef.h"
29 #include "llvm/ADT/Triple.h"
30 #include "llvm/ADT/Twine.h"
31 #include "llvm/BinaryFormat/ELF.h"
41 #include "llvm/IR/Attributes.h"
42 #include "llvm/IR/BasicBlock.h"
43 #include "llvm/IR/DataLayout.h"
44 #include "llvm/IR/Function.h"
45 #include "llvm/IR/InlineAsm.h"
46 #include "llvm/IR/Instructions.h"
47 #include "llvm/MC/MCContext.h"
48 #include "llvm/MC/MCExpr.h"
49 #include "llvm/MC/MCInst.h"
50 #include "llvm/MC/MCInstBuilder.h"
52 #include "llvm/MC/MCSectionELF.h"
53 #include "llvm/MC/MCSymbol.h"
54 #include "llvm/MC/MCSymbolELF.h"
55 #include "llvm/Support/Casting.h"
61 #include <cassert>
62 #include <cstdint>
63 #include <map>
64 #include <memory>
65 #include <string>
66 #include <vector>
67 
68 using namespace llvm;
69 
70 #define DEBUG_TYPE "mips-asm-printer"
71 
73 
74 MipsTargetStreamer &MipsAsmPrinter::getTargetStreamer() const {
75  return static_cast<MipsTargetStreamer &>(*OutStreamer->getTargetStreamer());
76 }
77 
80 
82  if (Subtarget->inMips16Mode())
83  for (std::map<
84  const char *,
85  const Mips16HardFloatInfo::FuncSignature *>::const_iterator
86  it = MipsFI->StubsNeeded.begin();
87  it != MipsFI->StubsNeeded.end(); ++it) {
88  const char *Symbol = it->first;
89  const Mips16HardFloatInfo::FuncSignature *Signature = it->second;
90  if (StubsNeeded.find(Symbol) == StubsNeeded.end())
91  StubsNeeded[Symbol] = Signature;
92  }
93  MCP = MF.getConstantPool();
94 
95  // In NaCl, all indirect jump targets must be aligned to bundle size.
96  if (Subtarget->isTargetNaCl())
97  NaClAlignIndirectJumpTargets(MF);
98 
100 
101  emitXRayTable();
102 
103  return true;
104 }
105 
106 bool MipsAsmPrinter::lowerOperand(const MachineOperand &MO, MCOperand &MCOp) {
107  MCOp = MCInstLowering.LowerOperand(MO);
108  return MCOp.isValid();
109 }
110 
111 #include "MipsGenMCPseudoLowering.inc"
112 
113 // Lower PseudoReturn/PseudoIndirectBranch/PseudoIndirectBranch64 to JR, JR_MM,
114 // JALR, or JALR64 as appropriate for the target.
115 void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,
116  const MachineInstr *MI) {
117  bool HasLinkReg = false;
118  bool InMicroMipsMode = Subtarget->inMicroMipsMode();
119  MCInst TmpInst0;
120 
121  if (Subtarget->hasMips64r6()) {
122  // MIPS64r6 should use (JALR64 ZERO_64, $rs)
123  TmpInst0.setOpcode(Mips::JALR64);
124  HasLinkReg = true;
125  } else if (Subtarget->hasMips32r6()) {
126  // MIPS32r6 should use (JALR ZERO, $rs)
127  if (InMicroMipsMode)
128  TmpInst0.setOpcode(Mips::JRC16_MMR6);
129  else {
130  TmpInst0.setOpcode(Mips::JALR);
131  HasLinkReg = true;
132  }
133  } else if (Subtarget->inMicroMipsMode())
134  // microMIPS should use (JR_MM $rs)
135  TmpInst0.setOpcode(Mips::JR_MM);
136  else {
137  // Everything else should use (JR $rs)
138  TmpInst0.setOpcode(Mips::JR);
139  }
140 
141  MCOperand MCOp;
142 
143  if (HasLinkReg) {
144  unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
145  TmpInst0.addOperand(MCOperand::createReg(ZeroReg));
146  }
147 
148  lowerOperand(MI->getOperand(0), MCOp);
149  TmpInst0.addOperand(MCOp);
150 
151  EmitToStreamer(OutStreamer, TmpInst0);
152 }
153 
154 // If there is an MO_JALR operand, insert:
155 //
156 // .reloc tmplabel, R_{MICRO}MIPS_JALR, symbol
157 // tmplabel:
158 //
159 // This is an optimization hint for the linker which may then replace
160 // an indirect call with a direct branch.
162  MCContext &OutContext,
163  TargetMachine &TM,
164  MCStreamer &OutStreamer,
165  const MipsSubtarget &Subtarget) {
166  for (unsigned int I = MI.getDesc().getNumOperands(), E = MI.getNumOperands();
167  I < E; ++I) {
168  MachineOperand MO = MI.getOperand(I);
169  if (MO.isMCSymbol() && (MO.getTargetFlags() & MipsII::MO_JALR)) {
170  MCSymbol *Callee = MO.getMCSymbol();
171  if (Callee && !Callee->getName().empty()) {
172  MCSymbol *OffsetLabel = OutContext.createTempSymbol();
173  const MCExpr *OffsetExpr =
174  MCSymbolRefExpr::create(OffsetLabel, OutContext);
175  const MCExpr *CaleeExpr =
176  MCSymbolRefExpr::create(Callee, OutContext);
177  OutStreamer.emitRelocDirective(
178  *OffsetExpr,
179  Subtarget.inMicroMipsMode() ? "R_MICROMIPS_JALR" : "R_MIPS_JALR",
180  CaleeExpr, SMLoc(), *TM.getMCSubtargetInfo());
181  OutStreamer.emitLabel(OffsetLabel);
182  return;
183  }
184  }
185  }
186 }
187 
189  MipsTargetStreamer &TS = getTargetStreamer();
190  unsigned Opc = MI->getOpcode();
192 
193  if (MI->isDebugValue()) {
194  SmallString<128> Str;
195  raw_svector_ostream OS(Str);
196 
198  return;
199  }
200  if (MI->isDebugLabel())
201  return;
202 
203  // If we just ended a constant pool, mark it as such.
204  if (InConstantPool && Opc != Mips::CONSTPOOL_ENTRY) {
205  OutStreamer->emitDataRegion(MCDR_DataRegionEnd);
206  InConstantPool = false;
207  }
208  if (Opc == Mips::CONSTPOOL_ENTRY) {
209  // CONSTPOOL_ENTRY - This instruction represents a floating
210  // constant pool in the function. The first operand is the ID#
211  // for this instruction, the second is the index into the
212  // MachineConstantPool that this is, the third is the size in
213  // bytes of this constant pool entry.
214  // The required alignment is specified on the basic block holding this MI.
215  //
216  unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
217  unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
218 
219  // If this is the first entry of the pool, mark it.
220  if (!InConstantPool) {
221  OutStreamer->emitDataRegion(MCDR_DataRegion);
222  InConstantPool = true;
223  }
224 
225  OutStreamer->emitLabel(GetCPISymbol(LabelId));
226 
227  const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
228  if (MCPE.isMachineConstantPoolEntry())
230  else
232  return;
233  }
234 
235  switch (Opc) {
236  case Mips::PATCHABLE_FUNCTION_ENTER:
238  return;
239  case Mips::PATCHABLE_FUNCTION_EXIT:
241  return;
242  case Mips::PATCHABLE_TAIL_CALL:
244  return;
245  }
246 
247  if (EmitJalrReloc &&
248  (MI->isReturn() || MI->isCall() || MI->isIndirectBranch())) {
250  }
251 
253  MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
254 
255  do {
256  // Do any auto-generated pseudo lowerings.
257  if (emitPseudoExpansionLowering(*OutStreamer, &*I))
258  continue;
259 
260  // Skip the BUNDLE pseudo instruction and lower the contents
261  if (I->isBundle())
262  continue;
263 
264  if (I->getOpcode() == Mips::PseudoReturn ||
265  I->getOpcode() == Mips::PseudoReturn64 ||
266  I->getOpcode() == Mips::PseudoIndirectBranch ||
267  I->getOpcode() == Mips::PseudoIndirectBranch64 ||
268  I->getOpcode() == Mips::TAILCALLREG ||
269  I->getOpcode() == Mips::TAILCALLREG64) {
270  emitPseudoIndirectBranch(*OutStreamer, &*I);
271  continue;
272  }
273 
274  // The inMips16Mode() test is not permanent.
275  // Some instructions are marked as pseudo right now which
276  // would make the test fail for the wrong reason but
277  // that will be fixed soon. We need this here because we are
278  // removing another test for this situation downstream in the
279  // callchain.
280  //
281  if (I->isPseudo() && !Subtarget->inMips16Mode()
282  && !isLongBranchPseudo(I->getOpcode()))
283  llvm_unreachable("Pseudo opcode found in emitInstruction()");
284 
285  MCInst TmpInst0;
286  MCInstLowering.Lower(&*I, TmpInst0);
287  EmitToStreamer(*OutStreamer, TmpInst0);
288  } while ((++I != E) && I->isInsideBundle()); // Delay slot check
289 }
290 
291 //===----------------------------------------------------------------------===//
292 //
293 // Mips Asm Directives
294 //
295 // -- Frame directive "frame Stackpointer, Stacksize, RARegister"
296 // Describe the stack frame.
297 //
298 // -- Mask directives "(f)mask bitmask, offset"
299 // Tells the assembler which registers are saved and where.
300 // bitmask - contain a little endian bitset indicating which registers are
301 // saved on function prologue (e.g. with a 0x80000000 mask, the
302 // assembler knows the register 31 (RA) is saved at prologue.
303 // offset - the position before stack pointer subtraction indicating where
304 // the first saved register on prologue is located. (e.g. with a
305 //
306 // Consider the following function prologue:
307 //
308 // .frame $fp,48,$ra
309 // .mask 0xc0000000,-8
310 // addiu $sp, $sp, -48
311 // sw $ra, 40($sp)
312 // sw $fp, 36($sp)
313 //
314 // With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
315 // 30 (FP) are saved at prologue. As the save order on prologue is from
316 // left to right, RA is saved first. A -8 offset means that after the
317 // stack pointer subtration, the first register in the mask (RA) will be
318 // saved at address 48-8=40.
319 //
320 //===----------------------------------------------------------------------===//
321 
322 //===----------------------------------------------------------------------===//
323 // Mask directives
324 //===----------------------------------------------------------------------===//
325 
326 // Create a bitmask with all callee saved registers for CPU or Floating Point
327 // registers. For CPU registers consider RA, GP and FP for saving if necessary.
329  // CPU and FPU Saved Registers Bitmasks
330  unsigned CPUBitmask = 0, FPUBitmask = 0;
331  int CPUTopSavedRegOff, FPUTopSavedRegOff;
332 
333  // Set the CPU and FPU Bitmasks
334  const MachineFrameInfo &MFI = MF->getFrameInfo();
336  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
337  // size of stack area to which FP callee-saved regs are saved.
338  unsigned CPURegSize = TRI->getRegSizeInBits(Mips::GPR32RegClass) / 8;
339  unsigned FGR32RegSize = TRI->getRegSizeInBits(Mips::FGR32RegClass) / 8;
340  unsigned AFGR64RegSize = TRI->getRegSizeInBits(Mips::AFGR64RegClass) / 8;
341  bool HasAFGR64Reg = false;
342  unsigned CSFPRegsSize = 0;
343 
344  for (const auto &I : CSI) {
345  unsigned Reg = I.getReg();
346  unsigned RegNum = TRI->getEncodingValue(Reg);
347 
348  // If it's a floating point register, set the FPU Bitmask.
349  // If it's a general purpose register, set the CPU Bitmask.
350  if (Mips::FGR32RegClass.contains(Reg)) {
351  FPUBitmask |= (1 << RegNum);
352  CSFPRegsSize += FGR32RegSize;
353  } else if (Mips::AFGR64RegClass.contains(Reg)) {
354  FPUBitmask |= (3 << RegNum);
355  CSFPRegsSize += AFGR64RegSize;
356  HasAFGR64Reg = true;
357  } else if (Mips::GPR32RegClass.contains(Reg))
358  CPUBitmask |= (1 << RegNum);
359  }
360 
361  // FP Regs are saved right below where the virtual frame pointer points to.
362  FPUTopSavedRegOff = FPUBitmask ?
363  (HasAFGR64Reg ? -AFGR64RegSize : -FGR32RegSize) : 0;
364 
365  // CPU Regs are saved below FP Regs.
366  CPUTopSavedRegOff = CPUBitmask ? -CSFPRegsSize - CPURegSize : 0;
367 
368  MipsTargetStreamer &TS = getTargetStreamer();
369  // Print CPUBitmask
370  TS.emitMask(CPUBitmask, CPUTopSavedRegOff);
371 
372  // Print FPUBitmask
373  TS.emitFMask(FPUBitmask, FPUTopSavedRegOff);
374 }
375 
376 //===----------------------------------------------------------------------===//
377 // Frame and Set directives
378 //===----------------------------------------------------------------------===//
379 
380 /// Frame Directive
383 
384  Register stackReg = RI.getFrameRegister(*MF);
385  unsigned returnReg = RI.getRARegister();
386  unsigned stackSize = MF->getFrameInfo().getStackSize();
387 
388  getTargetStreamer().emitFrame(stackReg, stackSize, returnReg);
389 }
390 
391 /// Emit Set directives.
393  switch (static_cast<MipsTargetMachine &>(TM).getABI().GetEnumValue()) {
394  case MipsABIInfo::ABI::O32: return "abi32";
395  case MipsABIInfo::ABI::N32: return "abiN32";
396  case MipsABIInfo::ABI::N64: return "abi64";
397  default: llvm_unreachable("Unknown Mips ABI");
398  }
399 }
400 
402  MipsTargetStreamer &TS = getTargetStreamer();
403 
404  // NaCl sandboxing requires that indirect call instructions are masked.
405  // This means that function entry points should be bundle-aligned.
406  if (Subtarget->isTargetNaCl())
408 
409  if (Subtarget->inMicroMipsMode()) {
411  TS.setUsesMicroMips();
413  } else
415 
416  if (Subtarget->inMips16Mode())
418  else
420 
422  OutStreamer->emitLabel(CurrentFnSym);
423 }
424 
425 /// EmitFunctionBodyStart - Targets can override this to emit stuff before
426 /// the first basic block in the function.
428  MipsTargetStreamer &TS = getTargetStreamer();
429 
431 
432  bool IsNakedFunction = MF->getFunction().hasFnAttribute(Attribute::Naked);
433  if (!IsNakedFunction)
435 
436  if (!IsNakedFunction)
438 
439  if (!Subtarget->inMips16Mode()) {
443  }
444 }
445 
446 /// EmitFunctionBodyEnd - Targets can override this to emit stuff after
447 /// the last basic block in the function.
449  MipsTargetStreamer &TS = getTargetStreamer();
450 
451  // There are instruction for this macros, but they must
452  // always be at the function end, and we can't emit and
453  // break with BB logic.
454  if (!Subtarget->inMips16Mode()) {
455  TS.emitDirectiveSetAt();
458  }
460  // Make sure to terminate any constant pools that were at the end
461  // of the function.
462  if (!InConstantPool)
463  return;
464  InConstantPool = false;
465  OutStreamer->emitDataRegion(MCDR_DataRegionEnd);
466 }
467 
470  MipsTargetStreamer &TS = getTargetStreamer();
471  if (MBB.empty())
472  TS.emitDirectiveInsn();
473 }
474 
475 /// isBlockOnlyReachableByFallthough - Return true if the basic block has
476 /// exactly one predecessor and the control transfer mechanism between
477 /// the predecessor and this block is a fall-through.
479  MBB) const {
480  // The predecessor has to be immediately before this block.
481  const MachineBasicBlock *Pred = *MBB->pred_begin();
482 
483  // If the predecessor is a switch statement, assume a jump table
484  // implementation, so it is not a fall through.
485  if (const BasicBlock *bb = Pred->getBasicBlock())
486  if (isa<SwitchInst>(bb->getTerminator()))
487  return false;
488 
489  // If this is a landing pad, it isn't a fall through. If it has no preds,
490  // then nothing falls through to it.
491  if (MBB->isEHPad() || MBB->pred_empty())
492  return false;
493 
494  // If there isn't exactly one predecessor, it can't be a fall through.
496  ++PI2;
497 
498  if (PI2 != MBB->pred_end())
499  return false;
500 
501  // The predecessor has to be immediately before this block.
502  if (!Pred->isLayoutSuccessor(MBB))
503  return false;
504 
505  // If the block is completely empty, then it definitely does fall through.
506  if (Pred->empty())
507  return true;
508 
509  // Otherwise, check the last instruction.
510  // Check if the last terminator is an unconditional branch.
512  while (I != Pred->begin() && !(--I)->isTerminator()) ;
513 
514  return !I->isBarrier();
515 }
516 
517 // Print out an operand for an inline asm expression.
518 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
519  const char *ExtraCode, raw_ostream &O) {
520  // Does this asm operand have a single letter operand modifier?
521  if (ExtraCode && ExtraCode[0]) {
522  if (ExtraCode[1] != 0) return true; // Unknown modifier.
523 
524  const MachineOperand &MO = MI->getOperand(OpNum);
525  switch (ExtraCode[0]) {
526  default:
527  // See if this is a generic print operand
528  return AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O);
529  case 'X': // hex const int
531  return true;
532  O << "0x" << Twine::utohexstr(MO.getImm());
533  return false;
534  case 'x': // hex const int (low 16 bits)
536  return true;
537  O << "0x" << Twine::utohexstr(MO.getImm() & 0xffff);
538  return false;
539  case 'd': // decimal const int
541  return true;
542  O << MO.getImm();
543  return false;
544  case 'm': // decimal const int minus 1
546  return true;
547  O << MO.getImm() - 1;
548  return false;
549  case 'y': // exact log2
551  return true;
552  if (!isPowerOf2_64(MO.getImm()))
553  return true;
554  O << Log2_64(MO.getImm());
555  return false;
556  case 'z':
557  // $0 if zero, regular printing otherwise
558  if (MO.getType() == MachineOperand::MO_Immediate && MO.getImm() == 0) {
559  O << "$0";
560  return false;
561  }
562  // If not, call printOperand as normal.
563  break;
564  case 'D': // Second part of a double word register operand
565  case 'L': // Low order register of a double word register operand
566  case 'M': // High order register of a double word register operand
567  {
568  if (OpNum == 0)
569  return true;
570  const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
571  if (!FlagsOP.isImm())
572  return true;
573  unsigned Flags = FlagsOP.getImm();
574  unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
575  // Number of registers represented by this operand. We are looking
576  // for 2 for 32 bit mode and 1 for 64 bit mode.
577  if (NumVals != 2) {
578  if (Subtarget->isGP64bit() && NumVals == 1 && MO.isReg()) {
579  Register Reg = MO.getReg();
581  return false;
582  }
583  return true;
584  }
585 
586  unsigned RegOp = OpNum;
587  if (!Subtarget->isGP64bit()){
588  // Endianness reverses which register holds the high or low value
589  // between M and L.
590  switch(ExtraCode[0]) {
591  case 'M':
592  RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
593  break;
594  case 'L':
595  RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;
596  break;
597  case 'D': // Always the second part
598  RegOp = OpNum + 1;
599  }
600  if (RegOp >= MI->getNumOperands())
601  return true;
602  const MachineOperand &MO = MI->getOperand(RegOp);
603  if (!MO.isReg())
604  return true;
605  Register Reg = MO.getReg();
607  return false;
608  }
609  break;
610  }
611  case 'w':
612  // Print MSA registers for the 'f' constraint
613  // In LLVM, the 'w' modifier doesn't need to do anything.
614  // We can just call printOperand as normal.
615  break;
616  }
617  }
618 
619  printOperand(MI, OpNum, O);
620  return false;
621 }
622 
624  unsigned OpNum,
625  const char *ExtraCode,
626  raw_ostream &O) {
627  assert(OpNum + 1 < MI->getNumOperands() && "Insufficient operands");
628  const MachineOperand &BaseMO = MI->getOperand(OpNum);
629  const MachineOperand &OffsetMO = MI->getOperand(OpNum + 1);
630  assert(BaseMO.isReg() &&
631  "Unexpected base pointer for inline asm memory operand.");
632  assert(OffsetMO.isImm() &&
633  "Unexpected offset for inline asm memory operand.");
634  int Offset = OffsetMO.getImm();
635 
636  // Currently we are expecting either no ExtraCode or 'D','M','L'.
637  if (ExtraCode) {
638  switch (ExtraCode[0]) {
639  case 'D':
640  Offset += 4;
641  break;
642  case 'M':
643  if (Subtarget->isLittle())
644  Offset += 4;
645  break;
646  case 'L':
647  if (!Subtarget->isLittle())
648  Offset += 4;
649  break;
650  default:
651  return true; // Unknown modifier.
652  }
653  }
654 
655  O << Offset << "($" << MipsInstPrinter::getRegisterName(BaseMO.getReg())
656  << ")";
657 
658  return false;
659 }
660 
662  raw_ostream &O) {
663  const MachineOperand &MO = MI->getOperand(opNum);
664  bool closeP = false;
665 
666  if (MO.getTargetFlags())
667  closeP = true;
668 
669  switch(MO.getTargetFlags()) {
670  case MipsII::MO_GPREL: O << "%gp_rel("; break;
671  case MipsII::MO_GOT_CALL: O << "%call16("; break;
672  case MipsII::MO_GOT: O << "%got("; break;
673  case MipsII::MO_ABS_HI: O << "%hi("; break;
674  case MipsII::MO_ABS_LO: O << "%lo("; break;
675  case MipsII::MO_HIGHER: O << "%higher("; break;
676  case MipsII::MO_HIGHEST: O << "%highest(("; break;
677  case MipsII::MO_TLSGD: O << "%tlsgd("; break;
678  case MipsII::MO_GOTTPREL: O << "%gottprel("; break;
679  case MipsII::MO_TPREL_HI: O << "%tprel_hi("; break;
680  case MipsII::MO_TPREL_LO: O << "%tprel_lo("; break;
681  case MipsII::MO_GPOFF_HI: O << "%hi(%neg(%gp_rel("; break;
682  case MipsII::MO_GPOFF_LO: O << "%lo(%neg(%gp_rel("; break;
683  case MipsII::MO_GOT_DISP: O << "%got_disp("; break;
684  case MipsII::MO_GOT_PAGE: O << "%got_page("; break;
685  case MipsII::MO_GOT_OFST: O << "%got_ofst("; break;
686  }
687 
688  switch (MO.getType()) {
690  O << '$'
692  break;
693 
695  O << MO.getImm();
696  break;
697 
699  MO.getMBB()->getSymbol()->print(O, MAI);
700  return;
701 
703  PrintSymbolOperand(MO, O);
704  break;
705 
708  O << BA->getName();
709  break;
710  }
711 
713  O << getDataLayout().getPrivateGlobalPrefix() << "CPI"
714  << getFunctionNumber() << "_" << MO.getIndex();
715  if (MO.getOffset())
716  O << "+" << MO.getOffset();
717  break;
718 
719  default:
720  llvm_unreachable("<unknown operand type>");
721  }
722 
723  if (closeP) O << ")";
724 }
725 
726 void MipsAsmPrinter::
728  // Load/Store memory operands -- imm($reg)
729  // If PIC target the target is loaded as the
730  // pattern lw $25,%call16($28)
731 
732  // opNum can be invalid if instruction has reglist as operand.
733  // MemOperand is always last operand of instruction (base + offset).
734  switch (MI->getOpcode()) {
735  default:
736  break;
737  case Mips::SWM32_MM:
738  case Mips::LWM32_MM:
739  opNum = MI->getNumOperands() - 2;
740  break;
741  }
742 
743  printOperand(MI, opNum+1, O);
744  O << "(";
745  printOperand(MI, opNum, O);
746  O << ")";
747 }
748 
749 void MipsAsmPrinter::
751  // when using stack locations for not load/store instructions
752  // print the same way as all normal 3 operand instructions.
753  printOperand(MI, opNum, O);
754  O << ", ";
755  printOperand(MI, opNum+1, O);
756 }
757 
758 void MipsAsmPrinter::
760  const char *Modifier) {
761  const MachineOperand &MO = MI->getOperand(opNum);
763 }
764 
765 void MipsAsmPrinter::
767  for (int i = opNum, e = MI->getNumOperands(); i != e; ++i) {
768  if (i != opNum) O << ", ";
769  printOperand(MI, i, O);
770  }
771 }
772 
774  MipsTargetStreamer &TS = getTargetStreamer();
775 
776  // MipsTargetStreamer has an initialization order problem when emitting an
777  // object file directly (see MipsTargetELFStreamer for full details). Work
778  // around it by re-initializing the PIC state here.
780 
781  // Compute MIPS architecture attributes based on the default subtarget
782  // that we'd have constructed. Module level directives aren't LTO
783  // clean anyhow.
784  // FIXME: For ifunc related functions we could iterate over and look
785  // for a feature string that doesn't match the default one.
786  const Triple &TT = TM.getTargetTriple();
789  const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
790  const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM, None);
791 
792  bool IsABICalls = STI.isABICalls();
793  const MipsABIInfo &ABI = MTM.getABI();
794  if (IsABICalls) {
796  // FIXME: This condition should be a lot more complicated that it is here.
797  // Ideally it should test for properties of the ABI and not the ABI
798  // itself.
799  // For the moment, I'm only correcting enough to make MIPS-IV work.
800  if (!isPositionIndependent() && STI.hasSym32())
802  }
803 
804  // Tell the assembler which ABI we are using
805  std::string SectionName = std::string(".mdebug.") + getCurrentABIString();
806  OutStreamer->SwitchSection(
808 
809  // NaN: At the moment we only support:
810  // 1. .nan legacy (default)
811  // 2. .nan 2008
812  STI.isNaN2008() ? TS.emitDirectiveNaN2008()
813  : TS.emitDirectiveNaNLegacy();
814 
815  // TODO: handle O64 ABI
816 
817  TS.updateABIInfo(STI);
818 
819  // We should always emit a '.module fp=...' but binutils 2.24 does not accept
820  // it. We therefore emit it when it contradicts the ABI defaults (-mfpxx or
821  // -mfp64) and omit it otherwise.
822  if ((ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit())) ||
823  STI.useSoftFloat())
825 
826  // We should always emit a '.module [no]oddspreg' but binutils 2.24 does not
827  // accept it. We therefore emit it when it contradicts the default or an
828  // option has changed the default (i.e. FPXX) and omit it otherwise.
829  if (ABI.IsO32() && (!STI.useOddSPReg() || STI.isABI_FPXX()))
831 
832  // Switch to the .text section.
833  OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
834 }
835 
836 void MipsAsmPrinter::emitInlineAsmStart() const {
837  MipsTargetStreamer &TS = getTargetStreamer();
838 
839  // GCC's choice of assembler options for inline assembly code ('at', 'macro'
840  // and 'reorder') is different from LLVM's choice for generated code ('noat',
841  // 'nomacro' and 'noreorder').
842  // In order to maintain compatibility with inline assembly code which depends
843  // on GCC's assembler options being used, we have to switch to those options
844  // for the duration of the inline assembly block and then switch back.
846  TS.emitDirectiveSetAt();
849  OutStreamer->AddBlankLine();
850 }
851 
852 void MipsAsmPrinter::emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
853  const MCSubtargetInfo *EndInfo) const {
854  OutStreamer->AddBlankLine();
855  getTargetStreamer().emitDirectiveSetPop();
856 }
857 
858 void MipsAsmPrinter::EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol) {
859  MCInst I;
860  I.setOpcode(Mips::JAL);
861  I.addOperand(
863  OutStreamer->emitInstruction(I, STI);
864 }
865 
866 void MipsAsmPrinter::EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode,
867  unsigned Reg) {
868  MCInst I;
869  I.setOpcode(Opcode);
870  I.addOperand(MCOperand::createReg(Reg));
871  OutStreamer->emitInstruction(I, STI);
872 }
873 
874 void MipsAsmPrinter::EmitInstrRegReg(const MCSubtargetInfo &STI,
875  unsigned Opcode, unsigned Reg1,
876  unsigned Reg2) {
877  MCInst I;
878  //
879  // Because of the current td files for Mips32, the operands for MTC1
880  // appear backwards from their normal assembly order. It's not a trivial
881  // change to fix this in the td file so we adjust for it here.
882  //
883  if (Opcode == Mips::MTC1) {
884  unsigned Temp = Reg1;
885  Reg1 = Reg2;
886  Reg2 = Temp;
887  }
888  I.setOpcode(Opcode);
889  I.addOperand(MCOperand::createReg(Reg1));
890  I.addOperand(MCOperand::createReg(Reg2));
891  OutStreamer->emitInstruction(I, STI);
892 }
893 
894 void MipsAsmPrinter::EmitInstrRegRegReg(const MCSubtargetInfo &STI,
895  unsigned Opcode, unsigned Reg1,
896  unsigned Reg2, unsigned Reg3) {
897  MCInst I;
898  I.setOpcode(Opcode);
899  I.addOperand(MCOperand::createReg(Reg1));
900  I.addOperand(MCOperand::createReg(Reg2));
901  I.addOperand(MCOperand::createReg(Reg3));
902  OutStreamer->emitInstruction(I, STI);
903 }
904 
905 void MipsAsmPrinter::EmitMovFPIntPair(const MCSubtargetInfo &STI,
906  unsigned MovOpc, unsigned Reg1,
907  unsigned Reg2, unsigned FPReg1,
908  unsigned FPReg2, bool LE) {
909  if (!LE) {
910  unsigned temp = Reg1;
911  Reg1 = Reg2;
912  Reg2 = temp;
913  }
914  EmitInstrRegReg(STI, MovOpc, Reg1, FPReg1);
915  EmitInstrRegReg(STI, MovOpc, Reg2, FPReg2);
916 }
917 
918 void MipsAsmPrinter::EmitSwapFPIntParams(const MCSubtargetInfo &STI,
920  bool LE, bool ToFP) {
921  using namespace Mips16HardFloatInfo;
922 
923  unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1;
924  switch (PV) {
925  case FSig:
926  EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
927  break;
928  case FFSig:
929  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F14, LE);
930  break;
931  case FDSig:
932  EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
933  EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
934  break;
935  case DSig:
936  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
937  break;
938  case DDSig:
939  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
940  EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
941  break;
942  case DFSig:
943  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
944  EmitInstrRegReg(STI, MovOpc, Mips::A2, Mips::F14);
945  break;
946  case NoSig:
947  return;
948  }
949 }
950 
951 void MipsAsmPrinter::EmitSwapFPIntRetval(
953  bool LE) {
954  using namespace Mips16HardFloatInfo;
955 
956  unsigned MovOpc = Mips::MFC1;
957  switch (RV) {
958  case FRet:
959  EmitInstrRegReg(STI, MovOpc, Mips::V0, Mips::F0);
960  break;
961  case DRet:
962  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
963  break;
964  case CFRet:
965  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
966  break;
967  case CDRet:
968  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
969  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F2, Mips::F3, LE);
970  break;
971  case NoFPRet:
972  break;
973  }
974 }
975 
976 void MipsAsmPrinter::EmitFPCallStub(
977  const char *Symbol, const Mips16HardFloatInfo::FuncSignature *Signature) {
978  using namespace Mips16HardFloatInfo;
979 
981  bool LE = getDataLayout().isLittleEndian();
982  // Construct a local MCSubtargetInfo here.
983  // This is because the MachineFunction won't exist (but have not yet been
984  // freed) and since we're at the global level we can use the default
985  // constructed subtarget.
986  std::unique_ptr<MCSubtargetInfo> STI(TM.getTarget().createMCSubtargetInfo(
989 
990  //
991  // .global xxxx
992  //
993  OutStreamer->emitSymbolAttribute(MSymbol, MCSA_Global);
994  const char *RetType;
995  //
996  // make the comment field identifying the return and parameter
997  // types of the floating point stub
998  // # Stub function to call rettype xxxx (params)
999  //
1000  switch (Signature->RetSig) {
1001  case FRet:
1002  RetType = "float";
1003  break;
1004  case DRet:
1005  RetType = "double";
1006  break;
1007  case CFRet:
1008  RetType = "complex";
1009  break;
1010  case CDRet:
1011  RetType = "double complex";
1012  break;
1013  case NoFPRet:
1014  RetType = "";
1015  break;
1016  }
1017  const char *Parms;
1018  switch (Signature->ParamSig) {
1019  case FSig:
1020  Parms = "float";
1021  break;
1022  case FFSig:
1023  Parms = "float, float";
1024  break;
1025  case FDSig:
1026  Parms = "float, double";
1027  break;
1028  case DSig:
1029  Parms = "double";
1030  break;
1031  case DDSig:
1032  Parms = "double, double";
1033  break;
1034  case DFSig:
1035  Parms = "double, float";
1036  break;
1037  case NoSig:
1038  Parms = "";
1039  break;
1040  }
1041  OutStreamer->AddComment("\t# Stub function to call " + Twine(RetType) + " " +
1042  Twine(Symbol) + " (" + Twine(Parms) + ")");
1043  //
1044  // probably not necessary but we save and restore the current section state
1045  //
1046  OutStreamer->PushSection();
1047  //
1048  // .section mips16.call.fpxxxx,"ax",@progbits
1049  //
1051  ".mips16.call.fp." + std::string(Symbol), ELF::SHT_PROGBITS,
1053  OutStreamer->SwitchSection(M, nullptr);
1054  //
1055  // .align 2
1056  //
1057  OutStreamer->emitValueToAlignment(4);
1058  MipsTargetStreamer &TS = getTargetStreamer();
1059  //
1060  // .set nomips16
1061  // .set nomicromips
1062  //
1065  //
1066  // .ent __call_stub_fp_xxxx
1067  // .type __call_stub_fp_xxxx,@function
1068  // __call_stub_fp_xxxx:
1069  //
1070  std::string x = "__call_stub_fp_" + std::string(Symbol);
1071  MCSymbolELF *Stub =
1072  cast<MCSymbolELF>(OutContext.getOrCreateSymbol(StringRef(x)));
1073  TS.emitDirectiveEnt(*Stub);
1074  MCSymbol *MType =
1075  OutContext.getOrCreateSymbol("__call_stub_fp_" + Twine(Symbol));
1076  OutStreamer->emitSymbolAttribute(MType, MCSA_ELF_TypeFunction);
1077  OutStreamer->emitLabel(Stub);
1078 
1079  // Only handle non-pic for now.
1081  "should not be here if we are compiling pic");
1083  //
1084  // We need to add a MipsMCExpr class to MCTargetDesc to fully implement
1085  // stubs without raw text but this current patch is for compiler generated
1086  // functions and they all return some value.
1087  // The calling sequence for non pic is different in that case and we need
1088  // to implement %lo and %hi in order to handle the case of no return value
1089  // See the corresponding method in Mips16HardFloat for details.
1090  //
1091  // mov the return address to S2.
1092  // we have no stack space to store it and we are about to make another call.
1093  // We need to make sure that the enclosing function knows to save S2
1094  // This should have already been handled.
1095  //
1096  // Mov $18, $31
1097 
1098  EmitInstrRegRegReg(*STI, Mips::OR, Mips::S2, Mips::RA, Mips::ZERO);
1099 
1100  EmitSwapFPIntParams(*STI, Signature->ParamSig, LE, true);
1101 
1102  // Jal xxxx
1103  //
1104  EmitJal(*STI, MSymbol);
1105 
1106  // fix return values
1107  EmitSwapFPIntRetval(*STI, Signature->RetSig, LE);
1108  //
1109  // do the return
1110  // if (Signature->RetSig == NoFPRet)
1111  // llvm_unreachable("should not be any stubs here with no return value");
1112  // else
1113  EmitInstrReg(*STI, Mips::JR, Mips::S2);
1114 
1116  OutStreamer->emitLabel(Tmp);
1119  const MCExpr *T_min_E = MCBinaryExpr::createSub(T, E, OutContext);
1120  OutStreamer->emitELFSize(Stub, T_min_E);
1121  TS.emitDirectiveEnd(x);
1122  OutStreamer->PopSection();
1123 }
1124 
1126  // Emit needed stubs
1127  //
1128  for (std::map<
1129  const char *,
1130  const Mips16HardFloatInfo::FuncSignature *>::const_iterator
1131  it = StubsNeeded.begin();
1132  it != StubsNeeded.end(); ++it) {
1133  const char *Symbol = it->first;
1134  const Mips16HardFloatInfo::FuncSignature *Signature = it->second;
1135  EmitFPCallStub(Symbol, Signature);
1136  }
1137  // return to the text section
1139 }
1140 
1141 void MipsAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind) {
1142  const uint8_t NoopsInSledCount = Subtarget->isGP64bit() ? 15 : 11;
1143  // For mips32 we want to emit the following pattern:
1144  //
1145  // .Lxray_sled_N:
1146  // ALIGN
1147  // B .tmpN
1148  // 11 NOP instructions (44 bytes)
1149  // ADDIU T9, T9, 52
1150  // .tmpN
1151  //
1152  // We need the 44 bytes (11 instructions) because at runtime, we'd
1153  // be patching over the full 48 bytes (12 instructions) with the following
1154  // pattern:
1155  //
1156  // ADDIU SP, SP, -8
1157  // NOP
1158  // SW RA, 4(SP)
1159  // SW T9, 0(SP)
1160  // LUI T9, %hi(__xray_FunctionEntry/Exit)
1161  // ORI T9, T9, %lo(__xray_FunctionEntry/Exit)
1162  // LUI T0, %hi(function_id)
1163  // JALR T9
1164  // ORI T0, T0, %lo(function_id)
1165  // LW T9, 0(SP)
1166  // LW RA, 4(SP)
1167  // ADDIU SP, SP, 8
1168  //
1169  // We add 52 bytes to t9 because we want to adjust the function pointer to
1170  // the actual start of function i.e. the address just after the noop sled.
1171  // We do this because gp displacement relocation is emitted at the start of
1172  // of the function i.e after the nop sled and to correctly calculate the
1173  // global offset table address, t9 must hold the address of the instruction
1174  // containing the gp displacement relocation.
1175  // FIXME: Is this correct for the static relocation model?
1176  //
1177  // For mips64 we want to emit the following pattern:
1178  //
1179  // .Lxray_sled_N:
1180  // ALIGN
1181  // B .tmpN
1182  // 15 NOP instructions (60 bytes)
1183  // .tmpN
1184  //
1185  // We need the 60 bytes (15 instructions) because at runtime, we'd
1186  // be patching over the full 64 bytes (16 instructions) with the following
1187  // pattern:
1188  //
1189  // DADDIU SP, SP, -16
1190  // NOP
1191  // SD RA, 8(SP)
1192  // SD T9, 0(SP)
1193  // LUI T9, %highest(__xray_FunctionEntry/Exit)
1194  // ORI T9, T9, %higher(__xray_FunctionEntry/Exit)
1195  // DSLL T9, T9, 16
1196  // ORI T9, T9, %hi(__xray_FunctionEntry/Exit)
1197  // DSLL T9, T9, 16
1198  // ORI T9, T9, %lo(__xray_FunctionEntry/Exit)
1199  // LUI T0, %hi(function_id)
1200  // JALR T9
1201  // ADDIU T0, T0, %lo(function_id)
1202  // LD T9, 0(SP)
1203  // LD RA, 8(SP)
1204  // DADDIU SP, SP, 16
1205  //
1206  OutStreamer->emitCodeAlignment(4, &getSubtargetInfo());
1207  auto CurSled = OutContext.createTempSymbol("xray_sled_", true);
1208  OutStreamer->emitLabel(CurSled);
1210 
1211  // Emit "B .tmpN" instruction, which jumps over the nop sled to the actual
1212  // start of function
1213  const MCExpr *TargetExpr = MCSymbolRefExpr::create(
1214  Target, MCSymbolRefExpr::VariantKind::VK_None, OutContext);
1216  .addReg(Mips::ZERO)
1217  .addReg(Mips::ZERO)
1218  .addExpr(TargetExpr));
1219 
1220  for (int8_t I = 0; I < NoopsInSledCount; I++)
1222  .addReg(Mips::ZERO)
1223  .addReg(Mips::ZERO)
1224  .addImm(0));
1225 
1226  OutStreamer->emitLabel(Target);
1227 
1228  if (!Subtarget->isGP64bit()) {
1230  MCInstBuilder(Mips::ADDiu)
1231  .addReg(Mips::T9)
1232  .addReg(Mips::T9)
1233  .addImm(0x34));
1234  }
1235 
1236  recordSled(CurSled, MI, Kind, 2);
1237 }
1238 
1240  EmitSled(MI, SledKind::FUNCTION_ENTER);
1241 }
1242 
1244  EmitSled(MI, SledKind::FUNCTION_EXIT);
1245 }
1246 
1248  EmitSled(MI, SledKind::TAIL_CALL);
1249 }
1250 
1252  raw_ostream &OS) {
1253  // TODO: implement
1254 }
1255 
1256 // Emit .dtprelword or .dtpreldword directive
1257 // and value for debug thread local expression.
1258 void MipsAsmPrinter::emitDebugValue(const MCExpr *Value, unsigned Size) const {
1259  if (auto *MipsExpr = dyn_cast<MipsMCExpr>(Value)) {
1260  if (MipsExpr && MipsExpr->getKind() == MipsMCExpr::MEK_DTPREL) {
1261  switch (Size) {
1262  case 4:
1263  OutStreamer->emitDTPRel32Value(MipsExpr->getSubExpr());
1264  break;
1265  case 8:
1266  OutStreamer->emitDTPRel64Value(MipsExpr->getSubExpr());
1267  break;
1268  default:
1269  llvm_unreachable("Unexpected size of expression value.");
1270  }
1271  return;
1272  }
1273  }
1275 }
1276 
1277 // Align all targets of indirect branches on bundle size. Used only if target
1278 // is NaCl.
1279 void MipsAsmPrinter::NaClAlignIndirectJumpTargets(MachineFunction &MF) {
1280  // Align all blocks that are jumped to through jump table.
1281  if (MachineJumpTableInfo *JtInfo = MF.getJumpTableInfo()) {
1282  const std::vector<MachineJumpTableEntry> &JT = JtInfo->getJumpTables();
1283  for (unsigned I = 0; I < JT.size(); ++I) {
1284  const std::vector<MachineBasicBlock*> &MBBs = JT[I].MBBs;
1285 
1286  for (unsigned J = 0; J < MBBs.size(); ++J)
1287  MBBs[J]->setAlignment(MIPS_NACL_BUNDLE_ALIGN);
1288  }
1289  }
1290 
1291  // If basic block address is taken, block can be target of indirect branch.
1292  for (auto &MBB : MF) {
1293  if (MBB.hasAddressTaken())
1295  }
1296 }
1297 
1298 bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
1299  return (Opcode == Mips::LONG_BRANCH_LUi
1300  || Opcode == Mips::LONG_BRANCH_LUi2Op
1301  || Opcode == Mips::LONG_BRANCH_LUi2Op_64
1302  || Opcode == Mips::LONG_BRANCH_ADDiu
1303  || Opcode == Mips::LONG_BRANCH_ADDiu2Op
1304  || Opcode == Mips::LONG_BRANCH_DADDiu
1305  || Opcode == Mips::LONG_BRANCH_DADDiu2Op);
1306 }
1307 
1308 // Force static initialization.
1314 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
i
i
Definition: README.txt:29
FFSig
@ FFSig
Definition: Mips16HardFloat.cpp:97
ABI
Generic address nodes are lowered to some combination of target independent and machine specific ABI
Definition: Relocation.txt:34
llvm::MCContext::getObjectFileInfo
const MCObjectFileInfo * getObjectFileInfo() const
Definition: MCContext.h:427
llvm::AsmPrinter::isPositionIndependent
bool isPositionIndependent() const
Definition: AsmPrinter.cpp:215
llvm::MachineOperand::MO_BlockAddress
@ MO_BlockAddress
Address of a basic block.
Definition: MachineOperand.h:63
llvm::MipsTargetMachine
Definition: MipsTargetMachine.h:27
llvm::MipsFunctionInfo::StubsNeeded
std::map< const char *, const Mips16HardFloatInfo::FuncSignature * > StubsNeeded
Definition: MipsMachineFunction.h:82
llvm::MachineBasicBlock::pred_begin
pred_iterator pred_begin()
Definition: MachineBasicBlock.h:316
MipsBaseInfo.h
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:103
MachineInstr.h
llvm::MachineOperand::MO_Immediate
@ MO_Immediate
Immediate operand.
Definition: MachineOperand.h:53
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::MipsTargetStreamer::emitDirectiveOptionPic0
virtual void emitDirectiveOptionPic0()
Definition: MipsTargetStreamer.cpp:74
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
M
We currently emits eax Perhaps this is what we really should generate is Is imull three or four cycles eax eax The current instruction priority is based on pattern complexity The former is more complex because it folds a load so the latter will not be emitted Perhaps we should use AddedComplexity to give LEA32r a higher priority We should always try to match LEA first since the LEA matching code does some estimate to determine whether the match is profitable if we care more about code then imull is better It s two bytes shorter than movl leal On a Pentium M
Definition: README.txt:252
llvm::MipsTargetMachine::getABI
const MipsABIInfo & getABI() const
Definition: MipsTargetMachine.h:75
llvm::MipsAsmPrinter::PrintDebugValueComment
void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS)
Definition: MipsAsmPrinter.cpp:1251
it
into xmm2 addss xmm2 xmm1 xmm3 addss xmm3 movaps xmm0 unpcklps xmm0 ret seems silly when it could just be one addps Expand libm rounding functions main should enable SSE DAZ mode and other fast SSE modes Think about doing i64 math in SSE regs on x86 This testcase should have no SSE instructions in it
Definition: README-SSE.txt:81
llvm::Mips16HardFloatInfo::FPParamVariant
FPParamVariant
Definition: Mips16HardFloatInfo.h:31
llvm::ISD::OR
@ OR
Definition: ISDOpcodes.h:633
llvm::AsmPrinter::emitBasicBlockEnd
virtual void emitBasicBlockEnd(const MachineBasicBlock &MBB)
Targets can override this to emit stuff at the end of a basic block.
Definition: AsmPrinter.cpp:3324
llvm::MCOperand::createExpr
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:162
llvm::MachineBasicBlock::getBasicBlock
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
Definition: MachineBasicBlock.h:202
llvm::AsmPrinter::recordSled
void recordSled(MCSymbol *Sled, const MachineInstr &MI, SledKind Kind, uint8_t Version=0)
Definition: AsmPrinter.cpp:3553
llvm::MipsABIInfo
Definition: MipsABIInfo.h:22
llvm::HexagonISD::JT
@ JT
Definition: HexagonISelLowering.h:52
T
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:72
llvm::MachineFunction::getContext
MCContext & getContext() const
Definition: MachineFunction.h:578
llvm::MipsTargetStreamer::emitDirectiveEnt
virtual void emitDirectiveEnt(const MCSymbol &Symbol)
Definition: MipsTargetStreamer.cpp:70
StringRef.h
llvm::MipsTargetStreamer::emitDirectiveSetMips16
virtual void emitDirectiveSetMips16()
Definition: MipsTargetStreamer.cpp:48
llvm::MipsAsmPrinter::printRegisterList
void printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:766
llvm::MachineConstantPoolEntry::MachineCPVal
MachineConstantPoolValue * MachineCPVal
Definition: MachineConstantPool.h:72
llvm::AsmPrinter::MAI
const MCAsmInfo * MAI
Target Asm Printer information.
Definition: AsmPrinter.h:88
contains
return AArch64::GPR64RegClass contains(Reg)
llvm::Target
Target - Wrapper for Target specific information.
Definition: TargetRegistry.h:137
MCSectionELF.h
llvm::AsmPrinter::emitGlobalConstant
void emitGlobalConstant(const DataLayout &DL, const Constant *CV)
Print a general LLVM constant to the .s file.
Definition: AsmPrinter.cpp:3079
llvm::Mips::CondCode
CondCode
Definition: MipsInstPrinter.h:32
InlineAsm.h
llvm::MachineOperand::getBlockAddress
const BlockAddress * getBlockAddress() const
Definition: MachineOperand.h:568
ErrorHandling.h
llvm::MipsTargetStreamer::setPic
virtual void setPic(bool Value)
Definition: MipsTargetStreamer.h:28
llvm::MipsSubtarget::hasMips64r6
bool hasMips64r6() const
Definition: MipsSubtarget.h:276
llvm::MipsII::MO_JALR
@ MO_JALR
Helper operand used to generate R_MIPS_JALR.
Definition: MipsBaseInfo.h:95
MCInstBuilder.h
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:45
MachineBasicBlock.h
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::MachineBasicBlock::const_pred_iterator
std::vector< MachineBasicBlock * >::const_iterator const_pred_iterator
Definition: MachineBasicBlock.h:305
llvm::MipsTargetStreamer::emitFrame
virtual void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg)
Definition: MipsTargetStreamer.cpp:77
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::MCRegisterInfo::getEncodingValue
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
Definition: MCRegisterInfo.h:553
MCObjectFileInfo.h
llvm::MipsII::MO_TPREL_HI
@ MO_TPREL_HI
MO_TPREL_HI/LO - Represents the hi and low part of the offset from.
Definition: MipsBaseInfo.h:73
EmitJalrReloc
cl::opt< bool > EmitJalrReloc
llvm::MipsAsmPrinter::PrintAsmMemoryOperand
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
Definition: MipsAsmPrinter.cpp:623
llvm::MipsAsmPrinter::LowerPATCHABLE_FUNCTION_EXIT
void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI)
Definition: MipsAsmPrinter.cpp:1243
llvm::MachineOperand::isMCSymbol
bool isMCSymbol() const
Definition: MachineOperand.h:350
MachineJumpTableInfo.h
llvm::AsmPrinter::PrintSymbolOperand
virtual void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &OS)
Print the MachineOperand as a symbol.
Definition: AsmPrinterInlineAsm.cpp:589
llvm::MipsAsmPrinter::MipsFI
const MipsFunctionInfo * MipsFI
Definition: MipsAsmPrinter.h:118
llvm::ELF::SHF_EXECINSTR
@ SHF_EXECINSTR
Definition: ELF.h:991
llvm::MipsTargetStreamer::emitDirectiveModuleFP
virtual void emitDirectiveModuleFP()
Definition: MipsTargetStreamer.cpp:145
llvm::AsmPrinter::SledKind
SledKind
Definition: AsmPrinter.h:289
llvm::MipsSubtarget::hasSym32
bool hasSym32() const
Definition: MipsSubtarget.h:294
llvm::MipsTargetStreamer::emitDirectiveInsn
virtual void emitDirectiveInsn()
Definition: MipsTargetStreamer.cpp:76
llvm::MipsII::MO_GOTTPREL
@ MO_GOTTPREL
MO_GOTTPREL - Represents the offset from the thread pointer (Initial.
Definition: MipsBaseInfo.h:69
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
llvm::MipsSubtarget::useOddSPReg
bool useOddSPReg() const
Definition: MipsSubtarget.h:285
llvm::MipsAsmPrinter::MCInstLowering
MipsMCInstLower MCInstLowering
Definition: MipsAsmPrinter.h:119
llvm::MipsTargetMachine::isLittleEndian
bool isLittleEndian() const
Definition: MipsTargetMachine.h:74
llvm::MipsTargetStreamer::emitDirectiveSetNoAt
virtual void emitDirectiveSetNoAt()
Definition: MipsTargetStreamer.cpp:68
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::MCSectionELF
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:28
MipsTargetMachine.h
llvm::MipsSubtarget::isNaN2008
bool isNaN2008() const
Definition: MipsSubtarget.h:287
DSig
@ DSig
Definition: Mips16HardFloat.cpp:98
llvm::MipsTargetStreamer::emitDirectiveSetAt
virtual void emitDirectiveSetAt()
Definition: MipsTargetStreamer.cpp:64
llvm::MachineOperand::getOffset
int64_t getOffset() const
Return the offset from the symbol in this operand.
Definition: MachineOperand.h:600
llvm::MipsTargetStreamer::emitDirectiveSetNoMacro
virtual void emitDirectiveSetNoMacro()
Definition: MipsTargetStreamer.cpp:53
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::MipsII::MO_TLSGD
@ MO_TLSGD
MO_TLSGD - Represents the offset into the global offset table at which.
Definition: MipsBaseInfo.h:58
llvm::MipsFunctionInfo
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
Definition: MipsMachineFunction.h:25
llvm::MachineOperand::getMCSymbol
MCSymbol * getMCSymbol() const
Definition: MachineOperand.h:573
llvm::MachineOperand::MO_Register
@ MO_Register
Register operand.
Definition: MachineOperand.h:52
llvm::AsmPrinter::EmitToStreamer
void EmitToStreamer(MCStreamer &S, const MCInst &Inst)
Definition: AsmPrinter.cpp:243
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
llvm::MipsInstPrinter::getRegisterName
static const char * getRegisterName(unsigned RegNo)
llvm::MipsTargetStreamer::emitDirectiveSetNoMips16
virtual void emitDirectiveSetNoMips16()
Definition: MipsTargetStreamer.cpp:49
llvm::MCInst::setOpcode
void setOpcode(unsigned Op)
Definition: MCInst.h:197
llvm::MCSymbolELF
Definition: MCSymbolELF.h:14
llvm::MipsTargetStreamer::emitDirectiveSetMacro
virtual void emitDirectiveSetMacro()
Definition: MipsTargetStreamer.cpp:52
llvm::ELF::SHT_PROGBITS
@ SHT_PROGBITS
Definition: ELF.h:910
llvm::MachineBasicBlock::getSymbol
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
Definition: MachineBasicBlock.cpp:60
llvm::MCStreamer
Streaming machine code generation interface.
Definition: MCStreamer.h:199
llvm::MipsAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER
void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI)
Definition: MipsAsmPrinter.cpp:1239
llvm::MipsAsmPrinter::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: MipsAsmPrinter.cpp:78
bb
< i1 > br i1 label label bb bb
Definition: README.txt:978
llvm::MCDR_DataRegion
@ MCDR_DataRegion
.data_region
Definition: MCDirectives.h:59
llvm::MCContext::getOrCreateSymbol
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:191
llvm::MipsMCInstLower::Initialize
void Initialize(MCContext *C)
Definition: MipsMCInstLower.cpp:31
llvm::Log2_64
unsigned Log2_64(uint64_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition: MathExtras.h:602
llvm::MipsII::MO_GOT_OFST
@ MO_GOT_OFST
Definition: MipsBaseInfo.h:81
ELF.h
TargetMachine.h
llvm::MipsAsmPrinter::emitBasicBlockEnd
void emitBasicBlockEnd(const MachineBasicBlock &MBB) override
Targets can override this to emit stuff at the end of a basic block.
Definition: MipsAsmPrinter.cpp:468
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::MipsAsmPrinter::emitFunctionBodyEnd
void emitFunctionBodyEnd() override
EmitFunctionBodyEnd - Targets can override this to emit stuff after the last basic block in the funct...
Definition: MipsAsmPrinter.cpp:448
llvm::MipsTargetStreamer::emitMask
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)
Definition: MipsTargetStreamer.cpp:79
SmallString.h
MipsTargetStreamer.h
llvm::MachineOperand::MO_GlobalAddress
@ MO_GlobalAddress
Address of a global value.
Definition: MachineOperand.h:62
llvm::Triple::str
const std::string & str() const
Definition: Triple.h:376
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::MachineOperand::getImm
int64_t getImm() const
Definition: MachineOperand.h:537
DRet
@ DRet
Definition: Mips16HardFloat.cpp:64
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:724
llvm::MipsAsmPrinter::emitFunctionEntryLabel
void emitFunctionEntryLabel() override
EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.
Definition: MipsAsmPrinter.cpp:401
llvm::MipsSubtarget::inMips16Mode
bool inMips16Mode() const
Definition: MipsSubtarget.h:300
llvm::AsmPrinter::OutStreamer
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
Definition: AsmPrinter.h:97
llvm::MCStreamer::emitRelocDirective
virtual Optional< std::pair< bool, std::string > > emitRelocDirective(const MCExpr &Offset, StringRef Name, const MCExpr *Expr, SMLoc Loc, const MCSubtargetInfo &STI)
Record a relocation described by the .reloc directive.
Definition: MCStreamer.h:1052
Twine.h
MCSymbolELF.h
MCContext.h
Y
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
llvm::MCStreamer::emitLabel
virtual void emitLabel(MCSymbol *Symbol, SMLoc Loc=SMLoc())
Emit a label for Symbol into the current section.
Definition: MCStreamer.cpp:415
MCSymbol.h
llvm::MCObjectFileInfo::isPositionIndependent
bool isPositionIndependent() const
Definition: MCObjectFileInfo.h:424
Mips.h
llvm::MCContext::getELFSection
MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)
Definition: MCContext.h:540
MCInst.h
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::MipsII::MO_HIGHEST
@ MO_HIGHEST
Definition: MipsBaseInfo.h:86
llvm::MachineOperand
MachineOperand class - Representation of each machine instruction operand.
Definition: MachineOperand.h:49
llvm::MachineConstantPoolEntry::Val
union llvm::MachineConstantPoolEntry::@180 Val
The constant itself.
llvm::Mips16HardFloatInfo::FuncSignature
Definition: Mips16HardFloatInfo.h:33
llvm::MipsAsmPrinter::PrintAsmOperand
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.
Definition: MipsAsmPrinter.cpp:518
llvm::AsmPrinter::CurrentFnSym
MCSymbol * CurrentFnSym
The symbol for the current function.
Definition: AsmPrinter.h:119
llvm::AsmPrinter::emitAlignment
void emitAlignment(Align Alignment, const GlobalObject *GV=nullptr) const
Emit an alignment directive to the specified power of two boundary.
Definition: AsmPrinter.cpp:2450
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::MipsABIInfo::ABI::O32
@ O32
llvm::AArch64CC::LE
@ LE
Definition: AArch64BaseInfo.h:268
llvm::MipsAsmPrinter::printMemOperand
void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:727
llvm::MipsMCInstLower::Lower
void Lower(const MachineInstr *MI, MCInst &OutMI) const
Definition: MipsMCInstLower.cpp:315
llvm::MipsTargetStreamer::emitDirectiveSetNoReorder
virtual void emitDirectiveSetNoReorder()
Definition: MipsTargetStreamer.cpp:51
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:553
llvm::MCSymbol::getName
StringRef getName() const
getName - Get the symbol name.
Definition: MCSymbol.h:198
llvm::MipsAsmPrinter::Subtarget
const MipsSubtarget * Subtarget
Definition: MipsAsmPrinter.h:117
llvm::MipsII::MO_ABS_LO
@ MO_ABS_LO
Definition: MipsBaseInfo.h:53
llvm::MCObjectFileInfo::getTextSection
MCSection * getTextSection() const
Definition: MCObjectFileInfo.h:258
FDSig
@ FDSig
Definition: Mips16HardFloat.cpp:97
llvm::MCSymbol::print
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:59
llvm::Mips16HardFloatInfo::FuncSignature::RetSig
FPReturnVariant RetSig
Definition: Mips16HardFloatInfo.h:35
llvm::None
const NoneType None
Definition: None.h:23
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::MipsAsmPrinter::printFCCOperand
void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier=nullptr)
Definition: MipsAsmPrinter.cpp:759
llvm::MCInst::addOperand
void addOperand(const MCOperand Op)
Definition: MCInst.h:210
llvm::SmallString< 128 >
llvm::MipsSubtarget::isABI_FPXX
bool isABI_FPXX() const
Definition: MipsSubtarget.h:234
llvm::MIPS_NACL_BUNDLE_ALIGN
static const Align MIPS_NACL_BUNDLE_ALIGN
Definition: MipsMCNaCl.h:18
llvm::MachineBasicBlock::setAlignment
void setAlignment(Align A)
Set alignment of the basic block.
Definition: MachineBasicBlock.h:522
llvm::MipsSubtarget::isLittle
bool isLittle() const
Definition: MipsSubtarget.h:281
llvm::MipsII::MO_GOT_CALL
@ MO_GOT_CALL
MO_GOT_CALL - Represents the offset into the global offset table at which the address of a call site ...
Definition: MipsBaseInfo.h:44
llvm::AsmPrinter::emitMachineConstantPoolValue
virtual void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV)
Definition: AsmPrinter.cpp:3090
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:626
llvm::Mips16HardFloatInfo::FPReturnVariant
FPReturnVariant
Definition: Mips16HardFloatInfo.h:25
llvm::Function::hasFnAttribute
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:626
BasicBlock.h
llvm::cl::opt< bool >
llvm::MipsAsmPrinter::getCurrentABIString
const char * getCurrentABIString() const
Emit Set directives.
Definition: MipsAsmPrinter.cpp:392
llvm::MipsABIInfo::ABI::N64
@ N64
llvm::RISCVFenceField::O
@ O
Definition: RISCVBaseInfo.h:197
llvm::MipsAsmPrinter::isBlockOnlyReachableByFallthrough
bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const override
isBlockOnlyReachableByFallthough - Return true if the basic block has exactly one predecessor and the...
Definition: MipsAsmPrinter.cpp:478
llvm::MipsSubtarget::hasMips32r6
bool hasMips32r6() const
Definition: MipsSubtarget.h:268
llvm::Twine::utohexstr
static Twine utohexstr(const uint64_t &Val)
Definition: Twine.h:408
llvm::MipsAsmPrinter::printMemOperandEA
void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:750
llvm::MachineBasicBlock::pred_end
pred_iterator pred_end()
Definition: MachineBasicBlock.h:318
llvm::MachineOperand::getTargetFlags
unsigned getTargetFlags() const
Definition: MachineOperand.h:221
llvm::AsmPrinter::GetCPISymbol
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
Definition: AsmPrinter.cpp:3125
llvm::MachineOperand::isReg
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Definition: MachineOperand.h:321
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
CDRet
@ CDRet
Definition: Mips16HardFloat.cpp:64
llvm::MachineBasicBlock::hasAddressTaken
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
Definition: MachineBasicBlock.h:211
MipsTargetInfo.h
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:132
llvm::MCOperand::isValid
bool isValid() const
Definition: MCInst.h:60
llvm::AsmPrinter::GetBlockAddressSymbol
MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const
Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.
Definition: AsmPrinter.cpp:3116
MipsInstPrinter.h
llvm::DataLayout::isLittleEndian
bool isLittleEndian() const
Layout endianness...
Definition: DataLayout.h:242
llvm::TargetRegisterInfo::getFrameRegister
virtual Register getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
llvm::numbers::e
constexpr double e
Definition: MathExtras.h:57
LLVMInitializeMipsAsmPrinter
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsAsmPrinter()
Definition: MipsAsmPrinter.cpp:1309
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::MipsAsmPrinter::printOperand
void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O)
Definition: MipsAsmPrinter.cpp:661
MipsMachineFunction.h
FRet
@ FRet
Definition: Mips16HardFloat.cpp:64
DDSig
@ DDSig
Definition: Mips16HardFloat.cpp:98
llvm::MCInstBuilder
Definition: MCInstBuilder.h:21
MachineConstantPool.h
llvm::StringRef::lower
LLVM_NODISCARD std::string lower() const
Definition: StringRef.cpp:105
llvm::MipsTargetStreamer::emitDirectiveNaN2008
virtual void emitDirectiveNaN2008()
Definition: MipsTargetStreamer.cpp:72
llvm::MachineOperand::getType
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
Definition: MachineOperand.h:219
llvm::MipsAsmPrinter::emitDebugValue
void emitDebugValue(const MCExpr *Value, unsigned Size) const override
Emit the directive and value for debug thread local expression.
Definition: MipsAsmPrinter.cpp:1258
llvm::MipsAsmPrinter::emitFrameDirective
void emitFrameDirective()
Frame Directive.
Definition: MipsAsmPrinter.cpp:381
llvm::MachineFunction::getConstantPool
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
Definition: MachineFunction.h:658
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MachineConstantPoolEntry::isMachineConstantPoolEntry
bool isMachineConstantPoolEntry() const
isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry is indeed a target specific ...
Definition: MachineConstantPool.h:93
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:79
MipsMCNaCl.h
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:642
llvm::MCBinaryExpr::createSub
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:609
llvm::AsmPrinter::MF
MachineFunction * MF
The current machine function.
Definition: AsmPrinter.h:100
llvm::MipsII::MO_GOT_DISP
@ MO_GOT_DISP
Definition: MipsBaseInfo.h:79
MipsMCTargetDesc.h
llvm::getTheMipsTarget
Target & getTheMipsTarget()
Definition: MipsTargetInfo.cpp:13
llvm::AsmPrinter::OutContext
MCContext & OutContext
This is the context for the output file that we are streaming.
Definition: AsmPrinter.h:92
llvm::MipsAsmPrinter::emitStartOfAsmFile
void emitStartOfAsmFile(Module &M) override
This virtual method can be overridden by targets that want to emit something at the start of their fi...
Definition: MipsAsmPrinter.cpp:773
llvm::MachineOperand::getReg
Register getReg() const
getReg - Returns the register number.
Definition: MachineOperand.h:360
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:67
RA
SI optimize exec mask operations pre RA
Definition: SIOptimizeExecMaskingPreRA.cpp:71
llvm::MipsTargetStreamer::emitDirectiveAbiCalls
virtual void emitDirectiveAbiCalls()
Definition: MipsTargetStreamer.cpp:71
llvm::MipsTargetStreamer::emitDirectiveNaNLegacy
virtual void emitDirectiveNaNLegacy()
Definition: MipsTargetStreamer.cpp:73
llvm::MipsABIInfo::ABI::N32
@ N32
llvm::MCSymbolRefExpr
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:192
llvm::MachineBasicBlock::pred_empty
bool pred_empty() const
Definition: MachineBasicBlock.h:331
llvm::MachineFunction
Definition: MachineFunction.h:230
Triple.h
llvm::MipsII::MO_TPREL_LO
@ MO_TPREL_LO
Definition: MipsBaseInfo.h:74
llvm::AsmPrinter::emitDebugValue
virtual void emitDebugValue(const MCExpr *Value, unsigned Size) const
Emit the directive and value for debug thread local expression.
Definition: AsmPrinter.cpp:706
llvm::AsmPrinter::runOnMachineFunction
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: AsmPrinter.h:341
llvm::MachineFrameInfo::getCalleeSavedInfo
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
Definition: MachineFrameInfo.h:755
llvm::MipsII::MO_GOT
@ MO_GOT
MO_GOT - Represents the offset into the global offset table at which the address the relocation entry...
Definition: MipsBaseInfo.h:38
llvm::MCRegisterInfo::getRARegister
MCRegister getRARegister() const
This method should return the register where the return address can be found.
Definition: MCRegisterInfo.h:437
llvm::ELF::SHF_ALLOC
@ SHF_ALLOC
Definition: ELF.h:988
llvm::MachineOperand::getMBB
MachineBasicBlock * getMBB() const
Definition: MachineOperand.h:552
DataLayout.h
llvm::MachineBasicBlock::isEHPad
bool isEHPad() const
Returns true if the block is a landing pad.
Definition: MachineBasicBlock.h:526
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm::MipsTargetStreamer::updateABIInfo
void updateABIInfo(const PredicateLibrary &P)
Definition: MipsTargetStreamer.h:174
llvm::MipsAsmPrinter::LowerPATCHABLE_TAIL_CALL
void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI)
Definition: MipsAsmPrinter.cpp:1247
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
NoFPRet
@ NoFPRet
Definition: Mips16HardFloat.cpp:64
llvm::MCOperand::createReg
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:134
llvm::AsmPrinter::SledKind::FUNCTION_EXIT
@ FUNCTION_EXIT
TargetLoweringObjectFile.h
llvm::MachineOperand::MO_MachineBasicBlock
@ MO_MachineBasicBlock
MachineBasicBlock reference.
Definition: MachineOperand.h:56
TargetSubtargetInfo.h
llvm::TargetMachine::getTargetFeatureString
StringRef getTargetFeatureString() const
Definition: TargetMachine.h:130
llvm::getTheMips64elTarget
Target & getTheMips64elTarget()
Definition: MipsTargetInfo.cpp:25
llvm::MipsTargetStreamer::emitDirectiveModuleOddSPReg
virtual void emitDirectiveModuleOddSPReg()
Definition: MipsTargetStreamer.cpp:147
llvm::getTheMips64Target
Target & getTheMips64Target()
Definition: MipsTargetInfo.cpp:21
llvm::MipsAsmPrinter::emitFunctionBodyStart
void emitFunctionBodyStart() override
EmitFunctionBodyStart - Targets can override this to emit stuff before the first basic block in the f...
Definition: MipsAsmPrinter.cpp:427
llvm::MipsSubtarget
Definition: MipsSubtarget.h:39
CFRet
@ CFRet
Definition: Mips16HardFloat.cpp:64
llvm::MCContext::createTempSymbol
MCSymbol * createTempSymbol()
Create a temporary symbol with a unique name.
Definition: MCContext.cpp:303
emitDirectiveRelocJalr
static void emitDirectiveRelocJalr(const MachineInstr &MI, MCContext &OutContext, TargetMachine &TM, MCStreamer &OutStreamer, const MipsSubtarget &Subtarget)
Definition: MipsAsmPrinter.cpp:161
MipsMCInstLower.h
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MipsSubtarget::inMicroMipsMode
bool inMicroMipsMode() const
Definition: MipsSubtarget.h:311
llvm::AsmPrinter::SledKind::TAIL_CALL
@ TAIL_CALL
MipsAsmPrinter.h
Callee
amdgpu Simplify well known AMD library false FunctionCallee Callee
Definition: AMDGPULibCalls.cpp:206
llvm::MipsTargetStreamer::emitFMask
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)
Definition: MipsTargetStreamer.cpp:80
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
Attributes.h
llvm::MipsSubtarget::isGP64bit
bool isGP64bit() const
Definition: MipsSubtarget.h:289
llvm::MipsII::MO_GPOFF_LO
@ MO_GPOFF_LO
Definition: MipsBaseInfo.h:78
llvm::MipsMCExpr::MEK_DTPREL
@ MEK_DTPREL
Definition: MipsMCExpr.h:24
llvm::Target::createMCSubtargetInfo
MCSubtargetInfo * createMCSubtargetInfo(StringRef TheTriple, StringRef CPU, StringRef Features) const
createMCSubtargetInfo - Create a MCSubtargetInfo implementation.
Definition: TargetRegistry.h:435
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:83
llvm::MipsTargetStreamer::emitDirectiveSetMicroMips
virtual void emitDirectiveSetMicroMips()
Definition: MipsTargetStreamer.cpp:45
llvm::MachineConstantPoolEntry
This class is a data container for one entry in a MachineConstantPool.
Definition: MachineConstantPool.h:67
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition: MachineFunction.h:592
llvm::TargetRegisterInfo::getRegSizeInBits
unsigned getRegSizeInBits(const TargetRegisterClass &RC) const
Return the size in bits of a register from class RC.
Definition: TargetRegisterInfo.h:276
llvm::MipsAsmPrinter::printSavedRegsBitmask
void printSavedRegsBitmask()
Definition: MipsAsmPrinter.cpp:328
llvm::MachineConstantPool::getConstants
const std::vector< MachineConstantPoolEntry > & getConstants() const
Definition: MachineConstantPool.h:145
llvm::MipsTargetStreamer::forbidModuleDirective
void forbidModuleDirective()
Definition: MipsTargetStreamer.h:167
DFSig
@ DFSig
Definition: Mips16HardFloat.cpp:98
llvm::AsmPrinter::getSubtargetInfo
const MCSubtargetInfo & getSubtargetInfo() const
Return information about subtarget.
Definition: AsmPrinter.cpp:238
llvm::ilist_iterator
Iterator for intrusive lists based on ilist_node.
Definition: ilist_iterator.h:57
MachineFrameInfo.h
llvm::DataLayout::getPrivateGlobalPrefix
StringRef getPrivateGlobalPrefix() const
Definition: DataLayout.h:332
llvm::SectionName
Definition: DWARFSection.h:21
MipsABIInfo.h
llvm::MachineOperand::getIndex
int getIndex() const
Definition: MachineOperand.h:557
llvm::X86AS::FS
@ FS
Definition: X86.h:188
Casting.h
llvm::Mips::MipsFCCToString
const char * MipsFCCToString(Mips::CondCode CC)
Definition: MipsInstPrinter.cpp:36
llvm::MipsTargetStreamer
Definition: MipsTargetStreamer.h:24
Function.h
llvm::MipsTargetStreamer::setUsesMicroMips
virtual void setUsesMicroMips()
Definition: MipsTargetStreamer.cpp:47
x
TODO unsigned x
Definition: README.txt:10
llvm::MipsSubtarget::isABICalls
bool isABICalls() const
Definition: MipsSubtarget.h:282
llvm::Mips16HardFloatInfo::FuncSignature::ParamSig
FPParamVariant ParamSig
Definition: Mips16HardFloatInfo.h:34
llvm::MipsAsmPrinter::emitInstruction
void emitInstruction(const MachineInstr *MI) override
Targets should implement this to emit instructions.
Definition: MipsAsmPrinter.cpp:188
llvm::MCSymbolRefExpr::create
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:385
llvm::MachineBasicBlock::isLayoutSuccessor
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
Definition: MachineBasicBlock.cpp:912
llvm::MCSA_Global
@ MCSA_Global
.type _foo, @gnu_unique_object
Definition: MCDirectives.h:30
llvm::MIPS_MC::selectMipsCPU
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
Definition: MipsMCTargetDesc.cpp:48
llvm::MachineOperand::isImm
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Definition: MachineOperand.h:323
llvm::MCSA_ELF_TypeFunction
@ MCSA_ELF_TypeFunction
.type _foo, STT_FUNC # aka @function
Definition: MCDirectives.h:23
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:79
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:107
llvm::MipsII::MO_ABS_HI
@ MO_ABS_HI
MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol address.
Definition: MipsBaseInfo.h:52
llvm::MipsII::MO_GPOFF_HI
@ MO_GPOFF_HI
Definition: MipsBaseInfo.h:77
Instructions.h
llvm::TargetMachine::getTargetCPU
StringRef getTargetCPU() const
Definition: TargetMachine.h:129
llvm::AsmPrinter::TM
TargetMachine & TM
Target machine description.
Definition: AsmPrinter.h:85
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:268
llvm::InlineAsm::getNumOperandRegisters
static unsigned getNumOperandRegisters(unsigned Flag)
getNumOperandRegisters - Extract the number of registers field from the inline asm operand flag.
Definition: InlineAsm.h:339
llvm::MipsSubtarget::isTargetNaCl
bool isTargetNaCl() const
Definition: MipsSubtarget.h:352
llvm::MipsII::MO_GPREL
@ MO_GPREL
MO_GPREL - Represents the offset from the current gp value to be used for the relocatable object file...
Definition: MipsBaseInfo.h:48
llvm::MipsTargetStreamer::emitDirectiveSetPop
virtual void emitDirectiveSetPop()
Definition: MipsTargetStreamer.cpp:101
llvm::MipsTargetStreamer::emitDirectiveEnd
virtual void emitDirectiveEnd(StringRef Name)
Definition: MipsTargetStreamer.cpp:69
llvm::AsmPrinter::getObjFileLowering
const TargetLoweringObjectFile & getObjFileLowering() const
Return information about object file lowering.
Definition: AsmPrinter.cpp:224
llvm::TargetMachine::getTargetTriple
const Triple & getTargetTriple() const
Definition: TargetMachine.h:128
NoSig
@ NoSig
Definition: Mips16HardFloat.cpp:98
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:340
llvm::MipsAsmPrinter::emitEndOfAsmFile
void emitEndOfAsmFile(Module &M) override
This virtual method can be overridden by targets that want to emit something at the end of their file...
Definition: MipsAsmPrinter.cpp:1125
MipsSubtarget.h
llvm::MachineFunction::getDataLayout
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Definition: MachineFunction.cpp:260
llvm::MachineBasicBlock::empty
bool empty() const
Definition: MachineBasicBlock.h:240
llvm::raw_svector_ostream
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:658
llvm::AsmPrinter::getDataLayout
const DataLayout & getDataLayout() const
Return information about data layout.
Definition: AsmPrinter.cpp:228
llvm::AsmPrinter::SledKind::FUNCTION_ENTER
@ FUNCTION_ENTER
MachineOperand.h
llvm::MipsSubtarget::isFP64bit
bool isFP64bit() const
Definition: MipsSubtarget.h:284
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
llvm::AsmPrinter::emitXRayTable
void emitXRayTable()
Emit a table with all XRay instrumentation points.
Definition: AsmPrinter.cpp:3474
llvm::MipsTargetStreamer::emitDirectiveSetReorder
virtual void emitDirectiveSetReorder()
Definition: MipsTargetStreamer.cpp:50
llvm::MachineFunction::getJumpTableInfo
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
Definition: MachineFunction.h:649
llvm::RegisterAsmPrinter
RegisterAsmPrinter - Helper template for registering a target specific assembly printer,...
Definition: TargetRegistry.h:1338
llvm::MipsMCInstLower::LowerOperand
MCOperand LowerOperand(const MachineOperand &MO, int64_t offset=0) const
Definition: MipsMCInstLower.cpp:177
llvm::MipsSubtarget::useSoftFloat
bool useSoftFloat() const
Definition: MipsSubtarget.h:333
llvm::TargetMachine::getTarget
const Target & getTarget() const
Definition: TargetMachine.h:126
llvm::MipsII::MO_HIGHER
@ MO_HIGHER
MO_HIGHER/HIGHEST - Represents the highest or higher half word of a 64-bit symbol address.
Definition: MipsBaseInfo.h:85
llvm::MachineJumpTableInfo
Definition: MachineJumpTableInfo.h:42
FSig
@ FSig
Definition: Mips16HardFloat.cpp:97
raw_ostream.h
MachineFunction.h
llvm::MachineInstrBundleIterator< const MachineInstr >
llvm::isPowerOf2_64
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
Definition: MathExtras.h:496
llvm::MCDR_DataRegionEnd
@ MCDR_DataRegionEnd
.end_data_region
Definition: MCDirectives.h:63
TargetRegistry.h
llvm::MachineFunction::getAlignment
Align getAlignment() const
getAlignment - Return the alignment of the function.
Definition: MachineFunction.h:674
MCExpr.h
llvm::MipsTargetStreamer::emitDirectiveSetNoMicroMips
virtual void emitDirectiveSetNoMicroMips()
Definition: MipsTargetStreamer.cpp:46
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::AsmPrinter::getFunctionNumber
unsigned getFunctionNumber() const
Return a unique ID for the current function.
Definition: AsmPrinter.cpp:220
llvm::MachineConstantPoolEntry::ConstVal
const Constant * ConstVal
Definition: MachineConstantPool.h:71
llvm::MipsII::MO_GOT_PAGE
@ MO_GOT_PAGE
Definition: MipsBaseInfo.h:80
llvm::MipsTargetStreamer::emitDirectiveSetPush
virtual void emitDirectiveSetPush()
Definition: MipsTargetStreamer.cpp:102
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
TargetRegisterInfo.h
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
llvm::MachineBasicBlock::end
iterator end()
Definition: MachineBasicBlock.h:270
llvm::AsmPrinter::PrintAsmOperand
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.
Definition: AsmPrinterInlineAsm.cpp:599
llvm::MachineOperand::MO_ConstantPoolIndex
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
Definition: MachineOperand.h:58
llvm::getTheMipselTarget
Target & getTheMipselTarget()
Definition: MipsTargetInfo.cpp:17