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47 const auto Arch = TT.getArch();
49 return "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-"
50 "v96:128-v192:256-v256:256-v512:512-v1024:1024";
51 return "e-i64:64-v16:16-v24:32-v32:32-v48:64-"
52 "v96:128-v192:256-v256:256-v512:512-v1024:1024";
74 Subtarget(TT, CPU.str(),
FS.str(), *
this) {
90 return getTM<SPIRVTargetMachine>();
92 void addIRPasses()
override;
93 void addISelPrepare()
override;
95 bool addIRTranslator()
override;
96 void addPreLegalizeMachineIR()
override;
97 bool addLegalizeMachineIR()
override;
98 bool addRegBankSelect()
override;
99 bool addGlobalInstructionSelect()
override;
101 FunctionPass *createTargetRegisterAllocator(
bool)
override;
102 void addFastRegAlloc()
override {}
103 void addOptimizedRegAlloc()
override {}
105 void addPostRegAlloc()
override;
111 FunctionPass *SPIRVPassConfig::createTargetRegisterAllocator(
bool) {
116 void SPIRVPassConfig::addPostRegAlloc() {
140 return new SPIRVPassConfig(*
this, PM);
145 void SPIRVPassConfig::addISelPrepare() {
150 bool SPIRVPassConfig::addIRTranslator() {
155 void SPIRVPassConfig::addPreLegalizeMachineIR() {
160 bool SPIRVPassConfig::addLegalizeMachineIR() {
166 bool SPIRVPassConfig::addRegBankSelect() {
183 bool SPIRVPassConfig::addGlobalInstructionSelect() {
184 addPass(
new SPIRVInstructionSelect());
virtual void addPostRegAlloc()
This method may be implemented by targets that want to run passes after register allocation pass pipe...
This is an optimization pass for GlobalISel generic memory operations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
SPIRVTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
Properties which a MachineFunction may have at a given point in time.
void initializeGlobalISel(PassRegistry &)
Initialize all passes linked into the GlobalISel library.
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
void initializeSPIRVModuleAnalysisPass(PassRegistry &)
static std::string computeDataLayout(const Triple &TT)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSPIRVTarget()
char & LiveDebugValuesID
LiveDebugValues pass.
Target & getTheSPIRV32Target()
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
char & FuncletLayoutID
This pass lays out funclets contiguously.
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
This pass is responsible for selecting generic machine instructions to target-specific instructions.
RegisterTargetMachine - Helper template for registering a target machine implementation,...
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
Target-Independent Code Generator Pass Configuration Options.
void setO0WantsFastISel(bool Enable)
void setRequiresStructuredCFG(bool Value)
#define LLVM_EXTERNAL_VISIBILITY
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
StringRef - Represent a constant reference to a string, i.e.
Analysis the ScalarEvolution expression for r is this
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
FunctionPass * createSPIRVEmitIntrinsicsPass(SPIRVTargetMachine *TM)
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
MachineFunctionProperties & reset(Property P)
void setFastISel(bool Enable)
static Reloc::Model getEffectiveRelocModel(Optional< Reloc::Model > RM)
Target & getTheSPIRV64Target()
CodeModel::Model getEffectiveCodeModel(Optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
MachineFunctionProperties getRequiredProperties() const override
FunctionPass * createSPIRVPreLegalizerPass()
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
This class describes a target machine that is implemented with the LLVM target-independent code gener...
void setGlobalISel(bool Enable)
virtual void addISelPrepare()
Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
~SPIRVTargetObjectFile() override
const char LLVMTargetMachineRef TM
FunctionPass class - This class is used to implement most global optimizations.
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.