LLVM  16.0.0git
SPIRVUtils.h
Go to the documentation of this file.
1 //===--- SPIRVUtils.h ---- SPIR-V Utility Functions -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains miscellaneous utility functions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
14 #define LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
15 
17 #include "llvm/IR/IRBuilder.h"
18 #include <string>
19 
20 namespace llvm {
21 class MCInst;
22 class MachineFunction;
23 class MachineInstr;
24 class MachineInstrBuilder;
25 class MachineIRBuilder;
26 class MachineRegisterInfo;
27 class Register;
28 class StringRef;
29 class SPIRVInstrInfo;
30 
31 // Add the given string as a series of integer operand, inserting null
32 // terminators and padding to make sure the operands all have 32-bit
33 // little-endian words.
34 void addStringImm(const StringRef &Str, MCInst &Inst);
35 void addStringImm(const StringRef &Str, MachineInstrBuilder &MIB);
36 void addStringImm(const StringRef &Str, IRBuilder<> &B,
37  std::vector<Value *> &Args);
38 
39 // Read the series of integer operands back as a null-terminated string using
40 // the reverse of the logic in addStringImm.
41 std::string getStringImm(const MachineInstr &MI, unsigned StartIndex);
42 
43 // Add the given numerical immediate to MIB.
44 void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB);
45 
46 // Add an OpName instruction for the given target register.
47 void buildOpName(Register Target, const StringRef &Name,
48  MachineIRBuilder &MIRBuilder);
49 
50 // Add an OpDecorate instruction for the given Reg.
51 void buildOpDecorate(Register Reg, MachineIRBuilder &MIRBuilder,
52  SPIRV::Decoration::Decoration Dec,
53  const std::vector<uint32_t> &DecArgs,
54  StringRef StrImm = "");
55 void buildOpDecorate(Register Reg, MachineInstr &I, const SPIRVInstrInfo &TII,
56  SPIRV::Decoration::Decoration Dec,
57  const std::vector<uint32_t> &DecArgs,
58  StringRef StrImm = "");
59 
60 // Convert a SPIR-V storage class to the corresponding LLVM IR address space.
62 
63 // Convert an LLVM IR address space to a SPIR-V storage class.
65 addressSpaceToStorageClass(unsigned AddrSpace);
66 
67 SPIRV::MemorySemantics::MemorySemantics
69 
70 SPIRV::MemorySemantics::MemorySemantics getMemSemantics(AtomicOrdering Ord);
71 
72 // Find def instruction for the given ConstReg, walking through
73 // spv_track_constant and ASSIGN_TYPE instructions. Updates ConstReg by def
74 // of OpConstant instruction.
75 MachineInstr *getDefInstrMaybeConstant(Register &ConstReg,
76  const MachineRegisterInfo *MRI);
77 
78 // Get constant integer value of the given ConstReg.
79 uint64_t getIConstVal(Register ConstReg, const MachineRegisterInfo *MRI);
80 
81 // Check if MI is a SPIR-V specific intrinsic call.
82 bool isSpvIntrinsic(MachineInstr &MI, Intrinsic::ID IntrinsicID);
83 
84 // Get type of i-th operand of the metadata node.
85 Type *getMDOperandAsType(const MDNode *N, unsigned I);
86 
87 // If OpenCL or SPIR-V builtin function name is recognized, return a demangled
88 // name, otherwise return an empty string.
89 std::string getOclOrSpirvBuiltinDemangledName(StringRef Name);
90 
91 // If Type is a pointer type and it is not opaque pointer, return its
92 // element type, otherwise return Type.
93 const Type *getTypedPtrEltType(const Type *Type);
94 
95 // Check if given LLVM type is a special opaque builtin type.
96 bool isSpecialOpaqueType(const Type *Ty);
97 
98 std::string getFunctionGlobalIdentifier(const Function *F);
99 } // namespace llvm
100 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:109
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::IRBuilder<>
llvm::AMDGPU::Exp::Target
Target
Definition: SIDefines.h:855
F
#define F(x, y, z)
Definition: MD5.cpp:55
llvm::addStringImm
void addStringImm(const StringRef &Str, MCInst &Inst)
Definition: SPIRVUtils.cpp:49
llvm::PPCISD::SC
@ SC
CHAIN = SC CHAIN, Imm128 - System call.
Definition: PPCISelLowering.h:420
llvm::buildOpName
void buildOpName(Register Target, const StringRef &Name, MachineIRBuilder &MIRBuilder)
Definition: SPIRVUtils.cpp:100
SPIRVBaseInfo.h
StorageClass
COFF::SymbolStorageClass StorageClass
Definition: COFFYAML.cpp:361
llvm::getTypedPtrEltType
const Type * getTypedPtrEltType(const Type *Ty)
Definition: SPIRVUtils.cpp:345
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::addressSpaceToStorageClass
SPIRV::StorageClass::StorageClass addressSpaceToStorageClass(unsigned AddrSpace)
Definition: SPIRVUtils.cpp:158
Register
Promote Memory to Register
Definition: Mem2Reg.cpp:110
llvm::getMDOperandAsType
Type * getMDOperandAsType(const MDNode *N, unsigned I)
Definition: SPIRVUtils.cpp:239
llvm::getOclOrSpirvBuiltinDemangledName
std::string getOclOrSpirvBuiltinDemangledName(StringRef Name)
Definition: SPIRVUtils.cpp:292
llvm::AtomicOrdering
AtomicOrdering
Atomic ordering for LLVM's memory model.
Definition: AtomicOrdering.h:56
llvm::getMemSemantics
SPIRV::MemorySemantics::MemorySemantics getMemSemantics(AtomicOrdering Ord)
Definition: SPIRVUtils.cpp:196
llvm::getStringImm
std::string getStringImm(const MachineInstr &MI, unsigned StartIndex)
Definition: SPIRVUtils.cpp:74
llvm::getIConstVal
uint64_t getIConstVal(Register ConstReg, const MachineRegisterInfo *MRI)
Definition: SPIRVUtils.cpp:228
uint64_t
I
#define I(x, y, z)
Definition: MD5.cpp:58
TemplateParamKind::Type
@ Type
IRBuilder.h
llvm::getDefInstrMaybeConstant
MachineInstr * getDefInstrMaybeConstant(Register &ConstReg, const MachineRegisterInfo *MRI)
Definition: SPIRVUtils.cpp:214
llvm::addNumImm
void addNumImm(const APInt &Imm, MachineInstrBuilder &MIB)
Definition: SPIRVUtils.cpp:78
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::isSpecialOpaqueType
bool isSpecialOpaqueType(const Type *Ty)
Definition: SPIRVUtils.cpp:352
llvm::RISCVMatInt::Imm
@ Imm
Definition: RISCVMatInt.h:23
llvm::getMemSemanticsForStorageClass
SPIRV::MemorySemantics::MemorySemantics getMemSemanticsForStorageClass(SPIRV::StorageClass::StorageClass SC)
Definition: SPIRVUtils.cpp:178
N
#define N
llvm::storageClassToAddressSpace
unsigned storageClassToAddressSpace(SPIRV::StorageClass::StorageClass SC)
Definition: SPIRVUtils.cpp:138
llvm::getFunctionGlobalIdentifier
std::string getFunctionGlobalIdentifier(const Function *F)
Definition: SPIRVUtils.cpp:358
llvm::buildOpDecorate
void buildOpDecorate(Register Reg, MachineIRBuilder &MIRBuilder, SPIRV::Decoration::Decoration Dec, const std::vector< uint32_t > &DecArgs, StringRef StrImm)
Definition: SPIRVUtils.cpp:117
llvm::isSpvIntrinsic
bool isSpvIntrinsic(MachineInstr &MI, Intrinsic::ID IntrinsicID)
Definition: SPIRVUtils.cpp:234
llvm::AMDGPU::HSAMD::Kernel::Key::Args
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Definition: AMDGPUMetadata.h:394
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:39