LLVM  15.0.0git
SPIRVUtils.h
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1 //===--- SPIRVUtils.h ---- SPIR-V Utility Functions -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains miscellaneous utility functions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
14 #define LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
15 
17 #include "llvm/IR/IRBuilder.h"
18 #include <string>
19 
20 namespace llvm {
21 class MCInst;
22 class MachineFunction;
23 class MachineInstr;
24 class MachineInstrBuilder;
25 class MachineIRBuilder;
26 class MachineRegisterInfo;
27 class Register;
28 class StringRef;
29 class SPIRVInstrInfo;
30 } // namespace llvm
31 
32 // Add the given string as a series of integer operand, inserting null
33 // terminators and padding to make sure the operands all have 32-bit
34 // little-endian words.
37  std::vector<llvm::Value *> &Args);
38 
39 // Read the series of integer operands back as a null-terminated string using
40 // the reverse of the logic in addStringImm.
41 std::string getStringImm(const llvm::MachineInstr &MI, unsigned StartIndex);
42 
43 // Add the given numerical immediate to MIB.
45 
46 // Add an OpName instruction for the given target register.
48  llvm::MachineIRBuilder &MIRBuilder);
49 
50 // Add an OpDecorate instruction for the given Reg.
53  const std::vector<uint32_t> &DecArgs,
54  llvm::StringRef StrImm = "");
58  const std::vector<uint32_t> &DecArgs,
59  llvm::StringRef StrImm = "");
60 
61 // Convert a SPIR-V storage class to the corresponding LLVM IR address space.
63 
64 // Convert an LLVM IR address space to a SPIR-V storage class.
66 
69 
70 // Find def instruction for the given ConstReg, walking through
71 // spv_track_constant and ASSIGN_TYPE instructions. Updates ConstReg by def
72 // of OpConstant instruction.
76 
77 // Get constant integer value of the given ConstReg.
80 
81 // Get type of i-th operand of the metadata node.
82 llvm::Type *getMDOperandAsType(const llvm::MDNode *N, unsigned I);
83 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
getMemSemanticsForStorageClass
llvm::SPIRV::MemorySemantics getMemSemanticsForStorageClass(llvm::SPIRV::StorageClass SC)
Definition: SPIRVUtils.cpp:167
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:17
addNumImm
void addNumImm(const llvm::APInt &Imm, llvm::MachineInstrBuilder &MIB)
Definition: SPIRVUtils.cpp:69
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:50
getDefInstrMaybeConstant
llvm::MachineInstr * getDefInstrMaybeConstant(llvm::Register &ConstReg, const llvm::MachineRegisterInfo *MRI)
Definition: SPIRVUtils.cpp:185
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::IRBuilder<>
llvm::SPIRV::Decoration
Decoration
Definition: SPIRVBaseInfo.h:456
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
storageClassToAddressSpace
unsigned storageClassToAddressSpace(llvm::SPIRV::StorageClass SC)
Definition: SPIRVUtils.cpp:129
llvm::AMDGPU::Exp::Target
Target
Definition: SIDefines.h:858
addStringImm
void addStringImm(const llvm::StringRef &Str, llvm::MachineInstrBuilder &MIB)
Definition: SPIRVUtils.cpp:48
llvm::PPCISD::SC
@ SC
CHAIN = SC CHAIN, Imm128 - System call.
Definition: PPCISelLowering.h:418
SPIRVBaseInfo.h
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:125
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
addressSpaceToStorageClass
llvm::SPIRV::StorageClass addressSpaceToStorageClass(unsigned AddrSpace)
Definition: SPIRVUtils.cpp:148
Register
Promote Memory to Register
Definition: Mem2Reg.cpp:110
llvm::SPIRV::MemorySemantics
MemorySemantics
Definition: SPIRVBaseInfo.h:647
llvm::MachineIRBuilder
Helper class to build MachineInstr.
Definition: MachineIRBuilder.h:219
getStringImm
std::string getStringImm(const llvm::MachineInstr &MI, unsigned StartIndex)
Definition: SPIRVUtils.cpp:65
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:66
llvm::MachineInstrBuilder
Definition: MachineInstrBuilder.h:69
llvm::SPIRV::StorageClass
StorageClass
Definition: SPIRVBaseInfo.h:255
uint64_t
I
#define I(x, y, z)
Definition: MD5.cpp:58
IRBuilder.h
llvm::MDNode
Metadata node.
Definition: Metadata.h:944
llvm::APInt
Class for arbitrary precision integers.
Definition: APInt.h:75
buildOpDecorate
void buildOpDecorate(llvm::Register Reg, llvm::MachineIRBuilder &MIRBuilder, llvm::SPIRV::Decoration Dec, const std::vector< uint32_t > &DecArgs, llvm::StringRef StrImm="")
Definition: SPIRVUtils.cpp:108
llvm::SPIRVInstrInfo
Definition: SPIRVInstrInfo.h:24
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:50
llvm::RISCVMatInt::Imm
@ Imm
Definition: RISCVMatInt.h:23
buildOpName
void buildOpName(llvm::Register Target, const llvm::StringRef &Name, llvm::MachineIRBuilder &MIRBuilder)
Definition: SPIRVUtils.cpp:91
N
#define N
getMDOperandAsType
llvm::Type * getMDOperandAsType(const llvm::MDNode *N, unsigned I)
Definition: SPIRVUtils.cpp:205
llvm::AMDGPU::HSAMD::Kernel::Key::Args
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Definition: AMDGPUMetadata.h:394
getIConstVal
uint64_t getIConstVal(llvm::Register ConstReg, const llvm::MachineRegisterInfo *MRI)
Definition: SPIRVUtils.cpp:199