25#define DEBUG_TYPE "aarch64-stp-suppress"
27#define STPSUPPRESS_PASS_NAME "AArch64 Store Pair Suppression"
60char AArch64StorePairSuppress::ID = 0;
67 return new AArch64StorePairSuppress();
85 unsigned SCIdx =
TII->get(AArch64::STPDi).getSchedClass();
87 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx);
92 if (ResLenWithSTP > ResLength) {
94 <<
" resources " << ResLength <<
" -> " << ResLenWithSTP
109bool AArch64StorePairSuppress::isNarrowFPStore(
const MachineInstr &
MI) {
110 switch (
MI.getOpcode()) {
113 case AArch64::STRSui:
114 case AArch64::STRDui:
115 case AArch64::STURSi:
116 case AArch64::STURDi:
121bool AArch64StorePairSuppress::runOnMachineFunction(
MachineFunction &MF) {
127 TRI =
ST.getRegisterInfo();
129 SchedModel.init(&ST);
130 Traces = &getAnalysis<MachineTraceMetrics>();
135 if (!SchedModel.hasInstrSchedModel()) {
136 LLVM_DEBUG(
dbgs() <<
" Skipping pass: no machine model present.\n");
144 for (
auto &
MBB : MF) {
145 bool SuppressSTP =
false;
146 unsigned PrevBaseReg = 0;
147 for (
auto &
MI :
MBB) {
148 if (!isNarrowFPStore(
MI))
152 bool OffsetIsScalable;
153 if (
TII->getMemOperandWithOffset(
MI, BaseOp,
Offset, OffsetIsScalable,
157 if (PrevBaseReg == BaseReg) {
159 if (!SuppressSTP && shouldAddSTPToBlock(
MI.getParent()))
164 TII->suppressLdStPair(
MI);
166 PrevBaseReg = BaseReg;
unsigned const MachineRegisterInfo * MRI
#define STPSUPPRESS_PASS_NAME
const HexagonInstrInfo * TII
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
FunctionPass class - This class is used to implement most global optimizations.
bool hasOptSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
A trace ensemble is a collection of traces selected using the same strategy, for example 'minimum res...
A trace represents a plausible sequence of executed basic blocks that passes through the current basi...
unsigned getResourceLength(ArrayRef< const MachineBasicBlock * > Extrablocks=std::nullopt, ArrayRef< const MCSchedClassDesc * > ExtraInstrs=std::nullopt, ArrayRef< const MCSchedClassDesc * > RemoveInstrs=std::nullopt) const
Return the resource length of the trace.
@ TS_MinInstrCount
Select the trace through a block that has the fewest instructions.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Wrapper class representing virtual and physical registers.
StringRef - Represent a constant reference to a string, i.e.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Provide an instruction scheduling machine model to CodeGen passes.
TargetSubtargetInfo - Generic base class for all target subtargets.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
This is an optimization pass for GlobalISel generic memory operations.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
FunctionPass * createAArch64StorePairSuppressPass()
void initializeAArch64StorePairSuppressPass(PassRegistry &)
Summarize the scheduling resources required for an instruction of a particular scheduling class.