LLVM  13.0.0git
VEFrameLowering.cpp
Go to the documentation of this file.
1 //===-- VEFrameLowering.cpp - VE Frame Information ------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the VE implementation of TargetFrameLowering class.
10 //
11 // On VE, stack frames are structured as follows:
12 //
13 // The stack grows downward.
14 //
15 // All of the individual frame areas on the frame below are optional, i.e. it's
16 // possible to create a function so that the particular area isn't present
17 // in the frame.
18 //
19 // At function entry, the "frame" looks as follows:
20 //
21 // | | Higher address
22 // |----------------------------------------------|
23 // | Parameter area for this function |
24 // |----------------------------------------------|
25 // | Register save area (RSA) for this function |
26 // |----------------------------------------------|
27 // | Return address for this function |
28 // |----------------------------------------------|
29 // | Frame pointer for this function |
30 // |----------------------------------------------| <- sp
31 // | | Lower address
32 //
33 // VE doesn't use on demand stack allocation, so user code generated by LLVM
34 // needs to call VEOS to allocate stack frame. VE's ABI want to reduce the
35 // number of VEOS calls, so ABI requires to allocate not only RSA (in general
36 // CSR, callee saved register) area but also call frame at the prologue of
37 // caller function.
38 //
39 // After the prologue has run, the frame has the following general structure.
40 // Note that technically the last frame area (VLAs) doesn't get created until
41 // in the main function body, after the prologue is run. However, it's depicted
42 // here for completeness.
43 //
44 // | | Higher address
45 // |----------------------------------------------|
46 // | Parameter area for this function |
47 // |----------------------------------------------|
48 // | Register save area (RSA) for this function |
49 // |----------------------------------------------|
50 // | Return address for this function |
51 // |----------------------------------------------|
52 // | Frame pointer for this function |
53 // |----------------------------------------------| <- fp(=old sp)
54 // |.empty.space.to.make.part.below.aligned.in....|
55 // |.case.it.needs.more.than.the.standard.16-byte.| (size of this area is
56 // |.alignment....................................| unknown at compile time)
57 // |----------------------------------------------|
58 // | Local variables of fixed size including spill|
59 // | slots |
60 // |----------------------------------------------| <- bp(not defined by ABI,
61 // |.variable-sized.local.variables.(VLAs)........| LLVM chooses SX17)
62 // |..............................................| (size of this area is
63 // |..............................................| unknown at compile time)
64 // |----------------------------------------------| <- stack top (returned by
65 // | Parameter area for callee | alloca)
66 // |----------------------------------------------|
67 // | Register save area (RSA) for callee |
68 // |----------------------------------------------|
69 // | Return address for callee |
70 // |----------------------------------------------|
71 // | Frame pointer for callee |
72 // |----------------------------------------------| <- sp
73 // | | Lower address
74 //
75 // To access the data in a frame, at-compile time, a constant offset must be
76 // computable from one of the pointers (fp, bp, sp) to access it. The size
77 // of the areas with a dotted background cannot be computed at compile-time
78 // if they are present, making it required to have all three of fp, bp and
79 // sp to be set up to be able to access all contents in the frame areas,
80 // assuming all of the frame areas are non-empty.
81 //
82 // For most functions, some of the frame areas are empty. For those functions,
83 // it may not be necessary to set up fp or bp:
84 // * A base pointer is definitely needed when there are both VLAs and local
85 // variables with more-than-default alignment requirements.
86 // * A frame pointer is definitely needed when there are local variables with
87 // more-than-default alignment requirements.
88 //
89 // In addition, VE ABI defines RSA frame, return address, and frame pointer
90 // as follows:
91 //
92 // |----------------------------------------------| <- sp+176
93 // | %s18...%s33 |
94 // |----------------------------------------------| <- sp+48
95 // | Linkage area register (%s17) |
96 // |----------------------------------------------| <- sp+40
97 // | Procedure linkage table register (%plt=%s16) |
98 // |----------------------------------------------| <- sp+32
99 // | Global offset table register (%got=%s15) |
100 // |----------------------------------------------| <- sp+24
101 // | Thread pointer register (%tp=%s14) |
102 // |----------------------------------------------| <- sp+16
103 // | Return address |
104 // |----------------------------------------------| <- sp+8
105 // | Frame pointer |
106 // |----------------------------------------------| <- sp+0
107 //
108 // NOTE: This description is based on VE ABI and description in
109 // AArch64FrameLowering.cpp. Thanks a lot.
110 //===----------------------------------------------------------------------===//
111 
112 #include "VEFrameLowering.h"
113 #include "VEInstrInfo.h"
114 #include "VEMachineFunctionInfo.h"
115 #include "VESubtarget.h"
122 #include "llvm/IR/DataLayout.h"
123 #include "llvm/IR/Function.h"
126 #include "llvm/Support/MathExtras.h"
127 
128 using namespace llvm;
129 
131  : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(16), 0,
132  Align(16)),
133  STI(ST) {}
134 
138  uint64_t NumBytes,
139  bool RequireFPUpdate) const {
140  const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
141  DebugLoc DL;
142  const VEInstrInfo &TII = *STI.getInstrInfo();
143 
144  // Insert following codes here as prologue
145  //
146  // st %fp, 0(, %sp) iff !isLeafProc
147  // st %lr, 8(, %sp) iff !isLeafProc
148  // st %got, 24(, %sp) iff hasGOT
149  // st %plt, 32(, %sp) iff hasGOT
150  // st %s17, 40(, %sp) iff hasBP
151  if (!FuncInfo->isLeafProc()) {
152  BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
153  .addReg(VE::SX11)
154  .addImm(0)
155  .addImm(0)
156  .addReg(VE::SX9);
157  BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
158  .addReg(VE::SX11)
159  .addImm(0)
160  .addImm(8)
161  .addReg(VE::SX10);
162  }
163  if (hasGOT(MF)) {
164  BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
165  .addReg(VE::SX11)
166  .addImm(0)
167  .addImm(24)
168  .addReg(VE::SX15);
169  BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
170  .addReg(VE::SX11)
171  .addImm(0)
172  .addImm(32)
173  .addReg(VE::SX16);
174  }
175  if (hasBP(MF))
176  BuildMI(MBB, MBBI, DL, TII.get(VE::STrii))
177  .addReg(VE::SX11)
178  .addImm(0)
179  .addImm(40)
180  .addReg(VE::SX17);
181 }
182 
186  uint64_t NumBytes,
187  bool RequireFPUpdate) const {
188  const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
189  DebugLoc DL;
190  const VEInstrInfo &TII = *STI.getInstrInfo();
191 
192  // Insert following codes here as epilogue
193  //
194  // ld %s17, 40(, %sp) iff hasBP
195  // ld %plt, 32(, %sp) iff hasGOT
196  // ld %got, 24(, %sp) iff hasGOT
197  // ld %lr, 8(, %sp) iff !isLeafProc
198  // ld %fp, 0(, %sp) iff !isLeafProc
199  if (hasBP(MF))
200  BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX17)
201  .addReg(VE::SX11)
202  .addImm(0)
203  .addImm(40);
204  if (hasGOT(MF)) {
205  BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX16)
206  .addReg(VE::SX11)
207  .addImm(0)
208  .addImm(32);
209  BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX15)
210  .addReg(VE::SX11)
211  .addImm(0)
212  .addImm(24);
213  }
214  if (!FuncInfo->isLeafProc()) {
215  BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX10)
216  .addReg(VE::SX11)
217  .addImm(0)
218  .addImm(8);
219  BuildMI(MBB, MBBI, DL, TII.get(VE::LDrii), VE::SX9)
220  .addReg(VE::SX11)
221  .addImm(0)
222  .addImm(0);
223  }
224 }
225 
226 void VEFrameLowering::emitSPAdjustment(MachineFunction &MF,
229  int64_t NumBytes,
230  MaybeAlign MaybeAlign) const {
231  DebugLoc DL;
232  const VEInstrInfo &TII = *STI.getInstrInfo();
233 
234  if (NumBytes == 0) {
235  // Nothing to do here.
236  } else if (isInt<7>(NumBytes)) {
237  // adds.l %s11, NumBytes@lo, %s11
238  BuildMI(MBB, MBBI, DL, TII.get(VE::ADDSLri), VE::SX11)
239  .addReg(VE::SX11)
240  .addImm(NumBytes);
241  } else if (isInt<32>(NumBytes)) {
242  // lea %s11, NumBytes@lo(, %s11)
243  BuildMI(MBB, MBBI, DL, TII.get(VE::LEArii), VE::SX11)
244  .addReg(VE::SX11)
245  .addImm(0)
246  .addImm(Lo_32(NumBytes));
247  } else {
248  // Emit following codes. This clobbers SX13 which we always know is
249  // available here.
250  // lea %s13, NumBytes@lo
251  // and %s13, %s13, (32)0
252  // lea.sl %sp, NumBytes@hi(%s13, %sp)
253  BuildMI(MBB, MBBI, DL, TII.get(VE::LEAzii), VE::SX13)
254  .addImm(0)
255  .addImm(0)
256  .addImm(Lo_32(NumBytes));
257  BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX13)
258  .addReg(VE::SX13)
259  .addImm(M0(32));
260  BuildMI(MBB, MBBI, DL, TII.get(VE::LEASLrri), VE::SX11)
261  .addReg(VE::SX11)
262  .addReg(VE::SX13)
263  .addImm(Hi_32(NumBytes));
264  }
265 
266  if (MaybeAlign) {
267  // and %sp, %sp, Align-1
268  BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX11)
269  .addReg(VE::SX11)
271  }
272 }
273 
274 void VEFrameLowering::emitSPExtend(MachineFunction &MF, MachineBasicBlock &MBB,
276  DebugLoc DL;
277  const VEInstrInfo &TII = *STI.getInstrInfo();
278 
279  // Emit following codes. It is not possible to insert multiple
280  // BasicBlocks in PEI pass, so we emit two pseudo instructions here.
281  //
282  // EXTEND_STACK // pseudo instrcution
283  // EXTEND_STACK_GUARD // pseudo instrcution
284  //
285  // EXTEND_STACK pseudo will be converted by ExpandPostRA pass into
286  // following instructions with multiple basic blocks later.
287  //
288  // thisBB:
289  // brge.l.t %sp, %sl, sinkBB
290  // syscallBB:
291  // ld %s61, 0x18(, %tp) // load param area
292  // or %s62, 0, %s0 // spill the value of %s0
293  // lea %s63, 0x13b // syscall # of grow
294  // shm.l %s63, 0x0(%s61) // store syscall # at addr:0
295  // shm.l %sl, 0x8(%s61) // store old limit at addr:8
296  // shm.l %sp, 0x10(%s61) // store new limit at addr:16
297  // monc // call monitor
298  // or %s0, 0, %s62 // restore the value of %s0
299  // sinkBB:
300  //
301  // EXTEND_STACK_GUARD pseudo will be simply eliminated by ExpandPostRA
302  // pass. This pseudo is required to be at the next of EXTEND_STACK
303  // pseudo in order to protect iteration loop in ExpandPostRA.
304  BuildMI(MBB, MBBI, DL, TII.get(VE::EXTEND_STACK));
305  BuildMI(MBB, MBBI, DL, TII.get(VE::EXTEND_STACK_GUARD));
306 }
307 
309  MachineBasicBlock &MBB) const {
310  const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
311  assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
312  MachineFrameInfo &MFI = MF.getFrameInfo();
313  const VEInstrInfo &TII = *STI.getInstrInfo();
314  const VERegisterInfo &RegInfo = *STI.getRegisterInfo();
316  bool NeedsStackRealignment = RegInfo.needsStackRealignment(MF);
317 
318  // Debug location must be unknown since the first debug location is used
319  // to determine the end of the prologue.
320  DebugLoc DL;
321 
322  // FIXME: unfortunately, returning false from canRealignStack
323  // actually just causes needsStackRealignment to return false,
324  // rather than reporting an error, as would be sensible. This is
325  // poor, but fixing that bogosity is going to be a large project.
326  // For now, just see if it's lied, and report an error here.
327  if (!NeedsStackRealignment && MFI.getMaxAlign() > getStackAlign())
328  report_fatal_error("Function \"" + Twine(MF.getName()) +
329  "\" required "
330  "stack re-alignment, but LLVM couldn't handle it "
331  "(probably because it has a dynamic alloca).");
332 
333  // Get the number of bytes to allocate from the FrameInfo.
334  // This number of bytes is already aligned to ABI stack alignment.
335  uint64_t NumBytes = MFI.getStackSize();
336 
337  // Adjust stack size if this function is not a leaf function since the
338  // VE ABI requires a reserved area at the top of stack as described in
339  // VEFrameLowering.cpp.
340  if (!FuncInfo->isLeafProc()) {
341  // NOTE: The number is aligned to ABI stack alignment after adjustment.
342  NumBytes = STI.getAdjustedFrameSize(NumBytes);
343  }
344 
345  // Finally, ensure that the size is sufficiently aligned for the
346  // data on the stack.
347  NumBytes = alignTo(NumBytes, MFI.getMaxAlign());
348 
349  // Update stack size with corrected value.
350  MFI.setStackSize(NumBytes);
351 
352  // Emit Prologue instructions to save multiple registers.
353  emitPrologueInsns(MF, MBB, MBBI, NumBytes, true);
354 
355  // Emit instructions to save SP in FP as follows if this is not a leaf
356  // function:
357  // or %fp, 0, %sp
358  if (!FuncInfo->isLeafProc())
359  BuildMI(MBB, MBBI, DL, TII.get(VE::ORri), VE::SX9)
360  .addReg(VE::SX11)
361  .addImm(0);
362 
363  // Emit stack adjust instructions
364  MaybeAlign RuntimeAlign =
365  NeedsStackRealignment ? MaybeAlign(MFI.getMaxAlign()) : None;
366  assert((RuntimeAlign == None || !FuncInfo->isLeafProc()) &&
367  "SP has to be saved in order to align variable sized stack object!");
368  emitSPAdjustment(MF, MBB, MBBI, -(int64_t)NumBytes, RuntimeAlign);
369 
370  if (hasBP(MF)) {
371  // Copy SP to BP.
372  BuildMI(MBB, MBBI, DL, TII.get(VE::ORri), VE::SX17)
373  .addReg(VE::SX11)
374  .addImm(0);
375  }
376 
377  // Emit stack extend instructions
378  if (NumBytes != 0)
379  emitSPExtend(MF, MBB, MBBI);
380 }
381 
385  if (!hasReservedCallFrame(MF)) {
386  MachineInstr &MI = *I;
387  int64_t Size = MI.getOperand(0).getImm();
388  if (MI.getOpcode() == VE::ADJCALLSTACKDOWN)
389  Size = -Size;
390 
391  if (Size)
392  emitSPAdjustment(MF, MBB, I, Size);
393  }
394  return MBB.erase(I);
395 }
396 
398  MachineBasicBlock &MBB) const {
399  const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
400  DebugLoc DL;
402  MachineFrameInfo &MFI = MF.getFrameInfo();
403  const VEInstrInfo &TII = *STI.getInstrInfo();
404 
405  uint64_t NumBytes = MFI.getStackSize();
406 
407  // Emit instructions to retrieve original SP.
408  if (!FuncInfo->isLeafProc()) {
409  // If SP is saved in FP, retrieve it as follows:
410  // or %sp, 0, %fp iff !isLeafProc
411  BuildMI(MBB, MBBI, DL, TII.get(VE::ORri), VE::SX11)
412  .addReg(VE::SX9)
413  .addImm(0);
414  } else {
415  // Emit stack adjust instructions.
416  emitSPAdjustment(MF, MBB, MBBI, NumBytes, None);
417  }
418 
419  // Emit Epilogue instructions to restore multiple registers.
420  emitEpilogueInsns(MF, MBB, MBBI, NumBytes, true);
421 }
422 
423 // hasFP - Return true if the specified function should have a dedicated frame
424 // pointer register. This is true if the function has variable sized allocas
425 // or if frame pointer elimination is disabled.
427  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
428 
429  const MachineFrameInfo &MFI = MF.getFrameInfo();
430  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
431  RegInfo->needsStackRealignment(MF) || MFI.hasVarSizedObjects() ||
432  MFI.isFrameAddressTaken();
433 }
434 
436  const MachineFrameInfo &MFI = MF.getFrameInfo();
438 
439  return MFI.hasVarSizedObjects() && TRI->needsStackRealignment(MF);
440 }
441 
443  const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
444 
445  // If a global base register is assigned (!= 0), GOT is used.
446  return FuncInfo->getGlobalBaseReg() != 0;
447 }
448 
450  int FI,
451  Register &FrameReg) const {
452  const MachineFrameInfo &MFI = MF.getFrameInfo();
453  const VERegisterInfo *RegInfo = STI.getRegisterInfo();
454  bool isFixed = MFI.isFixedObjectIndex(FI);
455 
456  int64_t FrameOffset = MF.getFrameInfo().getObjectOffset(FI);
457 
458  if (!hasFP(MF)) {
459  // If FP is not used, frame indexies are based on a %sp regiter.
460  FrameReg = VE::SX11; // %sp
461  return StackOffset::getFixed(FrameOffset +
462  MF.getFrameInfo().getStackSize());
463  }
464  if (RegInfo->needsStackRealignment(MF) && !isFixed) {
465  // If data on stack require realignemnt, frame indexies are based on a %sp
466  // or %s17 (bp) register. If there is a variable sized object, bp is used.
467  if (hasBP(MF))
468  FrameReg = VE::SX17; // %bp
469  else
470  FrameReg = VE::SX11; // %sp
471  return StackOffset::getFixed(FrameOffset +
472  MF.getFrameInfo().getStackSize());
473  }
474  // Use %fp by default.
475  FrameReg = RegInfo->getFrameRegister(MF);
476  return StackOffset::getFixed(FrameOffset);
477 }
478 
479 bool VEFrameLowering::isLeafProc(MachineFunction &MF) const {
480 
482  MachineFrameInfo &MFI = MF.getFrameInfo();
483 
484  return !MFI.hasCalls() // No calls
485  && !MRI.isPhysRegUsed(VE::SX18) // Registers within limits
486  // (s18 is first CSR)
487  && !MRI.isPhysRegUsed(VE::SX11) // %sp un-used
488  && !hasFP(MF); // Don't need %fp
489 }
490 
492  BitVector &SavedRegs,
493  RegScavenger *RS) const {
495 
496  // Functions having BP need to emit prologue and epilogue to allocate local
497  // buffer on the stack even if the function is a leaf function.
498  if (isLeafProc(MF) && !hasBP(MF)) {
500  FuncInfo->setLeafProc(true);
501  }
502 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:158
llvm::MachineFrameInfo::hasVarSizedObjects
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
Definition: MachineFrameInfo.h:351
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:100
MathExtras.h
llvm::MachineInstrBuilder::addImm
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
Definition: MachineInstrBuilder.h:132
llvm
This class represents lattice values for constants.
Definition: AllocatorList.h:23
llvm::TargetFrameLowering
Information about stack frame layout on the target.
Definition: TargetFrameLowering.h:42
llvm::VEFrameLowering::emitPrologue
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
Definition: VEFrameLowering.cpp:308
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::VERegisterInfo::getFrameRegister
Register getFrameRegister(const MachineFunction &MF) const override
Definition: VERegisterInfo.cpp:198
llvm::TargetSubtargetInfo::getRegisterInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Definition: TargetSubtargetInfo.h:124
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
llvm::VEFrameLowering::emitEpilogueInsns
void emitEpilogueInsns(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, uint64_t NumBytes, bool RequireFPUpdate) const
Definition: VEFrameLowering.cpp:183
llvm::VESubtarget::getRegisterInfo
const VERegisterInfo * getRegisterInfo() const override
Definition: VESubtarget.h:55
llvm::StackOffset::getFixed
ScalarTy getFixed() const
Definition: TypeSize.h:145
llvm::MachineFrameInfo::setStackSize
void setStackSize(uint64_t Size)
Set the size of the stack.
Definition: MachineFrameInfo.h:566
llvm::MaybeAlign::valueOrOne
Align valueOrOne() const
For convenience, returns a valid alignment or 1 if undefined.
Definition: Alignment.h:144
VEInstrInfo.h
llvm::Lo_32
constexpr uint32_t Lo_32(uint64_t Value)
Return the low 32 bits of a 64 bit value.
Definition: MathExtras.h:354
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1541
llvm::VESubtarget::getAdjustedFrameSize
uint64_t getAdjustedFrameSize(uint64_t FrameSize) const
Given a actual stack size as determined by FrameInfo, this function returns adjusted framesize which ...
Definition: VESubtarget.cpp:50
MachineRegisterInfo.h
llvm::MachineBasicBlock::erase
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Definition: MachineBasicBlock.cpp:1322
CommandLine.h
llvm::VEFrameLowering::eliminateCallFramePseudoInstr
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
Definition: VEFrameLowering.cpp:382
llvm::MachineFunction::front
const MachineBasicBlock & front() const
Definition: MachineFunction.h:749
llvm::MachineFunction::getRegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Definition: MachineFunction.h:565
llvm::Log2_64
unsigned Log2_64(uint64_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition: MathExtras.h:603
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:653
llvm::VEFrameLowering::determineCalleeSaves
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: VEFrameLowering.cpp:491
llvm::TargetFrameLowering::getStackAlign
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
Definition: TargetFrameLowering.h:99
TII
const HexagonInstrInfo * TII
Definition: HexagonCopyToCombine.cpp:129
llvm::MaybeAlign
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Definition: Alignment.h:119
llvm::M0
unsigned M0(unsigned Val)
Definition: VE.h:371
llvm::VEFrameLowering::hasBP
bool hasBP(const MachineFunction &MF) const
Definition: VEFrameLowering.cpp:435
llvm::report_fatal_error
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:140
llvm::MachineFrameInfo::getStackSize
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
Definition: MachineFrameInfo.h:563
llvm::MachineFrameInfo::getObjectOffset
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Definition: MachineFrameInfo.h:504
llvm::BitVector
Definition: BitVector.h:74
llvm::MachineFrameInfo::isFixedObjectIndex
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
Definition: MachineFrameInfo.h:677
llvm::Align
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
llvm::VEInstrInfo
Definition: VEInstrInfo.h:51
llvm::None
const NoneType None
Definition: None.h:23
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::Hi_32
constexpr uint32_t Hi_32(uint64_t Value)
Return the high 32 bits of a 64 bit value.
Definition: MathExtras.h:349
llvm::VEFrameLowering::hasReservedCallFrame
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
Definition: VEFrameLowering.h:48
llvm::TargetOptions::DisableFramePointerElim
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
Definition: TargetOptionsImpl.cpp:24
llvm::MachineFunction::getSubtarget
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Definition: MachineFunction.h:555
llvm::isInt< 32 >
constexpr bool isInt< 32 >(int64_t x)
Definition: MathExtras.h:374
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:63
llvm::ARM_MB::ST
@ ST
Definition: ARMBaseInfo.h:73
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::RegScavenger
Definition: RegisterScavenging.h:34
llvm::TargetRegisterInfo::needsStackRealignment
bool needsStackRealignment(const MachineFunction &MF) const
True if storage within the function requires the stack pointer to be aligned more than the normal cal...
Definition: TargetRegisterInfo.cpp:464
llvm::MachineFunction::getName
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
Definition: MachineFunction.cpp:522
llvm::TargetMachine::Options
TargetOptions Options
Definition: TargetMachine.h:115
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::VEMachineFunctionInfo::getGlobalBaseReg
Register getGlobalBaseReg() const
Definition: VEMachineFunctionInfo.h:37
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition: MachineFunction.h:571
llvm::VEFrameLowering::emitEpilogue
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Definition: VEFrameLowering.cpp:397
MachineModuleInfo.h
llvm::MachineInstrBuilder::addReg
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Definition: MachineInstrBuilder.h:98
llvm::VEFrameLowering::hasFP
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
Definition: VEFrameLowering.cpp:426
llvm::VEMachineFunctionInfo::setLeafProc
void setLeafProc(bool rhs)
Definition: VEMachineFunctionInfo.h:43
llvm::MachineFunction
Definition: MachineFunction.h:227
TargetOptions.h
DataLayout.h
llvm::MachineBasicBlock::getLastNonDebugInstr
iterator getLastNonDebugInstr(bool SkipPseudoOp=false)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Definition: MachineBasicBlock.cpp:264
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
VEFrameLowering.h
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:130
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::VEMachineFunctionInfo
Definition: VEMachineFunctionInfo.h:19
llvm::VEFrameLowering::VEFrameLowering
VEFrameLowering(const VESubtarget &ST)
Definition: VEFrameLowering.cpp:130
llvm::VEMachineFunctionInfo::isLeafProc
bool isLeafProc() const
Definition: VEMachineFunctionInfo.h:44
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::MachineFrameInfo::getMaxAlign
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Definition: MachineFrameInfo.h:585
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::MachineFrameInfo::isFrameAddressTaken
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Definition: MachineFrameInfo.h:366
llvm::MachineFrameInfo::hasCalls
bool hasCalls() const
Return true if the current function has any function calls.
Definition: MachineFrameInfo.h:602
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::Twine
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
llvm::VESubtarget::getInstrInfo
const VEInstrInfo * getInstrInfo() const override
Definition: VESubtarget.h:51
VEMachineFunctionInfo.h
llvm::MachineFunction::getTarget
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Definition: MachineFunction.h:551
MachineFrameInfo.h
llvm::Align::value
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
llvm::VERegisterInfo
Definition: VERegisterInfo.h:22
Function.h
llvm::VEFrameLowering::emitPrologueInsns
void emitPrologueInsns(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, uint64_t NumBytes, bool RequireFPUpdate) const
Definition: VEFrameLowering.cpp:135
llvm::MachineRegisterInfo::isPhysRegUsed
bool isPhysRegUsed(MCRegister PhysReg) const
Return true if the specified register is modified or read in this function.
Definition: MachineRegisterInfo.cpp:585
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition: MachineFrameInfo.h:107
llvm::MachineBasicBlock::begin
iterator begin()
Definition: MachineBasicBlock.h:268
MachineInstrBuilder.h
llvm::VESubtarget
Definition: VESubtarget.h:31
llvm::BuildMI
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Definition: MachineInstrBuilder.h:329
VESubtarget.h
llvm::VEFrameLowering::hasGOT
bool hasGOT(const MachineFunction &MF) const
Definition: VEFrameLowering.cpp:442
llvm::TargetFrameLowering::determineCalleeSaves
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
Definition: TargetFrameLoweringImpl.cpp:78
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::M1
unsigned M1(unsigned Val)
Definition: VE.h:372
RegisterScavenging.h
MachineFunction.h
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::VEFrameLowering::STI
const VESubtarget & STI
Definition: VEFrameLowering.h:70
llvm::VEFrameLowering::getFrameIndexReference
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Definition: VEFrameLowering.cpp:449