LLVM 17.0.0git
WebAssemblyTargetMachine.cpp
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1//===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file defines the WebAssembly-specific subclass of TargetMachine.
11///
12//===----------------------------------------------------------------------===//
13
18#include "WebAssembly.h"
25#include "llvm/CodeGen/Passes.h"
28#include "llvm/IR/Function.h"
30#include "llvm/MC/MCAsmInfo.h"
36#include <optional>
37using namespace llvm;
38
39#define DEBUG_TYPE "wasm"
40
41// A command-line option to keep implicit locals
42// for the purpose of testing with lit/llc ONLY.
43// This produces output which is not valid WebAssembly, and is not supported
44// by assemblers/disassemblers and other MC based tools.
46 "wasm-disable-explicit-locals", cl::Hidden,
47 cl::desc("WebAssembly: output implicit locals in"
48 " instruction output for test purposes only."),
49 cl::init(false));
50
52 // Register the target.
57
58 // Register backend passes
87}
88
89//===----------------------------------------------------------------------===//
90// WebAssembly Lowering public interface.
91//===----------------------------------------------------------------------===//
92
93static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM,
94 const Triple &TT) {
95 if (!RM) {
96 // Default to static relocation model. This should always be more optimial
97 // than PIC since the static linker can determine all global addresses and
98 // assume direct function calls.
99 return Reloc::Static;
100 }
101
102 if (!TT.isOSEmscripten()) {
103 // Relocation modes other than static are currently implemented in a way
104 // that only works for Emscripten, so disable them if we aren't targeting
105 // Emscripten.
106 return Reloc::Static;
107 }
108
109 return *RM;
110}
111
112/// Create an WebAssembly architecture model.
113///
115 const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
116 const TargetOptions &Options, std::optional<Reloc::Model> RM,
117 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
119 T,
120 TT.isArch64Bit()
121 ? (TT.isOSEmscripten() ? "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
122 "f128:64-n32:64-S128-ni:1:10:20"
123 : "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
124 "n32:64-S128-ni:1:10:20")
125 : (TT.isOSEmscripten() ? "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
126 "f128:64-n32:64-S128-ni:1:10:20"
127 : "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
128 "n32:64-S128-ni:1:10:20"),
129 TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
130 getEffectiveCodeModel(CM, CodeModel::Large), OL),
131 TLOF(new WebAssemblyTargetObjectFile()) {
132 // WebAssembly type-checks instructions, but a noreturn function with a return
133 // type that doesn't match the context will cause a check failure. So we lower
134 // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
135 // 'unreachable' instructions which is meant for that case.
136 this->Options.TrapUnreachable = true;
137
138 // WebAssembly treats each function as an independent unit. Force
139 // -ffunction-sections, effectively, so that we can emit them independently.
140 this->Options.FunctionSections = true;
141 this->Options.DataSections = true;
142 this->Options.UniqueSectionNames = true;
143
144 initAsmInfo();
145
146 // Note that we don't use setRequiresStructuredCFG(true). It disables
147 // optimizations than we're ok with, and want, such as critical edge
148 // splitting and tail merging.
149}
150
152
154 return getSubtargetImpl(std::string(getTargetCPU()),
155 std::string(getTargetFeatureString()));
156}
157
160 std::string FS) const {
161 auto &I = SubtargetMap[CPU + FS];
162 if (!I) {
163 I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
164 }
165 return I.get();
166}
167
170 Attribute CPUAttr = F.getFnAttribute("target-cpu");
171 Attribute FSAttr = F.getFnAttribute("target-features");
172
173 std::string CPU =
174 CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
175 std::string FS =
176 FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
177
178 // This needs to be done before we create a new subtarget since any
179 // creation will depend on the TM and the code generation flags on the
180 // function that reside in TargetOptions.
182
183 return getSubtargetImpl(CPU, FS);
184}
185
186namespace {
187
188class CoalesceFeaturesAndStripAtomics final : public ModulePass {
189 // Take the union of all features used in the module and use it for each
190 // function individually, since having multiple feature sets in one module
191 // currently does not make sense for WebAssembly. If atomics are not enabled,
192 // also strip atomic operations and thread local storage.
193 static char ID;
195
196public:
197 CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
198 : ModulePass(ID), WasmTM(WasmTM) {}
199
200 bool runOnModule(Module &M) override {
201 FeatureBitset Features = coalesceFeatures(M);
202
203 std::string FeatureStr = getFeatureString(Features);
204 WasmTM->setTargetFeatureString(FeatureStr);
205 for (auto &F : M)
206 replaceFeatures(F, FeatureStr);
207
208 bool StrippedAtomics = false;
209 bool StrippedTLS = false;
210
211 if (!Features[WebAssembly::FeatureAtomics]) {
212 StrippedAtomics = stripAtomics(M);
213 StrippedTLS = stripThreadLocals(M);
214 } else if (!Features[WebAssembly::FeatureBulkMemory]) {
215 StrippedTLS |= stripThreadLocals(M);
216 }
217
218 if (StrippedAtomics && !StrippedTLS)
219 stripThreadLocals(M);
220 else if (StrippedTLS && !StrippedAtomics)
221 stripAtomics(M);
222
223 recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
224
225 // Conservatively assume we have made some change
226 return true;
227 }
228
229private:
230 FeatureBitset coalesceFeatures(const Module &M) {
231 FeatureBitset Features =
232 WasmTM
233 ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
234 std::string(WasmTM->getTargetFeatureString()))
235 ->getFeatureBits();
236 for (auto &F : M)
237 Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
238 return Features;
239 }
240
241 std::string getFeatureString(const FeatureBitset &Features) {
242 std::string Ret;
243 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
244 if (Features[KV.Value])
245 Ret += (StringRef("+") + KV.Key + ",").str();
246 }
247 return Ret;
248 }
249
250 void replaceFeatures(Function &F, const std::string &Features) {
251 F.removeFnAttr("target-features");
252 F.removeFnAttr("target-cpu");
253 F.addFnAttr("target-features", Features);
254 }
255
256 bool stripAtomics(Module &M) {
257 // Detect whether any atomics will be lowered, since there is no way to tell
258 // whether the LowerAtomic pass lowers e.g. stores.
259 bool Stripped = false;
260 for (auto &F : M) {
261 for (auto &B : F) {
262 for (auto &I : B) {
263 if (I.isAtomic()) {
264 Stripped = true;
265 goto done;
266 }
267 }
268 }
269 }
270
271 done:
272 if (!Stripped)
273 return false;
274
275 LowerAtomicPass Lowerer;
277 for (auto &F : M)
278 Lowerer.run(F, FAM);
279
280 return true;
281 }
282
283 bool stripThreadLocals(Module &M) {
284 bool Stripped = false;
285 for (auto &GV : M.globals()) {
286 if (GV.isThreadLocal()) {
287 Stripped = true;
288 GV.setThreadLocal(false);
289 }
290 }
291 return Stripped;
292 }
293
294 void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
295 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
296 if (Features[KV.Value]) {
297 // Mark features as used
298 std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
299 M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
301 }
302 }
303 // Code compiled without atomics or bulk-memory may have had its atomics or
304 // thread-local data lowered to nonatomic operations or non-thread-local
305 // data. In that case, we mark the pseudo-feature "shared-mem" as disallowed
306 // to tell the linker that it would be unsafe to allow this code ot be used
307 // in a module with shared memory.
308 if (Stripped) {
309 M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem",
311 }
312 }
313};
314char CoalesceFeaturesAndStripAtomics::ID = 0;
315
316/// WebAssembly Code Generator Pass Configuration Options.
317class WebAssemblyPassConfig final : public TargetPassConfig {
318public:
319 WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
320 : TargetPassConfig(TM, PM) {}
321
322 WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
323 return getTM<WebAssemblyTargetMachine>();
324 }
325
326 FunctionPass *createTargetRegisterAllocator(bool) override;
327
328 void addIRPasses() override;
329 void addISelPrepare() override;
330 bool addInstSelector() override;
331 void addOptimizedRegAlloc() override;
332 void addPostRegAlloc() override;
333 bool addGCPasses() override { return false; }
334 void addPreEmitPass() override;
335 bool addPreISel() override;
336
337 // No reg alloc
338 bool addRegAssignAndRewriteFast() override { return false; }
339
340 // No reg alloc
341 bool addRegAssignAndRewriteOptimized() override { return false; }
342};
343} // end anonymous namespace
344
346 BumpPtrAllocator &Allocator, const Function &F,
347 const TargetSubtargetInfo *STI) const {
348 return WebAssemblyFunctionInfo::create<WebAssemblyFunctionInfo>(Allocator, F,
349 STI);
350}
351
355}
356
359 return new WebAssemblyPassConfig(*this, PM);
360}
361
362FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
363 return nullptr; // No reg alloc
364}
365
370
372 // Before checking, we make sure TargetOptions.ExceptionModel is the same as
373 // MCAsmInfo.ExceptionsType. Normally these have to be the same, because clang
374 // stores the exception model info in LangOptions, which is later transferred
375 // to TargetOptions and MCAsmInfo. But when clang compiles bitcode directly,
376 // clang's LangOptions is not used and thus the exception model info is not
377 // correctly transferred to TargetOptions and MCAsmInfo, so we make sure we
378 // have the correct exception model in in WebAssemblyMCAsmInfo constructor.
379 // But in this case TargetOptions is still not updated, so we make sure they
380 // are the same.
381 TM->Options.ExceptionModel = TM->getMCAsmInfo()->getExceptionHandlingType();
382
383 // Basic Correctness checking related to -exception-model
384 if (TM->Options.ExceptionModel != ExceptionHandling::None &&
385 TM->Options.ExceptionModel != ExceptionHandling::Wasm)
386 report_fatal_error("-exception-model should be either 'none' or 'wasm'");
387 if (WasmEnableEmEH && TM->Options.ExceptionModel == ExceptionHandling::Wasm)
388 report_fatal_error("-exception-model=wasm not allowed with "
389 "-enable-emscripten-cxx-exceptions");
390 if (WasmEnableEH && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
392 "-wasm-enable-eh only allowed with -exception-model=wasm");
393 if (WasmEnableSjLj && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
395 "-wasm-enable-sjlj only allowed with -exception-model=wasm");
396 if ((!WasmEnableEH && !WasmEnableSjLj) &&
397 TM->Options.ExceptionModel == ExceptionHandling::Wasm)
399 "-exception-model=wasm only allowed with at least one of "
400 "-wasm-enable-eh or -wasm-enable-sjj");
401
402 // You can't enable two modes of EH at the same time
403 if (WasmEnableEmEH && WasmEnableEH)
405 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-eh");
406 // You can't enable two modes of SjLj at the same time
407 if (WasmEnableEmSjLj && WasmEnableSjLj)
409 "-enable-emscripten-sjlj not allowed with -wasm-enable-sjlj");
410 // You can't mix Emscripten EH with Wasm SjLj.
411 if (WasmEnableEmEH && WasmEnableSjLj)
413 "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-sjlj");
414 // Currently it is allowed to mix Wasm EH with Emscripten SjLj as an interim
415 // measure, but some code will error out at compile time in this combination.
416 // See WebAssemblyLowerEmscriptenEHSjLj pass for details.
417}
418
419//===----------------------------------------------------------------------===//
420// The following functions are called from lib/CodeGen/Passes.cpp to modify
421// the CodeGen pass sequence.
422//===----------------------------------------------------------------------===//
423
424void WebAssemblyPassConfig::addIRPasses() {
425 // Add signatures to prototype-less function declarations
427
428 // Lower .llvm.global_dtors into .llvm.global_ctors with __cxa_atexit calls.
430
431 // Fix function bitcasts, as WebAssembly requires caller and callee signatures
432 // to match.
434
435 // Optimize "returned" function attributes.
436 if (getOptLevel() != CodeGenOpt::None)
438
440
441 // If exception handling is not enabled and setjmp/longjmp handling is
442 // enabled, we lower invokes into calls and delete unreachable landingpad
443 // blocks. Lowering invokes when there is no EH support is done in
444 // TargetPassConfig::addPassesToHandleExceptions, but that runs after these IR
445 // passes and Emscripten SjLj handling expects all invokes to be lowered
446 // before.
447 if (!WasmEnableEmEH && !WasmEnableEH) {
448 addPass(createLowerInvokePass());
449 // The lower invoke pass may create unreachable code. Remove it in order not
450 // to process dead blocks in setjmp/longjmp handling.
452 }
453
454 // Handle exceptions and setjmp/longjmp if enabled. Unlike Wasm EH preparation
455 // done in WasmEHPrepare pass, Wasm SjLj preparation shares libraries and
456 // transformation algorithms with Emscripten SjLj, so we run
457 // LowerEmscriptenEHSjLj pass also when Wasm SjLj is enabled.
458 if (WasmEnableEmEH || WasmEnableEmSjLj || WasmEnableSjLj)
460
461 // Expand indirectbr instructions to switches.
463
465}
466
467void WebAssemblyPassConfig::addISelPrepare() {
469 const WebAssemblySubtarget *Subtarget = WasmTM
470 ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
471 std::string(WasmTM->getTargetFeatureString()));
472 if(Subtarget->hasReferenceTypes()) {
473 // We need to remove allocas for reference types
475 }
476 // Lower atomics and TLS if necessary
477 addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
478
479 // This is a no-op if atomics are not used in the module
480 addPass(createAtomicExpandPass());
481
483}
484
485bool WebAssemblyPassConfig::addInstSelector() {
487 addPass(
488 createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
489 // Run the argument-move pass immediately after the ScheduleDAG scheduler
490 // so that we can fix up the ARGUMENT instructions before anything else
491 // sees them in the wrong place.
493 // Set the p2align operands. This information is present during ISel, however
494 // it's inconvenient to collect. Collect it now, and update the immediate
495 // operands.
497
498 // Eliminate range checks and add default targets to br_table instructions.
500
501 return false;
502}
503
504void WebAssemblyPassConfig::addOptimizedRegAlloc() {
505 // Currently RegisterCoalesce degrades wasm debug info quality by a
506 // significant margin. As a quick fix, disable this for -O1, which is often
507 // used for debugging large applications. Disabling this increases code size
508 // of Emscripten core benchmarks by ~5%, which is acceptable for -O1, which is
509 // usually not used for production builds.
510 // TODO Investigate why RegisterCoalesce degrades debug info quality and fix
511 // it properly
512 if (getOptLevel() == CodeGenOpt::Less)
513 disablePass(&RegisterCoalescerID);
515}
516
517void WebAssemblyPassConfig::addPostRegAlloc() {
518 // TODO: The following CodeGen passes don't currently support code containing
519 // virtual registers. Consider removing their restrictions and re-enabling
520 // them.
521
522 // These functions all require the NoVRegs property.
523 disablePass(&MachineLateInstrsCleanupID);
524 disablePass(&MachineCopyPropagationID);
525 disablePass(&PostRAMachineSinkingID);
526 disablePass(&PostRASchedulerID);
527 disablePass(&FuncletLayoutID);
528 disablePass(&StackMapLivenessID);
529 disablePass(&PatchableFunctionID);
530 disablePass(&ShrinkWrapID);
531
532 // This pass hurts code size for wasm because it can generate irreducible
533 // control flow.
534 disablePass(&MachineBlockPlacementID);
535
537}
538
539void WebAssemblyPassConfig::addPreEmitPass() {
541
542 // Nullify DBG_VALUE_LISTs that we cannot handle.
544
545 // Eliminate multiple-entry loops.
547
548 // Do various transformations for exception handling.
549 // Every CFG-changing optimizations should come before this.
550 if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
552
553 // Now that we have a prologue and epilogue and all frame indices are
554 // rewritten, eliminate SP and FP. This allows them to be stackified,
555 // colored, and numbered with the rest of the registers.
557
558 // Preparations and optimizations related to register stackification.
559 if (getOptLevel() != CodeGenOpt::None) {
560 // Depend on LiveIntervals and perform some optimizations on it.
562
563 // Prepare memory intrinsic calls for register stackifying.
565
566 // Mark registers as representing wasm's value stack. This is a key
567 // code-compression technique in WebAssembly. We run this pass (and
568 // MemIntrinsicResults above) very late, so that it sees as much code as
569 // possible, including code emitted by PEI and expanded by late tail
570 // duplication.
572
573 // Run the register coloring pass to reduce the total number of registers.
574 // This runs after stackification so that it doesn't consider registers
575 // that become stackified.
577 }
578
579 // Sort the blocks of the CFG into topological order, a prerequisite for
580 // BLOCK and LOOP markers.
581 addPass(createWebAssemblyCFGSort());
582
583 // Insert BLOCK and LOOP markers.
585
586 // Insert explicit local.get and local.set operators.
589
590 // Lower br_unless into br_if.
592
593 // Perform the very last peephole optimizations on the code.
594 if (getOptLevel() != CodeGenOpt::None)
595 addPass(createWebAssemblyPeephole());
596
597 // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
599
600 // Fix debug_values whose defs have been stackified.
603
604 // Collect information to prepare for MC lowering / asm printing.
606}
607
608bool WebAssemblyPassConfig::addPreISel() {
611 return false;
612}
613
617}
618
620 const MachineFunction &MF) const {
621 const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
622 return new yaml::WebAssemblyFunctionInfo(MF, *MFI);
623}
624
627 SMDiagnostic &Error, SMRange &SourceRange) const {
628 const auto &YamlMFI = static_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
629 MachineFunction &MF = PFS.MF;
630 MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(MF, YamlMFI);
631 return false;
632}
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:127
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
static LVOptions Options
Definition: LVOptions.cpp:25
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
FunctionAnalysisManager FAM
const char LLVMTargetMachineRef TM
Basic Register Allocator
Target-Independent Code Generator Pass Configuration Options pass.
This file defines the interfaces that WebAssembly uses to lower LLVM code into a selection DAG.
This file provides WebAssembly-specific target descriptions.
This file declares WebAssembly-specific per-machine-function information.
This file registers the WebAssembly target.
static Reloc::Model getEffectiveRelocModel(std::optional< Reloc::Model > RM, const Triple &TT)
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget()
static void basicCheckForEHAndSjLj(TargetMachine *TM)
static cl::opt< bool > WasmDisableExplicitLocals("wasm-disable-explicit-locals", cl::Hidden, cl::desc("WebAssembly: output implicit locals in" " instruction output for test purposes only."), cl::init(false))
This file declares the WebAssembly-specific subclass of TargetMachine.
This file declares the WebAssembly-specific subclass of TargetLoweringObjectFile.
This file a TargetTransformInfo::Concept conforming object specific to the WebAssembly target machine...
This file contains the declaration of the WebAssembly-specific utility functions.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.
A container for analyses that lazily runs them and caches their results.
Definition: PassManager.h:620
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:312
bool isValid() const
Return true if the attribute is any kind of attribute.
Definition: Attributes.h:185
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
Lightweight error class with error context and mandatory checking.
Definition: Error.h:156
Container class for subtarget features.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:308
This class describes a target machine that is implemented with the LLVM target-independent code gener...
A pass that lowers atomic intrinsic into non-atomic intrinsics.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &)
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
Definition: Pass.h:248
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:281
Represents a range in source code.
Definition: SMLoc.h:48
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:222
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:78
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:97
std::string TargetFS
Definition: TargetMachine.h:99
StringRef getTargetFeatureString() const
StringRef getTargetCPU() const
std::string TargetCPU
Definition: TargetMachine.h:98
std::unique_ptr< const MCSubtargetInfo > STI
void setTargetFeatureString(StringRef FS)
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
unsigned UniqueSectionNames
unsigned FunctionSections
Emit functions into separate sections.
unsigned DataSections
Emit data into separate sections.
unsigned TrapUnreachable
Emit target-specific trap instruction for 'unreachable' IR instructions.
Target-Independent Code Generator Pass Configuration Options.
virtual void addPostRegAlloc()
This method may be implemented by targets that want to run passes after register allocation pass pipe...
virtual bool addInstSelector()
addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...
virtual bool addPreISel()
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
virtual void addOptimizedRegAlloc()
addOptimizedRegAlloc - Add passes related to register allocation.
virtual void addPreEmitPass()
This pass may be implemented by targets that want to run passes immediately before machine code is em...
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
virtual void addISelPrepare()
Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
yaml::MachineFunctionInfo * createDefaultFuncInfoYAML() const override
Allocate and return a default initialized instance of the YAML representation for the MachineFunction...
bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
Parse out the target's MachineFunctionInfo from the YAML reprsentation.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
Create an WebAssembly architecture model.
const WebAssemblySubtarget * getSubtargetImpl() const
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Get a TargetTransformInfo implementation for the target.
yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const override
Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
Level
Code generation optimization level.
Definition: CodeGen.h:57
cl::opt< bool > WasmEnableEH
cl::opt< bool > WasmEnableSjLj
cl::opt< bool > WasmEnableEmEH
cl::opt< bool > WasmEnableEmSjLj
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:445
@ WASM_FEATURE_PREFIX_USED
Definition: Wasm.h:344
@ WASM_FEATURE_PREFIX_DISALLOWED
Definition: Wasm.h:346
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
void initializeOptimizeReturnedPass(PassRegistry &)
FunctionPass * createIndirectBrExpandPass()
void initializeWebAssemblyLowerBrUnlessPass(PassRegistry &)
void initializeWebAssemblyDAGToDAGISelPass(PassRegistry &)
FunctionPass * createWebAssemblyLowerRefTypesIntPtrConv()
FunctionPass * createWebAssemblyRegNumbering()
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
ModulePass * createWebAssemblyAddMissingPrototypes()
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
FunctionPass * createWebAssemblyLateEHPrepare()
const SubtargetFeatureKV WebAssemblyFeatureKV[WebAssembly::NumSubtargetFeatures]
FunctionPass * createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, CodeGenOpt::Level OptLevel)
This pass converts a legalized DAG into a WebAssembly-specific DAG, ready for instruction scheduling.
void initializeWebAssemblyLateEHPreparePass(PassRegistry &)
@ None
No exception support.
@ Wasm
WebAssembly Exception Handling.
FunctionPass * createAtomicExpandPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
FunctionPass * createWebAssemblyFixBrTableDefaults()
void initializeWebAssemblyAddMissingPrototypesPass(PassRegistry &)
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
void initializeWebAssemblyExceptionInfoPass(PassRegistry &)
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
void initializeWebAssemblyRegNumberingPass(PassRegistry &)
void initializeWebAssemblyLowerRefTypesIntPtrConvPass(PassRegistry &)
FunctionPass * createWebAssemblyReplacePhysRegs()
void initializeWebAssemblyRegColoringPass(PassRegistry &)
CodeModel::Model getEffectiveCodeModel(std::optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
FunctionPass * createWebAssemblyMemIntrinsicResults()
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:250
char & MachineLateInstrsCleanupID
MachineLateInstrsCleanup - This pass removes redundant identical instructions after register allocati...
FunctionPass * createWebAssemblyDebugFixup()
ModulePass * createLowerGlobalDtorsLegacyPass()
FunctionPass * createLowerInvokePass()
Definition: LowerInvoke.cpp:85
void initializeLowerGlobalDtorsLegacyPassPass(PassRegistry &)
Target & getTheWebAssemblyTarget32()
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:145
void initializeWebAssemblyNullifyDebugValueListsPass(PassRegistry &)
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
void initializeWebAssemblyFixIrreducibleControlFlowPass(PassRegistry &)
char & FuncletLayoutID
This pass lays out funclets contiguously.
void initializeWebAssemblyRegStackifyPass(PassRegistry &)
FunctionPass * createWebAssemblyCFGStackify()
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
FunctionPass * createWebAssemblyOptimizeReturned()
void initializeWebAssemblyOptimizeLiveIntervalsPass(PassRegistry &)
FunctionPass * createWebAssemblySetP2AlignOperands()
ModulePass * createWebAssemblyLowerEmscriptenEHSjLj()
void initializeWebAssemblyLowerEmscriptenEHSjLjPass(PassRegistry &)
FunctionPass * createWebAssemblyArgumentMove()
FunctionPass * createWebAssemblyExplicitLocals()
Target & getTheWebAssemblyTarget64()
void initializeWebAssemblyMemIntrinsicResultsPass(PassRegistry &)
void initializeWebAssemblyMCLowerPrePassPass(PassRegistry &)
void initializeWebAssemblyExplicitLocalsPass(PassRegistry &)
FunctionPass * createWebAssemblyFixIrreducibleControlFlow()
ModulePass * createWebAssemblyFixFunctionBitcasts()
FunctionPass * createWebAssemblyLowerBrUnless()
void initializeFixFunctionBitcastsPass(PassRegistry &)
FunctionPass * createWebAssemblyRegColoring()
void initializeWebAssemblyPeepholePass(PassRegistry &)
ModulePass * createWebAssemblyMCLowerPrePass()
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
FunctionPass * createWebAssemblyRegStackify()
FunctionPass * createWebAssemblyCFGSort()
void initializeWebAssemblyCFGSortPass(PassRegistry &)
void initializeWebAssemblyFixBrTableDefaultsPass(PassRegistry &)
FunctionPass * createWebAssemblyNullifyDebugValueLists()
void initializeWebAssemblyCFGStackifyPass(PassRegistry &)
void initializeWebAssemblySetP2AlignOperandsPass(PassRegistry &)
void initializeWebAssemblyDebugFixupPass(PassRegistry &)
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
void initializeWebAssemblyArgumentMovePass(PassRegistry &)
FunctionPass * createWebAssemblyPeephole()
FunctionPass * createPromoteMemoryToRegisterPass(bool IsForced=false)
Definition: Mem2Reg.cpp:119
void initializeWebAssemblyReplacePhysRegsPass(PassRegistry &)
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
RegisterTargetMachine - Helper template for registering a target machine implementation,...
Used to provide key value pairs for feature and CPU bit flags.
Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.