LLVM  14.0.0git
WebAssemblyTargetMachine.cpp
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1 //===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the WebAssembly-specific subclass of TargetMachine.
11 ///
12 //===----------------------------------------------------------------------===//
13 
18 #include "WebAssembly.h"
24 #include "llvm/CodeGen/Passes.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/MC/MCAsmInfo.h"
29 #include "llvm/MC/TargetRegistry.h"
31 #include "llvm/Transforms/Scalar.h"
33 #include "llvm/Transforms/Utils.h"
34 using namespace llvm;
35 
36 #define DEBUG_TYPE "wasm"
37 
38 // A command-line option to keep implicit locals
39 // for the purpose of testing with lit/llc ONLY.
40 // This produces output which is not valid WebAssembly, and is not supported
41 // by assemblers/disassemblers and other MC based tools.
43  "wasm-disable-explicit-locals", cl::Hidden,
44  cl::desc("WebAssembly: output implicit locals in"
45  " instruction output for test purposes only."),
46  cl::init(false));
47 
49  // Register the target.
54 
55  // Register backend passes
56  auto &PR = *PassRegistry::getPassRegistry();
82 }
83 
84 //===----------------------------------------------------------------------===//
85 // WebAssembly Lowering public interface.
86 //===----------------------------------------------------------------------===//
87 
89  const Triple &TT) {
90  if (!RM.hasValue()) {
91  // Default to static relocation model. This should always be more optimial
92  // than PIC since the static linker can determine all global addresses and
93  // assume direct function calls.
94  return Reloc::Static;
95  }
96 
97  if (!TT.isOSEmscripten()) {
98  // Relocation modes other than static are currently implemented in a way
99  // that only works for Emscripten, so disable them if we aren't targeting
100  // Emscripten.
101  return Reloc::Static;
102  }
103 
104  return *RM;
105 }
106 
107 /// Create an WebAssembly architecture model.
108 ///
110  const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
114  T,
115  TT.isArch64Bit()
116  ? (TT.isOSEmscripten() ? "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
117  "f128:64-n32:64-S128-ni:1:10:20"
118  : "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
119  "n32:64-S128-ni:1:10:20")
120  : (TT.isOSEmscripten() ? "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
121  "f128:64-n32:64-S128-ni:1:10:20"
122  : "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
123  "n32:64-S128-ni:1:10:20"),
124  TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
127  // WebAssembly type-checks instructions, but a noreturn function with a return
128  // type that doesn't match the context will cause a check failure. So we lower
129  // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
130  // 'unreachable' instructions which is meant for that case.
131  this->Options.TrapUnreachable = true;
132 
133  // WebAssembly treats each function as an independent unit. Force
134  // -ffunction-sections, effectively, so that we can emit them independently.
135  this->Options.FunctionSections = true;
136  this->Options.DataSections = true;
137  this->Options.UniqueSectionNames = true;
138 
139  initAsmInfo();
140 
141  // Note that we don't use setRequiresStructuredCFG(true). It disables
142  // optimizations than we're ok with, and want, such as critical edge
143  // splitting and tail merging.
144 }
145 
147 
149  return getSubtargetImpl(std::string(getTargetCPU()),
150  std::string(getTargetFeatureString()));
151 }
152 
153 const WebAssemblySubtarget *
155  std::string FS) const {
156  auto &I = SubtargetMap[CPU + FS];
157  if (!I) {
158  I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
159  }
160  return I.get();
161 }
162 
163 const WebAssemblySubtarget *
165  Attribute CPUAttr = F.getFnAttribute("target-cpu");
166  Attribute FSAttr = F.getFnAttribute("target-features");
167 
168  std::string CPU =
169  CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
170  std::string FS =
171  FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
172 
173  // This needs to be done before we create a new subtarget since any
174  // creation will depend on the TM and the code generation flags on the
175  // function that reside in TargetOptions.
177 
178  return getSubtargetImpl(CPU, FS);
179 }
180 
181 namespace {
182 
183 class CoalesceFeaturesAndStripAtomics final : public ModulePass {
184  // Take the union of all features used in the module and use it for each
185  // function individually, since having multiple feature sets in one module
186  // currently does not make sense for WebAssembly. If atomics are not enabled,
187  // also strip atomic operations and thread local storage.
188  static char ID;
189  WebAssemblyTargetMachine *WasmTM;
190 
191 public:
192  CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
193  : ModulePass(ID), WasmTM(WasmTM) {}
194 
195  bool runOnModule(Module &M) override {
196  FeatureBitset Features = coalesceFeatures(M);
197 
198  std::string FeatureStr = getFeatureString(Features);
199  WasmTM->setTargetFeatureString(FeatureStr);
200  for (auto &F : M)
201  replaceFeatures(F, FeatureStr);
202 
203  bool StrippedAtomics = false;
204  bool StrippedTLS = false;
205 
206  if (!Features[WebAssembly::FeatureAtomics])
207  StrippedAtomics = stripAtomics(M);
208 
209  if (!Features[WebAssembly::FeatureBulkMemory])
210  StrippedTLS = stripThreadLocals(M);
211 
212  if (StrippedAtomics && !StrippedTLS)
213  stripThreadLocals(M);
214  else if (StrippedTLS && !StrippedAtomics)
215  stripAtomics(M);
216 
217  recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
218 
219  // Conservatively assume we have made some change
220  return true;
221  }
222 
223 private:
224  FeatureBitset coalesceFeatures(const Module &M) {
225  FeatureBitset Features =
226  WasmTM
227  ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
228  std::string(WasmTM->getTargetFeatureString()))
229  ->getFeatureBits();
230  for (auto &F : M)
231  Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
232  return Features;
233  }
234 
235  std::string getFeatureString(const FeatureBitset &Features) {
236  std::string Ret;
237  for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
238  if (Features[KV.Value])
239  Ret += (StringRef("+") + KV.Key + ",").str();
240  }
241  return Ret;
242  }
243 
244  void replaceFeatures(Function &F, const std::string &Features) {
245  F.removeFnAttr("target-features");
246  F.removeFnAttr("target-cpu");
247  F.addFnAttr("target-features", Features);
248  }
249 
250  bool stripAtomics(Module &M) {
251  // Detect whether any atomics will be lowered, since there is no way to tell
252  // whether the LowerAtomic pass lowers e.g. stores.
253  bool Stripped = false;
254  for (auto &F : M) {
255  for (auto &B : F) {
256  for (auto &I : B) {
257  if (I.isAtomic()) {
258  Stripped = true;
259  goto done;
260  }
261  }
262  }
263  }
264 
265  done:
266  if (!Stripped)
267  return false;
268 
269  LowerAtomicPass Lowerer;
271  for (auto &F : M)
272  Lowerer.run(F, FAM);
273 
274  return true;
275  }
276 
277  bool stripThreadLocals(Module &M) {
278  bool Stripped = false;
279  for (auto &GV : M.globals()) {
280  if (GV.isThreadLocal()) {
281  Stripped = true;
282  GV.setThreadLocal(false);
283  }
284  }
285  return Stripped;
286  }
287 
288  void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
289  for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
290  if (Features[KV.Value]) {
291  // Mark features as used
292  std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
293  M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
295  }
296  }
297  // Code compiled without atomics or bulk-memory may have had its atomics or
298  // thread-local data lowered to nonatomic operations or non-thread-local
299  // data. In that case, we mark the pseudo-feature "shared-mem" as disallowed
300  // to tell the linker that it would be unsafe to allow this code ot be used
301  // in a module with shared memory.
302  if (Stripped) {
303  M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem",
305  }
306  }
307 };
309 
310 /// WebAssembly Code Generator Pass Configuration Options.
311 class WebAssemblyPassConfig final : public TargetPassConfig {
312 public:
313  WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
314  : TargetPassConfig(TM, PM) {}
315 
316  WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
317  return getTM<WebAssemblyTargetMachine>();
318  }
319 
320  FunctionPass *createTargetRegisterAllocator(bool) override;
321 
322  void addIRPasses() override;
323  bool addInstSelector() override;
324  void addPostRegAlloc() override;
325  bool addGCPasses() override { return false; }
326  void addPreEmitPass() override;
327  bool addPreISel() override;
328 
329  // No reg alloc
330  bool addRegAssignAndRewriteFast() override { return false; }
331 
332  // No reg alloc
333  bool addRegAssignAndRewriteOptimized() override { return false; }
334 };
335 } // end anonymous namespace
336 
340 }
341 
344  return new WebAssemblyPassConfig(*this, PM);
345 }
346 
347 FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
348  return nullptr; // No reg alloc
349 }
350 
355 
357  // Before checking, we make sure TargetOptions.ExceptionModel is the same as
358  // MCAsmInfo.ExceptionsType. Normally these have to be the same, because clang
359  // stores the exception model info in LangOptions, which is later transferred
360  // to TargetOptions and MCAsmInfo. But when clang compiles bitcode directly,
361  // clang's LangOptions is not used and thus the exception model info is not
362  // correctly transferred to TargetOptions and MCAsmInfo, so we make sure we
363  // have the correct exception model in in WebAssemblyMCAsmInfo constructor.
364  // But in this case TargetOptions is still not updated, so we make sure they
365  // are the same.
366  TM->Options.ExceptionModel = TM->getMCAsmInfo()->getExceptionHandlingType();
367 
368  // Basic Correctness checking related to -exception-model
369  if (TM->Options.ExceptionModel != ExceptionHandling::None &&
370  TM->Options.ExceptionModel != ExceptionHandling::Wasm)
371  report_fatal_error("-exception-model should be either 'none' or 'wasm'");
372  if (WasmEnableEmEH && TM->Options.ExceptionModel == ExceptionHandling::Wasm)
373  report_fatal_error("-exception-model=wasm not allowed with "
374  "-enable-emscripten-cxx-exceptions");
375  if (WasmEnableEH && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
377  "-wasm-enable-eh only allowed with -exception-model=wasm");
378  if (WasmEnableSjLj && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
380  "-wasm-enable-sjlj only allowed with -exception-model=wasm");
381  if ((!WasmEnableEH && !WasmEnableSjLj) &&
382  TM->Options.ExceptionModel == ExceptionHandling::Wasm)
384  "-exception-model=wasm only allowed with at least one of "
385  "-wasm-enable-eh or -wasm-enable-sjj");
386 
387  // You can't enable two modes of EH at the same time
390  "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-eh");
391  // You can't enable two modes of SjLj at the same time
394  "-enable-emscripten-sjlj not allowed with -wasm-enable-sjlj");
395  // You can't mix Emscripten EH with Wasm SjLj.
398  "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-sjlj");
399  // Currently it is allowed to mix Wasm EH with Emscripten SjLj as an interim
400  // measure, but some code will error out at compile time in this combination.
401  // See WebAssemblyLowerEmscriptenEHSjLj pass for details.
402 }
403 
404 //===----------------------------------------------------------------------===//
405 // The following functions are called from lib/CodeGen/Passes.cpp to modify
406 // the CodeGen pass sequence.
407 //===----------------------------------------------------------------------===//
408 
409 void WebAssemblyPassConfig::addIRPasses() {
410  // Lower atomics and TLS if necessary
411  addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
412 
413  // This is a no-op if atomics are not used in the module
414  addPass(createAtomicExpandPass());
415 
416  // Add signatures to prototype-less function declarations
418 
419  // Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls.
421 
422  // Fix function bitcasts, as WebAssembly requires caller and callee signatures
423  // to match.
425 
426  // Optimize "returned" function attributes.
427  if (getOptLevel() != CodeGenOpt::None)
429 
431 
432  // If exception handling is not enabled and setjmp/longjmp handling is
433  // enabled, we lower invokes into calls and delete unreachable landingpad
434  // blocks. Lowering invokes when there is no EH support is done in
435  // TargetPassConfig::addPassesToHandleExceptions, but that runs after these IR
436  // passes and Emscripten SjLj handling expects all invokes to be lowered
437  // before.
438  if (!WasmEnableEmEH && !WasmEnableEH) {
439  addPass(createLowerInvokePass());
440  // The lower invoke pass may create unreachable code. Remove it in order not
441  // to process dead blocks in setjmp/longjmp handling.
443  }
444 
445  // Handle exceptions and setjmp/longjmp if enabled. Unlike Wasm EH preparation
446  // done in WasmEHPrepare pass, Wasm SjLj preparation shares libraries and
447  // transformation algorithms with Emscripten SjLj, so we run
448  // LowerEmscriptenEHSjLj pass also when Wasm SjLj is enabled.
451 
452  // Expand indirectbr instructions to switches.
453  addPass(createIndirectBrExpandPass());
454 
456 }
457 
458 bool WebAssemblyPassConfig::addInstSelector() {
460  addPass(
461  createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
462  // Run the argument-move pass immediately after the ScheduleDAG scheduler
463  // so that we can fix up the ARGUMENT instructions before anything else
464  // sees them in the wrong place.
466  // Set the p2align operands. This information is present during ISel, however
467  // it's inconvenient to collect. Collect it now, and update the immediate
468  // operands.
470 
471  // Eliminate range checks and add default targets to br_table instructions.
473 
474  return false;
475 }
476 
477 void WebAssemblyPassConfig::addPostRegAlloc() {
478  // TODO: The following CodeGen passes don't currently support code containing
479  // virtual registers. Consider removing their restrictions and re-enabling
480  // them.
481 
482  // These functions all require the NoVRegs property.
483  disablePass(&MachineCopyPropagationID);
484  disablePass(&PostRAMachineSinkingID);
485  disablePass(&PostRASchedulerID);
486  disablePass(&FuncletLayoutID);
487  disablePass(&StackMapLivenessID);
488  disablePass(&LiveDebugValuesID);
489  disablePass(&PatchableFunctionID);
490  disablePass(&ShrinkWrapID);
491 
492  // This pass hurts code size for wasm because it can generate irreducible
493  // control flow.
494  disablePass(&MachineBlockPlacementID);
495 
497 }
498 
499 void WebAssemblyPassConfig::addPreEmitPass() {
501 
502  // Nullify DBG_VALUE_LISTs that we cannot handle.
504 
505  // Eliminate multiple-entry loops.
507 
508  // Do various transformations for exception handling.
509  // Every CFG-changing optimizations should come before this.
510  if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
512 
513  // Now that we have a prologue and epilogue and all frame indices are
514  // rewritten, eliminate SP and FP. This allows them to be stackified,
515  // colored, and numbered with the rest of the registers.
517 
518  // Preparations and optimizations related to register stackification.
519  if (getOptLevel() != CodeGenOpt::None) {
520  // LiveIntervals isn't commonly run this late. Re-establish preconditions.
522 
523  // Depend on LiveIntervals and perform some optimizations on it.
525 
526  // Prepare memory intrinsic calls for register stackifying.
528 
529  // Mark registers as representing wasm's value stack. This is a key
530  // code-compression technique in WebAssembly. We run this pass (and
531  // MemIntrinsicResults above) very late, so that it sees as much code as
532  // possible, including code emitted by PEI and expanded by late tail
533  // duplication.
534  addPass(createWebAssemblyRegStackify());
535 
536  // Run the register coloring pass to reduce the total number of registers.
537  // This runs after stackification so that it doesn't consider registers
538  // that become stackified.
539  addPass(createWebAssemblyRegColoring());
540  }
541 
542  // Sort the blocks of the CFG into topological order, a prerequisite for
543  // BLOCK and LOOP markers.
544  addPass(createWebAssemblyCFGSort());
545 
546  // Insert BLOCK and LOOP markers.
547  addPass(createWebAssemblyCFGStackify());
548 
549  // Insert explicit local.get and local.set operators.
552 
553  // Lower br_unless into br_if.
555 
556  // Perform the very last peephole optimizations on the code.
557  if (getOptLevel() != CodeGenOpt::None)
558  addPass(createWebAssemblyPeephole());
559 
560  // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
562 
563  // Fix debug_values whose defs have been stackified.
565  addPass(createWebAssemblyDebugFixup());
566 
567  // Collect information to prepare for MC lowering / asm printing.
569 }
570 
571 bool WebAssemblyPassConfig::addPreISel() {
574  return false;
575 }
576 
579  return new yaml::WebAssemblyFunctionInfo();
580 }
581 
583  const MachineFunction &MF) const {
584  const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
585  return new yaml::WebAssemblyFunctionInfo(*MFI);
586 }
587 
590  SMDiagnostic &Error, SMRange &SourceRange) const {
591  const auto &YamlMFI =
592  reinterpret_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
593  MachineFunction &MF = PFS.MF;
594  MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(YamlMFI);
595  return false;
596 }
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Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM ID Predecessors according to mbb< bb27, 0x8b0a7c0 > Note ADDri is not a two address instruction its result reg1037 is an operand of the PHI node in bb76 and its operand reg1039 is the result of the PHI node We should treat it as a two address code and make sure the ADDri is scheduled after any node that reads reg1039 Use info(i.e. register scavenger) to assign it a free register to allow reuse the collector could move the objects and invalidate the derived pointer This is bad enough in the first but safe points can crop up unpredictably **array_addr i32 n y store obj * new
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Definition: TargetOptions.h:268
llvm::MachineFunction::getInfo
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
Definition: MachineFunction.h:739
llvm::WebAssemblyTargetMachine
Definition: WebAssemblyTargetMachine.h:23
llvm::FuncletLayoutID
char & FuncletLayoutID
This pass lays out funclets contiguously.
Definition: FuncletLayout.cpp:39
Y
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
llvm::SMDiagnostic
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:251
llvm::WebAssembly::WasmEnableEmSjLj
cl::opt< bool > WasmEnableEmSjLj
llvm::createWebAssemblyRegStackify
FunctionPass * createWebAssemblyRegStackify()
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::createAtomicExpandPass
FunctionPass * createAtomicExpandPass()
AtomicExpandPass - At IR level this pass replace atomic instructions with __atomic_* library calls,...
llvm::RegisterTargetMachine
RegisterTargetMachine - Helper template for registering a target machine implementation,...
Definition: TargetRegistry.h:1275
llvm::report_fatal_error
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:143
Options
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
Definition: PassBuilderBindings.cpp:48
llvm::ExceptionHandling::Wasm
@ Wasm
WebAssembly Exception Handling.
llvm::initializeWebAssemblyAddMissingPrototypesPass
void initializeWebAssemblyAddMissingPrototypesPass(PassRegistry &)
llvm::initializeWebAssemblyOptimizeLiveIntervalsPass
void initializeWebAssemblyOptimizeLiveIntervalsPass(PassRegistry &)
llvm::createWebAssemblyLowerEmscriptenEHSjLj
ModulePass * createWebAssemblyLowerEmscriptenEHSjLj()
llvm::StackMapLivenessID
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
Definition: StackMapLivenessAnalysis.cpp:86
llvm::createWebAssemblyOptimizeLiveIntervals
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
llvm::TargetMachine::TargetFS
std::string TargetFS
Definition: TargetMachine.h:101
llvm::initializeWebAssemblyExceptionInfoPass
void initializeWebAssemblyExceptionInfoPass(PassRegistry &)
llvm::SubtargetFeatureKV
Used to provide key value pairs for feature and CPU bit flags.
Definition: MCSubtargetInfo.h:34
Utils.h
llvm::StringRef::str
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:244
llvm::Attribute::getValueAsString
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:304
X
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
llvm::TargetMachine::resetTargetOptions
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
Definition: TargetMachine.cpp:56
WebAssemblyUtilities.h
WebAssemblyMCTargetDesc.h
Passes.h
llvm::TargetPassConfig
Target-Independent Code Generator Pass Configuration Options.
Definition: TargetPassConfig.h:84
llvm::cl::opt< bool >
llvm::WebAssemblyTargetMachine::getSubtargetImpl
const WebAssemblySubtarget * getSubtargetImpl() const
Definition: WebAssemblyTargetMachine.cpp:148
llvm::TargetMachine::TargetTriple
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with.
Definition: TargetMachine.h:99
llvm::WebAssemblyTargetMachine::createDefaultFuncInfoYAML
yaml::MachineFunctionInfo * createDefaultFuncInfoYAML() const override
Allocate and return a default initialized instance of the YAML representation for the MachineFunction...
Definition: WebAssemblyTargetMachine.cpp:578
llvm::createWebAssemblyMCLowerPrePass
ModulePass * createWebAssemblyMCLowerPrePass()
llvm::initializeWebAssemblyFixIrreducibleControlFlowPass
void initializeWebAssemblyFixIrreducibleControlFlowPass(PassRegistry &)
llvm::createWebAssemblyDebugFixup
FunctionPass * createWebAssemblyDebugFixup()
llvm::initializeWebAssemblyMCLowerPrePassPass
void initializeWebAssemblyMCLowerPrePassPass(PassRegistry &)
llvm::initializeWebAssemblyRegNumberingPass
void initializeWebAssemblyRegNumberingPass(PassRegistry &)
llvm::EngineKind::JIT
@ JIT
Definition: ExecutionEngine.h:524
LLVM_EXTERNAL_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
Definition: Compiler.h:136
WasmDisableExplicitLocals
static cl::opt< bool > WasmDisableExplicitLocals("wasm-disable-explicit-locals", cl::Hidden, cl::desc("WebAssembly: output implicit locals in" " instruction output for test purposes only."), cl::init(false))
I
#define I(x, y, z)
Definition: MD5.cpp:58
WebAssemblyTargetObjectFile.h
WebAssemblyTargetInfo.h
llvm::TargetPassConfig::addIRPasses
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
Definition: TargetPassConfig.cpp:844
llvm::cl::init
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:441
llvm::initializeWebAssemblyLowerBrUnlessPass
void initializeWebAssemblyLowerBrUnlessPass(PassRegistry &)
llvm::createWebAssemblyNullifyDebugValueLists
FunctionPass * createWebAssemblyNullifyDebugValueLists()
llvm::createWebAssemblyMemIntrinsicResults
FunctionPass * createWebAssemblyMemIntrinsicResults()
llvm::WebAssembly::WasmEnableSjLj
cl::opt< bool > WasmEnableSjLj
TargetPassConfig.h
MachineFunctionPass.h
llvm::createWebAssemblyOptimizeReturned
FunctionPass * createWebAssemblyOptimizeReturned()
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:80
llvm::WebAssemblyFunctionInfo
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
Definition: WebAssemblyMachineFunctionInfo.h:33
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
llvm::WebAssemblyTargetMachine::parseMachineFunctionInfo
bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
Parse out the target's MachineFunctionInfo from the YAML reprsentation.
Definition: WebAssemblyTargetMachine.cpp:588
llvm::initializeWebAssemblyPrepareForLiveIntervalsPass
void initializeWebAssemblyPrepareForLiveIntervalsPass(PassRegistry &)
llvm::TargetMachine::setTargetFeatureString
void setTargetFeatureString(StringRef FS)
Definition: TargetMachine.h:132
llvm::createWebAssemblyAddMissingPrototypes
ModulePass * createWebAssemblyAddMissingPrototypes()
WebAssemblyMachineFunctionInfo.h
llvm::PatchableFunctionID
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
Definition: PatchableFunction.cpp:96
llvm::MachineFunction
Definition: MachineFunction.h:241
llvm::CodeGenOpt::None
@ None
Definition: CodeGen.h:53
TargetOptions.h
llvm::AArch64::RM
@ RM
Definition: AArch64ISelLowering.h:480
llvm::wasm::WASM_FEATURE_PREFIX_USED
@ WASM_FEATURE_PREFIX_USED
Definition: Wasm.h:331
MCAsmInfo.h
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
basicCheckForEHAndSjLj
static void basicCheckForEHAndSjLj(TargetMachine *TM)
Definition: WebAssemblyTargetMachine.cpp:356
llvm::createWebAssemblyPrepareForLiveIntervals
FunctionPass * createWebAssemblyPrepareForLiveIntervals()
llvm::Reloc::Static
@ Static
Definition: CodeGen.h:22
llvm::initializeWebAssemblyExplicitLocalsPass
void initializeWebAssemblyExplicitLocalsPass(PassRegistry &)
llvm::TargetMachine::getTargetFeatureString
StringRef getTargetFeatureString() const
Definition: TargetMachine.h:131
llvm::MachineBlockPlacementID
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
Definition: MachineBlockPlacement.cpp:611
llvm::createIndirectBrExpandPass
FunctionPass * createIndirectBrExpandPass()
Definition: IndirectBrExpandPass.cpp:81
llvm::ShrinkWrapID
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:250
llvm::WebAssemblySubtarget
Definition: WebAssemblySubtarget.h:35
llvm::createWebAssemblyLowerRefTypesIntPtrConv
FunctionPass * createWebAssemblyLowerRefTypesIntPtrConv()
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::WebAssembly::WasmEnableEH
cl::opt< bool > WasmEnableEH
llvm::getEffectiveRelocModel
static Reloc::Model getEffectiveRelocModel(Optional< Reloc::Model > RM)
Definition: AVRTargetMachine.cpp:40
llvm::getEffectiveCodeModel
CodeModel::Model getEffectiveCodeModel(Optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value.
Definition: TargetMachine.h:498
llvm::LLVMTargetMachine::initAsmInfo
void initAsmInfo()
Definition: LLVMTargetMachine.cpp:41
llvm::getTheWebAssemblyTarget64
Target & getTheWebAssemblyTarget64()
Definition: WebAssemblyTargetInfo.cpp:24
llvm::PerFunctionMIParsingState
Definition: MIParser.h:162
llvm::createWebAssemblyCFGSort
FunctionPass * createWebAssemblyCFGSort()
llvm::initializeWebAssemblyRegColoringPass
void initializeWebAssemblyRegColoringPass(PassRegistry &)
llvm::LowerAtomicPass::run
PreservedAnalyses run(Function &F, FunctionAnalysisManager &)
Definition: LowerAtomic.cpp:146
llvm::Error
Lightweight error class with error context and mandatory checking.
Definition: Error.h:157
llvm::initializeWebAssemblyDebugFixupPass
void initializeWebAssemblyDebugFixupPass(PassRegistry &)
Function.h
llvm::initializeWebAssemblyArgumentMovePass
void initializeWebAssemblyArgumentMovePass(PassRegistry &)
llvm::TargetOptions::DataSections
unsigned DataSections
Emit data into separate sections.
Definition: TargetOptions.h:260
llvm::LLVMTargetMachine
This class describes a target machine that is implemented with the LLVM target-independent code gener...
Definition: TargetMachine.h:406
llvm::PerFunctionMIParsingState::MF
MachineFunction & MF
Definition: MIParser.h:164
llvm::initializeWebAssemblyLateEHPreparePass
void initializeWebAssemblyLateEHPreparePass(PassRegistry &)
llvm::ExceptionHandling::None
@ None
No exception support.
llvm::CodeModel::Large
@ Large
Definition: CodeGen.h:28
llvm::createWebAssemblyArgumentMove
FunctionPass * createWebAssemblyArgumentMove()
llvm::TargetMachine::getTargetCPU
StringRef getTargetCPU() const
Definition: TargetMachine.h:130
llvm::PostRASchedulerID
char & PostRASchedulerID
PostRAScheduler - This pass performs post register allocation scheduling.
Definition: PostRASchedulerList.cpp:199
llvm::createWebAssemblyFixFunctionBitcasts
ModulePass * createWebAssemblyFixFunctionBitcasts()
llvm::SMRange
Represents a range in source code.
Definition: SMLoc.h:48
llvm::initializeWebAssemblyNullifyDebugValueListsPass
void initializeWebAssemblyNullifyDebugValueListsPass(PassRegistry &)
llvm::createWebAssemblySetP2AlignOperands
FunctionPass * createWebAssemblySetP2AlignOperands()
llvm::TargetPassConfig::addPreISel
virtual bool addPreISel()
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
Definition: TargetPassConfig.h:357
llvm::legacy::PassManagerBase
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
Definition: LegacyPassManager.h:39
llvm::initializeWebAssemblyPeepholePass
void initializeWebAssemblyPeepholePass(PassRegistry &)
llvm::createWebAssemblyLowerBrUnless
FunctionPass * createWebAssemblyLowerBrUnless()
llvm::AnalysisManager
A container for analyses that lazily runs them and caches their results.
Definition: InstructionSimplify.h:44
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::FunctionPass
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:298
llvm::TargetOptions::FunctionSections
unsigned FunctionSections
Emit functions into separate sections.
Definition: TargetOptions.h:257
llvm::PostRAMachineSinkingID
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
Definition: MachineSink.cpp:1553
llvm::cl::desc
Definition: CommandLine.h:412
llvm::createWebAssemblyRegNumbering
FunctionPass * createWebAssemblyRegNumbering()
llvm::createWebAssemblyLateEHPrepare
FunctionPass * createWebAssemblyLateEHPrepare()
llvm::TargetPassConfig::addPreEmitPass
virtual void addPreEmitPass()
This pass may be implemented by targets that want to run passes immediately before machine code is em...
Definition: TargetPassConfig.h:436
llvm::WebAssemblyTTIImpl
Definition: WebAssemblyTargetTransformInfo.h:28
TargetRegistry.h
llvm::initializeOptimizeReturnedPass
void initializeOptimizeReturnedPass(PassRegistry &)
llvm::TargetMachine::TargetCPU
std::string TargetCPU
Definition: TargetMachine.h:100
llvm::WebAssemblyTargetMachine::getTargetTransformInfo
TargetTransformInfo getTargetTransformInfo(const Function &F) override
Get a TargetTransformInfo implementation for the target.
Definition: WebAssemblyTargetMachine.cpp:338
llvm::initializeWebAssemblyReplacePhysRegsPass
void initializeWebAssemblyReplacePhysRegsPass(PassRegistry &)
llvm::yaml::WebAssemblyFunctionInfo
Definition: WebAssemblyMachineFunctionInfo.h:190
llvm::initializeWebAssemblyMemIntrinsicResultsPass
void initializeWebAssemblyMemIntrinsicResultsPass(PassRegistry &)
llvm::createWebAssemblyPeephole
FunctionPass * createWebAssemblyPeephole()
llvm::initializeFixFunctionBitcastsPass
void initializeFixFunctionBitcastsPass(PassRegistry &)
llvm::WebAssembly::WasmEnableEmEH
cl::opt< bool > WasmEnableEmEH
RegAllocRegistry.h
MIParser.h
llvm::WebAssemblyTargetMachine::WebAssemblyTargetMachine
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
Create an WebAssembly architecture model.
Definition: WebAssemblyTargetMachine.cpp:109
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:38