39 #define DEBUG_TYPE "csky-asm-parser"
42 #define GEN_COMPRESS_INSTR
43 #include "CSKYGenCompressInstEmitter.inc"
46 "Number of C-SKY Compressed instructions emitted");
51 cl::desc(
"Enable C-SKY asm compressed instruction"));
61 unsigned Kind)
override;
64 int64_t Lower, int64_t Upper,
Twine Msg);
66 SMLoc getLoc()
const {
return getParser().getTok().getLoc(); }
68 bool MatchAndEmitInstruction(
SMLoc IDLoc,
unsigned &Opcode,
71 bool MatchingInlineAsm)
override;
73 bool ParseRegister(
unsigned &RegNo,
SMLoc &StartLoc,
SMLoc &EndLoc)
override;
78 bool ParseDirective(
AsmToken DirectiveID)
override;
85 SMLoc &EndLoc)
override;
94 assert(getParser().getStreamer().getTargetStreamer() &&
95 "do not have a target streamer");
101 #define GET_ASSEMBLER_HEADER
102 #include "CSKYGenAsmMatcher.inc"
116 bool parseDirectiveAttribute();
119 enum CSKYMatchResultTy {
120 Match_Dummy = FIRST_TARGET_MATCH_RESULT_TY,
121 Match_RequiresSameSrcAndDst,
122 Match_InvalidRegOutOfRange,
123 #define GET_OPERAND_DIAGNOSTIC_TYPES
124 #include "CSKYGenAsmMatcher.inc"
125 #undef GET_OPERAND_DIAGNOSTIC_TYPES
135 MRI = getContext().getRegisterInfo();
137 setAvailableFeatures(ComputeAvailableFeatures(STI.
getFeatureBits()));
138 getTargetStreamer().emitTargetAttributes(STI);
172 unsigned List1From = 0;
173 unsigned List1To = 0;
174 unsigned List2From = 0;
175 unsigned List2To = 0;
176 unsigned List3From = 0;
177 unsigned List3To = 0;
178 unsigned List4From = 0;
179 unsigned List4To = 0;
182 SMLoc StartLoc, EndLoc;
197 StartLoc = o.StartLoc;
221 bool isToken()
const override {
return Kind == Token; }
223 bool isImm()
const override {
return Kind == Immediate; }
224 bool isRegisterSeq()
const {
return Kind == RegisterSeq; }
225 bool isRegisterList()
const {
return Kind == RegisterList; }
226 bool isConstPoolOp()
const {
return Kind == CPOP; }
228 bool isMem()
const override {
return false; }
230 static bool evaluateConstantImm(
const MCExpr *Expr, int64_t &
Imm) {
231 if (
auto CE = dyn_cast<MCConstantExpr>(Expr)) {
232 Imm =
CE->getValue();
239 template <
unsigned num,
unsigned shift = 0>
bool isUImm()
const {
244 bool IsConstantImm = evaluateConstantImm(getImm(),
Imm);
245 return IsConstantImm && isShiftedUInt<num, shift>(
Imm);
248 template <
unsigned num>
bool isOImm()
const {
253 bool IsConstantImm = evaluateConstantImm(getImm(),
Imm);
254 return IsConstantImm && isUInt<num>(
Imm - 1);
257 template <
unsigned num,
unsigned shift = 0>
bool isSImm()
const {
262 bool IsConstantImm = evaluateConstantImm(getImm(),
Imm);
263 return IsConstantImm && isShiftedInt<num, shift>(
Imm);
266 bool isUImm1()
const {
return isUImm<1>(); }
267 bool isUImm2()
const {
return isUImm<2>(); }
268 bool isUImm3()
const {
return isUImm<3>(); }
269 bool isUImm4()
const {
return isUImm<4>(); }
270 bool isUImm5()
const {
return isUImm<5>(); }
271 bool isUImm6()
const {
return isUImm<6>(); }
272 bool isUImm7()
const {
return isUImm<7>(); }
273 bool isUImm8()
const {
return isUImm<8>(); }
274 bool isUImm12()
const {
return isUImm<12>(); }
275 bool isUImm16()
const {
return isUImm<16>(); }
276 bool isUImm20()
const {
return isUImm<20>(); }
277 bool isUImm24()
const {
return isUImm<24>(); }
279 bool isOImm3()
const {
return isOImm<3>(); }
280 bool isOImm4()
const {
return isOImm<4>(); }
281 bool isOImm5()
const {
return isOImm<5>(); }
282 bool isOImm6()
const {
return isOImm<6>(); }
283 bool isOImm8()
const {
return isOImm<8>(); }
284 bool isOImm12()
const {
return isOImm<12>(); }
285 bool isOImm16()
const {
return isOImm<16>(); }
287 bool isSImm8()
const {
return isSImm<8>(); }
289 bool isUImm5Shift1() {
return isUImm<5, 1>(); }
290 bool isUImm5Shift2() {
return isUImm<5, 2>(); }
291 bool isUImm7Shift1() {
return isUImm<7, 1>(); }
292 bool isUImm7Shift2() {
return isUImm<7, 2>(); }
293 bool isUImm7Shift3() {
return isUImm<7, 3>(); }
294 bool isUImm8Shift2() {
return isUImm<8, 2>(); }
295 bool isUImm8Shift3() {
return isUImm<8, 3>(); }
296 bool isUImm8Shift8() {
return isUImm<8, 8>(); }
297 bool isUImm8Shift16() {
return isUImm<8, 16>(); }
298 bool isUImm8Shift24() {
return isUImm<8, 24>(); }
299 bool isUImm12Shift1() {
return isUImm<12, 1>(); }
300 bool isUImm12Shift2() {
return isUImm<12, 2>(); }
301 bool isUImm16Shift8() {
return isUImm<16, 8>(); }
302 bool isUImm16Shift16() {
return isUImm<16, 16>(); }
303 bool isUImm24Shift8() {
return isUImm<24, 8>(); }
305 bool isSImm16Shift1() {
return isSImm<16, 1>(); }
307 bool isCSKYSymbol()
const {
return isImm(); }
309 bool isConstpool()
const {
return isConstPoolOp(); }
310 bool isDataSymbol()
const {
return isConstPoolOp(); }
312 bool isPSRFlag()
const {
315 if (!
isImm() || !evaluateConstantImm(getImm(),
Imm))
318 return isUInt<5>(
Imm);
321 template <
unsigned MIN,
unsigned MAX>
bool isRegSeqTemplate()
const {
322 if (!isRegisterSeq())
325 std::pair<unsigned, unsigned> regSeq = getRegSeq();
327 return MIN <= regSeq.first && regSeq.first <= regSeq.second &&
328 regSeq.second <=
MAX;
331 bool isRegSeq()
const {
return isRegSeqTemplate<CSKY::R0, CSKY::R31>(); }
333 bool isRegSeqV1()
const {
334 return isRegSeqTemplate<CSKY::F0_32, CSKY::F15_32>();
337 bool isRegSeqV2()
const {
338 return isRegSeqTemplate<CSKY::F0_32, CSKY::F31_32>();
341 static bool isLegalRegList(
unsigned from,
unsigned to) {
342 if (from == 0 &&
to == 0)
346 if (from !=
CSKY::R4 && from != CSKY::R15 && from != CSKY::R16 &&
352 if (from !=
CSKY::R4 && from != CSKY::R16)
357 else if (from == CSKY::R16 &&
to > CSKY::R16 &&
to < CSKY::R18)
364 bool isRegList()
const {
365 if (!isRegisterList())
368 auto regList = getRegList();
370 if (!isLegalRegList(regList.List1From, regList.List1To))
372 if (!isLegalRegList(regList.List2From, regList.List2To))
374 if (!isLegalRegList(regList.List3From, regList.List3To))
376 if (!isLegalRegList(regList.List4From, regList.List4To))
387 bool IsConstantImm = evaluateConstantImm(getImm(),
Imm);
391 int uimm4 =
Imm & 0xf;
393 return isShiftedUInt<6, 0>(
Imm) && uimm4 >= 0 && uimm4 <= 14;
397 SMLoc getStartLoc()
const override {
return StartLoc; }
399 SMLoc getEndLoc()
const override {
return EndLoc; }
401 unsigned getReg()
const override {
406 std::pair<unsigned, unsigned> getRegSeq()
const {
407 assert(
Kind == RegisterSeq &&
"Invalid type access!");
408 return std::pair<unsigned, unsigned>(RegSeq.RegNumFrom, RegSeq.RegNumTo);
411 RegListOp getRegList()
const {
412 assert(
Kind == RegisterList &&
"Invalid type access!");
416 const MCExpr *getImm()
const {
417 assert(
Kind == Immediate &&
"Invalid type access!");
421 const MCExpr *getConstpoolOp()
const {
422 assert(
Kind == CPOP &&
"Invalid type access!");
427 assert(
Kind == Token &&
"Invalid type access!");
441 OS << *getConstpoolOp();
450 OS <<
"<register-seq ";
451 OS <<
RegName(getRegSeq().first) <<
"-" <<
RegName(getRegSeq().second)
455 OS <<
"<register-list ";
456 OS <<
RegName(getRegList().List1From) <<
"-"
457 <<
RegName(getRegList().List1To) <<
",";
458 OS <<
RegName(getRegList().List2From) <<
"-"
459 <<
RegName(getRegList().List2To) <<
",";
460 OS <<
RegName(getRegList().List3From) <<
"-"
461 <<
RegName(getRegList().List3To) <<
",";
462 OS <<
RegName(getRegList().List4From) <<
"-"
463 <<
RegName(getRegList().List4To);
466 OS <<
"'" << getToken() <<
"'";
471 static std::unique_ptr<CSKYOperand> createToken(
StringRef Str,
SMLoc S) {
472 auto Op = std::make_unique<CSKYOperand>(Token);
479 static std::unique_ptr<CSKYOperand> createReg(
unsigned RegNo,
SMLoc S,
481 auto Op = std::make_unique<CSKYOperand>(
Register);
482 Op->Reg.RegNum = RegNo;
488 static std::unique_ptr<CSKYOperand> createRegSeq(
unsigned RegNoFrom,
489 unsigned RegNoTo,
SMLoc S) {
490 auto Op = std::make_unique<CSKYOperand>(RegisterSeq);
491 Op->RegSeq.RegNumFrom = RegNoFrom;
492 Op->RegSeq.RegNumTo = RegNoTo;
498 static std::unique_ptr<CSKYOperand>
500 auto Op = std::make_unique<CSKYOperand>(RegisterList);
501 Op->RegList.List1From = 0;
502 Op->RegList.List1To = 0;
503 Op->RegList.List2From = 0;
504 Op->RegList.List2To = 0;
505 Op->RegList.List3From = 0;
506 Op->RegList.List3To = 0;
507 Op->RegList.List4From = 0;
508 Op->RegList.List4To = 0;
510 for (
unsigned i = 0;
i < reglist.size();
i += 2) {
511 if (
Op->RegList.List1From == 0) {
512 Op->RegList.List1From = reglist[
i];
513 Op->RegList.List1To = reglist[
i + 1];
514 }
else if (
Op->RegList.List2From == 0) {
515 Op->RegList.List2From = reglist[
i];
516 Op->RegList.List2To = reglist[
i + 1];
517 }
else if (
Op->RegList.List3From == 0) {
518 Op->RegList.List3From = reglist[
i];
519 Op->RegList.List3To = reglist[
i + 1];
520 }
else if (
Op->RegList.List4From == 0) {
521 Op->RegList.List4From = reglist[
i];
522 Op->RegList.List4To = reglist[
i + 1];
533 static std::unique_ptr<CSKYOperand> createImm(
const MCExpr *Val,
SMLoc S,
535 auto Op = std::make_unique<CSKYOperand>(Immediate);
542 static std::unique_ptr<CSKYOperand> createConstpoolOp(
const MCExpr *Val,
544 auto Op = std::make_unique<CSKYOperand>(CPOP);
552 assert(Expr &&
"Expr shouldn't be null!");
553 if (
auto *CE = dyn_cast<MCConstantExpr>(Expr))
560 void addRegOperands(
MCInst &Inst,
unsigned N)
const {
561 assert(
N == 1 &&
"Invalid number of operands!");
565 void addImmOperands(
MCInst &Inst,
unsigned N)
const {
566 assert(
N == 1 &&
"Invalid number of operands!");
567 addExpr(Inst, getImm());
570 void addConstpoolOperands(
MCInst &Inst,
unsigned N)
const {
571 assert(
N == 1 &&
"Invalid number of operands!");
575 void addRegSeqOperands(
MCInst &Inst,
unsigned N)
const {
576 assert(
N == 2 &&
"Invalid number of operands!");
577 auto regSeq = getRegSeq();
583 static unsigned getListValue(
unsigned ListFrom,
unsigned ListTo) {
584 if (ListFrom == ListTo && ListFrom == CSKY::R15)
586 else if (ListFrom == ListTo && ListFrom == CSKY::R28)
589 return ListTo - ListFrom + 1;
590 else if (ListFrom == CSKY::R16)
591 return ((ListTo - ListFrom + 1) << 5);
596 void addRegListOperands(
MCInst &Inst,
unsigned N)
const {
597 assert(
N == 1 &&
"Invalid number of operands!");
598 auto regList = getRegList();
602 unsigned T = getListValue(regList.List1From, regList.List1To);
606 T = getListValue(regList.List2From, regList.List2To);
610 T = getListValue(regList.List3From, regList.List3To);
614 T = getListValue(regList.List4From, regList.List4To);
621 bool isValidForTie(
const CSKYOperand &Other)
const {
630 return Reg.RegNum ==
Other.Reg.RegNum;
636 #define GET_REGISTER_MATCHER
637 #define GET_SUBTARGET_FEATURE_NAME
638 #define GET_MATCHER_IMPLEMENTATION
639 #define GET_MNEMONIC_SPELL_CHECKER
640 #include "CSKYGenAsmMatcher.inc"
643 assert(
Reg >= CSKY::F0_32 &&
Reg <= CSKY::F31_32 &&
"Invalid register");
644 return Reg - CSKY::F0_32 + CSKY::F0_64;
648 unsigned VariantID = 0);
650 bool CSKYAsmParser::generateImmOutOfRangeError(
652 Twine Msg =
"immediate must be an integer in the range") {
657 bool CSKYAsmParser::MatchAndEmitInstruction(
SMLoc IDLoc,
unsigned &Opcode,
661 bool MatchingInlineAsm) {
671 return processInstruction(Inst, IDLoc,
Operands, Out);
672 case Match_MissingFeature: {
673 assert(MissingFeatures.
any() &&
"Unknown missing features!");
675 std::string
Msg =
"instruction requires the following: ";
676 for (
unsigned i = 0,
e = MissingFeatures.
size();
i !=
e; ++
i) {
677 if (MissingFeatures[
i]) {
684 case Match_MnemonicFail: {
685 FeatureBitset FBS = ComputeAvailableFeatures(getSTI().getFeatureBits());
686 std::string Suggestion =
688 return Error(IDLoc,
"unrecognized instruction mnemonic" + Suggestion);
690 case Match_InvalidTiedOperand:
691 case Match_InvalidOperand: {
692 SMLoc ErrorLoc = IDLoc;
695 return Error(ErrorLoc,
"too few operands for instruction");
698 if (ErrorLoc ==
SMLoc())
701 return Error(ErrorLoc,
"invalid operand for instruction");
708 if (Result > FIRST_TARGET_MATCH_RESULT_TY) {
709 SMLoc ErrorLoc = IDLoc;
711 return Error(ErrorLoc,
"too few operands for instruction");
717 case Match_InvalidSImm8:
720 case Match_InvalidOImm3:
722 case Match_InvalidOImm4:
724 case Match_InvalidOImm5:
726 case Match_InvalidOImm6:
728 case Match_InvalidOImm8:
730 case Match_InvalidOImm12:
732 case Match_InvalidOImm16:
734 case Match_InvalidUImm1:
736 case Match_InvalidUImm2:
738 case Match_InvalidUImm3:
740 case Match_InvalidUImm4:
742 case Match_InvalidUImm5:
744 case Match_InvalidUImm6:
746 case Match_InvalidUImm7:
748 case Match_InvalidUImm8:
750 case Match_InvalidUImm12:
752 case Match_InvalidUImm16:
754 case Match_InvalidUImm5Shift1:
755 return generateImmOutOfRangeError(
757 "immediate must be a multiple of 2 bytes in the range");
758 case Match_InvalidUImm12Shift1:
759 return generateImmOutOfRangeError(
761 "immediate must be a multiple of 2 bytes in the range");
762 case Match_InvalidUImm5Shift2:
763 return generateImmOutOfRangeError(
765 "immediate must be a multiple of 4 bytes in the range");
766 case Match_InvalidUImm7Shift1:
767 return generateImmOutOfRangeError(
769 "immediate must be a multiple of 2 bytes in the range");
770 case Match_InvalidUImm7Shift2:
771 return generateImmOutOfRangeError(
773 "immediate must be a multiple of 4 bytes in the range");
774 case Match_InvalidUImm8Shift2:
775 return generateImmOutOfRangeError(
777 "immediate must be a multiple of 4 bytes in the range");
778 case Match_InvalidUImm8Shift3:
779 return generateImmOutOfRangeError(
781 "immediate must be a multiple of 8 bytes in the range");
782 case Match_InvalidUImm8Shift8:
783 return generateImmOutOfRangeError(
785 "immediate must be a multiple of 256 bytes in the range");
786 case Match_InvalidUImm12Shift2:
787 return generateImmOutOfRangeError(
789 "immediate must be a multiple of 4 bytes in the range");
790 case Match_InvalidCSKYSymbol: {
792 return Error(ErrorLoc,
"operand must be a symbol name");
794 case Match_InvalidConstpool: {
796 return Error(ErrorLoc,
"operand must be a constpool symbol name");
798 case Match_InvalidPSRFlag: {
800 return Error(ErrorLoc,
"psrset operand is not valid");
802 case Match_InvalidRegSeq: {
804 return Error(ErrorLoc,
"Register sequence is not valid");
806 case Match_InvalidRegOutOfRange: {
808 return Error(ErrorLoc,
"register is out of range");
810 case Match_RequiresSameSrcAndDst: {
812 return Error(ErrorLoc,
"src and dst operand must be same");
814 case Match_InvalidRegList: {
816 return Error(ErrorLoc,
"invalid register list");
828 if (Inst.
getOpcode() == CSKY::PseudoLRW16)
829 Opcode = CSKY::LRW16;
831 Opcode = CSKY::LRW32;
836 Opcode = CSKY::MOVI16;
837 }
else if (getSTI().getFeatureBits()[CSKY::HasE2] &&
839 Opcode = CSKY::MOVI32;
841 auto *Expr = getTargetStreamer().addConstantPoolEntry(
848 const MCExpr *AdjustExpr =
nullptr;
854 MCSymbol *Dot = getContext().createNamedTempSymbol();
859 auto *Expr = getTargetStreamer().addConstantPoolEntry(
875 const MCExpr *Expr = getTargetStreamer().addConstantPoolEntry(
882 const MCExpr *Expr = getTargetStreamer().addConstantPoolEntry(
896 const MCExpr *Expr = getTargetStreamer().addConstantPoolEntry(
903 const MCExpr *Expr = getTargetStreamer().addConstantPoolEntry(
913 bool CSKYAsmParser::processInstruction(
MCInst &Inst,
SMLoc IDLoc,
924 return Error(IDLoc,
"Register sequence is not valid. 'r4-r7' expected");
931 return Error(IDLoc,
"msb must be greater or equal to lsb");
935 return Error(IDLoc,
"msb must be greater or equal to lsb");
939 return Error(IDLoc,
"n must be in range [0,32]");
970 case CSKY::PseudoLRW16:
971 case CSKY::PseudoLRW32:
972 return processLRW(Inst, IDLoc, Out);
973 case CSKY::PseudoJSRI32:
974 return processJSRI(Inst, IDLoc, Out);
975 case CSKY::PseudoJMPI32:
976 return processJMPI(Inst, IDLoc, Out);
987 const MCExpr *Expr = getTargetStreamer().addConstantPoolEntry(
994 emitToStreamer(Out, Inst);
1005 if (RegNo == CSKY::NoRegister)
1008 return RegNo == CSKY::NoRegister;
1011 bool CSKYAsmParser::ParseRegister(
unsigned &RegNo,
SMLoc &StartLoc,
1013 const AsmToken &Tok = getParser().getTok();
1030 switch (getLexer().getKind()) {
1041 Operands.push_back(CSKYOperand::createReg(RegNo,
S,
E));
1051 Operands.push_back(CSKYOperand::createToken(
"(", getLoc()));
1053 auto Tok = getParser().Lex();
1056 getLexer().UnLex(Tok);
1062 Operands.push_back(CSKYOperand::createToken(
")", getLoc()));
1068 Error(getLoc(),
"expected ','");
1076 Error(getLoc(),
"expected '<<'");
1080 Operands.push_back(CSKYOperand::createToken(
"<<", getLoc()));
1085 Error(getLoc(),
"expected imm");
1090 Error(getLoc(),
"expected imm");
1095 Error(getLoc(),
"expected ')'");
1099 Operands.push_back(CSKYOperand::createToken(
")", getLoc()));
1107 switch (getLexer().getKind()) {
1120 if (getParser().parseExpression(IdVal)) {
1121 Error(getLoc(),
"unknown expression");
1126 Operands.push_back(CSKYOperand::createImm(IdVal,
S,
E));
1137 MatchOperandParserImpl(
Operands, Mnemonic,
true);
1144 auto Res = parseRegister(
Operands);
1166 Error(getLoc(),
"unknown operand");
1179 AsmToken Tok = getLexer().getTok();
1181 if (getParser().parseIdentifier(Identifier)) {
1182 Error(getLoc(),
"unknown identifier");
1195 else if (
Identifier.consume_back(
"@TLSGD32"))
1197 else if (
Identifier.consume_back(
"@GOTTPOFF"))
1201 else if (
Identifier.consume_back(
"@TLSLDM32"))
1203 else if (
Identifier.consume_back(
"@TLSLDO32"))
1206 MCSymbol *Sym = getContext().getInlineAsmLabel(Identifier);
1209 Sym = getContext().getOrCreateSymbol(Identifier);
1213 if (!isa<MCSymbolRefExpr>(V)) {
1214 getLexer().UnLex(Tok);
1215 Error(getLoc(),
"unknown symbol");
1223 switch (getLexer().getKind()) {
1228 Operands.push_back(CSKYOperand::createImm(Res,
S,
E));
1241 if (getParser().parseExpression(Expr)) {
1242 Error(getLoc(),
"unknown expression");
1246 Operands.push_back(CSKYOperand::createImm(Res,
S,
E));
1262 if (getParser().parseExpression(Expr)) {
1263 Error(getLoc(),
"unknown expression");
1268 Error(getLoc(),
"expected ]");
1274 Operands.push_back(CSKYOperand::createConstpoolOp(Expr,
S,
E));
1278 AsmToken Tok = getLexer().getTok();
1281 if (getParser().parseIdentifier(Identifier)) {
1282 Error(getLoc(),
"unknown identifier " + Identifier);
1292 MCSymbol *Sym = getContext().getInlineAsmLabel(Identifier);
1295 Sym = getContext().getOrCreateSymbol(Identifier);
1299 if (!isa<MCSymbolRefExpr>(V)) {
1300 getLexer().UnLex(Tok);
1301 Error(getLoc(),
"unknown symbol");
1310 switch (getLexer().getKind()) {
1312 Error(getLoc(),
"unknown symbol");
1321 Operands.push_back(CSKYOperand::createConstpoolOp(Res,
S,
E));
1334 if (getParser().parseExpression(Expr)) {
1335 Error(getLoc(),
"unknown expression");
1340 Error(getLoc(),
"expected ']'");
1347 Operands.push_back(CSKYOperand::createConstpoolOp(Res,
S,
E));
1364 if (getParser().parseExpression(Expr)) {
1365 Error(getLoc(),
"unknown expression");
1370 Error(getLoc(),
"expected ']'");
1376 Operands.push_back(CSKYOperand::createConstpoolOp(Expr,
S,
E));
1380 AsmToken Tok = getLexer().getTok();
1383 if (getParser().parseIdentifier(Identifier)) {
1384 Error(getLoc(),
"unknown identifier");
1388 MCSymbol *Sym = getContext().getInlineAsmLabel(Identifier);
1391 Sym = getContext().getOrCreateSymbol(Identifier);
1395 if (!isa<MCSymbolRefExpr>(V)) {
1396 getLexer().UnLex(Tok);
1397 Error(getLoc(),
"unknown symbol");
1406 switch (getLexer().getKind()) {
1408 Error(getLoc(),
"unknown symbol");
1414 Operands.push_back(CSKYOperand::createConstpoolOp(Res,
S,
E));
1427 if (getParser().parseExpression(Expr)) {
1428 Error(getLoc(),
"unknown expression");
1433 Error(getLoc(),
"expected ']'");
1440 Operands.push_back(CSKYOperand::createConstpoolOp(Res,
S,
E));
1452 if (getParser().parseIdentifier(Identifier)) {
1453 Error(getLoc(),
"unknown identifier " + Identifier);
1457 if (Identifier ==
"sie")
1459 else if (Identifier ==
"ee")
1461 else if (Identifier ==
"ie")
1463 else if (Identifier ==
"fe")
1465 else if (Identifier ==
"af")
1468 Error(getLoc(),
"expected " + Identifier);
1478 Error(getLoc(),
"expected ,");
1494 auto Ry =
Operands.back()->getReg();
1498 Error(getLoc(),
"expected '-'");
1505 Error(getLoc(),
"invalid register");
1509 auto Rz =
Operands.back()->getReg();
1512 Operands.push_back(CSKYOperand::createRegSeq(Ry, Rz,
S));
1524 Error(getLoc(),
"invalid register");
1528 auto Ry =
Operands.back()->getReg();
1535 Error(getLoc(),
"invalid register");
1539 auto Rz =
Operands.back()->getReg();
1542 reglist.push_back(Ry);
1543 reglist.push_back(Rz);
1551 reglist.push_back(Ry);
1552 reglist.push_back(Ry);
1556 reglist.push_back(Ry);
1557 reglist.push_back(Ry);
1560 Error(getLoc(),
"invalid register list");
1565 Operands.push_back(CSKYOperand::createRegList(reglist,
S));
1572 Operands.push_back(CSKYOperand::createToken(
Name, NameLoc));
1593 SMLoc Loc = getLexer().getLoc();
1594 getParser().eatToEndOfStatement();
1595 return Error(Loc,
"unexpected token");
1605 const AsmToken &Tok = getParser().getTok();
1618 bool CSKYAsmParser::ParseDirective(
AsmToken DirectiveID) {
1625 if (IDVal ==
".csky_attribute")
1626 return parseDirectiveAttribute();
1633 bool CSKYAsmParser::parseDirectiveAttribute() {
1642 if (!
Ret.hasValue()) {
1643 Error(TagLoc,
"attribute name not recognised: " +
Name);
1656 if (
check(!CE, TagLoc,
"expected numeric constant"))
1659 Tag =
CE->getValue();
1666 int64_t IntegerValue = 0;
1672 if (IsIntegerValue) {
1679 return Error(ValueExprLoc,
"expected numeric constant");
1680 IntegerValue =
CE->getValue();
1693 getTargetStreamer().emitAttribute(
Tag, IntegerValue);
1695 getTargetStreamer().emitTextAttribute(
Tag, StringValue);
1700 if (
ID == CSKY::ArchKind::INVALID)
1702 ?
"unknown arch name"
1703 :
"unknown cpu name");
1705 getTargetStreamer().emitTextAttribute(
Tag, StringValue);
1713 CSKYOperand &
Op =
static_cast<CSKYOperand &
>(AsmOp);
1716 return Match_InvalidOperand;
1720 if (CSKYMCRegisterClasses[CSKY::FPR32RegClassID].
contains(
Reg)) {
1723 if (
Kind == MCK_FPR64 ||
Kind == MCK_sFPR64) {
1725 if (
Kind == MCK_sFPR64 &&
1726 (
Op.Reg.RegNum < CSKY::F0_64 ||
Op.Reg.RegNum > CSKY::F15_64))
1727 return Match_InvalidRegOutOfRange;
1728 if (
Kind == MCK_FPR64 &&
1729 (
Op.Reg.RegNum < CSKY::F0_64 ||
Op.Reg.RegNum > CSKY::F31_64))
1730 return Match_InvalidRegOutOfRange;
1731 return Match_Success;
1735 if (CSKYMCRegisterClasses[CSKY::GPRRegClassID].
contains(
Reg)) {
1736 if (
Kind == MCK_GPRPair) {
1737 Op.Reg.RegNum =
MRI->getEncodingValue(
Reg) + CSKY::R0_R1;
1738 return Match_Success;
1742 return Match_InvalidOperand;
1749 Res = compressInst(CInst, Inst, getSTI(),
S.getContext());
1751 ++CSKYNumInstrsCompressed;
1752 S.emitInstruction((Res ? CInst : Inst), getSTI());