85 if (&Subtarget == &NewSubtarget)
88 Names2InstrOpCodes.
clear();
90 Names2RegMasks.
clear();
91 Names2SubRegIndices.
clear();
92 Names2TargetIndices.
clear();
93 Names2DirectTargetFlags.
clear();
94 Names2BitmaskTargetFlags.
clear();
95 Names2MMOTargetFlags.
clear();
97 initNames2RegClasses();
101void PerTargetMIParsingState::initNames2Regs() {
102 if (!Names2Regs.empty())
106 Names2Regs.insert(std::make_pair(
"noreg", 0));
108 assert(
TRI &&
"Expected target register info");
110 for (
unsigned I = 0, E =
TRI->getNumRegs();
I < E; ++
I) {
115 assert(WasInserted &&
"Expected registers to be unique case-insensitively");
122 auto RegInfo = Names2Regs.find(
RegName);
123 if (RegInfo == Names2Regs.end())
125 Reg = RegInfo->getValue();
132 std::optional<uint8_t> FV =
TRI->getVRegFlagValue(FlagName);
139void PerTargetMIParsingState::initNames2InstrOpCodes() {
140 if (!Names2InstrOpCodes.
empty())
143 assert(
TII &&
"Expected target instruction info");
144 for (
unsigned I = 0, E =
TII->getNumOpcodes();
I < E; ++
I)
150 initNames2InstrOpCodes();
151 auto InstrInfo = Names2InstrOpCodes.
find(InstrName);
152 if (InstrInfo == Names2InstrOpCodes.
end())
154 OpCode = InstrInfo->getValue();
158void PerTargetMIParsingState::initNames2RegMasks() {
159 if (!Names2RegMasks.
empty())
162 assert(
TRI &&
"Expected target register info");
166 for (
size_t I = 0, E = RegMasks.
size();
I < E; ++
I)
168 std::make_pair(
StringRef(RegMaskNames[
I]).lower(), RegMasks[
I]));
172 initNames2RegMasks();
173 auto RegMaskInfo = Names2RegMasks.
find(Identifier);
174 if (RegMaskInfo == Names2RegMasks.
end())
176 return RegMaskInfo->getValue();
179void PerTargetMIParsingState::initNames2SubRegIndices() {
180 if (!Names2SubRegIndices.
empty())
183 for (
unsigned I = 1, E =
TRI->getNumSubRegIndices();
I < E; ++
I)
184 Names2SubRegIndices.
insert(
185 std::make_pair(
TRI->getSubRegIndexName(
I),
I));
189 initNames2SubRegIndices();
190 auto SubRegInfo = Names2SubRegIndices.
find(
Name);
191 if (SubRegInfo == Names2SubRegIndices.
end())
193 return SubRegInfo->getValue();
196void PerTargetMIParsingState::initNames2TargetIndices() {
197 if (!Names2TargetIndices.
empty())
200 assert(
TII &&
"Expected target instruction info");
201 auto Indices =
TII->getSerializableTargetIndices();
202 for (
const auto &
I : Indices)
207 initNames2TargetIndices();
208 auto IndexInfo = Names2TargetIndices.
find(
Name);
209 if (IndexInfo == Names2TargetIndices.
end())
211 Index = IndexInfo->second;
215void PerTargetMIParsingState::initNames2DirectTargetFlags() {
216 if (!Names2DirectTargetFlags.
empty())
220 assert(
TII &&
"Expected target instruction info");
222 for (
const auto &
I : Flags)
223 Names2DirectTargetFlags.
insert(
229 initNames2DirectTargetFlags();
230 auto FlagInfo = Names2DirectTargetFlags.
find(
Name);
231 if (FlagInfo == Names2DirectTargetFlags.
end())
233 Flag = FlagInfo->second;
237void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
238 if (!Names2BitmaskTargetFlags.
empty())
242 assert(
TII &&
"Expected target instruction info");
244 for (
const auto &
I : Flags)
245 Names2BitmaskTargetFlags.
insert(
251 initNames2BitmaskTargetFlags();
252 auto FlagInfo = Names2BitmaskTargetFlags.
find(
Name);
253 if (FlagInfo == Names2BitmaskTargetFlags.
end())
255 Flag = FlagInfo->second;
259void PerTargetMIParsingState::initNames2MMOTargetFlags() {
260 if (!Names2MMOTargetFlags.
empty())
264 assert(
TII &&
"Expected target instruction info");
265 auto Flags =
TII->getSerializableMachineMemOperandTargetFlags();
266 for (
const auto &
I : Flags)
272 initNames2MMOTargetFlags();
273 auto FlagInfo = Names2MMOTargetFlags.
find(
Name);
274 if (FlagInfo == Names2MMOTargetFlags.
end())
276 Flag = FlagInfo->second;
280void PerTargetMIParsingState::initNames2RegClasses() {
281 if (!Names2RegClasses.
empty())
285 for (
unsigned I = 0, E =
TRI->getNumRegClasses();
I < E; ++
I) {
286 const auto *RC =
TRI->getRegClass(
I);
292void PerTargetMIParsingState::initNames2RegBanks() {
293 if (!Names2RegBanks.
empty())
311 auto RegClassInfo = Names2RegClasses.
find(
Name);
312 if (RegClassInfo == Names2RegClasses.
end())
314 return RegClassInfo->getValue();
318 auto RegBankInfo = Names2RegBanks.
find(
Name);
319 if (RegBankInfo == Names2RegBanks.
end())
321 return RegBankInfo->getValue();
326 : MF(MF), SM(&SM), IRSlots(IRSlots),
Target(
T) {
330 auto I =
VRegInfos.insert(std::make_pair(Num,
nullptr));
334 Info->VReg =
MRI.createIncompleteVirtualRegister();
335 I.first->second =
Info;
337 return *
I.first->second;
347 I.first->second =
Info;
349 return *
I.first->second;
357 Slots2Values.
insert(std::make_pair(
unsigned(Slot), V));
365 for (
const auto &Arg :
F.args())
367 for (
const auto &BB :
F) {
369 for (
const auto &
I : BB)
384struct ParsedMachineOperand {
388 std::optional<unsigned> TiedDefIdx;
392 std::optional<unsigned> &TiedDefIdx)
393 : Operand(Operand), Begin(Begin),
End(
End), TiedDefIdx(TiedDefIdx) {
396 "Only used register operands can be tied");
418 void lex(
unsigned SkipChar = 0);
432 bool parseBasicBlocks();
438 bool parseStandaloneStackObject(
int &FI);
441 bool parseMDTuple(
MDNode *&MD,
bool IsDistinct);
456 bool parseRegisterFlag(
unsigned &Flags);
458 bool parseSubRegisterIndex(
unsigned &
SubReg);
459 bool parseRegisterTiedDefIndex(
unsigned &TiedDefIdx);
461 std::optional<unsigned> &TiedDefIdx,
472 bool parseStackFrameIndex(
int &FI);
474 bool parseFixedStackFrameIndex(
int &FI);
484 bool parseDIExpression(
MDNode *&Expr);
485 bool parseDILocation(
MDNode *&Expr);
487 bool parseCFIOffset(
int &
Offset);
490 bool parseCFIEscapeValues(std::string& Values);
501 bool parseMachineOperand(
const unsigned OpCode,
const unsigned OpIdx,
503 std::optional<unsigned> &TiedDefIdx);
504 bool parseMachineOperandAndTargetFlags(
const unsigned OpCode,
505 const unsigned OpIdx,
507 std::optional<unsigned> &TiedDefIdx);
508 bool parseOffset(int64_t &
Offset);
509 bool parseIRBlockAddressTaken(
BasicBlock *&BB);
511 bool parseAddrspace(
unsigned &Addrspace);
512 bool parseSectionID(std::optional<MBBSectionID> &SID);
513 bool parseBBID(std::optional<UniqueBBID> &BBID);
514 bool parseCallFrameSize(
unsigned &CallFrameSize);
523 bool parsePreOrPostInstrSymbol(
MCSymbol *&Symbol);
527 bool parseTargetImmMnemonic(
const unsigned OpCode,
const unsigned OpIdx,
555 bool parseInstruction(
unsigned &OpCode,
unsigned &Flags);
571 bool parseStringConstant(std::string &Result);
588 SourceRange(SourceRange), PFS(PFS) {}
590void MIParser::lex(
unsigned SkipChar) {
592 CurrentSource.substr(SkipChar), Token,
596bool MIParser::error(
const Twine &Msg) {
return error(Token.location(), Msg); }
616 assert(SourceRange.isValid() &&
"Invalid source range");
638 return "<unknown token>";
643 if (Token.isNot(TokenKind))
650 if (Token.isNot(TokenKind))
657bool MIParser::parseSectionID(std::optional<MBBSectionID> &SID) {
663 return error(
"Unknown Section ID");
666 const StringRef &S = Token.stringValue();
667 if (S ==
"Exception")
669 else if (S ==
"Cold")
672 return error(
"Unknown Section ID");
679bool MIParser::parseBBID(std::optional<UniqueBBID> &BBID) {
683 unsigned CloneID = 0;
685 return error(
"Unknown BB ID");
689 return error(
"Unknown Clone ID");
692 BBID = {BaseID, CloneID};
697bool MIParser::parseCallFrameSize(
unsigned &CallFrameSize) {
702 return error(
"Unknown call frame size");
703 CallFrameSize =
Value;
708bool MIParser::parseBasicBlockDefinition(
714 auto Loc = Token.location();
715 auto Name = Token.stringValue();
717 bool MachineBlockAddressTaken =
false;
719 bool IsLandingPad =
false;
720 bool IsInlineAsmBrIndirectTarget =
false;
721 bool IsEHFuncletEntry =
false;
722 std::optional<MBBSectionID> SectionID;
724 std::optional<UniqueBBID> BBID;
725 unsigned CallFrameSize = 0;
730 switch (Token.kind()) {
732 MachineBlockAddressTaken =
true;
736 if (parseIRBlockAddressTaken(AddressTakenIRBlock))
744 IsInlineAsmBrIndirectTarget =
true;
748 IsEHFuncletEntry =
true;
758 if (parseIRBlock(BB, MF.getFunction()))
763 if (parseSectionID(SectionID))
771 if (parseCallFrameSize(CallFrameSize))
785 BB = dyn_cast_or_null<BasicBlock>(
786 MF.getFunction().getValueSymbolTable()->lookup(
Name));
789 "' is not defined in the function '" +
792 auto *
MBB = MF.CreateMachineBasicBlock(BB, BBID);
794 bool WasInserted = MBBSlots.
insert(std::make_pair(
ID,
MBB)).second;
796 return error(Loc,
Twine(
"redefinition of machine basic block with id #") +
800 if (MachineBlockAddressTaken)
802 if (AddressTakenIRBlock)
815bool MIParser::parseBasicBlockDefinitions(
821 if (Token.isErrorOrEOF())
822 return Token.isError();
824 return error(
"expected a basic block definition before instructions");
825 unsigned BraceDepth = 0;
827 if (parseBasicBlockDefinition(MBBSlots))
829 bool IsAfterNewline =
false;
833 Token.isErrorOrEOF())
836 return error(
"basic block definition should be located at the start of "
839 IsAfterNewline =
true;
842 IsAfterNewline =
false;
847 return error(
"extraneous closing brace ('}')");
853 if (!Token.isError() && BraceDepth)
854 return error(
"expected '}'");
855 }
while (!Token.isErrorOrEOF());
856 return Token.isError();
864 if (Token.isNewlineOrEOF())
868 return error(
"expected a named register");
870 if (parseNamedRegister(Reg))
878 return error(
"expected a lane mask");
880 "Use correct get-function for lane mask");
883 return error(
"invalid lane mask value");
897 if (Token.isNewlineOrEOF())
901 return error(
"expected a machine basic block reference");
910 return error(
"expected an integer literal after '('");
944 bool ExplicitSuccessors =
false;
947 if (parseBasicBlockSuccessors(
MBB))
949 ExplicitSuccessors =
true;
951 if (parseBasicBlockLiveins(
MBB))
957 if (!Token.isNewlineOrEOF())
958 return error(
"expected line break at the end of a list");
963 bool IsInBundle =
false;
987 return error(
"nested instruction bundles are not allowed");
996 assert(Token.isNewlineOrEOF() &&
"MI is not fully parsed");
1001 if (!ExplicitSuccessors) {
1008 if (IsFallthrough) {
1009 AddFalthroughFrom = &
MBB;
1018bool MIParser::parseBasicBlocks() {
1023 if (Token.isErrorOrEOF())
1024 return Token.isError();
1033 if (AddFalthroughFrom) {
1037 AddFalthroughFrom =
nullptr;
1039 if (parseBasicBlock(*
MBB, AddFalthroughFrom))
1052 while (Token.isRegister() || Token.isRegisterFlag()) {
1053 auto Loc = Token.location();
1054 std::optional<unsigned> TiedDefIdx;
1055 if (parseRegisterOperand(MO, TiedDefIdx,
true))
1058 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1067 if (Token.isError() || parseInstruction(OpCode, Flags))
1079 auto Loc = Token.location();
1080 std::optional<unsigned> TiedDefIdx;
1081 if (parseMachineOperandAndTargetFlags(OpCode,
Operands.size(), MO, TiedDefIdx))
1084 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1089 return error(
"expected ',' before the next machine operand");
1093 MCSymbol *PreInstrSymbol =
nullptr;
1095 if (parsePreOrPostInstrSymbol(PreInstrSymbol))
1097 MCSymbol *PostInstrSymbol =
nullptr;
1099 if (parsePreOrPostInstrSymbol(PostInstrSymbol))
1101 MDNode *HeapAllocMarker =
nullptr;
1103 if (parseHeapAllocMarker(HeapAllocMarker))
1105 MDNode *PCSections =
nullptr;
1107 if (parsePCSections(PCSections))
1110 unsigned CFIType = 0;
1114 return error(
"expected an integer literal after 'cfi-type'");
1124 unsigned InstrNum = 0;
1128 return error(
"expected an integer literal after 'debug-instr-number'");
1145 if (parseDILocation(
Node))
1148 return error(
"expected a metadata node after 'debug-location'");
1149 if (!isa<DILocation>(
Node))
1150 return error(
"referenced metadata is not a DILocation");
1158 while (!Token.isNewlineOrEOF()) {
1160 if (parseMachineMemoryOperand(
MemOp))
1163 if (Token.isNewlineOrEOF())
1166 return error(
"expected ',' before the next machine memory operand");
1171 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
1172 if (!MCID.isVariadic()) {
1174 if (verifyImplicitOperands(
Operands, MCID))
1178 MI = MF.CreateMachineInstr(MCID, DebugLocation,
true);
1179 MI->setFlags(Flags);
1183 for (
const auto &Operand :
Operands)
1184 MI->addOperand(MF, Operand.Operand);
1189 MI->setPreInstrSymbol(MF, PreInstrSymbol);
1190 if (PostInstrSymbol)
1191 MI->setPostInstrSymbol(MF, PostInstrSymbol);
1192 if (HeapAllocMarker)
1193 MI->setHeapAllocMarker(MF, HeapAllocMarker);
1195 MI->setPCSections(MF, PCSections);
1197 MI->setCFIType(MF, CFIType);
1198 if (!MemOperands.
empty())
1199 MI->setMemRefs(MF, MemOperands);
1201 MI->setDebugInstrNum(InstrNum);
1208 return error(
"expected a machine basic block reference");
1214 "expected end of string after the machine basic block reference");
1218bool MIParser::parseStandaloneNamedRegister(
Register &Reg) {
1221 return error(
"expected a named register");
1222 if (parseNamedRegister(Reg))
1226 return error(
"expected end of string after the register reference");
1230bool MIParser::parseStandaloneVirtualRegister(
VRegInfo *&Info) {
1233 return error(
"expected a virtual register");
1234 if (parseVirtualRegister(Info))
1238 return error(
"expected end of string after the register reference");
1242bool MIParser::parseStandaloneRegister(
Register &Reg) {
1246 return error(
"expected either a named or virtual register");
1249 if (parseRegister(Reg, Info))
1254 return error(
"expected end of string after the register reference");
1258bool MIParser::parseStandaloneStackObject(
int &FI) {
1261 return error(
"expected a stack object");
1262 if (parseStackFrameIndex(FI))
1265 return error(
"expected end of string after the stack object reference");
1269bool MIParser::parseStandaloneMDNode(
MDNode *&
Node) {
1275 if (parseDIExpression(
Node))
1278 if (parseDILocation(
Node))
1281 return error(
"expected a metadata node");
1283 return error(
"expected end of string after the metadata node");
1287bool MIParser::parseMachineMetadata() {
1290 return error(
"expected a metadata node");
1294 return error(
"expected metadata id after '!'");
1305 return error(
"expected a metadata node");
1309 if (parseMDTuple(MD, IsDistinct))
1312 auto FI = PFS.MachineForwardRefMDNodes.find(
ID);
1313 if (FI != PFS.MachineForwardRefMDNodes.end()) {
1315 PFS.MachineForwardRefMDNodes.erase(FI);
1317 assert(PFS.MachineMetadataNodes[
ID] == MD &&
"Tracking VH didn't work");
1319 auto [It,
Inserted] = PFS.MachineMetadataNodes.try_emplace(
ID);
1321 return error(
"Metadata id is already used");
1322 It->second.reset(MD);
1328bool MIParser::parseMDTuple(
MDNode *&MD,
bool IsDistinct) {
1330 if (parseMDNodeVector(Elts))
1339 return error(
"expected '{' here");
1360 return error(
"expected end of metadata node");
1368bool MIParser::parseMetadata(
Metadata *&MD) {
1370 return error(
"expected '!' here");
1375 if (parseStringConstant(Str))
1382 return error(
"expected metadata id after '!'");
1384 SMLoc Loc = mapSMLoc(Token.location());
1391 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(
ID);
1392 if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {
1393 MD = NodeInfo->second.get();
1397 NodeInfo = PFS.MachineMetadataNodes.find(
ID);
1398 if (NodeInfo != PFS.MachineMetadataNodes.end()) {
1399 MD = NodeInfo->second.get();
1403 auto &FwdRef = PFS.MachineForwardRefMDNodes[
ID];
1404 FwdRef = std::make_pair(
1406 PFS.MachineMetadataNodes[
ID].reset(FwdRef.first.get());
1407 MD = FwdRef.first.get();
1414 return MO.
isDef() ?
"implicit-def" :
"implicit";
1419 assert(Reg.isPhysical() &&
"expected phys reg");
1447 const auto *
TRI = MF.getSubtarget().getRegisterInfo();
1448 assert(
TRI &&
"Expected target register info");
1449 for (
const auto &
I : ImplicitOperands) {
1453 Twine(
"missing implicit register operand '") +
1460bool MIParser::parseInstruction(
unsigned &OpCode,
unsigned &Flags) {
1523 return error(
"expected a machine instruction");
1524 StringRef InstrName = Token.stringValue();
1525 if (PFS.Target.parseInstrName(InstrName, OpCode))
1526 return error(
Twine(
"unknown machine instruction name '") + InstrName +
"'");
1531bool MIParser::parseNamedRegister(
Register &Reg) {
1534 if (PFS.Target.getRegisterByName(
Name, Reg))
1539bool MIParser::parseNamedVirtualRegister(
VRegInfo *&Info) {
1544 Info = &PFS.getVRegInfoNamed(
Name);
1548bool MIParser::parseVirtualRegister(
VRegInfo *&Info) {
1550 return parseNamedVirtualRegister(Info);
1555 Info = &PFS.getVRegInfo(
ID);
1560 switch (Token.kind()) {
1565 return parseNamedRegister(Reg);
1568 if (parseVirtualRegister(Info))
1580 return error(
"expected '_', register class, or register bank name");
1595 return error(Loc,
Twine(
"conflicting register classes, previously: ") +
1604 return error(Loc,
"register class specification on generic register");
1612 RegBank = PFS.Target.getRegBank(
Name);
1614 return error(Loc,
"expected '_', register class, or register bank name");
1625 return error(Loc,
"conflicting generic register banks");
1631 return error(Loc,
"register bank specification on normal register");
1636bool MIParser::parseRegisterFlag(
unsigned &Flags) {
1637 const unsigned OldFlags =
Flags;
1638 switch (Token.kind()) {
1672 if (OldFlags == Flags)
1675 return error(
"duplicate '" + Token.stringValue() +
"' register flag");
1680bool MIParser::parseSubRegisterIndex(
unsigned &
SubReg) {
1684 return error(
"expected a subregister index after '.'");
1685 auto Name = Token.stringValue();
1688 return error(
Twine(
"use of unknown subregister index '") +
Name +
"'");
1693bool MIParser::parseRegisterTiedDefIndex(
unsigned &TiedDefIdx) {
1697 return error(
"expected an integer literal after 'tied-def'");
1709 for (
unsigned I = 0, E =
Operands.size();
I != E; ++
I) {
1714 unsigned DefIdx = *
Operands[
I].TiedDefIdx;
1717 Twine(
"use of invalid tied-def operand index '" +
1718 Twine(DefIdx) +
"'; instruction has only ") +
1719 Twine(E) +
" operands");
1720 const auto &DefOperand =
Operands[DefIdx].Operand;
1721 if (!DefOperand.isReg() || !DefOperand.isDef())
1724 Twine(
"use of invalid tied-def operand index '") +
1725 Twine(DefIdx) +
"'; the operand #" +
Twine(DefIdx) +
1726 " isn't a defined register");
1728 for (
const auto &TiedPair : TiedRegisterPairs) {
1729 if (TiedPair.first == DefIdx)
1731 Twine(
"the tied-def operand #") +
Twine(DefIdx) +
1732 " is already tied with another register operand");
1734 TiedRegisterPairs.push_back(std::make_pair(DefIdx,
I));
1738 for (
const auto &TiedPair : TiedRegisterPairs)
1739 MI.tieOperands(TiedPair.first, TiedPair.second);
1744 std::optional<unsigned> &TiedDefIdx,
1747 while (Token.isRegisterFlag()) {
1748 if (parseRegisterFlag(Flags))
1751 if (!Token.isRegister())
1752 return error(
"expected a register after register flags");
1755 if (parseRegister(Reg,
RegInfo))
1760 if (parseSubRegisterIndex(
SubReg))
1762 if (!
Reg.isVirtual())
1763 return error(
"subregister index expects a virtual register");
1766 if (!
Reg.isVirtual())
1767 return error(
"register class specification expects a virtual register");
1769 if (parseRegisterClassOrBank(*
RegInfo))
1776 if (!parseRegisterTiedDefIndex(
Idx))
1781 if (parseLowLevelType(Token.location(), Ty))
1782 return error(
"expected tied-def or low-level type after '('");
1787 if (
MRI.getType(Reg).isValid() &&
MRI.getType(Reg) != Ty)
1788 return error(
"inconsistent type for generic virtual register");
1791 MRI.setType(Reg, Ty);
1792 MRI.noteNewVirtualRegister(Reg);
1797 if (!
Reg.isVirtual())
1798 return error(
"unexpected type on physical register");
1801 if (parseLowLevelType(Token.location(), Ty))
1807 if (
MRI.getType(Reg).isValid() &&
MRI.getType(Reg) != Ty)
1808 return error(
"inconsistent type for generic virtual register");
1811 MRI.setType(Reg, Ty);
1812 }
else if (
Reg.isVirtual()) {
1818 return error(
"generic virtual registers must have a type");
1823 return error(
"cannot have a killed def operand");
1826 return error(
"cannot have a dead use operand");
1840 const APSInt &
Int = Token.integerValue();
1841 if (
auto SImm =
Int.trySExtValue();
Int.isSigned() && SImm.has_value())
1843 else if (
auto UImm =
Int.tryZExtValue(); !
Int.isSigned() && UImm.has_value())
1846 return error(
"integer literal is too large to be an immediate operand");
1851bool MIParser::parseTargetImmMnemonic(
const unsigned OpCode,
1852 const unsigned OpIdx,
1856 auto Loc = Token.location();
1862 Len += Token.range().size();
1871 Src =
StringRef(Loc, Len + Token.stringValue().size());
1876 ->
bool { return error(Loc, Msg); }))
1888 auto Source = StringValue.
str();
1893 return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());
1899 return ::parseIRConstant(
1900 Loc, StringValue, PFS,
C,
1902 return error(Loc, Msg);
1915 return Size != 0 && isUInt<16>(
Size);
1919 return NumElts != 0 && isUInt<16>(NumElts);
1923 return isUInt<24>(AddrSpace);
1927 if (Token.range().front() ==
's' || Token.range().front() ==
'p') {
1930 return error(
"expected integers after 's'/'p' type character");
1933 if (Token.range().front() ==
's') {
1937 return error(
"invalid size for scalar type");
1944 }
else if (Token.range().front() ==
'p') {
1948 return error(
"invalid address space number");
1957 return error(Loc,
"expected sN, pA, <M x sN>, <M x pA>, <vscale x M x sN>, "
1958 "or <vscale x M x pA> for GlobalISel type");
1966 return error(
"expected <vscale x M x sN> or <vscale x M x pA>");
1970 auto GetError = [
this, &HasVScale, Loc]() {
1973 Loc,
"expected <vscale x M x sN> or <vscale M x pA> for vector type");
1974 return error(Loc,
"expected <M x sN> or <M x pA> for vector type");
1979 uint64_t NumElements = Token.integerValue().getZExtValue();
1981 return error(
"invalid number of vector elements");
1989 if (Token.range().front() !=
's' && Token.range().front() !=
'p')
1994 return error(
"expected integers after 's'/'p' type character");
1996 if (Token.range().front() ==
's') {
1999 return error(
"invalid size for scalar element in vector");
2001 }
else if (Token.range().front() ==
'p') {
2005 return error(
"invalid address space number");
2024 if (TypeStr.
front() !=
'i' && TypeStr.
front() !=
's' &&
2025 TypeStr.
front() !=
'p')
2027 "a typed immediate operand should start with one of 'i', 's', or 'p'");
2030 return error(
"expected integers after 'i'/'s'/'p' type character");
2032 auto Loc = Token.location();
2036 !(Token.range() ==
"true" || Token.range() ==
"false"))
2037 return error(
"expected an integer literal");
2047 auto Loc = Token.location();
2051 return error(
"expected a floating point literal");
2062 assert(S[0] ==
'0' && tolower(S[1]) ==
'x');
2064 if (!isxdigit(S[2]))
2067 APInt A(V.size()*4, V, 16);
2071 unsigned NumBits = (
A == 0) ? 32 :
A.getActiveBits();
2082 return ErrCB(Token.
location(),
"expected 32-bit integer (too large)");
2090 if (
A.getBitWidth() > 32)
2091 return ErrCB(Token.
location(),
"expected 32-bit integer (too large)");
2092 Result =
A.getZExtValue();
2098bool MIParser::getUnsigned(
unsigned &Result) {
2099 return ::getUnsigned(
2101 return error(Loc, Msg);
2111 auto MBBInfo = PFS.MBBSlots.find(
Number);
2112 if (MBBInfo == PFS.MBBSlots.end())
2113 return error(
Twine(
"use of undefined machine basic block #") +
2115 MBB = MBBInfo->second;
2118 if (!Token.stringValue().empty() && Token.stringValue() !=
MBB->
getName())
2120 " isn't '" + Token.stringValue() +
"'");
2133bool MIParser::parseStackFrameIndex(
int &FI) {
2138 auto ObjectInfo = PFS.StackObjectSlots.find(
ID);
2139 if (ObjectInfo == PFS.StackObjectSlots.end())
2143 if (
const auto *Alloca =
2144 MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
2145 Name = Alloca->getName();
2146 if (!Token.stringValue().empty() && Token.stringValue() !=
Name)
2148 "' isn't '" + Token.stringValue() +
"'");
2150 FI = ObjectInfo->second;
2156 if (parseStackFrameIndex(FI))
2162bool MIParser::parseFixedStackFrameIndex(
int &FI) {
2167 auto ObjectInfo = PFS.FixedStackObjectSlots.find(
ID);
2168 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
2169 return error(
Twine(
"use of undefined fixed stack object '%fixed-stack.") +
2172 FI = ObjectInfo->second;
2176bool MIParser::parseFixedStackObjectOperand(
MachineOperand &Dest) {
2178 if (parseFixedStackFrameIndex(FI))
2187 switch (Token.
kind()) {
2192 return ErrCB(Token.
location(),
Twine(
"use of undefined global value '") +
2193 Token.
range() +
"'");
2202 return ErrCB(Token.
location(),
Twine(
"use of undefined global value '@") +
2203 Twine(GVIdx) +
"'");
2212bool MIParser::parseGlobalValue(
GlobalValue *&GV) {
2213 return ::parseGlobalValue(
2216 return error(Loc, Msg);
2226 if (parseOperandsOffset(Dest))
2231bool MIParser::parseConstantPoolIndexOperand(
MachineOperand &Dest) {
2238 return error(
"use of undefined constant '%const." +
Twine(
ID) +
"'");
2241 if (parseOperandsOffset(Dest))
2251 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(
ID);
2252 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
2253 return error(
"use of undefined jump table '%jump-table." +
Twine(
ID) +
"'");
2261 const char *
Symbol = MF.createExternalSymbolName(Token.stringValue());
2264 if (parseOperandsOffset(Dest))
2274 if (parseOperandsOffset(Dest))
2279bool MIParser::parseSubRegisterIndexOperand(
MachineOperand &Dest) {
2282 unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
2283 if (SubRegIndex == 0)
2293 auto Loc = Token.location();
2296 return error(
"expected metadata id after '!'");
2300 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(
ID);
2301 if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {
2302 NodeInfo = PFS.MachineMetadataNodes.find(
ID);
2303 if (NodeInfo == PFS.MachineMetadataNodes.end())
2304 return error(Loc,
"use of undefined metadata '!" +
Twine(
ID) +
"'");
2307 Node = NodeInfo->second.get();
2311bool MIParser::parseDIExpression(
MDNode *&Expr) {
2314 CurrentSource,
Read,
Error, *PFS.MF.getFunction().getParent(),
2316 CurrentSource = CurrentSource.substr(
Read);
2323bool MIParser::parseDILocation(
MDNode *&Loc) {
2327 bool HaveLine =
false;
2329 unsigned Column = 0;
2331 MDNode *InlinedAt =
nullptr;
2332 bool ImplicitCode =
false;
2340 if (Token.stringValue() ==
"line") {
2345 Token.integerValue().isSigned())
2346 return error(
"expected unsigned integer");
2347 Line = Token.integerValue().getZExtValue();
2352 if (Token.stringValue() ==
"column") {
2357 Token.integerValue().isSigned())
2358 return error(
"expected unsigned integer");
2359 Column = Token.integerValue().getZExtValue();
2363 if (Token.stringValue() ==
"scope") {
2368 return error(
"expected metadata node");
2369 if (!isa<DIScope>(Scope))
2370 return error(
"expected DIScope node");
2373 if (Token.stringValue() ==
"inlinedAt") {
2381 if (parseDILocation(InlinedAt))
2384 return error(
"expected metadata node");
2385 if (!isa<DILocation>(InlinedAt))
2386 return error(
"expected DILocation node");
2389 if (Token.stringValue() ==
"isImplicitCode") {
2394 return error(
"expected true/false");
2398 if (Token.stringValue() ==
"true")
2399 ImplicitCode =
true;
2400 else if (Token.stringValue() ==
"false")
2401 ImplicitCode =
false;
2403 return error(
"expected true/false");
2408 return error(
Twine(
"invalid DILocation argument '") +
2409 Token.stringValue() +
"'");
2417 return error(
"DILocation requires line number");
2419 return error(
"DILocation requires a scope");
2421 Loc =
DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
2422 InlinedAt, ImplicitCode);
2432 if (parseDIExpression(
Node))
2439bool MIParser::parseCFIOffset(
int &
Offset) {
2441 return error(
"expected a cfi offset");
2442 if (Token.integerValue().getSignificantBits() > 32)
2443 return error(
"expected a 32 bit integer (the cfi offset is too large)");
2444 Offset = (int)Token.integerValue().getExtValue();
2449bool MIParser::parseCFIRegister(
Register &Reg) {
2451 return error(
"expected a cfi register");
2453 if (parseNamedRegister(LLVMReg))
2455 const auto *
TRI = MF.getSubtarget().getRegisterInfo();
2456 assert(
TRI &&
"Expected target register info");
2457 int DwarfReg =
TRI->getDwarfRegNum(LLVMReg,
true);
2459 return error(
"invalid DWARF register");
2465bool MIParser::parseCFIAddressSpace(
unsigned &
AddressSpace) {
2467 return error(
"expected a cfi address space literal");
2468 if (Token.integerValue().isSigned())
2469 return error(
"expected an unsigned integer (cfi address space)");
2475bool MIParser::parseCFIEscapeValues(std::string &Values) {
2478 return error(
"expected a hexadecimal literal");
2482 if (
Value > UINT8_MAX)
2483 return error(
"expected a 8-bit integer (too large)");
2491 auto Kind = Token.kind();
2499 if (parseCFIRegister(Reg))
2514 CFIIndex = MF.addFrameInst(
2518 if (parseCFIRegister(Reg))
2524 if (parseCFIOffset(
Offset))
2530 if (parseCFIOffset(
Offset))
2532 CFIIndex = MF.addFrameInst(
2554 if (parseCFIRegister(Reg))
2562 if (parseCFIRegister(Reg))
2569 parseCFIRegister(Reg2))
2588 if (parseCFIEscapeValues(Values))
2602 switch (Token.kind()) {
2604 BB = dyn_cast_or_null<BasicBlock>(
2605 F.getValueSymbolTable()->lookup(Token.stringValue()));
2607 return error(
Twine(
"use of undefined IR block '") + Token.range() +
"'");
2611 unsigned SlotNumber = 0;
2614 BB =
const_cast<BasicBlock *
>(getIRBlock(SlotNumber,
F));
2616 return error(
Twine(
"use of undefined IR block '%ir-block.") +
2617 Twine(SlotNumber) +
"'");
2633 return error(
"expected a global value");
2637 auto *
F = dyn_cast<Function>(GV);
2639 return error(
"expected an IR function reference");
2645 return error(
"expected an IR block reference");
2646 if (parseIRBlock(BB, *
F))
2652 if (parseOperandsOffset(Dest))
2661 return error(
"expected syntax intrinsic(@llvm.whatever)");
2664 return error(
"expected syntax intrinsic(@llvm.whatever)");
2666 std::string
Name = std::string(Token.stringValue());
2670 return error(
"expected ')' to terminate intrinsic name");
2680 return error(
"unknown intrinsic name");
2692 return error(
"expected syntax intpred(whatever) or floatpred(whatever");
2695 return error(
"whatever");
2718 return error(
"invalid floating-point predicate");
2733 return error(
"invalid integer predicate");
2739 return error(
"predicate should be terminated by ')'.");
2749 return error(
"expected syntax shufflemask(<integer or undef>, ...)");
2756 const APSInt &
Int = Token.integerValue();
2759 return error(
"expected integer constant");
2765 return error(
"shufflemask should be terminated by ')'.");
2777 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2780 return error(
"expected unsigned integer for instruction index");
2781 uint64_t InstrIdx = Token.integerValue().getZExtValue();
2782 assert(InstrIdx <= std::numeric_limits<unsigned>::max() &&
2783 "Instruction reference's instruction index is too large");
2787 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2790 return error(
"expected unsigned integer for operand index");
2791 uint64_t OpIdx = Token.integerValue().getZExtValue();
2792 assert(OpIdx <= std::numeric_limits<unsigned>::max() &&
2793 "Instruction reference's operand index is too large");
2797 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2809 return error(
"expected the name of the target index");
2811 if (PFS.Target.getTargetIndex(Token.stringValue(), Index))
2812 return error(
"use of undefined target index '" + Token.stringValue() +
"'");
2817 if (parseOperandsOffset(Dest))
2822bool MIParser::parseCustomRegisterMaskOperand(
MachineOperand &Dest) {
2823 assert(Token.stringValue() ==
"CustomRegMask" &&
"Expected a custom RegMask");
2832 return error(
"expected a named register");
2834 if (parseNamedRegister(Reg))
2849bool MIParser::parseLiveoutRegisterMaskOperand(
MachineOperand &Dest) {
2857 return error(
"expected a named register");
2859 if (parseNamedRegister(Reg))
2874bool MIParser::parseMachineOperand(
const unsigned OpCode,
const unsigned OpIdx,
2876 std::optional<unsigned> &TiedDefIdx) {
2877 switch (Token.kind()) {
2892 return parseRegisterOperand(Dest, TiedDefIdx);
2894 return parseImmediateOperand(Dest);
2902 return parseFPImmediateOperand(Dest);
2904 return parseMBBOperand(Dest);
2906 return parseStackObjectOperand(Dest);
2908 return parseFixedStackObjectOperand(Dest);
2911 return parseGlobalAddressOperand(Dest);
2913 return parseConstantPoolIndexOperand(Dest);
2915 return parseJumpTableIndexOperand(Dest);
2917 return parseExternalSymbolOperand(Dest);
2919 return parseMCSymbolOperand(Dest);
2921 return parseSubRegisterIndexOperand(Dest);
2924 return parseMetadataOperand(Dest);
2942 return parseCFIOperand(Dest);
2944 return parseBlockAddressOperand(Dest);
2946 return parseIntrinsicOperand(Dest);
2948 return parseTargetIndexOperand(Dest);
2950 return parseLiveoutRegisterMaskOperand(Dest);
2953 return parsePredicateOperand(Dest);
2955 return parseShuffleMaskOperand(Dest);
2957 return parseDbgInstrRefOperand(Dest);
2961 if (
const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2965 }
else if (Token.stringValue() ==
"CustomRegMask") {
2966 return parseCustomRegisterMaskOperand(Dest);
2968 return parseTypedImmediateOperand(Dest);
2970 const auto *
TII = MF.getSubtarget().getInstrInfo();
2971 if (
const auto *Formatter =
TII->getMIRFormatter()) {
2972 return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
2978 return error(
"expected a machine operand");
2983bool MIParser::parseMachineOperandAndTargetFlags(
2984 const unsigned OpCode,
const unsigned OpIdx,
MachineOperand &Dest,
2985 std::optional<unsigned> &TiedDefIdx) {
2987 bool HasTargetFlags =
false;
2989 HasTargetFlags =
true;
2994 return error(
"expected the name of the target flag");
2995 if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
2996 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
2997 return error(
"use of undefined target flag '" + Token.stringValue() +
3004 return error(
"expected the name of the target flag");
3005 unsigned BitFlag = 0;
3006 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
3007 return error(
"use of undefined target flag '" + Token.stringValue() +
3016 auto Loc = Token.location();
3017 if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))
3019 if (!HasTargetFlags)
3022 return error(Loc,
"register operands can't have target flags");
3027bool MIParser::parseOffset(int64_t &
Offset) {
3034 return error(
"expected an integer literal after '" + Sign +
"'");
3035 if (Token.integerValue().getSignificantBits() > 64)
3036 return error(
"expected 64-bit integer (too large)");
3037 Offset = Token.integerValue().getExtValue();
3044bool MIParser::parseIRBlockAddressTaken(
BasicBlock *&BB) {
3048 return error(
"expected basic block after 'ir_block_address_taken'");
3050 if (parseIRBlock(BB, MF.getFunction()))
3057bool MIParser::parseAlignment(
uint64_t &Alignment) {
3061 return error(
"expected an integer literal after 'align'");
3062 if (getUint64(Alignment))
3067 return error(
"expected a power-of-2 literal after 'align'");
3072bool MIParser::parseAddrspace(
unsigned &Addrspace) {
3076 return error(
"expected an integer literal after 'addrspace'");
3093 switch (Token.
kind()) {
3099 unsigned SlotNumber = 0;
3127 return ErrCB(Token.
location(),
Twine(
"use of undefined IR value '") + Token.
range() +
"'");
3131bool MIParser::parseIRValue(
const Value *&V) {
3132 return ::parseIRValue(
3134 return error(Loc, Msg);
3138bool MIParser::getUint64(
uint64_t &Result) {
3139 if (Token.hasIntegerValue()) {
3140 if (Token.integerValue().getActiveBits() > 64)
3141 return error(
"expected 64-bit integer (too large)");
3142 Result = Token.integerValue().getZExtValue();
3149 if (
A.getBitWidth() > 64)
3150 return error(
"expected 64-bit integer (too large)");
3157bool MIParser::getHexUint(
APInt &Result) {
3158 return ::getHexUint(Token, Result);
3162 const auto OldFlags =
Flags;
3163 switch (Token.kind()) {
3178 if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
3179 return error(
"use of undefined target MMO flag '" + Token.stringValue() +
3187 if (OldFlags == Flags)
3190 return error(
"duplicate '" + Token.stringValue() +
"' memory operand flag");
3196 switch (Token.kind()) {
3198 PSV = MF.getPSVManager().getStack();
3201 PSV = MF.getPSVManager().getGOT();
3204 PSV = MF.getPSVManager().getJumpTable();
3207 PSV = MF.getPSVManager().getConstantPool();
3211 if (parseFixedStackFrameIndex(FI))
3213 PSV = MF.getPSVManager().getFixedStack(FI);
3219 if (parseStackFrameIndex(FI))
3221 PSV = MF.getPSVManager().getFixedStack(FI);
3227 switch (Token.kind()) {
3233 PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
3237 PSV = MF.getPSVManager().getExternalSymbolCallEntry(
3238 MF.createExternalSymbolName(Token.stringValue()));
3242 "expected a global value or an external symbol after 'call-entry'");
3247 const auto *
TII = MF.getSubtarget().getInstrInfo();
3248 if (
const auto *Formatter =
TII->getMIRFormatter()) {
3249 if (Formatter->parseCustomPseudoSourceValue(
3250 Token.stringValue(), MF, PFS, PSV,
3252 return error(Loc, Msg);
3256 return error(
"unable to parse target custom pseudo source value");
3272 if (parseMemoryPseudoSourceValue(PSV))
3285 return error(
"expected an IR value reference");
3286 const Value *
V =
nullptr;
3289 if (V && !
V->getType()->isPointerTy())
3290 return error(
"expected a pointer IR value");
3299bool MIParser::parseOptionalScope(
LLVMContext &Context,
3305 return error(
"expected '(' in syncscope");
3308 if (parseStringConstant(SSN))
3313 return error(
"expected ')' in syncscope");
3319bool MIParser::parseOptionalAtomicOrdering(
AtomicOrdering &Order) {
3338 return error(
"expected an atomic scope, ordering or a size specification");
3345 while (Token.isMemoryOperandFlag()) {
3346 if (parseMemoryOperandFlag(Flags))
3350 (Token.stringValue() !=
"load" && Token.stringValue() !=
"store"))
3351 return error(
"expected 'load' or 'store' memory operation");
3352 if (Token.stringValue() ==
"load")
3366 if (parseOptionalScope(MF.getFunction().getContext(), SSID))
3371 if (parseOptionalAtomicOrdering(Order))
3374 if (parseOptionalAtomicOrdering(FailureOrder))
3380 return error(
"expected memory LLT, the size integer literal or 'unknown-size' after "
3381 "memory operation");
3386 if (getUint64(
Size))
3397 if (parseLowLevelType(Token.location(), MemoryType))
3410 if (Token.stringValue() !=
Word)
3414 if (parseMachinePointerInfo(
Ptr))
3424 switch (Token.kind()) {
3430 if (
Ptr.Offset & (Alignment - 1)) {
3435 return error(
"specified alignment is more aligned than offset");
3437 BaseAlignment = Alignment;
3446 if (parseAddrspace(
Ptr.AddrSpace))
3471 return error(
"expected 'align' or '!tbaa' or '!alias.scope' or "
3472 "'!noalias' or '!range'");
3477 Dest = MF.getMachineMemOperand(
Ptr, Flags, MemoryType,
Align(BaseAlignment),
3478 AAInfo,
Range, SSID, Order, FailureOrder);
3482bool MIParser::parsePreOrPostInstrSymbol(
MCSymbol *&Symbol) {
3485 "Invalid token for a pre- post-instruction symbol!");
3488 return error(
"expected a symbol after 'pre-instr-symbol'");
3489 Symbol = getOrCreateMCSymbol(Token.stringValue());
3495 return error(
"expected ',' before the next machine operand");
3500bool MIParser::parseHeapAllocMarker(
MDNode *&
Node) {
3502 "Invalid token for a heap alloc marker!");
3507 return error(
"expected a MDNode after 'heap-alloc-marker'");
3512 return error(
"expected ',' before the next machine operand");
3517bool MIParser::parsePCSections(
MDNode *&
Node) {
3519 "Invalid token for a PC sections!");
3524 return error(
"expected a MDNode after 'pcsections'");
3529 return error(
"expected ',' before the next machine operand");
3539 for (
const auto &BB :
F) {
3545 Slots2BasicBlocks.
insert(std::make_pair(
unsigned(Slot), &BB));
3552 return Slots2BasicBlocks.
lookup(Slot);
3555const BasicBlock *MIParser::getIRBlock(
unsigned Slot) {
3556 if (Slots2BasicBlocks.empty())
3562 if (&
F == &MF.getFunction())
3563 return getIRBlock(Slot);
3575 return MF.getContext().getOrCreateSymbol(
Name);
3578bool MIParser::parseStringConstant(std::string &Result) {
3580 return error(
"expected string constant");
3581 Result = std::string(Token.stringValue());
3589 return MIParser(PFS,
Error, Src).parseBasicBlockDefinitions(PFS.
MBBSlots);
3594 return MIParser(PFS,
Error, Src).parseBasicBlocks();
3600 return MIParser(PFS,
Error, Src).parseStandaloneMBB(
MBB);
3606 return MIParser(PFS,
Error, Src).parseStandaloneRegister(Reg);
3612 return MIParser(PFS,
Error, Src).parseStandaloneNamedRegister(Reg);
3618 return MIParser(PFS,
Error, Src).parseStandaloneVirtualRegister(
Info);
3624 return MIParser(PFS,
Error, Src).parseStandaloneStackObject(FI);
3629 return MIParser(PFS,
Error, Src).parseStandaloneMDNode(Node);
3634 return MIParser(PFS,
Error, Src, SrcRange).parseMachineMetadata();
3642 ErrorCallback(Loc, Msg);
3646 return ::parseIRValue(Token, PFS, V, ErrorCallback);
unsigned const MachineRegisterInfo * MRI
This file defines the StringMap class.
This file implements a class to represent arbitrary precision integral constant values and operations...
This file implements the APSInt class, which is a simple class that represents an arbitrary sized int...
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Atomic ordering constants.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
Analysis containing CSE Info
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static Error parseAlignment(StringRef Str, Align &Alignment, StringRef Name, bool AllowZero=false)
Attempts to parse an alignment component of a specification.
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
This file defines the DenseMap class.
const HexagonInstrInfo * TII
Module.h This file contains the declarations for the Module class.
A common definition of LaneBitmask for use in TableGen and CodeGen.
Implement a low-level type suitable for MachineInstr level instruction selection.
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)
Creates the mapping from slot numbers to function's unnamed IR values.
static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)
static bool verifyScalarSize(uint64_t Size)
static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)
static bool getHexUint(const MIToken &Token, APInt &Result)
static bool verifyVectorElementCount(uint64_t NumElts)
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)
static bool verifyAddrSpace(uint64_t AddrSpace)
mir Rename Register Operands
unsigned const TargetRegisterInfo * TRI
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool parseMetadata(const StringRef &Input, uint64_t &FunctionHash, uint32_t &Attributes)
Parse Input that contains metadata.
This file defines the SmallVector class.
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
Class for arbitrary precision integers.
uint64_t getZExtValue() const
Get zero extended value.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
An arbitrary precision integer that knows its signedness.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
LLVM Basic Block Representation.
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
static BranchProbability getRaw(uint32_t N)
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
@ FCMP_OEQ
0 0 0 1 True if ordered and equal
@ FCMP_TRUE
1 1 1 1 Always true (always folded)
@ ICMP_SLT
signed less than
@ ICMP_SLE
signed less or equal
@ FCMP_OLT
0 1 0 0 True if ordered and less than
@ FCMP_ULE
1 1 0 1 True if unordered, less than, or equal
@ FCMP_OGT
0 0 1 0 True if ordered and greater than
@ FCMP_OGE
0 0 1 1 True if ordered and greater than or equal
@ ICMP_UGE
unsigned greater or equal
@ ICMP_UGT
unsigned greater than
@ ICMP_SGT
signed greater than
@ FCMP_ULT
1 1 0 0 True if unordered or less than
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
@ ICMP_ULT
unsigned less than
@ FCMP_UGT
1 0 1 0 True if unordered or greater than
@ FCMP_OLE
0 1 0 1 True if ordered and less than or equal
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
@ ICMP_SGE
signed greater or equal
@ FCMP_UNE
1 1 1 0 True if unordered or not equal
@ ICMP_ULE
unsigned less or equal
@ FCMP_UGE
1 0 1 1 True if unordered, greater than, or equal
@ FCMP_FALSE
0 0 0 0 Always false (always folded)
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
bool isFPPredicate() const
bool isIntPredicate() const
This is an important base class in LLVM.
This class represents an Operation in the Expression.
A parsed version of the target data layout string in and methods for querying it.
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
static constexpr ElementCount get(ScalarTy MinVal, bool Scalable)
Lightweight error class with error context and mandatory checking.
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Module * getParent()
Get the module that this global value is contained inside of...
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
static constexpr LLT vector(ElementCount EC, unsigned ScalarSizeInBits)
Get a low-level vector of some number of elements and element width.
static constexpr LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
static constexpr LLT token()
Get a low-level token; just a scalar with zero bits (or no size).
This is an important class for using LLVM in a threaded context.
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_undefined From now on the previous value of Register can't be restored anymore.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register, int64_t Offset, unsigned AddressSpace, SMLoc Loc)
.cfi_llvm_def_aspace_cfa defines the rule for computing the CFA to be the result of evaluating the DW...
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2, SMLoc Loc={})
.cfi_register Previous value of Register1 is saved in register Register2.
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction createNegateRAStateWithPC(MCSymbol *L, SMLoc Loc={})
.cfi_negate_ra_state_with_pc AArch64 negate RA state with PC.
static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc={})
.cfi_negate_ra_state AArch64 negate RA state.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc={})
.cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int64_t Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, SMLoc Loc={}, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc={})
.cfi_window_save SPARC register window is saved.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int64_t Adjustment, SMLoc Loc={})
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc={})
.cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_same_value Current value of Register is the same as in the previous frame.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int64_t Offset, SMLoc Loc={})
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.
Describe properties that are true of each instruction in the target description file.
ArrayRef< MCPhysReg > implicit_defs() const
Return a list of registers that are potentially written by any instance of this machine instruction.
bool isCall() const
Return true if the instruction is a call.
ArrayRef< MCPhysReg > implicit_uses() const
Return a list of registers that are potentially read by any instance of this machine instruction.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
void replaceAllUsesWith(Metadata *MD)
RAUW a temporary.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
static MDString * get(LLVMContext &Context, StringRef Str)
static MDTuple * getDistinct(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a distinct node.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
static TempMDTuple getTemporary(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a temporary node.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
void setAddressTakenIRBlock(BasicBlock *BB)
Set this block to reflect that it corresponds to an IR-level basic block with a BlockAddress.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
void setCallFrameSize(unsigned N)
Set the call frame size on entry to this basic block.
void setAlignment(Align A)
Set alignment of the basic block.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void setSectionID(MBBSectionID V)
Sets the section ID for this basic block.
void setIsInlineAsmBrIndirectTarget(bool V=true)
Indicates if this is the indirect dest of an INLINEASM_BR.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
void setIsEHFuncletEntry(bool V=true)
Indicates if this is the entry block of an EH funclet.
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
void setMachineBlockAddressTaken()
Set this block to indicate that its address is used as something other than the target of a terminato...
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
Representation of each machine instruction.
void setFlag(MIFlag Flag)
Set a MI flag.
A description of a memory reference used in the backend.
Flags
Flags values. These may be or'd together.
@ MOVolatile
The memory access is volatile.
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
@ MOLoad
The memory access reads data.
@ MONonTemporal
The memory access is non-temporal.
@ MOInvariant
The memory access always returns the same value (or traps).
@ MOStore
The memory access writes data.
MachineOperand class - Representation of each machine instruction operand.
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineOperand CreateCImm(const ConstantInt *CI)
static MachineOperand CreateMetadata(const MDNode *Meta)
static MachineOperand CreatePredicate(unsigned Pred)
static MachineOperand CreateImm(int64_t Val)
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
static MachineOperand CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx)
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
void setTargetFlags(unsigned F)
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
static MachineOperand CreateFI(int Idx)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Register createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet.
This interface provides simple read-only access to a block of memory, and provides simple methods for...
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
const char * getBufferEnd() const
const char * getBufferStart() const
Manage lifetime of a slot tracker for printing IR.
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Special value supplied for machine level alias analysis.
Holds all the information related to register banks.
const RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
unsigned getNumRegBanks() const
Get the total number of register banks.
This class implements the register bank concept.
Wrapper class representing virtual and physical registers.
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Represents a location in source code.
static SMLoc getFromPointer(const char *Ptr)
Represents a range in source code.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.
unsigned getMainFileID() const
const MemoryBuffer * getMemoryBuffer(unsigned i) const
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const
Return an SMDiagnostic at the specified location with the specified string.
iterator find(StringRef Key)
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
StringRef - Represent a constant reference to a string, i.e.
std::string str() const
str - Get the contents as an std::string.
constexpr StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
StringRef drop_front(size_t N=1) const
Return a StringRef equal to 'this' but with the first N elements dropped.
constexpr size_t size() const
size - Get the string size.
char front() const
front - Get the first character in the string.
std::string lower() const
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
TargetIntrinsicInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const RegisterBankInfo * getRegBankInfo() const
If the information for the register banks is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
Target - Wrapper for Target specific information.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
std::string str() const
Return the twine contents as a std::string.
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
LLVM Value Representation.
An efficient, type-erasing, non-owning reference to a callable.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
@ C
The default llvm calling convention, compatible with C.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Debug
Register 'use' is for debugging purpose.
@ Renamable
Register that may be renamed.
@ Define
Register definition.
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
@ EarlyClobber
Register definition happens before uses.
@ System
Synchronized with respect to all concurrently executing threads.
Reg
All possible values of the reg field in the ModR/M byte.
support::ulittle32_t Word
Scope
Defines the scope in which this symbol should be visible: Default – Visible in the public interface o...
This is an optimization pass for GlobalISel generic memory operations.
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
uint64_t PowerOf2Ceil(uint64_t A)
Returns the power of two which is greater than or equal to the given value.
DIExpression * parseDIExpressionBodyAtBeginning(StringRef Asm, unsigned &Read, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots)
AtomicOrdering
Atomic ordering for LLVM's memory model.
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
const char * toString(DWARFSectionKind Kind)
bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src, SMRange SourceRange, SMDiagnostic &Error)
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
MDNode * Scope
The tag for alias scope specification (used with noalias).
MDNode * TBAA
The tag for type-based alias analysis.
MDNode * NoAlias
The tag specifying the noalias scope.
This struct is a compact representation of a valid (non-zero power of two) alignment.
static constexpr LaneBitmask getAll()
static const MBBSectionID ExceptionSectionID
static const MBBSectionID ColdSectionID
A token produced by the machine instruction lexer.
bool hasIntegerValue() const
bool is(TokenKind K) const
StringRef stringValue() const
Return the token's string value.
@ kw_cfi_aarch64_negate_ra_sign_state
@ kw_cfi_llvm_def_aspace_cfa
@ kw_inlineasm_br_indirect_target
@ kw_cfi_aarch64_negate_ra_sign_state_with_pc
@ kw_cfi_def_cfa_register
@ kw_cfi_adjust_cfa_offset
@ kw_machine_block_address_taken
@ kw_ir_block_address_taken
StringRef::iterator location() const
const APSInt & integerValue() const
This class contains a discriminated union of information about pointers in memory operands,...
VRegInfo & getVRegInfo(Register Num)
const SlotMapping & IRSlots
const Value * getIRValue(unsigned Slot)
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
StringMap< VRegInfo * > VRegInfosNamed
DenseMap< unsigned, const Value * > Slots2Values
Maps from slot numbers to function's unnamed values.
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
DenseMap< Register, VRegInfo * > VRegInfos
VRegInfo & getVRegInfoNamed(StringRef RegName)
BumpPtrAllocator Allocator
bool getVRegFlagValue(StringRef FlagName, uint8_t &FlagValue) const
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.
bool parseInstrName(StringRef InstrName, unsigned &OpCode)
Try to convert an instruction name to an opcode.
unsigned getSubRegIndex(StringRef Name)
Check if the given identifier is a name of a subregister index.
bool getTargetIndex(StringRef Name, int &Index)
Try to convert a name of target index to the corresponding target index.
void setTarget(const TargetSubtargetInfo &NewSubtarget)
bool getRegisterByName(StringRef RegName, Register &Reg)
Try to convert a register name to a register number.
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)
Try to convert a name of a MachineMemOperand target flag to the corresponding target flag.
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a bitmask target flag to the corresponding target flag.
const TargetRegisterClass * getRegClass(StringRef Name)
Check if the given identifier is a name of a register class.
const uint32_t * getRegMask(StringRef Identifier)
Check if the given identifier is a name of a register mask.
This struct contains the mappings from the slot numbers to unnamed metadata nodes,...
NumberedValues< GlobalValue * > GlobalValues