LLVM  10.0.0svn
MIParser.cpp
Go to the documentation of this file.
1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the parsing of machine instructions.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 #include "MILexer.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/APSInt.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/None.h"
20 #include "llvm/ADT/Optional.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringMap.h"
23 #include "llvm/ADT/StringRef.h"
24 #include "llvm/ADT/StringSwitch.h"
25 #include "llvm/ADT/Twine.h"
27 #include "llvm/AsmParser/Parser.h"
43 #include "llvm/IR/BasicBlock.h"
44 #include "llvm/IR/Constants.h"
45 #include "llvm/IR/DataLayout.h"
47 #include "llvm/IR/DebugLoc.h"
48 #include "llvm/IR/Function.h"
49 #include "llvm/IR/InstrTypes.h"
50 #include "llvm/IR/Instructions.h"
51 #include "llvm/IR/Intrinsics.h"
52 #include "llvm/IR/Metadata.h"
53 #include "llvm/IR/Module.h"
55 #include "llvm/IR/Type.h"
56 #include "llvm/IR/Value.h"
58 #include "llvm/MC/LaneBitmask.h"
59 #include "llvm/MC/MCContext.h"
60 #include "llvm/MC/MCDwarf.h"
61 #include "llvm/MC/MCInstrDesc.h"
62 #include "llvm/MC/MCRegisterInfo.h"
65 #include "llvm/Support/Casting.h"
69 #include "llvm/Support/SMLoc.h"
70 #include "llvm/Support/SourceMgr.h"
74 #include <algorithm>
75 #include <cassert>
76 #include <cctype>
77 #include <cstddef>
78 #include <cstdint>
79 #include <limits>
80 #include <string>
81 #include <utility>
82 
83 using namespace llvm;
84 
86  const TargetSubtargetInfo &NewSubtarget) {
87 
88  // If the subtarget changed, over conservatively assume everything is invalid.
89  if (&Subtarget == &NewSubtarget)
90  return;
91 
92  Names2InstrOpCodes.clear();
93  Names2Regs.clear();
94  Names2RegMasks.clear();
95  Names2SubRegIndices.clear();
96  Names2TargetIndices.clear();
97  Names2DirectTargetFlags.clear();
98  Names2BitmaskTargetFlags.clear();
99  Names2MMOTargetFlags.clear();
100 
101  initNames2RegClasses();
102  initNames2RegBanks();
103 }
104 
105 void PerTargetMIParsingState::initNames2Regs() {
106  if (!Names2Regs.empty())
107  return;
108 
109  // The '%noreg' register is the register 0.
110  Names2Regs.insert(std::make_pair("noreg", 0));
111  const auto *TRI = Subtarget.getRegisterInfo();
112  assert(TRI && "Expected target register info");
113 
114  for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
115  bool WasInserted =
116  Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
117  .second;
118  (void)WasInserted;
119  assert(WasInserted && "Expected registers to be unique case-insensitively");
120  }
121 }
122 
124  unsigned &Reg) {
125  initNames2Regs();
126  auto RegInfo = Names2Regs.find(RegName);
127  if (RegInfo == Names2Regs.end())
128  return true;
129  Reg = RegInfo->getValue();
130  return false;
131 }
132 
133 void PerTargetMIParsingState::initNames2InstrOpCodes() {
134  if (!Names2InstrOpCodes.empty())
135  return;
136  const auto *TII = Subtarget.getInstrInfo();
137  assert(TII && "Expected target instruction info");
138  for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
139  Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
140 }
141 
143  unsigned &OpCode) {
144  initNames2InstrOpCodes();
145  auto InstrInfo = Names2InstrOpCodes.find(InstrName);
146  if (InstrInfo == Names2InstrOpCodes.end())
147  return true;
148  OpCode = InstrInfo->getValue();
149  return false;
150 }
151 
152 void PerTargetMIParsingState::initNames2RegMasks() {
153  if (!Names2RegMasks.empty())
154  return;
155  const auto *TRI = Subtarget.getRegisterInfo();
156  assert(TRI && "Expected target register info");
157  ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
158  ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
159  assert(RegMasks.size() == RegMaskNames.size());
160  for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
161  Names2RegMasks.insert(
162  std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
163 }
164 
166  initNames2RegMasks();
167  auto RegMaskInfo = Names2RegMasks.find(Identifier);
168  if (RegMaskInfo == Names2RegMasks.end())
169  return nullptr;
170  return RegMaskInfo->getValue();
171 }
172 
173 void PerTargetMIParsingState::initNames2SubRegIndices() {
174  if (!Names2SubRegIndices.empty())
175  return;
176  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
177  for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
178  Names2SubRegIndices.insert(
179  std::make_pair(TRI->getSubRegIndexName(I), I));
180 }
181 
183  initNames2SubRegIndices();
184  auto SubRegInfo = Names2SubRegIndices.find(Name);
185  if (SubRegInfo == Names2SubRegIndices.end())
186  return 0;
187  return SubRegInfo->getValue();
188 }
189 
190 void PerTargetMIParsingState::initNames2TargetIndices() {
191  if (!Names2TargetIndices.empty())
192  return;
193  const auto *TII = Subtarget.getInstrInfo();
194  assert(TII && "Expected target instruction info");
195  auto Indices = TII->getSerializableTargetIndices();
196  for (const auto &I : Indices)
197  Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
198 }
199 
201  initNames2TargetIndices();
202  auto IndexInfo = Names2TargetIndices.find(Name);
203  if (IndexInfo == Names2TargetIndices.end())
204  return true;
205  Index = IndexInfo->second;
206  return false;
207 }
208 
209 void PerTargetMIParsingState::initNames2DirectTargetFlags() {
210  if (!Names2DirectTargetFlags.empty())
211  return;
212 
213  const auto *TII = Subtarget.getInstrInfo();
214  assert(TII && "Expected target instruction info");
216  for (const auto &I : Flags)
217  Names2DirectTargetFlags.insert(
218  std::make_pair(StringRef(I.second), I.first));
219 }
220 
222  unsigned &Flag) {
223  initNames2DirectTargetFlags();
224  auto FlagInfo = Names2DirectTargetFlags.find(Name);
225  if (FlagInfo == Names2DirectTargetFlags.end())
226  return true;
227  Flag = FlagInfo->second;
228  return false;
229 }
230 
231 void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
232  if (!Names2BitmaskTargetFlags.empty())
233  return;
234 
235  const auto *TII = Subtarget.getInstrInfo();
236  assert(TII && "Expected target instruction info");
238  for (const auto &I : Flags)
239  Names2BitmaskTargetFlags.insert(
240  std::make_pair(StringRef(I.second), I.first));
241 }
242 
244  unsigned &Flag) {
245  initNames2BitmaskTargetFlags();
246  auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
247  if (FlagInfo == Names2BitmaskTargetFlags.end())
248  return true;
249  Flag = FlagInfo->second;
250  return false;
251 }
252 
253 void PerTargetMIParsingState::initNames2MMOTargetFlags() {
254  if (!Names2MMOTargetFlags.empty())
255  return;
256 
257  const auto *TII = Subtarget.getInstrInfo();
258  assert(TII && "Expected target instruction info");
259  auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
260  for (const auto &I : Flags)
261  Names2MMOTargetFlags.insert(std::make_pair(StringRef(I.second), I.first));
262 }
263 
266  initNames2MMOTargetFlags();
267  auto FlagInfo = Names2MMOTargetFlags.find(Name);
268  if (FlagInfo == Names2MMOTargetFlags.end())
269  return true;
270  Flag = FlagInfo->second;
271  return false;
272 }
273 
274 void PerTargetMIParsingState::initNames2RegClasses() {
275  if (!Names2RegClasses.empty())
276  return;
277 
278  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
279  for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {
280  const auto *RC = TRI->getRegClass(I);
281  Names2RegClasses.insert(
282  std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));
283  }
284 }
285 
286 void PerTargetMIParsingState::initNames2RegBanks() {
287  if (!Names2RegBanks.empty())
288  return;
289 
290  const RegisterBankInfo *RBI = Subtarget.getRegBankInfo();
291  // If the target does not support GlobalISel, we may not have a
292  // register bank info.
293  if (!RBI)
294  return;
295 
296  for (unsigned I = 0, E = RBI->getNumRegBanks(); I < E; ++I) {
297  const auto &RegBank = RBI->getRegBank(I);
298  Names2RegBanks.insert(
299  std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));
300  }
301 }
302 
303 const TargetRegisterClass *
305  auto RegClassInfo = Names2RegClasses.find(Name);
306  if (RegClassInfo == Names2RegClasses.end())
307  return nullptr;
308  return RegClassInfo->getValue();
309 }
310 
312  auto RegBankInfo = Names2RegBanks.find(Name);
313  if (RegBankInfo == Names2RegBanks.end())
314  return nullptr;
315  return RegBankInfo->getValue();
316 }
317 
319  SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &T)
320  : MF(MF), SM(&SM), IRSlots(IRSlots), Target(T) {
321 }
322 
324  auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
325  if (I.second) {
327  VRegInfo *Info = new (Allocator) VRegInfo;
329  I.first->second = Info;
330  }
331  return *I.first->second;
332 }
333 
335  assert(RegName != "" && "Expected named reg.");
336 
337  auto I = VRegInfosNamed.insert(std::make_pair(RegName.str(), nullptr));
338  if (I.second) {
339  VRegInfo *Info = new (Allocator) VRegInfo;
341  I.first->second = Info;
342  }
343  return *I.first->second;
344 }
345 
346 namespace {
347 
348 /// A wrapper struct around the 'MachineOperand' struct that includes a source
349 /// range and other attributes.
350 struct ParsedMachineOperand {
351  MachineOperand Operand;
352  StringRef::iterator Begin;
354  Optional<unsigned> TiedDefIdx;
355 
356  ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
357  StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
358  : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
359  if (TiedDefIdx)
360  assert(Operand.isReg() && Operand.isUse() &&
361  "Only used register operands can be tied");
362  }
363 };
364 
365 class MIParser {
368  StringRef Source, CurrentSource;
369  MIToken Token;
371  /// Maps from slot numbers to function's unnamed basic blocks.
372  DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
373  /// Maps from slot numbers to function's unnamed values.
375 
376 public:
377  MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
378  StringRef Source);
379 
380  /// \p SkipChar gives the number of characters to skip before looking
381  /// for the next token.
382  void lex(unsigned SkipChar = 0);
383 
384  /// Report an error at the current location with the given message.
385  ///
386  /// This function always return true.
387  bool error(const Twine &Msg);
388 
389  /// Report an error at the given location with the given message.
390  ///
391  /// This function always return true.
392  bool error(StringRef::iterator Loc, const Twine &Msg);
393 
394  bool
395  parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
396  bool parseBasicBlocks();
397  bool parse(MachineInstr *&MI);
398  bool parseStandaloneMBB(MachineBasicBlock *&MBB);
399  bool parseStandaloneNamedRegister(unsigned &Reg);
400  bool parseStandaloneVirtualRegister(VRegInfo *&Info);
401  bool parseStandaloneRegister(unsigned &Reg);
402  bool parseStandaloneStackObject(int &FI);
403  bool parseStandaloneMDNode(MDNode *&Node);
404 
405  bool
406  parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
407  bool parseBasicBlock(MachineBasicBlock &MBB,
408  MachineBasicBlock *&AddFalthroughFrom);
409  bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
410  bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
411 
412  bool parseNamedRegister(unsigned &Reg);
413  bool parseVirtualRegister(VRegInfo *&Info);
414  bool parseNamedVirtualRegister(VRegInfo *&Info);
415  bool parseRegister(unsigned &Reg, VRegInfo *&VRegInfo);
416  bool parseRegisterFlag(unsigned &Flags);
417  bool parseRegisterClassOrBank(VRegInfo &RegInfo);
418  bool parseSubRegisterIndex(unsigned &SubReg);
419  bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
420  bool parseRegisterOperand(MachineOperand &Dest,
421  Optional<unsigned> &TiedDefIdx, bool IsDef = false);
422  bool parseImmediateOperand(MachineOperand &Dest);
423  bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
424  const Constant *&C);
425  bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
426  bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
427  bool parseTypedImmediateOperand(MachineOperand &Dest);
428  bool parseFPImmediateOperand(MachineOperand &Dest);
430  bool parseMBBOperand(MachineOperand &Dest);
431  bool parseStackFrameIndex(int &FI);
432  bool parseStackObjectOperand(MachineOperand &Dest);
433  bool parseFixedStackFrameIndex(int &FI);
434  bool parseFixedStackObjectOperand(MachineOperand &Dest);
435  bool parseGlobalValue(GlobalValue *&GV);
436  bool parseGlobalAddressOperand(MachineOperand &Dest);
437  bool parseConstantPoolIndexOperand(MachineOperand &Dest);
438  bool parseSubRegisterIndexOperand(MachineOperand &Dest);
439  bool parseJumpTableIndexOperand(MachineOperand &Dest);
440  bool parseExternalSymbolOperand(MachineOperand &Dest);
441  bool parseMCSymbolOperand(MachineOperand &Dest);
442  bool parseMDNode(MDNode *&Node);
443  bool parseDIExpression(MDNode *&Expr);
444  bool parseDILocation(MDNode *&Expr);
445  bool parseMetadataOperand(MachineOperand &Dest);
446  bool parseCFIOffset(int &Offset);
447  bool parseCFIRegister(unsigned &Reg);
448  bool parseCFIEscapeValues(std::string& Values);
449  bool parseCFIOperand(MachineOperand &Dest);
450  bool parseIRBlock(BasicBlock *&BB, const Function &F);
451  bool parseBlockAddressOperand(MachineOperand &Dest);
452  bool parseIntrinsicOperand(MachineOperand &Dest);
453  bool parsePredicateOperand(MachineOperand &Dest);
454  bool parseShuffleMaskOperand(MachineOperand &Dest);
455  bool parseTargetIndexOperand(MachineOperand &Dest);
456  bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
457  bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
458  bool parseMachineOperand(MachineOperand &Dest,
459  Optional<unsigned> &TiedDefIdx);
460  bool parseMachineOperandAndTargetFlags(MachineOperand &Dest,
461  Optional<unsigned> &TiedDefIdx);
462  bool parseOffset(int64_t &Offset);
463  bool parseAlignment(unsigned &Alignment);
464  bool parseAddrspace(unsigned &Addrspace);
465  bool parseOperandsOffset(MachineOperand &Op);
466  bool parseIRValue(const Value *&V);
467  bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
468  bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
469  bool parseMachinePointerInfo(MachinePointerInfo &Dest);
470  bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
471  bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
472  bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
473  bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);
474 
475 private:
476  /// Convert the integer literal in the current token into an unsigned integer.
477  ///
478  /// Return true if an error occurred.
479  bool getUnsigned(unsigned &Result);
480 
481  /// Convert the integer literal in the current token into an uint64.
482  ///
483  /// Return true if an error occurred.
484  bool getUint64(uint64_t &Result);
485 
486  /// Convert the hexadecimal literal in the current token into an unsigned
487  /// APInt with a minimum bitwidth required to represent the value.
488  ///
489  /// Return true if the literal does not represent an integer value.
490  bool getHexUint(APInt &Result);
491 
492  /// If the current token is of the given kind, consume it and return false.
493  /// Otherwise report an error and return true.
494  bool expectAndConsume(MIToken::TokenKind TokenKind);
495 
496  /// If the current token is of the given kind, consume it and return true.
497  /// Otherwise return false.
498  bool consumeIfPresent(MIToken::TokenKind TokenKind);
499 
500  bool parseInstruction(unsigned &OpCode, unsigned &Flags);
501 
502  bool assignRegisterTies(MachineInstr &MI,
504 
505  bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
506  const MCInstrDesc &MCID);
507 
508  const BasicBlock *getIRBlock(unsigned Slot);
509  const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
510 
511  const Value *getIRValue(unsigned Slot);
512 
513  /// Get or create an MCSymbol for a given name.
514  MCSymbol *getOrCreateMCSymbol(StringRef Name);
515 
516  /// parseStringConstant
517  /// ::= StringConstant
518  bool parseStringConstant(std::string &Result);
519 };
520 
521 } // end anonymous namespace
522 
523 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
525  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
526 {}
527 
528 void MIParser::lex(unsigned SkipChar) {
529  CurrentSource = lexMIToken(
530  CurrentSource.data() + SkipChar, Token,
531  [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
532 }
533 
534 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
535 
536 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
537  const SourceMgr &SM = *PFS.SM;
538  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
539  const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
540  if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
541  // Create an ordinary diagnostic when the source manager's buffer is the
542  // source string.
544  return true;
545  }
546  // Create a diagnostic for a YAML string literal.
547  Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
548  Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
549  Source, None, None);
550  return true;
551 }
552 
553 static const char *toString(MIToken::TokenKind TokenKind) {
554  switch (TokenKind) {
555  case MIToken::comma:
556  return "','";
557  case MIToken::equal:
558  return "'='";
559  case MIToken::colon:
560  return "':'";
561  case MIToken::lparen:
562  return "'('";
563  case MIToken::rparen:
564  return "')'";
565  default:
566  return "<unknown token>";
567  }
568 }
569 
570 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
571  if (Token.isNot(TokenKind))
572  return error(Twine("expected ") + toString(TokenKind));
573  lex();
574  return false;
575 }
576 
577 bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
578  if (Token.isNot(TokenKind))
579  return false;
580  lex();
581  return true;
582 }
583 
584 bool MIParser::parseBasicBlockDefinition(
587  unsigned ID = 0;
588  if (getUnsigned(ID))
589  return true;
590  auto Loc = Token.location();
591  auto Name = Token.stringValue();
592  lex();
593  bool HasAddressTaken = false;
594  bool IsLandingPad = false;
595  unsigned Alignment = 0;
596  BasicBlock *BB = nullptr;
597  if (consumeIfPresent(MIToken::lparen)) {
598  do {
599  // TODO: Report an error when multiple same attributes are specified.
600  switch (Token.kind()) {
602  HasAddressTaken = true;
603  lex();
604  break;
606  IsLandingPad = true;
607  lex();
608  break;
609  case MIToken::kw_align:
610  if (parseAlignment(Alignment))
611  return true;
612  break;
613  case MIToken::IRBlock:
614  // TODO: Report an error when both name and ir block are specified.
615  if (parseIRBlock(BB, MF.getFunction()))
616  return true;
617  lex();
618  break;
619  default:
620  break;
621  }
622  } while (consumeIfPresent(MIToken::comma));
623  if (expectAndConsume(MIToken::rparen))
624  return true;
625  }
626  if (expectAndConsume(MIToken::colon))
627  return true;
628 
629  if (!Name.empty()) {
630  BB = dyn_cast_or_null<BasicBlock>(
632  if (!BB)
633  return error(Loc, Twine("basic block '") + Name +
634  "' is not defined in the function '" +
635  MF.getName() + "'");
636  }
637  auto *MBB = MF.CreateMachineBasicBlock(BB);
638  MF.insert(MF.end(), MBB);
639  bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
640  if (!WasInserted)
641  return error(Loc, Twine("redefinition of machine basic block with id #") +
642  Twine(ID));
643  if (Alignment)
644  MBB->setAlignment(Align(Alignment));
645  if (HasAddressTaken)
646  MBB->setHasAddressTaken();
647  MBB->setIsEHPad(IsLandingPad);
648  return false;
649 }
650 
651 bool MIParser::parseBasicBlockDefinitions(
653  lex();
654  // Skip until the first machine basic block.
655  while (Token.is(MIToken::Newline))
656  lex();
657  if (Token.isErrorOrEOF())
658  return Token.isError();
659  if (Token.isNot(MIToken::MachineBasicBlockLabel))
660  return error("expected a basic block definition before instructions");
661  unsigned BraceDepth = 0;
662  do {
663  if (parseBasicBlockDefinition(MBBSlots))
664  return true;
665  bool IsAfterNewline = false;
666  // Skip until the next machine basic block.
667  while (true) {
668  if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
669  Token.isErrorOrEOF())
670  break;
671  else if (Token.is(MIToken::MachineBasicBlockLabel))
672  return error("basic block definition should be located at the start of "
673  "the line");
674  else if (consumeIfPresent(MIToken::Newline)) {
675  IsAfterNewline = true;
676  continue;
677  }
678  IsAfterNewline = false;
679  if (Token.is(MIToken::lbrace))
680  ++BraceDepth;
681  if (Token.is(MIToken::rbrace)) {
682  if (!BraceDepth)
683  return error("extraneous closing brace ('}')");
684  --BraceDepth;
685  }
686  lex();
687  }
688  // Verify that we closed all of the '{' at the end of a file or a block.
689  if (!Token.isError() && BraceDepth)
690  return error("expected '}'"); // FIXME: Report a note that shows '{'.
691  } while (!Token.isErrorOrEOF());
692  return Token.isError();
693 }
694 
695 bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
696  assert(Token.is(MIToken::kw_liveins));
697  lex();
698  if (expectAndConsume(MIToken::colon))
699  return true;
700  if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
701  return false;
702  do {
703  if (Token.isNot(MIToken::NamedRegister))
704  return error("expected a named register");
705  unsigned Reg = 0;
706  if (parseNamedRegister(Reg))
707  return true;
708  lex();
710  if (consumeIfPresent(MIToken::colon)) {
711  // Parse lane mask.
712  if (Token.isNot(MIToken::IntegerLiteral) &&
713  Token.isNot(MIToken::HexLiteral))
714  return error("expected a lane mask");
715  static_assert(sizeof(LaneBitmask::Type) == sizeof(unsigned),
716  "Use correct get-function for lane mask");
718  if (getUnsigned(V))
719  return error("invalid lane mask value");
720  Mask = LaneBitmask(V);
721  lex();
722  }
723  MBB.addLiveIn(Reg, Mask);
724  } while (consumeIfPresent(MIToken::comma));
725  return false;
726 }
727 
728 bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
729  assert(Token.is(MIToken::kw_successors));
730  lex();
731  if (expectAndConsume(MIToken::colon))
732  return true;
733  if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
734  return false;
735  do {
736  if (Token.isNot(MIToken::MachineBasicBlock))
737  return error("expected a machine basic block reference");
738  MachineBasicBlock *SuccMBB = nullptr;
739  if (parseMBBReference(SuccMBB))
740  return true;
741  lex();
742  unsigned Weight = 0;
743  if (consumeIfPresent(MIToken::lparen)) {
744  if (Token.isNot(MIToken::IntegerLiteral) &&
745  Token.isNot(MIToken::HexLiteral))
746  return error("expected an integer literal after '('");
747  if (getUnsigned(Weight))
748  return true;
749  lex();
750  if (expectAndConsume(MIToken::rparen))
751  return true;
752  }
753  MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
754  } while (consumeIfPresent(MIToken::comma));
755  MBB.normalizeSuccProbs();
756  return false;
757 }
758 
759 bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
760  MachineBasicBlock *&AddFalthroughFrom) {
761  // Skip the definition.
763  lex();
764  if (consumeIfPresent(MIToken::lparen)) {
765  while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
766  lex();
767  consumeIfPresent(MIToken::rparen);
768  }
769  consumeIfPresent(MIToken::colon);
770 
771  // Parse the liveins and successors.
772  // N.B: Multiple lists of successors and liveins are allowed and they're
773  // merged into one.
774  // Example:
775  // liveins: %edi
776  // liveins: %esi
777  //
778  // is equivalent to
779  // liveins: %edi, %esi
780  bool ExplicitSuccessors = false;
781  while (true) {
782  if (Token.is(MIToken::kw_successors)) {
783  if (parseBasicBlockSuccessors(MBB))
784  return true;
785  ExplicitSuccessors = true;
786  } else if (Token.is(MIToken::kw_liveins)) {
787  if (parseBasicBlockLiveins(MBB))
788  return true;
789  } else if (consumeIfPresent(MIToken::Newline)) {
790  continue;
791  } else
792  break;
793  if (!Token.isNewlineOrEOF())
794  return error("expected line break at the end of a list");
795  lex();
796  }
797 
798  // Parse the instructions.
799  bool IsInBundle = false;
800  MachineInstr *PrevMI = nullptr;
801  while (!Token.is(MIToken::MachineBasicBlockLabel) &&
802  !Token.is(MIToken::Eof)) {
803  if (consumeIfPresent(MIToken::Newline))
804  continue;
805  if (consumeIfPresent(MIToken::rbrace)) {
806  // The first parsing pass should verify that all closing '}' have an
807  // opening '{'.
808  assert(IsInBundle);
809  IsInBundle = false;
810  continue;
811  }
812  MachineInstr *MI = nullptr;
813  if (parse(MI))
814  return true;
815  MBB.insert(MBB.end(), MI);
816  if (IsInBundle) {
819  }
820  PrevMI = MI;
821  if (Token.is(MIToken::lbrace)) {
822  if (IsInBundle)
823  return error("nested instruction bundles are not allowed");
824  lex();
825  // This instruction is the start of the bundle.
827  IsInBundle = true;
828  if (!Token.is(MIToken::Newline))
829  // The next instruction can be on the same line.
830  continue;
831  }
832  assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
833  lex();
834  }
835 
836  // Construct successor list by searching for basic block machine operands.
837  if (!ExplicitSuccessors) {
839  bool IsFallthrough;
840  guessSuccessors(MBB, Successors, IsFallthrough);
841  for (MachineBasicBlock *Succ : Successors)
842  MBB.addSuccessor(Succ);
843 
844  if (IsFallthrough) {
845  AddFalthroughFrom = &MBB;
846  } else {
847  MBB.normalizeSuccProbs();
848  }
849  }
850 
851  return false;
852 }
853 
854 bool MIParser::parseBasicBlocks() {
855  lex();
856  // Skip until the first machine basic block.
857  while (Token.is(MIToken::Newline))
858  lex();
859  if (Token.isErrorOrEOF())
860  return Token.isError();
861  // The first parsing pass should have verified that this token is a MBB label
862  // in the 'parseBasicBlockDefinitions' method.
864  MachineBasicBlock *AddFalthroughFrom = nullptr;
865  do {
866  MachineBasicBlock *MBB = nullptr;
867  if (parseMBBReference(MBB))
868  return true;
869  if (AddFalthroughFrom) {
870  if (!AddFalthroughFrom->isSuccessor(MBB))
871  AddFalthroughFrom->addSuccessor(MBB);
872  AddFalthroughFrom->normalizeSuccProbs();
873  AddFalthroughFrom = nullptr;
874  }
875  if (parseBasicBlock(*MBB, AddFalthroughFrom))
876  return true;
877  // The method 'parseBasicBlock' should parse the whole block until the next
878  // block or the end of file.
879  assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
880  } while (Token.isNot(MIToken::Eof));
881  return false;
882 }
883 
885  // Parse any register operands before '='
888  while (Token.isRegister() || Token.isRegisterFlag()) {
889  auto Loc = Token.location();
890  Optional<unsigned> TiedDefIdx;
891  if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
892  return true;
893  Operands.push_back(
894  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
895  if (Token.isNot(MIToken::comma))
896  break;
897  lex();
898  }
899  if (!Operands.empty() && expectAndConsume(MIToken::equal))
900  return true;
901 
902  unsigned OpCode, Flags = 0;
903  if (Token.isError() || parseInstruction(OpCode, Flags))
904  return true;
905 
906  // Parse the remaining machine operands.
907  while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_pre_instr_symbol) &&
908  Token.isNot(MIToken::kw_post_instr_symbol) &&
909  Token.isNot(MIToken::kw_debug_location) &&
910  Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
911  auto Loc = Token.location();
912  Optional<unsigned> TiedDefIdx;
913  if (parseMachineOperandAndTargetFlags(MO, TiedDefIdx))
914  return true;
915  if (OpCode == TargetOpcode::DBG_VALUE && MO.isReg())
916  MO.setIsDebug();
917  Operands.push_back(
918  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
919  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
920  Token.is(MIToken::lbrace))
921  break;
922  if (Token.isNot(MIToken::comma))
923  return error("expected ',' before the next machine operand");
924  lex();
925  }
926 
927  MCSymbol *PreInstrSymbol = nullptr;
928  if (Token.is(MIToken::kw_pre_instr_symbol))
929  if (parsePreOrPostInstrSymbol(PreInstrSymbol))
930  return true;
931  MCSymbol *PostInstrSymbol = nullptr;
932  if (Token.is(MIToken::kw_post_instr_symbol))
933  if (parsePreOrPostInstrSymbol(PostInstrSymbol))
934  return true;
935 
936  DebugLoc DebugLocation;
937  if (Token.is(MIToken::kw_debug_location)) {
938  lex();
939  MDNode *Node = nullptr;
940  if (Token.is(MIToken::exclaim)) {
941  if (parseMDNode(Node))
942  return true;
943  } else if (Token.is(MIToken::md_dilocation)) {
944  if (parseDILocation(Node))
945  return true;
946  } else
947  return error("expected a metadata node after 'debug-location'");
948  if (!isa<DILocation>(Node))
949  return error("referenced metadata is not a DILocation");
950  DebugLocation = DebugLoc(Node);
951  }
952 
953  // Parse the machine memory operands.
955  if (Token.is(MIToken::coloncolon)) {
956  lex();
957  while (!Token.isNewlineOrEOF()) {
958  MachineMemOperand *MemOp = nullptr;
959  if (parseMachineMemoryOperand(MemOp))
960  return true;
961  MemOperands.push_back(MemOp);
962  if (Token.isNewlineOrEOF())
963  break;
964  if (Token.isNot(MIToken::comma))
965  return error("expected ',' before the next machine memory operand");
966  lex();
967  }
968  }
969 
970  const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
971  if (!MCID.isVariadic()) {
972  // FIXME: Move the implicit operand verification to the machine verifier.
973  if (verifyImplicitOperands(Operands, MCID))
974  return true;
975  }
976 
977  // TODO: Check for extraneous machine operands.
978  MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
979  MI->setFlags(Flags);
980  for (const auto &Operand : Operands)
981  MI->addOperand(MF, Operand.Operand);
982  if (assignRegisterTies(*MI, Operands))
983  return true;
984  if (PreInstrSymbol)
985  MI->setPreInstrSymbol(MF, PreInstrSymbol);
986  if (PostInstrSymbol)
987  MI->setPostInstrSymbol(MF, PostInstrSymbol);
988  if (!MemOperands.empty())
989  MI->setMemRefs(MF, MemOperands);
990  return false;
991 }
992 
993 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
994  lex();
995  if (Token.isNot(MIToken::MachineBasicBlock))
996  return error("expected a machine basic block reference");
997  if (parseMBBReference(MBB))
998  return true;
999  lex();
1000  if (Token.isNot(MIToken::Eof))
1001  return error(
1002  "expected end of string after the machine basic block reference");
1003  return false;
1004 }
1005 
1006 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
1007  lex();
1008  if (Token.isNot(MIToken::NamedRegister))
1009  return error("expected a named register");
1010  if (parseNamedRegister(Reg))
1011  return true;
1012  lex();
1013  if (Token.isNot(MIToken::Eof))
1014  return error("expected end of string after the register reference");
1015  return false;
1016 }
1017 
1018 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
1019  lex();
1020  if (Token.isNot(MIToken::VirtualRegister))
1021  return error("expected a virtual register");
1022  if (parseVirtualRegister(Info))
1023  return true;
1024  lex();
1025  if (Token.isNot(MIToken::Eof))
1026  return error("expected end of string after the register reference");
1027  return false;
1028 }
1029 
1030 bool MIParser::parseStandaloneRegister(unsigned &Reg) {
1031  lex();
1032  if (Token.isNot(MIToken::NamedRegister) &&
1033  Token.isNot(MIToken::VirtualRegister))
1034  return error("expected either a named or virtual register");
1035 
1036  VRegInfo *Info;
1037  if (parseRegister(Reg, Info))
1038  return true;
1039 
1040  lex();
1041  if (Token.isNot(MIToken::Eof))
1042  return error("expected end of string after the register reference");
1043  return false;
1044 }
1045 
1046 bool MIParser::parseStandaloneStackObject(int &FI) {
1047  lex();
1048  if (Token.isNot(MIToken::StackObject))
1049  return error("expected a stack object");
1050  if (parseStackFrameIndex(FI))
1051  return true;
1052  if (Token.isNot(MIToken::Eof))
1053  return error("expected end of string after the stack object reference");
1054  return false;
1055 }
1056 
1057 bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
1058  lex();
1059  if (Token.is(MIToken::exclaim)) {
1060  if (parseMDNode(Node))
1061  return true;
1062  } else if (Token.is(MIToken::md_diexpr)) {
1063  if (parseDIExpression(Node))
1064  return true;
1065  } else if (Token.is(MIToken::md_dilocation)) {
1066  if (parseDILocation(Node))
1067  return true;
1068  } else
1069  return error("expected a metadata node");
1070  if (Token.isNot(MIToken::Eof))
1071  return error("expected end of string after the metadata node");
1072  return false;
1073 }
1074 
1075 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
1076  assert(MO.isImplicit());
1077  return MO.isDef() ? "implicit-def" : "implicit";
1078 }
1079 
1080 static std::string getRegisterName(const TargetRegisterInfo *TRI,
1081  unsigned Reg) {
1082  assert(Register::isPhysicalRegister(Reg) && "expected phys reg");
1083  return StringRef(TRI->getName(Reg)).lower();
1084 }
1085 
1086 /// Return true if the parsed machine operands contain a given machine operand.
1087 static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
1089  for (const auto &I : Operands) {
1090  if (ImplicitOperand.isIdenticalTo(I.Operand))
1091  return true;
1092  }
1093  return false;
1094 }
1095 
1096 bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
1097  const MCInstrDesc &MCID) {
1098  if (MCID.isCall())
1099  // We can't verify call instructions as they can contain arbitrary implicit
1100  // register and register mask operands.
1101  return false;
1102 
1103  // Gather all the expected implicit operands.
1104  SmallVector<MachineOperand, 4> ImplicitOperands;
1105  if (MCID.ImplicitDefs)
1106  for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
1107  ImplicitOperands.push_back(
1108  MachineOperand::CreateReg(*ImpDefs, true, true));
1109  if (MCID.ImplicitUses)
1110  for (const MCPhysReg *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
1111  ImplicitOperands.push_back(
1112  MachineOperand::CreateReg(*ImpUses, false, true));
1113 
1114  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1115  assert(TRI && "Expected target register info");
1116  for (const auto &I : ImplicitOperands) {
1117  if (isImplicitOperandIn(I, Operands))
1118  continue;
1119  return error(Operands.empty() ? Token.location() : Operands.back().End,
1120  Twine("missing implicit register operand '") +
1121  printImplicitRegisterFlag(I) + " $" +
1122  getRegisterName(TRI, I.getReg()) + "'");
1123  }
1124  return false;
1125 }
1126 
1127 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
1128  // Allow frame and fast math flags for OPCODE
1129  while (Token.is(MIToken::kw_frame_setup) ||
1130  Token.is(MIToken::kw_frame_destroy) ||
1131  Token.is(MIToken::kw_nnan) ||
1132  Token.is(MIToken::kw_ninf) ||
1133  Token.is(MIToken::kw_nsz) ||
1134  Token.is(MIToken::kw_arcp) ||
1135  Token.is(MIToken::kw_contract) ||
1136  Token.is(MIToken::kw_afn) ||
1137  Token.is(MIToken::kw_reassoc) ||
1138  Token.is(MIToken::kw_nuw) ||
1139  Token.is(MIToken::kw_nsw) ||
1140  Token.is(MIToken::kw_exact) ||
1141  Token.is(MIToken::kw_fpexcept)) {
1142  // Mine frame and fast math flags
1143  if (Token.is(MIToken::kw_frame_setup))
1144  Flags |= MachineInstr::FrameSetup;
1145  if (Token.is(MIToken::kw_frame_destroy))
1146  Flags |= MachineInstr::FrameDestroy;
1147  if (Token.is(MIToken::kw_nnan))
1148  Flags |= MachineInstr::FmNoNans;
1149  if (Token.is(MIToken::kw_ninf))
1150  Flags |= MachineInstr::FmNoInfs;
1151  if (Token.is(MIToken::kw_nsz))
1152  Flags |= MachineInstr::FmNsz;
1153  if (Token.is(MIToken::kw_arcp))
1154  Flags |= MachineInstr::FmArcp;
1155  if (Token.is(MIToken::kw_contract))
1156  Flags |= MachineInstr::FmContract;
1157  if (Token.is(MIToken::kw_afn))
1158  Flags |= MachineInstr::FmAfn;
1159  if (Token.is(MIToken::kw_reassoc))
1160  Flags |= MachineInstr::FmReassoc;
1161  if (Token.is(MIToken::kw_nuw))
1162  Flags |= MachineInstr::NoUWrap;
1163  if (Token.is(MIToken::kw_nsw))
1164  Flags |= MachineInstr::NoSWrap;
1165  if (Token.is(MIToken::kw_exact))
1166  Flags |= MachineInstr::IsExact;
1167  if (Token.is(MIToken::kw_fpexcept))
1168  Flags |= MachineInstr::FPExcept;
1169 
1170  lex();
1171  }
1172  if (Token.isNot(MIToken::Identifier))
1173  return error("expected a machine instruction");
1174  StringRef InstrName = Token.stringValue();
1175  if (PFS.Target.parseInstrName(InstrName, OpCode))
1176  return error(Twine("unknown machine instruction name '") + InstrName + "'");
1177  lex();
1178  return false;
1179 }
1180 
1181 bool MIParser::parseNamedRegister(unsigned &Reg) {
1182  assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
1183  StringRef Name = Token.stringValue();
1184  if (PFS.Target.getRegisterByName(Name, Reg))
1185  return error(Twine("unknown register name '") + Name + "'");
1186  return false;
1187 }
1188 
1189 bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {
1190  assert(Token.is(MIToken::NamedVirtualRegister) && "Expected NamedVReg token");
1191  StringRef Name = Token.stringValue();
1192  // TODO: Check that the VReg name is not the same as a physical register name.
1193  // If it is, then print a warning (when warnings are implemented).
1194  Info = &PFS.getVRegInfoNamed(Name);
1195  return false;
1196 }
1197 
1198 bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
1199  if (Token.is(MIToken::NamedVirtualRegister))
1200  return parseNamedVirtualRegister(Info);
1201  assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
1202  unsigned ID;
1203  if (getUnsigned(ID))
1204  return true;
1205  Info = &PFS.getVRegInfo(ID);
1206  return false;
1207 }
1208 
1209 bool MIParser::parseRegister(unsigned &Reg, VRegInfo *&Info) {
1210  switch (Token.kind()) {
1211  case MIToken::underscore:
1212  Reg = 0;
1213  return false;
1215  return parseNamedRegister(Reg);
1218  if (parseVirtualRegister(Info))
1219  return true;
1220  Reg = Info->VReg;
1221  return false;
1222  // TODO: Parse other register kinds.
1223  default:
1224  llvm_unreachable("The current token should be a register");
1225  }
1226 }
1227 
1228 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
1229  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
1230  return error("expected '_', register class, or register bank name");
1231  StringRef::iterator Loc = Token.location();
1232  StringRef Name = Token.stringValue();
1233 
1234  // Was it a register class?
1235  const TargetRegisterClass *RC = PFS.Target.getRegClass(Name);
1236  if (RC) {
1237  lex();
1238 
1239  switch (RegInfo.Kind) {
1240  case VRegInfo::UNKNOWN:
1241  case VRegInfo::NORMAL:
1242  RegInfo.Kind = VRegInfo::NORMAL;
1243  if (RegInfo.Explicit && RegInfo.D.RC != RC) {
1245  return error(Loc, Twine("conflicting register classes, previously: ") +
1246  Twine(TRI.getRegClassName(RegInfo.D.RC)));
1247  }
1248  RegInfo.D.RC = RC;
1249  RegInfo.Explicit = true;
1250  return false;
1251 
1252  case VRegInfo::GENERIC:
1253  case VRegInfo::REGBANK:
1254  return error(Loc, "register class specification on generic register");
1255  }
1256  llvm_unreachable("Unexpected register kind");
1257  }
1258 
1259  // Should be a register bank or a generic register.
1260  const RegisterBank *RegBank = nullptr;
1261  if (Name != "_") {
1262  RegBank = PFS.Target.getRegBank(Name);
1263  if (!RegBank)
1264  return error(Loc, "expected '_', register class, or register bank name");
1265  }
1266 
1267  lex();
1268 
1269  switch (RegInfo.Kind) {
1270  case VRegInfo::UNKNOWN:
1271  case VRegInfo::GENERIC:
1272  case VRegInfo::REGBANK:
1273  RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
1274  if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
1275  return error(Loc, "conflicting generic register banks");
1276  RegInfo.D.RegBank = RegBank;
1277  RegInfo.Explicit = true;
1278  return false;
1279 
1280  case VRegInfo::NORMAL:
1281  return error(Loc, "register bank specification on normal register");
1282  }
1283  llvm_unreachable("Unexpected register kind");
1284 }
1285 
1286 bool MIParser::parseRegisterFlag(unsigned &Flags) {
1287  const unsigned OldFlags = Flags;
1288  switch (Token.kind()) {
1289  case MIToken::kw_implicit:
1290  Flags |= RegState::Implicit;
1291  break;
1293  Flags |= RegState::ImplicitDefine;
1294  break;
1295  case MIToken::kw_def:
1296  Flags |= RegState::Define;
1297  break;
1298  case MIToken::kw_dead:
1299  Flags |= RegState::Dead;
1300  break;
1301  case MIToken::kw_killed:
1302  Flags |= RegState::Kill;
1303  break;
1304  case MIToken::kw_undef:
1305  Flags |= RegState::Undef;
1306  break;
1307  case MIToken::kw_internal:
1308  Flags |= RegState::InternalRead;
1309  break;
1311  Flags |= RegState::EarlyClobber;
1312  break;
1313  case MIToken::kw_debug_use:
1314  Flags |= RegState::Debug;
1315  break;
1316  case MIToken::kw_renamable:
1317  Flags |= RegState::Renamable;
1318  break;
1319  default:
1320  llvm_unreachable("The current token should be a register flag");
1321  }
1322  if (OldFlags == Flags)
1323  // We know that the same flag is specified more than once when the flags
1324  // weren't modified.
1325  return error("duplicate '" + Token.stringValue() + "' register flag");
1326  lex();
1327  return false;
1328 }
1329 
1330 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
1331  assert(Token.is(MIToken::dot));
1332  lex();
1333  if (Token.isNot(MIToken::Identifier))
1334  return error("expected a subregister index after '.'");
1335  auto Name = Token.stringValue();
1336  SubReg = PFS.Target.getSubRegIndex(Name);
1337  if (!SubReg)
1338  return error(Twine("use of unknown subregister index '") + Name + "'");
1339  lex();
1340  return false;
1341 }
1342 
1343 bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
1344  if (!consumeIfPresent(MIToken::kw_tied_def))
1345  return true;
1346  if (Token.isNot(MIToken::IntegerLiteral))
1347  return error("expected an integer literal after 'tied-def'");
1348  if (getUnsigned(TiedDefIdx))
1349  return true;
1350  lex();
1351  if (expectAndConsume(MIToken::rparen))
1352  return true;
1353  return false;
1354 }
1355 
1356 bool MIParser::assignRegisterTies(MachineInstr &MI,
1357  ArrayRef<ParsedMachineOperand> Operands) {
1358  SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
1359  for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
1360  if (!Operands[I].TiedDefIdx)
1361  continue;
1362  // The parser ensures that this operand is a register use, so we just have
1363  // to check the tied-def operand.
1364  unsigned DefIdx = Operands[I].TiedDefIdx.getValue();
1365  if (DefIdx >= E)
1366  return error(Operands[I].Begin,
1367  Twine("use of invalid tied-def operand index '" +
1368  Twine(DefIdx) + "'; instruction has only ") +
1369  Twine(E) + " operands");
1370  const auto &DefOperand = Operands[DefIdx].Operand;
1371  if (!DefOperand.isReg() || !DefOperand.isDef())
1372  // FIXME: add note with the def operand.
1373  return error(Operands[I].Begin,
1374  Twine("use of invalid tied-def operand index '") +
1375  Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
1376  " isn't a defined register");
1377  // Check that the tied-def operand wasn't tied elsewhere.
1378  for (const auto &TiedPair : TiedRegisterPairs) {
1379  if (TiedPair.first == DefIdx)
1380  return error(Operands[I].Begin,
1381  Twine("the tied-def operand #") + Twine(DefIdx) +
1382  " is already tied with another register operand");
1383  }
1384  TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
1385  }
1386  // FIXME: Verify that for non INLINEASM instructions, the def and use tied
1387  // indices must be less than tied max.
1388  for (const auto &TiedPair : TiedRegisterPairs)
1389  MI.tieOperands(TiedPair.first, TiedPair.second);
1390  return false;
1391 }
1392 
1393 bool MIParser::parseRegisterOperand(MachineOperand &Dest,
1394  Optional<unsigned> &TiedDefIdx,
1395  bool IsDef) {
1396  unsigned Flags = IsDef ? RegState::Define : 0;
1397  while (Token.isRegisterFlag()) {
1398  if (parseRegisterFlag(Flags))
1399  return true;
1400  }
1401  if (!Token.isRegister())
1402  return error("expected a register after register flags");
1403  unsigned Reg;
1404  VRegInfo *RegInfo;
1405  if (parseRegister(Reg, RegInfo))
1406  return true;
1407  lex();
1408  unsigned SubReg = 0;
1409  if (Token.is(MIToken::dot)) {
1410  if (parseSubRegisterIndex(SubReg))
1411  return true;
1412  if (!Register::isVirtualRegister(Reg))
1413  return error("subregister index expects a virtual register");
1414  }
1415  if (Token.is(MIToken::colon)) {
1416  if (!Register::isVirtualRegister(Reg))
1417  return error("register class specification expects a virtual register");
1418  lex();
1419  if (parseRegisterClassOrBank(*RegInfo))
1420  return true;
1421  }
1423  if ((Flags & RegState::Define) == 0) {
1424  if (consumeIfPresent(MIToken::lparen)) {
1425  unsigned Idx;
1426  if (!parseRegisterTiedDefIndex(Idx))
1427  TiedDefIdx = Idx;
1428  else {
1429  // Try a redundant low-level type.
1430  LLT Ty;
1431  if (parseLowLevelType(Token.location(), Ty))
1432  return error("expected tied-def or low-level type after '('");
1433 
1434  if (expectAndConsume(MIToken::rparen))
1435  return true;
1436 
1437  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1438  return error("inconsistent type for generic virtual register");
1439 
1440  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1441  MRI.setType(Reg, Ty);
1442  }
1443  }
1444  } else if (consumeIfPresent(MIToken::lparen)) {
1445  // Virtual registers may have a tpe with GlobalISel.
1446  if (!Register::isVirtualRegister(Reg))
1447  return error("unexpected type on physical register");
1448 
1449  LLT Ty;
1450  if (parseLowLevelType(Token.location(), Ty))
1451  return true;
1452 
1453  if (expectAndConsume(MIToken::rparen))
1454  return true;
1455 
1456  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1457  return error("inconsistent type for generic virtual register");
1458 
1459  MRI.setRegClassOrRegBank(Reg, static_cast<RegisterBank *>(nullptr));
1460  MRI.setType(Reg, Ty);
1461  } else if (Register::isVirtualRegister(Reg)) {
1462  // Generic virtual registers must have a type.
1463  // If we end up here this means the type hasn't been specified and
1464  // this is bad!
1465  if (RegInfo->Kind == VRegInfo::GENERIC ||
1466  RegInfo->Kind == VRegInfo::REGBANK)
1467  return error("generic virtual registers must have a type");
1468  }
1470  Reg, Flags & RegState::Define, Flags & RegState::Implicit,
1471  Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
1472  Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
1473  Flags & RegState::InternalRead, Flags & RegState::Renamable);
1474 
1475  return false;
1476 }
1477 
1478 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
1479  assert(Token.is(MIToken::IntegerLiteral));
1480  const APSInt &Int = Token.integerValue();
1481  if (Int.getMinSignedBits() > 64)
1482  return error("integer literal is too large to be an immediate operand");
1483  Dest = MachineOperand::CreateImm(Int.getExtValue());
1484  lex();
1485  return false;
1486 }
1487 
1488 bool MIParser::parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
1489  const Constant *&C) {
1490  auto Source = StringValue.str(); // The source has to be null terminated.
1491  SMDiagnostic Err;
1492  C = parseConstantValue(Source, Err, *MF.getFunction().getParent(),
1493  &PFS.IRSlots);
1494  if (!C)
1495  return error(Loc + Err.getColumnNo(), Err.getMessage());
1496  return false;
1497 }
1498 
1499 bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
1500  if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
1501  return true;
1502  lex();
1503  return false;
1504 }
1505 
1506 // See LLT implemntation for bit size limits.
1507 static bool verifyScalarSize(uint64_t Size) {
1508  return Size != 0 && isUInt<16>(Size);
1509 }
1510 
1511 static bool verifyVectorElementCount(uint64_t NumElts) {
1512  return NumElts != 0 && isUInt<16>(NumElts);
1513 }
1514 
1515 static bool verifyAddrSpace(uint64_t AddrSpace) {
1516  return isUInt<24>(AddrSpace);
1517 }
1518 
1519 bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
1520  if (Token.range().front() == 's' || Token.range().front() == 'p') {
1521  StringRef SizeStr = Token.range().drop_front();
1522  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1523  return error("expected integers after 's'/'p' type character");
1524  }
1525 
1526  if (Token.range().front() == 's') {
1527  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1528  if (!verifyScalarSize(ScalarSize))
1529  return error("invalid size for scalar type");
1530 
1531  Ty = LLT::scalar(ScalarSize);
1532  lex();
1533  return false;
1534  } else if (Token.range().front() == 'p') {
1535  const DataLayout &DL = MF.getDataLayout();
1536  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1537  if (!verifyAddrSpace(AS))
1538  return error("invalid address space number");
1539 
1540  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1541  lex();
1542  return false;
1543  }
1544 
1545  // Now we're looking for a vector.
1546  if (Token.isNot(MIToken::less))
1547  return error(Loc,
1548  "expected sN, pA, <M x sN>, or <M x pA> for GlobalISel type");
1549  lex();
1550 
1551  if (Token.isNot(MIToken::IntegerLiteral))
1552  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1553  uint64_t NumElements = Token.integerValue().getZExtValue();
1554  if (!verifyVectorElementCount(NumElements))
1555  return error("invalid number of vector elements");
1556 
1557  lex();
1558 
1559  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
1560  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1561  lex();
1562 
1563  if (Token.range().front() != 's' && Token.range().front() != 'p')
1564  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1565  StringRef SizeStr = Token.range().drop_front();
1566  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1567  return error("expected integers after 's'/'p' type character");
1568 
1569  if (Token.range().front() == 's') {
1570  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1571  if (!verifyScalarSize(ScalarSize))
1572  return error("invalid size for scalar type");
1573  Ty = LLT::scalar(ScalarSize);
1574  } else if (Token.range().front() == 'p') {
1575  const DataLayout &DL = MF.getDataLayout();
1576  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1577  if (!verifyAddrSpace(AS))
1578  return error("invalid address space number");
1579 
1580  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1581  } else
1582  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1583  lex();
1584 
1585  if (Token.isNot(MIToken::greater))
1586  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1587  lex();
1588 
1589  Ty = LLT::vector(NumElements, Ty);
1590  return false;
1591 }
1592 
1593 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
1594  assert(Token.is(MIToken::Identifier));
1595  StringRef TypeStr = Token.range();
1596  if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&
1597  TypeStr.front() != 'p')
1598  return error(
1599  "a typed immediate operand should start with one of 'i', 's', or 'p'");
1600  StringRef SizeStr = Token.range().drop_front();
1601  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1602  return error("expected integers after 'i'/'s'/'p' type character");
1603 
1604  auto Loc = Token.location();
1605  lex();
1606  if (Token.isNot(MIToken::IntegerLiteral)) {
1607  if (Token.isNot(MIToken::Identifier) ||
1608  !(Token.range() == "true" || Token.range() == "false"))
1609  return error("expected an integer literal");
1610  }
1611  const Constant *C = nullptr;
1612  if (parseIRConstant(Loc, C))
1613  return true;
1614  Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
1615  return false;
1616 }
1617 
1618 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
1619  auto Loc = Token.location();
1620  lex();
1621  if (Token.isNot(MIToken::FloatingPointLiteral) &&
1622  Token.isNot(MIToken::HexLiteral))
1623  return error("expected a floating point literal");
1624  const Constant *C = nullptr;
1625  if (parseIRConstant(Loc, C))
1626  return true;
1627  Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
1628  return false;
1629 }
1630 
1631 bool MIParser::getUnsigned(unsigned &Result) {
1632  if (Token.hasIntegerValue()) {
1633  const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
1634  uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
1635  if (Val64 == Limit)
1636  return error("expected 32-bit integer (too large)");
1637  Result = Val64;
1638  return false;
1639  }
1640  if (Token.is(MIToken::HexLiteral)) {
1641  APInt A;
1642  if (getHexUint(A))
1643  return true;
1644  if (A.getBitWidth() > 32)
1645  return error("expected 32-bit integer (too large)");
1646  Result = A.getZExtValue();
1647  return false;
1648  }
1649  return true;
1650 }
1651 
1653  assert(Token.is(MIToken::MachineBasicBlock) ||
1655  unsigned Number;
1656  if (getUnsigned(Number))
1657  return true;
1658  auto MBBInfo = PFS.MBBSlots.find(Number);
1659  if (MBBInfo == PFS.MBBSlots.end())
1660  return error(Twine("use of undefined machine basic block #") +
1661  Twine(Number));
1662  MBB = MBBInfo->second;
1663  // TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
1664  // we drop the <irname> from the bb.<id>.<irname> format.
1665  if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
1666  return error(Twine("the name of machine basic block #") + Twine(Number) +
1667  " isn't '" + Token.stringValue() + "'");
1668  return false;
1669 }
1670 
1671 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
1672  MachineBasicBlock *MBB;
1673  if (parseMBBReference(MBB))
1674  return true;
1675  Dest = MachineOperand::CreateMBB(MBB);
1676  lex();
1677  return false;
1678 }
1679 
1680 bool MIParser::parseStackFrameIndex(int &FI) {
1681  assert(Token.is(MIToken::StackObject));
1682  unsigned ID;
1683  if (getUnsigned(ID))
1684  return true;
1685  auto ObjectInfo = PFS.StackObjectSlots.find(ID);
1686  if (ObjectInfo == PFS.StackObjectSlots.end())
1687  return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
1688  "'");
1689  StringRef Name;
1690  if (const auto *Alloca =
1691  MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
1692  Name = Alloca->getName();
1693  if (!Token.stringValue().empty() && Token.stringValue() != Name)
1694  return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
1695  "' isn't '" + Token.stringValue() + "'");
1696  lex();
1697  FI = ObjectInfo->second;
1698  return false;
1699 }
1700 
1701 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
1702  int FI;
1703  if (parseStackFrameIndex(FI))
1704  return true;
1705  Dest = MachineOperand::CreateFI(FI);
1706  return false;
1707 }
1708 
1709 bool MIParser::parseFixedStackFrameIndex(int &FI) {
1710  assert(Token.is(MIToken::FixedStackObject));
1711  unsigned ID;
1712  if (getUnsigned(ID))
1713  return true;
1714  auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
1715  if (ObjectInfo == PFS.FixedStackObjectSlots.end())
1716  return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
1717  Twine(ID) + "'");
1718  lex();
1719  FI = ObjectInfo->second;
1720  return false;
1721 }
1722 
1723 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
1724  int FI;
1725  if (parseFixedStackFrameIndex(FI))
1726  return true;
1727  Dest = MachineOperand::CreateFI(FI);
1728  return false;
1729 }
1730 
1731 bool MIParser::parseGlobalValue(GlobalValue *&GV) {
1732  switch (Token.kind()) {
1734  const Module *M = MF.getFunction().getParent();
1735  GV = M->getNamedValue(Token.stringValue());
1736  if (!GV)
1737  return error(Twine("use of undefined global value '") + Token.range() +
1738  "'");
1739  break;
1740  }
1741  case MIToken::GlobalValue: {
1742  unsigned GVIdx;
1743  if (getUnsigned(GVIdx))
1744  return true;
1745  if (GVIdx >= PFS.IRSlots.GlobalValues.size())
1746  return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
1747  "'");
1748  GV = PFS.IRSlots.GlobalValues[GVIdx];
1749  break;
1750  }
1751  default:
1752  llvm_unreachable("The current token should be a global value");
1753  }
1754  return false;
1755 }
1756 
1757 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
1758  GlobalValue *GV = nullptr;
1759  if (parseGlobalValue(GV))
1760  return true;
1761  lex();
1762  Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
1763  if (parseOperandsOffset(Dest))
1764  return true;
1765  return false;
1766 }
1767 
1768 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
1769  assert(Token.is(MIToken::ConstantPoolItem));
1770  unsigned ID;
1771  if (getUnsigned(ID))
1772  return true;
1773  auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
1774  if (ConstantInfo == PFS.ConstantPoolSlots.end())
1775  return error("use of undefined constant '%const." + Twine(ID) + "'");
1776  lex();
1777  Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
1778  if (parseOperandsOffset(Dest))
1779  return true;
1780  return false;
1781 }
1782 
1783 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
1784  assert(Token.is(MIToken::JumpTableIndex));
1785  unsigned ID;
1786  if (getUnsigned(ID))
1787  return true;
1788  auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
1789  if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
1790  return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
1791  lex();
1792  Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
1793  return false;
1794 }
1795 
1796 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
1797  assert(Token.is(MIToken::ExternalSymbol));
1798  const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
1799  lex();
1800  Dest = MachineOperand::CreateES(Symbol);
1801  if (parseOperandsOffset(Dest))
1802  return true;
1803  return false;
1804 }
1805 
1806 bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {
1807  assert(Token.is(MIToken::MCSymbol));
1808  MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());
1809  lex();
1810  Dest = MachineOperand::CreateMCSymbol(Symbol);
1811  if (parseOperandsOffset(Dest))
1812  return true;
1813  return false;
1814 }
1815 
1816 bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
1817  assert(Token.is(MIToken::SubRegisterIndex));
1818  StringRef Name = Token.stringValue();
1819  unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
1820  if (SubRegIndex == 0)
1821  return error(Twine("unknown subregister index '") + Name + "'");
1822  lex();
1823  Dest = MachineOperand::CreateImm(SubRegIndex);
1824  return false;
1825 }
1826 
1827 bool MIParser::parseMDNode(MDNode *&Node) {
1828  assert(Token.is(MIToken::exclaim));
1829 
1830  auto Loc = Token.location();
1831  lex();
1832  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1833  return error("expected metadata id after '!'");
1834  unsigned ID;
1835  if (getUnsigned(ID))
1836  return true;
1837  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
1838  if (NodeInfo == PFS.IRSlots.MetadataNodes.end())
1839  return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
1840  lex();
1841  Node = NodeInfo->second.get();
1842  return false;
1843 }
1844 
1845 bool MIParser::parseDIExpression(MDNode *&Expr) {
1846  assert(Token.is(MIToken::md_diexpr));
1847  lex();
1848 
1849  // FIXME: Share this parsing with the IL parser.
1850  SmallVector<uint64_t, 8> Elements;
1851 
1852  if (expectAndConsume(MIToken::lparen))
1853  return true;
1854 
1855  if (Token.isNot(MIToken::rparen)) {
1856  do {
1857  if (Token.is(MIToken::Identifier)) {
1858  if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
1859  lex();
1860  Elements.push_back(Op);
1861  continue;
1862  }
1863  if (unsigned Enc = dwarf::getAttributeEncoding(Token.stringValue())) {
1864  lex();
1865  Elements.push_back(Enc);
1866  continue;
1867  }
1868  return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
1869  }
1870 
1871  if (Token.isNot(MIToken::IntegerLiteral) ||
1872  Token.integerValue().isSigned())
1873  return error("expected unsigned integer");
1874 
1875  auto &U = Token.integerValue();
1876  if (U.ugt(UINT64_MAX))
1877  return error("element too large, limit is " + Twine(UINT64_MAX));
1878  Elements.push_back(U.getZExtValue());
1879  lex();
1880 
1881  } while (consumeIfPresent(MIToken::comma));
1882  }
1883 
1884  if (expectAndConsume(MIToken::rparen))
1885  return true;
1886 
1887  Expr = DIExpression::get(MF.getFunction().getContext(), Elements);
1888  return false;
1889 }
1890 
1891 bool MIParser::parseDILocation(MDNode *&Loc) {
1892  assert(Token.is(MIToken::md_dilocation));
1893  lex();
1894 
1895  bool HaveLine = false;
1896  unsigned Line = 0;
1897  unsigned Column = 0;
1898  MDNode *Scope = nullptr;
1899  MDNode *InlinedAt = nullptr;
1900  bool ImplicitCode = false;
1901 
1902  if (expectAndConsume(MIToken::lparen))
1903  return true;
1904 
1905  if (Token.isNot(MIToken::rparen)) {
1906  do {
1907  if (Token.is(MIToken::Identifier)) {
1908  if (Token.stringValue() == "line") {
1909  lex();
1910  if (expectAndConsume(MIToken::colon))
1911  return true;
1912  if (Token.isNot(MIToken::IntegerLiteral) ||
1913  Token.integerValue().isSigned())
1914  return error("expected unsigned integer");
1915  Line = Token.integerValue().getZExtValue();
1916  HaveLine = true;
1917  lex();
1918  continue;
1919  }
1920  if (Token.stringValue() == "column") {
1921  lex();
1922  if (expectAndConsume(MIToken::colon))
1923  return true;
1924  if (Token.isNot(MIToken::IntegerLiteral) ||
1925  Token.integerValue().isSigned())
1926  return error("expected unsigned integer");
1927  Column = Token.integerValue().getZExtValue();
1928  lex();
1929  continue;
1930  }
1931  if (Token.stringValue() == "scope") {
1932  lex();
1933  if (expectAndConsume(MIToken::colon))
1934  return true;
1935  if (parseMDNode(Scope))
1936  return error("expected metadata node");
1937  if (!isa<DIScope>(Scope))
1938  return error("expected DIScope node");
1939  continue;
1940  }
1941  if (Token.stringValue() == "inlinedAt") {
1942  lex();
1943  if (expectAndConsume(MIToken::colon))
1944  return true;
1945  if (Token.is(MIToken::exclaim)) {
1946  if (parseMDNode(InlinedAt))
1947  return true;
1948  } else if (Token.is(MIToken::md_dilocation)) {
1949  if (parseDILocation(InlinedAt))
1950  return true;
1951  } else
1952  return error("expected metadata node");
1953  if (!isa<DILocation>(InlinedAt))
1954  return error("expected DILocation node");
1955  continue;
1956  }
1957  if (Token.stringValue() == "isImplicitCode") {
1958  lex();
1959  if (expectAndConsume(MIToken::colon))
1960  return true;
1961  if (!Token.is(MIToken::Identifier))
1962  return error("expected true/false");
1963  // As far as I can see, we don't have any existing need for parsing
1964  // true/false in MIR yet. Do it ad-hoc until there's something else
1965  // that needs it.
1966  if (Token.stringValue() == "true")
1967  ImplicitCode = true;
1968  else if (Token.stringValue() == "false")
1969  ImplicitCode = false;
1970  else
1971  return error("expected true/false");
1972  lex();
1973  continue;
1974  }
1975  }
1976  return error(Twine("invalid DILocation argument '") +
1977  Token.stringValue() + "'");
1978  } while (consumeIfPresent(MIToken::comma));
1979  }
1980 
1981  if (expectAndConsume(MIToken::rparen))
1982  return true;
1983 
1984  if (!HaveLine)
1985  return error("DILocation requires line number");
1986  if (!Scope)
1987  return error("DILocation requires a scope");
1988 
1989  Loc = DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
1990  InlinedAt, ImplicitCode);
1991  return false;
1992 }
1993 
1994 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
1995  MDNode *Node = nullptr;
1996  if (Token.is(MIToken::exclaim)) {
1997  if (parseMDNode(Node))
1998  return true;
1999  } else if (Token.is(MIToken::md_diexpr)) {
2000  if (parseDIExpression(Node))
2001  return true;
2002  }
2003  Dest = MachineOperand::CreateMetadata(Node);
2004  return false;
2005 }
2006 
2007 bool MIParser::parseCFIOffset(int &Offset) {
2008  if (Token.isNot(MIToken::IntegerLiteral))
2009  return error("expected a cfi offset");
2010  if (Token.integerValue().getMinSignedBits() > 32)
2011  return error("expected a 32 bit integer (the cfi offset is too large)");
2012  Offset = (int)Token.integerValue().getExtValue();
2013  lex();
2014  return false;
2015 }
2016 
2017 bool MIParser::parseCFIRegister(unsigned &Reg) {
2018  if (Token.isNot(MIToken::NamedRegister))
2019  return error("expected a cfi register");
2020  unsigned LLVMReg;
2021  if (parseNamedRegister(LLVMReg))
2022  return true;
2023  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2024  assert(TRI && "Expected target register info");
2025  int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
2026  if (DwarfReg < 0)
2027  return error("invalid DWARF register");
2028  Reg = (unsigned)DwarfReg;
2029  lex();
2030  return false;
2031 }
2032 
2033 bool MIParser::parseCFIEscapeValues(std::string &Values) {
2034  do {
2035  if (Token.isNot(MIToken::HexLiteral))
2036  return error("expected a hexadecimal literal");
2037  unsigned Value;
2038  if (getUnsigned(Value))
2039  return true;
2040  if (Value > UINT8_MAX)
2041  return error("expected a 8-bit integer (too large)");
2042  Values.push_back(static_cast<uint8_t>(Value));
2043  lex();
2044  } while (consumeIfPresent(MIToken::comma));
2045  return false;
2046 }
2047 
2048 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
2049  auto Kind = Token.kind();
2050  lex();
2051  int Offset;
2052  unsigned Reg;
2053  unsigned CFIIndex;
2054  switch (Kind) {
2056  if (parseCFIRegister(Reg))
2057  return true;
2058  CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
2059  break;
2061  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2062  parseCFIOffset(Offset))
2063  return true;
2064  CFIIndex =
2065  MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
2066  break;
2068  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2069  parseCFIOffset(Offset))
2070  return true;
2071  CFIIndex = MF.addFrameInst(
2072  MCCFIInstruction::createRelOffset(nullptr, Reg, Offset));
2073  break;
2075  if (parseCFIRegister(Reg))
2076  return true;
2077  CFIIndex =
2079  break;
2081  if (parseCFIOffset(Offset))
2082  return true;
2083  // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
2084  CFIIndex = MF.addFrameInst(
2085  MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
2086  break;
2088  if (parseCFIOffset(Offset))
2089  return true;
2090  CFIIndex = MF.addFrameInst(
2091  MCCFIInstruction::createAdjustCfaOffset(nullptr, Offset));
2092  break;
2094  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2095  parseCFIOffset(Offset))
2096  return true;
2097  // NB: MCCFIInstruction::createDefCfa negates the offset.
2098  CFIIndex =
2099  MF.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
2100  break;
2103  break;
2105  if (parseCFIRegister(Reg))
2106  return true;
2107  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
2108  break;
2111  break;
2113  if (parseCFIRegister(Reg))
2114  return true;
2115  CFIIndex = MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, Reg));
2116  break;
2117  case MIToken::kw_cfi_register: {
2118  unsigned Reg2;
2119  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2120  parseCFIRegister(Reg2))
2121  return true;
2122 
2123  CFIIndex =
2124  MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2));
2125  break;
2126  }
2128  CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
2129  break;
2132  break;
2133  case MIToken::kw_cfi_escape: {
2134  std::string Values;
2135  if (parseCFIEscapeValues(Values))
2136  return true;
2137  CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, Values));
2138  break;
2139  }
2140  default:
2141  // TODO: Parse the other CFI operands.
2142  llvm_unreachable("The current token should be a cfi operand");
2143  }
2144  Dest = MachineOperand::CreateCFIIndex(CFIIndex);
2145  return false;
2146 }
2147 
2148 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
2149  switch (Token.kind()) {
2150  case MIToken::NamedIRBlock: {
2151  BB = dyn_cast_or_null<BasicBlock>(
2152  F.getValueSymbolTable()->lookup(Token.stringValue()));
2153  if (!BB)
2154  return error(Twine("use of undefined IR block '") + Token.range() + "'");
2155  break;
2156  }
2157  case MIToken::IRBlock: {
2158  unsigned SlotNumber = 0;
2159  if (getUnsigned(SlotNumber))
2160  return true;
2161  BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
2162  if (!BB)
2163  return error(Twine("use of undefined IR block '%ir-block.") +
2164  Twine(SlotNumber) + "'");
2165  break;
2166  }
2167  default:
2168  llvm_unreachable("The current token should be an IR block reference");
2169  }
2170  return false;
2171 }
2172 
2173 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
2174  assert(Token.is(MIToken::kw_blockaddress));
2175  lex();
2176  if (expectAndConsume(MIToken::lparen))
2177  return true;
2178  if (Token.isNot(MIToken::GlobalValue) &&
2179  Token.isNot(MIToken::NamedGlobalValue))
2180  return error("expected a global value");
2181  GlobalValue *GV = nullptr;
2182  if (parseGlobalValue(GV))
2183  return true;
2184  auto *F = dyn_cast<Function>(GV);
2185  if (!F)
2186  return error("expected an IR function reference");
2187  lex();
2188  if (expectAndConsume(MIToken::comma))
2189  return true;
2190  BasicBlock *BB = nullptr;
2191  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
2192  return error("expected an IR block reference");
2193  if (parseIRBlock(BB, *F))
2194  return true;
2195  lex();
2196  if (expectAndConsume(MIToken::rparen))
2197  return true;
2198  Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
2199  if (parseOperandsOffset(Dest))
2200  return true;
2201  return false;
2202 }
2203 
2204 bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
2205  assert(Token.is(MIToken::kw_intrinsic));
2206  lex();
2207  if (expectAndConsume(MIToken::lparen))
2208  return error("expected syntax intrinsic(@llvm.whatever)");
2209 
2210  if (Token.isNot(MIToken::NamedGlobalValue))
2211  return error("expected syntax intrinsic(@llvm.whatever)");
2212 
2213  std::string Name = Token.stringValue();
2214  lex();
2215 
2216  if (expectAndConsume(MIToken::rparen))
2217  return error("expected ')' to terminate intrinsic name");
2218 
2219  // Find out what intrinsic we're dealing with, first try the global namespace
2220  // and then the target's private intrinsics if that fails.
2223  if (ID == Intrinsic::not_intrinsic && TII)
2224  ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
2225 
2226  if (ID == Intrinsic::not_intrinsic)
2227  return error("unknown intrinsic name");
2229 
2230  return false;
2231 }
2232 
2233 bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
2234  assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
2235  bool IsFloat = Token.is(MIToken::kw_floatpred);
2236  lex();
2237 
2238  if (expectAndConsume(MIToken::lparen))
2239  return error("expected syntax intpred(whatever) or floatpred(whatever");
2240 
2241  if (Token.isNot(MIToken::Identifier))
2242  return error("whatever");
2243 
2244  CmpInst::Predicate Pred;
2245  if (IsFloat) {
2246  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2247  .Case("false", CmpInst::FCMP_FALSE)
2248  .Case("oeq", CmpInst::FCMP_OEQ)
2249  .Case("ogt", CmpInst::FCMP_OGT)
2250  .Case("oge", CmpInst::FCMP_OGE)
2251  .Case("olt", CmpInst::FCMP_OLT)
2252  .Case("ole", CmpInst::FCMP_OLE)
2253  .Case("one", CmpInst::FCMP_ONE)
2254  .Case("ord", CmpInst::FCMP_ORD)
2255  .Case("uno", CmpInst::FCMP_UNO)
2256  .Case("ueq", CmpInst::FCMP_UEQ)
2257  .Case("ugt", CmpInst::FCMP_UGT)
2258  .Case("uge", CmpInst::FCMP_UGE)
2259  .Case("ult", CmpInst::FCMP_ULT)
2260  .Case("ule", CmpInst::FCMP_ULE)
2261  .Case("une", CmpInst::FCMP_UNE)
2262  .Case("true", CmpInst::FCMP_TRUE)
2264  if (!CmpInst::isFPPredicate(Pred))
2265  return error("invalid floating-point predicate");
2266  } else {
2267  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2268  .Case("eq", CmpInst::ICMP_EQ)
2269  .Case("ne", CmpInst::ICMP_NE)
2270  .Case("sgt", CmpInst::ICMP_SGT)
2271  .Case("sge", CmpInst::ICMP_SGE)
2272  .Case("slt", CmpInst::ICMP_SLT)
2273  .Case("sle", CmpInst::ICMP_SLE)
2274  .Case("ugt", CmpInst::ICMP_UGT)
2275  .Case("uge", CmpInst::ICMP_UGE)
2276  .Case("ult", CmpInst::ICMP_ULT)
2277  .Case("ule", CmpInst::ICMP_ULE)
2279  if (!CmpInst::isIntPredicate(Pred))
2280  return error("invalid integer predicate");
2281  }
2282 
2283  lex();
2284  Dest = MachineOperand::CreatePredicate(Pred);
2285  if (expectAndConsume(MIToken::rparen))
2286  return error("predicate should be terminated by ')'.");
2287 
2288  return false;
2289 }
2290 
2291 bool MIParser::parseShuffleMaskOperand(MachineOperand &Dest) {
2292  assert(Token.is(MIToken::kw_shufflemask));
2293 
2294  lex();
2295  if (expectAndConsume(MIToken::lparen))
2296  return error("expected syntax shufflemask(<integer or undef>, ...)");
2297 
2298  SmallVector<Constant *, 32> ShufMask;
2299  LLVMContext &Ctx = MF.getFunction().getContext();
2300  Type *I32Ty = Type::getInt32Ty(Ctx);
2301 
2302  bool AllZero = true;
2303  bool AllUndef = true;
2304 
2305  do {
2306  if (Token.is(MIToken::kw_undef)) {
2307  ShufMask.push_back(UndefValue::get(I32Ty));
2308  AllZero = false;
2309  } else if (Token.is(MIToken::IntegerLiteral)) {
2310  AllUndef = false;
2311  const APSInt &Int = Token.integerValue();
2312  if (!Int.isNullValue())
2313  AllZero = false;
2314  ShufMask.push_back(ConstantInt::get(I32Ty, Int.getExtValue()));
2315  } else
2316  return error("expected integer constant");
2317 
2318  lex();
2319  } while (consumeIfPresent(MIToken::comma));
2320 
2321  if (expectAndConsume(MIToken::rparen))
2322  return error("shufflemask should be terminated by ')'.");
2323 
2324  if (AllZero || AllUndef) {
2325  VectorType *VT = VectorType::get(I32Ty, ShufMask.size());
2326  Constant *C = AllZero ? Constant::getNullValue(VT) : UndefValue::get(VT);
2328  } else
2330 
2331  return false;
2332 }
2333 
2334 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
2335  assert(Token.is(MIToken::kw_target_index));
2336  lex();
2337  if (expectAndConsume(MIToken::lparen))
2338  return true;
2339  if (Token.isNot(MIToken::Identifier))
2340  return error("expected the name of the target index");
2341  int Index = 0;
2342  if (PFS.Target.getTargetIndex(Token.stringValue(), Index))
2343  return error("use of undefined target index '" + Token.stringValue() + "'");
2344  lex();
2345  if (expectAndConsume(MIToken::rparen))
2346  return true;
2347  Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
2348  if (parseOperandsOffset(Dest))
2349  return true;
2350  return false;
2351 }
2352 
2353 bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
2354  assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
2355  lex();
2356  if (expectAndConsume(MIToken::lparen))
2357  return true;
2358 
2360  while (true) {
2361  if (Token.isNot(MIToken::NamedRegister))
2362  return error("expected a named register");
2363  unsigned Reg;
2364  if (parseNamedRegister(Reg))
2365  return true;
2366  lex();
2367  Mask[Reg / 32] |= 1U << (Reg % 32);
2368  // TODO: Report an error if the same register is used more than once.
2369  if (Token.isNot(MIToken::comma))
2370  break;
2371  lex();
2372  }
2373 
2374  if (expectAndConsume(MIToken::rparen))
2375  return true;
2376  Dest = MachineOperand::CreateRegMask(Mask);
2377  return false;
2378 }
2379 
2380 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
2381  assert(Token.is(MIToken::kw_liveout));
2383  lex();
2384  if (expectAndConsume(MIToken::lparen))
2385  return true;
2386  while (true) {
2387  if (Token.isNot(MIToken::NamedRegister))
2388  return error("expected a named register");
2389  unsigned Reg;
2390  if (parseNamedRegister(Reg))
2391  return true;
2392  lex();
2393  Mask[Reg / 32] |= 1U << (Reg % 32);
2394  // TODO: Report an error if the same register is used more than once.
2395  if (Token.isNot(MIToken::comma))
2396  break;
2397  lex();
2398  }
2399  if (expectAndConsume(MIToken::rparen))
2400  return true;
2401  Dest = MachineOperand::CreateRegLiveOut(Mask);
2402  return false;
2403 }
2404 
2405 bool MIParser::parseMachineOperand(MachineOperand &Dest,
2406  Optional<unsigned> &TiedDefIdx) {
2407  switch (Token.kind()) {
2408  case MIToken::kw_implicit:
2410  case MIToken::kw_def:
2411  case MIToken::kw_dead:
2412  case MIToken::kw_killed:
2413  case MIToken::kw_undef:
2414  case MIToken::kw_internal:
2416  case MIToken::kw_debug_use:
2417  case MIToken::kw_renamable:
2418  case MIToken::underscore:
2422  return parseRegisterOperand(Dest, TiedDefIdx);
2424  return parseImmediateOperand(Dest);
2425  case MIToken::kw_half:
2426  case MIToken::kw_float:
2427  case MIToken::kw_double:
2428  case MIToken::kw_x86_fp80:
2429  case MIToken::kw_fp128:
2430  case MIToken::kw_ppc_fp128:
2431  return parseFPImmediateOperand(Dest);
2433  return parseMBBOperand(Dest);
2434  case MIToken::StackObject:
2435  return parseStackObjectOperand(Dest);
2437  return parseFixedStackObjectOperand(Dest);
2438  case MIToken::GlobalValue:
2440  return parseGlobalAddressOperand(Dest);
2442  return parseConstantPoolIndexOperand(Dest);
2444  return parseJumpTableIndexOperand(Dest);
2446  return parseExternalSymbolOperand(Dest);
2447  case MIToken::MCSymbol:
2448  return parseMCSymbolOperand(Dest);
2450  return parseSubRegisterIndexOperand(Dest);
2451  case MIToken::md_diexpr:
2452  case MIToken::exclaim:
2453  return parseMetadataOperand(Dest);
2469  return parseCFIOperand(Dest);
2471  return parseBlockAddressOperand(Dest);
2472  case MIToken::kw_intrinsic:
2473  return parseIntrinsicOperand(Dest);
2475  return parseTargetIndexOperand(Dest);
2476  case MIToken::kw_liveout:
2477  return parseLiveoutRegisterMaskOperand(Dest);
2478  case MIToken::kw_floatpred:
2479  case MIToken::kw_intpred:
2480  return parsePredicateOperand(Dest);
2482  return parseShuffleMaskOperand(Dest);
2483  case MIToken::Error:
2484  return true;
2485  case MIToken::Identifier:
2486  if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2487  Dest = MachineOperand::CreateRegMask(RegMask);
2488  lex();
2489  break;
2490  } else if (Token.stringValue() == "CustomRegMask") {
2491  return parseCustomRegisterMaskOperand(Dest);
2492  } else
2493  return parseTypedImmediateOperand(Dest);
2494  default:
2495  // FIXME: Parse the MCSymbol machine operand.
2496  return error("expected a machine operand");
2497  }
2498  return false;
2499 }
2500 
2501 bool MIParser::parseMachineOperandAndTargetFlags(
2502  MachineOperand &Dest, Optional<unsigned> &TiedDefIdx) {
2503  unsigned TF = 0;
2504  bool HasTargetFlags = false;
2505  if (Token.is(MIToken::kw_target_flags)) {
2506  HasTargetFlags = true;
2507  lex();
2508  if (expectAndConsume(MIToken::lparen))
2509  return true;
2510  if (Token.isNot(MIToken::Identifier))
2511  return error("expected the name of the target flag");
2512  if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
2513  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
2514  return error("use of undefined target flag '" + Token.stringValue() +
2515  "'");
2516  }
2517  lex();
2518  while (Token.is(MIToken::comma)) {
2519  lex();
2520  if (Token.isNot(MIToken::Identifier))
2521  return error("expected the name of the target flag");
2522  unsigned BitFlag = 0;
2523  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
2524  return error("use of undefined target flag '" + Token.stringValue() +
2525  "'");
2526  // TODO: Report an error when using a duplicate bit target flag.
2527  TF |= BitFlag;
2528  lex();
2529  }
2530  if (expectAndConsume(MIToken::rparen))
2531  return true;
2532  }
2533  auto Loc = Token.location();
2534  if (parseMachineOperand(Dest, TiedDefIdx))
2535  return true;
2536  if (!HasTargetFlags)
2537  return false;
2538  if (Dest.isReg())
2539  return error(Loc, "register operands can't have target flags");
2540  Dest.setTargetFlags(TF);
2541  return false;
2542 }
2543 
2544 bool MIParser::parseOffset(int64_t &Offset) {
2545  if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
2546  return false;
2547  StringRef Sign = Token.range();
2548  bool IsNegative = Token.is(MIToken::minus);
2549  lex();
2550  if (Token.isNot(MIToken::IntegerLiteral))
2551  return error("expected an integer literal after '" + Sign + "'");
2552  if (Token.integerValue().getMinSignedBits() > 64)
2553  return error("expected 64-bit integer (too large)");
2554  Offset = Token.integerValue().getExtValue();
2555  if (IsNegative)
2556  Offset = -Offset;
2557  lex();
2558  return false;
2559 }
2560 
2561 bool MIParser::parseAlignment(unsigned &Alignment) {
2562  assert(Token.is(MIToken::kw_align));
2563  lex();
2564  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2565  return error("expected an integer literal after 'align'");
2566  if (getUnsigned(Alignment))
2567  return true;
2568  lex();
2569 
2570  if (!isPowerOf2_32(Alignment))
2571  return error("expected a power-of-2 literal after 'align'");
2572 
2573  return false;
2574 }
2575 
2576 bool MIParser::parseAddrspace(unsigned &Addrspace) {
2577  assert(Token.is(MIToken::kw_addrspace));
2578  lex();
2579  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2580  return error("expected an integer literal after 'addrspace'");
2581  if (getUnsigned(Addrspace))
2582  return true;
2583  lex();
2584  return false;
2585 }
2586 
2587 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
2588  int64_t Offset = 0;
2589  if (parseOffset(Offset))
2590  return true;
2591  Op.setOffset(Offset);
2592  return false;
2593 }
2594 
2595 bool MIParser::parseIRValue(const Value *&V) {
2596  switch (Token.kind()) {
2597  case MIToken::NamedIRValue: {
2598  V = MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
2599  break;
2600  }
2601  case MIToken::IRValue: {
2602  unsigned SlotNumber = 0;
2603  if (getUnsigned(SlotNumber))
2604  return true;
2605  V = getIRValue(SlotNumber);
2606  break;
2607  }
2609  case MIToken::GlobalValue: {
2610  GlobalValue *GV = nullptr;
2611  if (parseGlobalValue(GV))
2612  return true;
2613  V = GV;
2614  break;
2615  }
2616  case MIToken::QuotedIRValue: {
2617  const Constant *C = nullptr;
2618  if (parseIRConstant(Token.location(), Token.stringValue(), C))
2619  return true;
2620  V = C;
2621  break;
2622  }
2623  default:
2624  llvm_unreachable("The current token should be an IR block reference");
2625  }
2626  if (!V)
2627  return error(Twine("use of undefined IR value '") + Token.range() + "'");
2628  return false;
2629 }
2630 
2631 bool MIParser::getUint64(uint64_t &Result) {
2632  if (Token.hasIntegerValue()) {
2633  if (Token.integerValue().getActiveBits() > 64)
2634  return error("expected 64-bit integer (too large)");
2635  Result = Token.integerValue().getZExtValue();
2636  return false;
2637  }
2638  if (Token.is(MIToken::HexLiteral)) {
2639  APInt A;
2640  if (getHexUint(A))
2641  return true;
2642  if (A.getBitWidth() > 64)
2643  return error("expected 64-bit integer (too large)");
2644  Result = A.getZExtValue();
2645  return false;
2646  }
2647  return true;
2648 }
2649 
2650 bool MIParser::getHexUint(APInt &Result) {
2651  assert(Token.is(MIToken::HexLiteral));
2652  StringRef S = Token.range();
2653  assert(S[0] == '0' && tolower(S[1]) == 'x');
2654  // This could be a floating point literal with a special prefix.
2655  if (!isxdigit(S[2]))
2656  return true;
2657  StringRef V = S.substr(2);
2658  APInt A(V.size()*4, V, 16);
2659 
2660  // If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
2661  // sure it isn't the case before constructing result.
2662  unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
2663  Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
2664  return false;
2665 }
2666 
2667 bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
2668  const auto OldFlags = Flags;
2669  switch (Token.kind()) {
2670  case MIToken::kw_volatile:
2672  break;
2675  break;
2678  break;
2679  case MIToken::kw_invariant:
2681  break;
2682  case MIToken::StringConstant: {
2684  if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
2685  return error("use of undefined target MMO flag '" + Token.stringValue() +
2686  "'");
2687  Flags |= TF;
2688  break;
2689  }
2690  default:
2691  llvm_unreachable("The current token should be a memory operand flag");
2692  }
2693  if (OldFlags == Flags)
2694  // We know that the same flag is specified more than once when the flags
2695  // weren't modified.
2696  return error("duplicate '" + Token.stringValue() + "' memory operand flag");
2697  lex();
2698  return false;
2699 }
2700 
2701 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
2702  switch (Token.kind()) {
2703  case MIToken::kw_stack:
2704  PSV = MF.getPSVManager().getStack();
2705  break;
2706  case MIToken::kw_got:
2707  PSV = MF.getPSVManager().getGOT();
2708  break;
2710  PSV = MF.getPSVManager().getJumpTable();
2711  break;
2713  PSV = MF.getPSVManager().getConstantPool();
2714  break;
2716  int FI;
2717  if (parseFixedStackFrameIndex(FI))
2718  return true;
2719  PSV = MF.getPSVManager().getFixedStack(FI);
2720  // The token was already consumed, so use return here instead of break.
2721  return false;
2722  }
2723  case MIToken::StackObject: {
2724  int FI;
2725  if (parseStackFrameIndex(FI))
2726  return true;
2727  PSV = MF.getPSVManager().getFixedStack(FI);
2728  // The token was already consumed, so use return here instead of break.
2729  return false;
2730  }
2732  lex();
2733  switch (Token.kind()) {
2734  case MIToken::GlobalValue:
2736  GlobalValue *GV = nullptr;
2737  if (parseGlobalValue(GV))
2738  return true;
2740  break;
2741  }
2744  MF.createExternalSymbolName(Token.stringValue()));
2745  break;
2746  default:
2747  return error(
2748  "expected a global value or an external symbol after 'call-entry'");
2749  }
2750  break;
2751  default:
2752  llvm_unreachable("The current token should be pseudo source value");
2753  }
2754  lex();
2755  return false;
2756 }
2757 
2758 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
2759  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
2760  Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
2761  Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
2762  Token.is(MIToken::kw_call_entry)) {
2763  const PseudoSourceValue *PSV = nullptr;
2764  if (parseMemoryPseudoSourceValue(PSV))
2765  return true;
2766  int64_t Offset = 0;
2767  if (parseOffset(Offset))
2768  return true;
2769  Dest = MachinePointerInfo(PSV, Offset);
2770  return false;
2771  }
2772  if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
2773  Token.isNot(MIToken::GlobalValue) &&
2774  Token.isNot(MIToken::NamedGlobalValue) &&
2775  Token.isNot(MIToken::QuotedIRValue))
2776  return error("expected an IR value reference");
2777  const Value *V = nullptr;
2778  if (parseIRValue(V))
2779  return true;
2780  if (!V->getType()->isPointerTy())
2781  return error("expected a pointer IR value");
2782  lex();
2783  int64_t Offset = 0;
2784  if (parseOffset(Offset))
2785  return true;
2786  Dest = MachinePointerInfo(V, Offset);
2787  return false;
2788 }
2789 
2790 bool MIParser::parseOptionalScope(LLVMContext &Context,
2791  SyncScope::ID &SSID) {
2792  SSID = SyncScope::System;
2793  if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
2794  lex();
2795  if (expectAndConsume(MIToken::lparen))
2796  return error("expected '(' in syncscope");
2797 
2798  std::string SSN;
2799  if (parseStringConstant(SSN))
2800  return true;
2801 
2802  SSID = Context.getOrInsertSyncScopeID(SSN);
2803  if (expectAndConsume(MIToken::rparen))
2804  return error("expected ')' in syncscope");
2805  }
2806 
2807  return false;
2808 }
2809 
2810 bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
2811  Order = AtomicOrdering::NotAtomic;
2812  if (Token.isNot(MIToken::Identifier))
2813  return false;
2814 
2815  Order = StringSwitch<AtomicOrdering>(Token.stringValue())
2816  .Case("unordered", AtomicOrdering::Unordered)
2817  .Case("monotonic", AtomicOrdering::Monotonic)
2818  .Case("acquire", AtomicOrdering::Acquire)
2819  .Case("release", AtomicOrdering::Release)
2823 
2824  if (Order != AtomicOrdering::NotAtomic) {
2825  lex();
2826  return false;
2827  }
2828 
2829  return error("expected an atomic scope, ordering or a size specification");
2830 }
2831 
2832 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
2833  if (expectAndConsume(MIToken::lparen))
2834  return true;
2836  while (Token.isMemoryOperandFlag()) {
2837  if (parseMemoryOperandFlag(Flags))
2838  return true;
2839  }
2840  if (Token.isNot(MIToken::Identifier) ||
2841  (Token.stringValue() != "load" && Token.stringValue() != "store"))
2842  return error("expected 'load' or 'store' memory operation");
2843  if (Token.stringValue() == "load")
2844  Flags |= MachineMemOperand::MOLoad;
2845  else
2846  Flags |= MachineMemOperand::MOStore;
2847  lex();
2848 
2849  // Optional 'store' for operands that both load and store.
2850  if (Token.is(MIToken::Identifier) && Token.stringValue() == "store") {
2851  Flags |= MachineMemOperand::MOStore;
2852  lex();
2853  }
2854 
2855  // Optional synchronization scope.
2856  SyncScope::ID SSID;
2857  if (parseOptionalScope(MF.getFunction().getContext(), SSID))
2858  return true;
2859 
2860  // Up to two atomic orderings (cmpxchg provides guarantees on failure).
2861  AtomicOrdering Order, FailureOrder;
2862  if (parseOptionalAtomicOrdering(Order))
2863  return true;
2864 
2865  if (parseOptionalAtomicOrdering(FailureOrder))
2866  return true;
2867 
2868  if (Token.isNot(MIToken::IntegerLiteral) &&
2869  Token.isNot(MIToken::kw_unknown_size))
2870  return error("expected the size integer literal or 'unknown-size' after "
2871  "memory operation");
2872  uint64_t Size;
2873  if (Token.is(MIToken::IntegerLiteral)) {
2874  if (getUint64(Size))
2875  return true;
2876  } else if (Token.is(MIToken::kw_unknown_size)) {
2878  }
2879  lex();
2880 
2882  if (Token.is(MIToken::Identifier)) {
2883  const char *Word =
2884  ((Flags & MachineMemOperand::MOLoad) &&
2885  (Flags & MachineMemOperand::MOStore))
2886  ? "on"
2887  : Flags & MachineMemOperand::MOLoad ? "from" : "into";
2888  if (Token.stringValue() != Word)
2889  return error(Twine("expected '") + Word + "'");
2890  lex();
2891 
2892  if (parseMachinePointerInfo(Ptr))
2893  return true;
2894  }
2895  unsigned BaseAlignment = (Size != MemoryLocation::UnknownSize ? Size : 1);
2896  AAMDNodes AAInfo;
2897  MDNode *Range = nullptr;
2898  while (consumeIfPresent(MIToken::comma)) {
2899  switch (Token.kind()) {
2900  case MIToken::kw_align:
2901  if (parseAlignment(BaseAlignment))
2902  return true;
2903  break;
2904  case MIToken::kw_addrspace:
2905  if (parseAddrspace(Ptr.AddrSpace))
2906  return true;
2907  break;
2908  case MIToken::md_tbaa:
2909  lex();
2910  if (parseMDNode(AAInfo.TBAA))
2911  return true;
2912  break;
2914  lex();
2915  if (parseMDNode(AAInfo.Scope))
2916  return true;
2917  break;
2918  case MIToken::md_noalias:
2919  lex();
2920  if (parseMDNode(AAInfo.NoAlias))
2921  return true;
2922  break;
2923  case MIToken::md_range:
2924  lex();
2925  if (parseMDNode(Range))
2926  return true;
2927  break;
2928  // TODO: Report an error on duplicate metadata nodes.
2929  default:
2930  return error("expected 'align' or '!tbaa' or '!alias.scope' or "
2931  "'!noalias' or '!range'");
2932  }
2933  }
2934  if (expectAndConsume(MIToken::rparen))
2935  return true;
2936  Dest = MF.getMachineMemOperand(Ptr, Flags, Size, BaseAlignment, AAInfo, Range,
2937  SSID, Order, FailureOrder);
2938  return false;
2939 }
2940 
2941 bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {
2942  assert((Token.is(MIToken::kw_pre_instr_symbol) ||
2943  Token.is(MIToken::kw_post_instr_symbol)) &&
2944  "Invalid token for a pre- post-instruction symbol!");
2945  lex();
2946  if (Token.isNot(MIToken::MCSymbol))
2947  return error("expected a symbol after 'pre-instr-symbol'");
2948  Symbol = getOrCreateMCSymbol(Token.stringValue());
2949  lex();
2950  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
2951  Token.is(MIToken::lbrace))
2952  return false;
2953  if (Token.isNot(MIToken::comma))
2954  return error("expected ',' before the next machine operand");
2955  lex();
2956  return false;
2957 }
2958 
2960  const Function &F,
2961  DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2962  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
2963  MST.incorporateFunction(F);
2964  for (auto &BB : F) {
2965  if (BB.hasName())
2966  continue;
2967  int Slot = MST.getLocalSlot(&BB);
2968  if (Slot == -1)
2969  continue;
2970  Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
2971  }
2972 }
2973 
2975  unsigned Slot,
2976  const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2977  auto BlockInfo = Slots2BasicBlocks.find(Slot);
2978  if (BlockInfo == Slots2BasicBlocks.end())
2979  return nullptr;
2980  return BlockInfo->second;
2981 }
2982 
2983 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
2984  if (Slots2BasicBlocks.empty())
2985  initSlots2BasicBlocks(MF.getFunction(), Slots2BasicBlocks);
2986  return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
2987 }
2988 
2989 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
2990  if (&F == &MF.getFunction())
2991  return getIRBlock(Slot);
2992  DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
2993  initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
2994  return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
2995 }
2996 
2997 static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
2998  DenseMap<unsigned, const Value *> &Slots2Values) {
2999  int Slot = MST.getLocalSlot(V);
3000  if (Slot == -1)
3001  return;
3002  Slots2Values.insert(std::make_pair(unsigned(Slot), V));
3003 }
3004 
3005 /// Creates the mapping from slot numbers to function's unnamed IR values.
3006 static void initSlots2Values(const Function &F,
3007  DenseMap<unsigned, const Value *> &Slots2Values) {
3008  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
3009  MST.incorporateFunction(F);
3010  for (const auto &Arg : F.args())
3011  mapValueToSlot(&Arg, MST, Slots2Values);
3012  for (const auto &BB : F) {
3013  mapValueToSlot(&BB, MST, Slots2Values);
3014  for (const auto &I : BB)
3015  mapValueToSlot(&I, MST, Slots2Values);
3016  }
3017 }
3018 
3019 const Value *MIParser::getIRValue(unsigned Slot) {
3020  if (Slots2Values.empty())
3021  initSlots2Values(MF.getFunction(), Slots2Values);
3022  auto ValueInfo = Slots2Values.find(Slot);
3023  if (ValueInfo == Slots2Values.end())
3024  return nullptr;
3025  return ValueInfo->second;
3026 }
3027 
3028 MCSymbol *MIParser::getOrCreateMCSymbol(StringRef Name) {
3029  // FIXME: Currently we can't recognize temporary or local symbols and call all
3030  // of the appropriate forms to create them. However, this handles basic cases
3031  // well as most of the special aspects are recognized by a prefix on their
3032  // name, and the input names should already be unique. For test cases, keeping
3033  // the symbol name out of the symbol table isn't terribly important.
3034  return MF.getContext().getOrCreateSymbol(Name);
3035 }
3036 
3037 bool MIParser::parseStringConstant(std::string &Result) {
3038  if (Token.isNot(MIToken::StringConstant))
3039  return error("expected string constant");
3040  Result = Token.stringValue();
3041  lex();
3042  return false;
3043 }
3044 
3046  StringRef Src,
3047  SMDiagnostic &Error) {
3048  return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
3049 }
3050 
3052  StringRef Src, SMDiagnostic &Error) {
3053  return MIParser(PFS, Error, Src).parseBasicBlocks();
3054 }
3055 
3057  MachineBasicBlock *&MBB, StringRef Src,
3058  SMDiagnostic &Error) {
3059  return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
3060 }
3061 
3063  unsigned &Reg, StringRef Src,
3064  SMDiagnostic &Error) {
3065  return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
3066 }
3067 
3069  unsigned &Reg, StringRef Src,
3070  SMDiagnostic &Error) {
3071  return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
3072 }
3073 
3075  VRegInfo *&Info, StringRef Src,
3076  SMDiagnostic &Error) {
3077  return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
3078 }
3079 
3081  int &FI, StringRef Src,
3082  SMDiagnostic &Error) {
3083  return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
3084 }
3085 
3087  MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
3088  return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
3089 }
bool isFPPredicate() const
Definition: InstrTypes.h:824
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
uint64_t CallInst * C
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
Definition: MemoryBuffer.h:69
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
Definition: MIParser.cpp:3045
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2959
A common definition of LaneBitmask for use in TableGen and CodeGen.
bool getTargetIndex(StringRef Name, int &Index)
Try to convert a name of target index to the corresponding target index.
Definition: MIParser.cpp:200
static LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
uint64_t getZExtValue() const
Get zero extended value.
Definition: APInt.h:1571
static MachineOperand CreateCImm(const ConstantInt *CI)
DenseMap< unsigned, unsigned > JumpTableSlots
Definition: MIParser.h:172
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:232
LLVMContext & Context
const T & back() const
back - Get the last element.
Definition: ArrayRef.h:157
MDNode * Scope
The tag for alias scope specification (used with noalias).
Definition: Metadata.h:660
Atomic ordering constants.
DenseMap< unsigned, unsigned > ConstantPoolSlots
Definition: MIParser.h:171
This class represents lattice values for constants.
Definition: AllocatorList.h:23
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:657
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
Definition: Parser.cpp:147
void setTargetFlags(unsigned F)
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:66
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
static BranchProbability getRaw(uint32_t N)
static MCCFIInstruction createRememberState(MCSymbol *L)
.cfi_remember_state Save all current rules for all registers.
Definition: MCDwarf.h:557
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:63
const MCPhysReg * getImplicitUses() const
Return a list of registers that are potentially read by any instance of this machine instruction...
Definition: MCInstrDesc.h:548
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:179
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:507
unsigned Reg
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID...
This file contains the declarations for metadata subclasses.
unsigned getNumRegBanks() const
Get the total number of register banks.
unsigned less or equal
Definition: InstrTypes.h:758
unsigned less than
Definition: InstrTypes.h:757
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:858
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)
Try to convert a name of a MachineMemOperand target flag to the corresponding target flag...
Definition: MIParser.cpp:264
static bool verifyScalarSize(uint64_t Size)
Definition: MIParser.cpp:1507
static bool verifyVectorElementCount(uint64_t NumElts)
Definition: MIParser.cpp:1511
0 1 0 0 True if ordered and less than
Definition: InstrTypes.h:738
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
iterator find(StringRef Key)
Definition: StringMap.h:355
DenseMap< unsigned, int > StackObjectSlots
Definition: MIParser.h:170
LLT getType(unsigned Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register...
1 1 1 0 True if unordered or not equal
Definition: InstrTypes.h:748
#define error(X)
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:1165
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:392
virtual const RegisterBankInfo * getRegBankInfo() const
If the information for the register banks is available, return it.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
Metadata node.
Definition: Metadata.h:863
F(f)
Manage lifetime of a slot tracker for printing IR.
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3056
const TargetRegisterClass * RC
Definition: MIParser.h:40
void setTarget(const TargetSubtargetInfo &NewSubtarget)
Definition: MIParser.cpp:85
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:494
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, const DebugLoc &DL, bool NoImp=false)
CreateMachineInstr - Allocate a new MachineInstr.
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:501
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:67
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
const TargetRegisterClass * getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1517
static Constant * getNullValue(Type *Ty)
Constructor to create a &#39;0&#39; constant of arbitrary type.
Definition: Constants.cpp:289
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register)
.cfi_undefined From now on the previous value of Register can&#39;t be restored anymore.
Definition: MCDwarf.h:546
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:195
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
1 0 0 1 True if unordered or equal
Definition: InstrTypes.h:743
Holds all the information related to register banks.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:549
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:742
std::map< unsigned, TrackingMDNodeRef > MetadataNodes
Definition: SlotMapping.h:34
A description of a memory reference used in the backend.
std::string toString(Error E)
Write all error messages (if any) in E to a string.
Definition: Error.h:986
StringMap< VRegInfo * > VRegInfosNamed
Definition: MIParser.h:168
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
const HexagonInstrInfo * TII
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2974
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
LLVM_NODISCARD StringRef drop_front(size_t N=1) const
Return a StringRef equal to &#39;this&#39; but with the first N elements dropped.
Definition: StringRef.h:634
VRegInfo & getVRegInfoNamed(StringRef RegName)
Definition: MIParser.cpp:334
static bool verifyAddrSpace(uint64_t AddrSpace)
Definition: MIParser.cpp:1515
support::ulittle32_t Word
Definition: IRSymtab.h:50
unsigned SubReg
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:181
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:83
0 1 0 1 True if ordered and less than or equal
Definition: InstrTypes.h:739
The memory access is dereferenceable (i.e., doesn&#39;t trap).
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
mir Rename Register Operands
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
This file implements a class to represent arbitrary precision integral constant values and operations...
AtomicOrdering
Atomic ordering for LLVM&#39;s memory model.
unsigned getNumRegClasses() const
DenseMap< unsigned, int > FixedStackObjectSlots
Definition: MIParser.h:169
static std::string getRegisterName(const TargetRegisterInfo *TRI, unsigned Reg)
Definition: MIParser.cpp:1080
const MemoryBuffer * getMemoryBuffer(unsigned i) const
Definition: SourceMgr.h:132
#define UINT64_MAX
Definition: DataTypes.h:83
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:246
PseudoSourceValueManager & getPSVManager() const
virtual unsigned lookupName(const char *Name, unsigned Len) const =0
Look up target intrinsic by name.
GlobalValue * getNamedValue(StringRef Name) const
Return the global value in the module with the specified name, of arbitrary type. ...
Definition: Module.cpp:113
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
LLVM_NODISCARD size_t size() const
size - Get the string size.
Definition: StringRef.h:144
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
void setPostInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just after the instruction itself.
virtual const TargetInstrInfo * getInstrInfo() const
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3074
static MachineOperand CreatePredicate(unsigned Pred)
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const PseudoSourceValue * getFixedStack(int FI)
Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot...
Analysis containing CSE Info
Definition: CSEInfo.cpp:20
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:19
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:131
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:150
unsigned getMainFileID() const
Definition: SourceMgr.h:141
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
Definition: MIParser.cpp:221
MCContext & getContext() const
The memory access is volatile.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register)
.cfi_same_value Current value of Register is the same as in the previous frame.
Definition: MCDwarf.h:552
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1165
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:42
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3080
static MCCFIInstruction createNegateRAState(MCSymbol *L)
.cfi_negate_ra_state AArch64 negate RA state.
Definition: MCDwarf.h:533
const MCPhysReg * getImplicitDefs() const
Return a list of registers that are potentially written by any instance of this machine instruction...
Definition: MCInstrDesc.h:570
const uint32_t * getRegMask(StringRef Identifier)
Check if the given identifier is a name of a register mask.
Definition: MIParser.cpp:165
unsigned const MachineRegisterInfo * MRI
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
Definition: MIParser.cpp:1075
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:480
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a bitmask target flag to the corresponding target flag.
Definition: MIParser.cpp:243
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:465
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
Definition: Function.cpp:547
bool hasName() const
Definition: Value.h:252
LLVM Basic Block Representation.
Definition: BasicBlock.h:57
const PseudoSourceValue * getExternalSymbolCallEntry(const char *ES)
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:64
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:487
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
Definition: Constants.cpp:1465
static MachineOperand CreateFPImm(const ConstantFP *CFP)
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:148
static MCCFIInstruction createWindowSave(MCSymbol *L)
.cfi_window_save SPARC register window is saved.
Definition: MCDwarf.h:528
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:41
const TargetRegisterClass * getRegClass(StringRef Name)
Check if the given identifier is a name of a register class.
Definition: MIParser.cpp:304
This file contains the declarations for the subclasses of Constant, which represent the different fla...
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:224
unsigned getOperationEncoding(StringRef OperationEncodingString)
Definition: Dwarf.cpp:157
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:189
void setType(unsigned VReg, LLT Ty)
Set the low-level type of VReg to Ty.
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
BumpPtrAllocator Allocator
Definition: MIParser.h:160
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3068
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:301
bool isValid() const
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:732
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register...
Definition: MCDwarf.h:515
bool getRegisterByName(StringRef RegName, unsigned &Reg)
Try to convert a register name to a register number.
Definition: MIParser.cpp:123
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register)
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
Definition: MCDwarf.h:540
0 1 1 1 True if ordered (no nans)
Definition: InstrTypes.h:741
The memory access is non-temporal.
std::vector< GlobalValue * > GlobalValues
Definition: SlotMapping.h:33
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling...
Definition: SourceMgr.h:41
void setOffset(int64_t Offset)
1 1 1 1 Always true (always folded)
Definition: InstrTypes.h:749
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:205
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:844
const SlotMapping & IRSlots
Definition: MIParser.h:163
static MCCFIInstruction createRestoreState(MCSymbol *L)
.cfi_restore_state Restore the previously saved state.
Definition: MCDwarf.h:562
static UndefValue * get(Type *T)
Static factory methods - Return an &#39;undef&#39; object of the specified type.
Definition: Constants.cpp:1446
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:52
This class contains a discriminated union of information about pointers in memory operands...
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
1 1 0 1 True if unordered, less than, or equal
Definition: InstrTypes.h:747
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges=None, ArrayRef< SMFixIt > FixIts=None) const
Return an SMDiagnostic at the specified location with the specified string.
Definition: SourceMgr.cpp:163
signed greater than
Definition: InstrTypes.h:759
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
Definition: MIParser.cpp:3051
TargetIntrinsicInfo - Interface to description of machine instruction set.
Struct that holds a reference to a particular GUID in a global value summary.
The memory access writes data.
int64_t getExtValue() const
Get the correctly-extended int64_t value.
Definition: APSInt.h:93
0 0 1 0 True if ordered and greater than
Definition: InstrTypes.h:736
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.
Definition: MIParser.cpp:311
unsigned createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet...
static MachineOperand CreateMetadata(const MDNode *Meta)
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:390
void setFlags(unsigned flags)
Definition: MachineInstr.h:305
RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
enum llvm::VRegInfo::uint8_t Kind
MachineOperand class - Representation of each machine instruction operand.
1 1 0 0 True if unordered or less than
Definition: InstrTypes.h:746
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
Module.h This file contains the declarations for the Module class.
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
Definition: MIParser.cpp:1087
StringRef getMessage() const
Definition: SourceMgr.h:292
signed less than
Definition: InstrTypes.h:761
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:643
MDNode * NoAlias
The tag specifying the noalias scope.
Definition: Metadata.h:663
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
Definition: Constants.cpp:653
uint32_t * allocateRegMask()
Allocate and initialize a register mask with NumRegister bits.
This class implements the register bank concept.
Definition: RegisterBank.h:28
bool parseInstrName(StringRef InstrName, unsigned &OpCode)
Try to convert an instruction name to an opcode.
Definition: MIParser.cpp:142
const Function & getFunction() const
Return the LLVM function that this machine code represents.
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
Definition: StringMap.h:393
This interface provides simple read-only access to a block of memory, and provides simple methods for...
Definition: MemoryBuffer.h:41
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Definition: Function.h:677
bool isIntPredicate() const
Definition: InstrTypes.h:825
signed less or equal
Definition: InstrTypes.h:762
Class to represent vector types.
Definition: DerivedTypes.h:432
Target - Wrapper for Target specific information.
Class for arbitrary precision integers.
Definition: APInt.h:69
Special value supplied for machine level alias analysis.
const PseudoSourceValue * getJumpTable()
Return a pseudo source value referencing a jump table.
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register...
const PseudoSourceValue * getGlobalValueCallEntry(const GlobalValue *GV)
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:54
const PseudoSourceValue * getGOT()
Return a pseudo source value referencing the global offset table (or something the like)...
This struct contains the mappings from the slot numbers to unnamed metadata nodes, global values and types.
Definition: SlotMapping.h:32
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3086
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:36
Flags
Flags values. These may be or&#39;d together.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
The memory access reads data.
TargetSubtargetInfo - Generic base class for all target subtargets.
unsigned getSubRegIndex(StringRef Name)
Check if the given identifier is a name of a subregister index.
Definition: MIParser.cpp:182
bool Explicit
VReg was explicitly specified in the .mir file.
Definition: MIParser.h:38
Representation of each machine instruction.
Definition: MachineInstr.h:63
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
union llvm::VRegInfo::@179 D
const char * getBufferEnd() const
Definition: MemoryBuffer.h:60
int getColumnNo() const
Definition: SourceMgr.h:290
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
static IntegerType * getInt32Ty(LLVMContext &C)
Definition: Type.cpp:180
void setPreInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just prior to the instruction itself.
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:129
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:55
unsigned greater or equal
Definition: InstrTypes.h:756
This file provides utility analysis objects describing memory locations.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:44
static VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Definition: Type.cpp:614
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
unsigned VReg
Definition: MIParser.h:43
static MachineOperand CreateImm(int64_t Val)
VRegInfo & getVRegInfo(unsigned Num)
Definition: MIParser.cpp:323
#define I(x, y, z)
Definition: MD5.cpp:58
The memory access always returns the same value (or traps).
iterator end()
Definition: DenseMap.h:82
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:277
0 1 1 0 True if ordered and operands are unequal
Definition: InstrTypes.h:740
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
Definition: MIParser.h:166
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:332
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
uint32_t Size
Definition: Profile.cpp:46
static MachineOperand CreateShuffleMask(const Constant *C)
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
1 0 1 0 True if unordered or greater than
Definition: InstrTypes.h:744
constexpr bool isUInt< 16 >(uint64_t x)
Definition: MathExtras.h:382
const char * getBufferStart() const
Definition: MemoryBuffer.h:59
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
std::string str() const
Return the twine contents as a std::string.
Definition: Twine.cpp:17
bool isReg() const
isReg - Tests if this is a MO_Register operand.
LLVM_NODISCARD const char * data() const
data - Get a pointer to the start of the string (which may not be null terminated).
Definition: StringRef.h:136
bool empty() const
Definition: StringMap.h:110
const PseudoSourceValue * getStack()
Return a pseudo source value referencing the area below the stack frame of a function, e.g., the argument space.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
void setMemRefs(MachineFunction &MF, ArrayRef< MachineMemOperand *> MemRefs)
Assign this MachineInstr&#39;s memory reference descriptor list.
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
Definition: MIParser.cpp:318
0 0 0 1 True if ordered and equal
Definition: InstrTypes.h:735
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:575
LLVM Value Representation.
Definition: Value.h:74
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
A token produced by the machine instruction lexer.
Definition: MILexer.h:27
1 0 1 1 True if unordered, greater than, or equal
Definition: InstrTypes.h:745
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:69
Lightweight error class with error context and mandatory checking.
Definition: Error.h:157
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
unsigned getAttributeEncoding(StringRef EncodingString)
Definition: Dwarf.cpp:202
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
IRTranslator LLVM IR MI
unsigned greater than
Definition: InstrTypes.h:755
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
static LLT vector(uint16_t NumElements, unsigned ScalarSizeInBits)
Get a low-level vector of some number of elements and element width.
const RegisterBank * RegBank
Definition: MIParser.h:41
static llvm::Error parse(DataExtractor &Data, uint64_t BaseAddr, LineEntryCallback const &Callback)
Definition: LineTable.cpp:54
void setRegClassOrRegBank(unsigned Reg, const RegClassOrRegBank &RCOrRB)
Represents a location in source code.
Definition: SMLoc.h:23
PerTargetMIParsingState & Target
Definition: MIParser.h:164
void setIsDebug(bool Val=true)
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals)
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
Definition: MCDwarf.h:568
DenseMap< unsigned, VRegInfo * > VRegInfos
Definition: MIParser.h:167
bool parseRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3062
0 0 1 1 True if ordered and greater than or equal
Definition: InstrTypes.h:737
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value *> &Slots2Values)
Definition: MIParser.cpp:2997
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value *> &Slots2Values)
Creates the mapping from slot numbers to function&#39;s unnamed IR values.
Definition: MIParser.cpp:3006
static MachineOperand CreateFI(int Idx)
const PseudoSourceValue * getConstantPool()
Return a pseudo source value referencing the constant pool.
iterator end()
Definition: StringMap.h:340
static Constant * get(ArrayRef< Constant *> V)
Definition: Constants.cpp:1110
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2)
.cfi_register Previous value of Register1 is saved in register Register2.
Definition: MCDwarf.h:522
iterator_range< arg_iterator > args()
Definition: Function.h:724
bool isNullValue() const
Determine if all bits are clear.
Definition: APInt.h:405
0 0 0 0 Always false (always folded)
Definition: InstrTypes.h:734
signed greater or equal
Definition: InstrTypes.h:760
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:143
const MCPhysReg * ImplicitUses
Definition: MCInstrDesc.h:188
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
bool isImplicit() const
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:261
void tieOperands(unsigned DefIdx, unsigned UseIdx)
Add a tie between the register operands at DefIdx and UseIdx.