86 if (&Subtarget == &NewSubtarget)
89 Names2InstrOpCodes.
clear();
91 Names2RegMasks.
clear();
92 Names2SubRegIndices.
clear();
93 Names2TargetIndices.
clear();
94 Names2DirectTargetFlags.
clear();
95 Names2BitmaskTargetFlags.
clear();
96 Names2MMOTargetFlags.
clear();
98 initNames2RegClasses();
102void PerTargetMIParsingState::initNames2Regs() {
103 if (!Names2Regs.empty())
107 Names2Regs.insert(std::make_pair(
"noreg", 0));
109 assert(
TRI &&
"Expected target register info");
111 for (
unsigned I = 0, E =
TRI->getNumRegs();
I < E; ++
I) {
116 assert(WasInserted &&
"Expected registers to be unique case-insensitively");
123 auto RegInfo = Names2Regs.find(
RegName);
124 if (RegInfo == Names2Regs.end())
126 Reg = RegInfo->getValue();
130void PerTargetMIParsingState::initNames2InstrOpCodes() {
131 if (!Names2InstrOpCodes.
empty())
134 assert(
TII &&
"Expected target instruction info");
135 for (
unsigned I = 0, E =
TII->getNumOpcodes();
I < E; ++
I)
141 initNames2InstrOpCodes();
142 auto InstrInfo = Names2InstrOpCodes.
find(InstrName);
143 if (InstrInfo == Names2InstrOpCodes.
end())
145 OpCode = InstrInfo->getValue();
149void PerTargetMIParsingState::initNames2RegMasks() {
150 if (!Names2RegMasks.
empty())
153 assert(
TRI &&
"Expected target register info");
157 for (
size_t I = 0, E = RegMasks.
size();
I < E; ++
I)
159 std::make_pair(
StringRef(RegMaskNames[
I]).lower(), RegMasks[
I]));
163 initNames2RegMasks();
164 auto RegMaskInfo = Names2RegMasks.
find(Identifier);
165 if (RegMaskInfo == Names2RegMasks.
end())
167 return RegMaskInfo->getValue();
170void PerTargetMIParsingState::initNames2SubRegIndices() {
171 if (!Names2SubRegIndices.
empty())
174 for (
unsigned I = 1, E =
TRI->getNumSubRegIndices();
I < E; ++
I)
175 Names2SubRegIndices.
insert(
176 std::make_pair(
TRI->getSubRegIndexName(
I),
I));
180 initNames2SubRegIndices();
181 auto SubRegInfo = Names2SubRegIndices.
find(
Name);
182 if (SubRegInfo == Names2SubRegIndices.
end())
184 return SubRegInfo->getValue();
187void PerTargetMIParsingState::initNames2TargetIndices() {
188 if (!Names2TargetIndices.
empty())
191 assert(
TII &&
"Expected target instruction info");
192 auto Indices =
TII->getSerializableTargetIndices();
193 for (
const auto &
I : Indices)
198 initNames2TargetIndices();
199 auto IndexInfo = Names2TargetIndices.
find(
Name);
200 if (IndexInfo == Names2TargetIndices.
end())
202 Index = IndexInfo->second;
206void PerTargetMIParsingState::initNames2DirectTargetFlags() {
207 if (!Names2DirectTargetFlags.
empty())
211 assert(
TII &&
"Expected target instruction info");
213 for (
const auto &
I : Flags)
214 Names2DirectTargetFlags.
insert(
220 initNames2DirectTargetFlags();
221 auto FlagInfo = Names2DirectTargetFlags.
find(
Name);
222 if (FlagInfo == Names2DirectTargetFlags.
end())
224 Flag = FlagInfo->second;
228void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
229 if (!Names2BitmaskTargetFlags.
empty())
233 assert(
TII &&
"Expected target instruction info");
235 for (
const auto &
I : Flags)
236 Names2BitmaskTargetFlags.
insert(
242 initNames2BitmaskTargetFlags();
243 auto FlagInfo = Names2BitmaskTargetFlags.
find(
Name);
244 if (FlagInfo == Names2BitmaskTargetFlags.
end())
246 Flag = FlagInfo->second;
250void PerTargetMIParsingState::initNames2MMOTargetFlags() {
251 if (!Names2MMOTargetFlags.
empty())
255 assert(
TII &&
"Expected target instruction info");
256 auto Flags =
TII->getSerializableMachineMemOperandTargetFlags();
257 for (
const auto &
I : Flags)
263 initNames2MMOTargetFlags();
264 auto FlagInfo = Names2MMOTargetFlags.
find(
Name);
265 if (FlagInfo == Names2MMOTargetFlags.
end())
267 Flag = FlagInfo->second;
271void PerTargetMIParsingState::initNames2RegClasses() {
272 if (!Names2RegClasses.
empty())
276 for (
unsigned I = 0, E =
TRI->getNumRegClasses();
I < E; ++
I) {
277 const auto *RC =
TRI->getRegClass(
I);
283void PerTargetMIParsingState::initNames2RegBanks() {
284 if (!Names2RegBanks.
empty())
302 auto RegClassInfo = Names2RegClasses.
find(
Name);
303 if (RegClassInfo == Names2RegClasses.
end())
305 return RegClassInfo->getValue();
309 auto RegBankInfo = Names2RegBanks.
find(
Name);
310 if (RegBankInfo == Names2RegBanks.
end())
312 return RegBankInfo->getValue();
317 : MF(MF), SM(&SM), IRSlots(IRSlots),
Target(
T) {
321 auto I =
VRegInfos.insert(std::make_pair(Num,
nullptr));
325 Info->VReg =
MRI.createIncompleteVirtualRegister();
326 I.first->second =
Info;
328 return *
I.first->second;
338 I.first->second =
Info;
340 return *
I.first->second;
348 Slots2Values.
insert(std::make_pair(
unsigned(Slot), V));
356 for (
const auto &Arg :
F.args())
358 for (
const auto &BB :
F) {
360 for (
const auto &
I : BB)
375struct ParsedMachineOperand {
379 std::optional<unsigned> TiedDefIdx;
383 std::optional<unsigned> &TiedDefIdx)
384 : Operand(Operand), Begin(Begin),
End(
End), TiedDefIdx(TiedDefIdx) {
387 "Only used register operands can be tied");
409 void lex(
unsigned SkipChar = 0);
423 bool parseBasicBlocks();
429 bool parseStandaloneStackObject(
int &FI);
432 bool parseMDTuple(
MDNode *&MD,
bool IsDistinct);
447 bool parseRegisterFlag(
unsigned &Flags);
449 bool parseSubRegisterIndex(
unsigned &
SubReg);
450 bool parseRegisterTiedDefIndex(
unsigned &TiedDefIdx);
452 std::optional<unsigned> &TiedDefIdx,
463 bool parseStackFrameIndex(
int &FI);
465 bool parseFixedStackFrameIndex(
int &FI);
475 bool parseDIExpression(
MDNode *&Expr);
476 bool parseDILocation(
MDNode *&Expr);
478 bool parseCFIOffset(
int &
Offset);
481 bool parseCFIEscapeValues(std::string& Values);
492 bool parseMachineOperand(
const unsigned OpCode,
const unsigned OpIdx,
494 std::optional<unsigned> &TiedDefIdx);
495 bool parseMachineOperandAndTargetFlags(
const unsigned OpCode,
496 const unsigned OpIdx,
498 std::optional<unsigned> &TiedDefIdx);
499 bool parseOffset(int64_t &
Offset);
500 bool parseIRBlockAddressTaken(
BasicBlock *&BB);
501 bool parseAlignment(
uint64_t &Alignment);
502 bool parseAddrspace(
unsigned &Addrspace);
503 bool parseSectionID(std::optional<MBBSectionID> &SID);
504 bool parseBBID(std::optional<UniqueBBID> &BBID);
505 bool parseCallFrameSize(
unsigned &CallFrameSize);
514 bool parsePreOrPostInstrSymbol(
MCSymbol *&Symbol);
518 bool parseTargetImmMnemonic(
const unsigned OpCode,
const unsigned OpIdx,
546 bool parseInstruction(
unsigned &OpCode,
unsigned &Flags);
562 bool parseStringConstant(std::string &Result);
579 SourceRange(SourceRange), PFS(PFS) {}
581void MIParser::lex(
unsigned SkipChar) {
587bool MIParser::error(
const Twine &Msg) {
return error(Token.location(), Msg); }
602 Source, std::nullopt, std::nullopt);
607 assert(SourceRange.isValid() &&
"Invalid source range");
629 return "<unknown token>";
634 if (Token.isNot(TokenKind))
641 if (Token.isNot(TokenKind))
648bool MIParser::parseSectionID(std::optional<MBBSectionID> &SID) {
654 return error(
"Unknown Section ID");
657 const StringRef &S = Token.stringValue();
658 if (S ==
"Exception")
660 else if (S ==
"Cold")
663 return error(
"Unknown Section ID");
670bool MIParser::parseBBID(std::optional<UniqueBBID> &BBID) {
674 unsigned CloneID = 0;
676 return error(
"Unknown BB ID");
680 return error(
"Unknown Clone ID");
683 BBID = {BaseID, CloneID};
688bool MIParser::parseCallFrameSize(
unsigned &CallFrameSize) {
693 return error(
"Unknown call frame size");
694 CallFrameSize =
Value;
699bool MIParser::parseBasicBlockDefinition(
705 auto Loc = Token.location();
706 auto Name = Token.stringValue();
708 bool MachineBlockAddressTaken =
false;
710 bool IsLandingPad =
false;
711 bool IsInlineAsmBrIndirectTarget =
false;
712 bool IsEHFuncletEntry =
false;
713 std::optional<MBBSectionID> SectionID;
715 std::optional<UniqueBBID> BBID;
716 unsigned CallFrameSize = 0;
721 switch (Token.kind()) {
723 MachineBlockAddressTaken =
true;
727 if (parseIRBlockAddressTaken(AddressTakenIRBlock))
735 IsInlineAsmBrIndirectTarget =
true;
739 IsEHFuncletEntry =
true;
743 if (parseAlignment(Alignment))
749 if (parseIRBlock(BB, MF.getFunction()))
754 if (parseSectionID(SectionID))
762 if (parseCallFrameSize(CallFrameSize))
776 BB = dyn_cast_or_null<BasicBlock>(
777 MF.getFunction().getValueSymbolTable()->lookup(
Name));
780 "' is not defined in the function '" +
783 auto *
MBB = MF.CreateMachineBasicBlock(BB);
785 bool WasInserted = MBBSlots.
insert(std::make_pair(
ID,
MBB)).second;
787 return error(Loc,
Twine(
"redefinition of machine basic block with id #") +
791 if (MachineBlockAddressTaken)
793 if (AddressTakenIRBlock)
802 if (BBID.has_value()) {
805 if (!MF.hasBBSections())
813bool MIParser::parseBasicBlockDefinitions(
819 if (Token.isErrorOrEOF())
820 return Token.isError();
822 return error(
"expected a basic block definition before instructions");
823 unsigned BraceDepth = 0;
825 if (parseBasicBlockDefinition(MBBSlots))
827 bool IsAfterNewline =
false;
831 Token.isErrorOrEOF())
834 return error(
"basic block definition should be located at the start of "
837 IsAfterNewline =
true;
840 IsAfterNewline =
false;
845 return error(
"extraneous closing brace ('}')");
851 if (!Token.isError() && BraceDepth)
852 return error(
"expected '}'");
853 }
while (!Token.isErrorOrEOF());
854 return Token.isError();
862 if (Token.isNewlineOrEOF())
866 return error(
"expected a named register");
868 if (parseNamedRegister(Reg))
876 return error(
"expected a lane mask");
878 "Use correct get-function for lane mask");
881 return error(
"invalid lane mask value");
895 if (Token.isNewlineOrEOF())
899 return error(
"expected a machine basic block reference");
908 return error(
"expected an integer literal after '('");
942 bool ExplicitSuccessors =
false;
945 if (parseBasicBlockSuccessors(
MBB))
947 ExplicitSuccessors =
true;
949 if (parseBasicBlockLiveins(
MBB))
955 if (!Token.isNewlineOrEOF())
956 return error(
"expected line break at the end of a list");
961 bool IsInBundle =
false;
985 return error(
"nested instruction bundles are not allowed");
994 assert(Token.isNewlineOrEOF() &&
"MI is not fully parsed");
999 if (!ExplicitSuccessors) {
1006 if (IsFallthrough) {
1007 AddFalthroughFrom = &
MBB;
1016bool MIParser::parseBasicBlocks() {
1021 if (Token.isErrorOrEOF())
1022 return Token.isError();
1031 if (AddFalthroughFrom) {
1035 AddFalthroughFrom =
nullptr;
1037 if (parseBasicBlock(*
MBB, AddFalthroughFrom))
1050 while (Token.isRegister() || Token.isRegisterFlag()) {
1051 auto Loc = Token.location();
1052 std::optional<unsigned> TiedDefIdx;
1053 if (parseRegisterOperand(MO, TiedDefIdx,
true))
1056 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1064 unsigned OpCode,
Flags = 0;
1065 if (Token.isError() || parseInstruction(OpCode, Flags))
1077 auto Loc = Token.location();
1078 std::optional<unsigned> TiedDefIdx;
1079 if (parseMachineOperandAndTargetFlags(OpCode,
Operands.size(), MO, TiedDefIdx))
1082 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1087 return error(
"expected ',' before the next machine operand");
1091 MCSymbol *PreInstrSymbol =
nullptr;
1093 if (parsePreOrPostInstrSymbol(PreInstrSymbol))
1095 MCSymbol *PostInstrSymbol =
nullptr;
1097 if (parsePreOrPostInstrSymbol(PostInstrSymbol))
1099 MDNode *HeapAllocMarker =
nullptr;
1101 if (parseHeapAllocMarker(HeapAllocMarker))
1103 MDNode *PCSections =
nullptr;
1105 if (parsePCSections(PCSections))
1108 unsigned CFIType = 0;
1112 return error(
"expected an integer literal after 'cfi-type'");
1122 unsigned InstrNum = 0;
1126 return error(
"expected an integer literal after 'debug-instr-number'");
1143 if (parseDILocation(
Node))
1146 return error(
"expected a metadata node after 'debug-location'");
1147 if (!isa<DILocation>(
Node))
1148 return error(
"referenced metadata is not a DILocation");
1156 while (!Token.isNewlineOrEOF()) {
1158 if (parseMachineMemoryOperand(
MemOp))
1161 if (Token.isNewlineOrEOF())
1164 return error(
"expected ',' before the next machine memory operand");
1169 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
1170 if (!MCID.isVariadic()) {
1172 if (verifyImplicitOperands(
Operands, MCID))
1176 MI = MF.CreateMachineInstr(MCID, DebugLocation,
true);
1177 MI->setFlags(Flags);
1181 for (
const auto &Operand :
Operands)
1182 MI->addOperand(MF, Operand.Operand);
1187 MI->setPreInstrSymbol(MF, PreInstrSymbol);
1188 if (PostInstrSymbol)
1189 MI->setPostInstrSymbol(MF, PostInstrSymbol);
1190 if (HeapAllocMarker)
1191 MI->setHeapAllocMarker(MF, HeapAllocMarker);
1193 MI->setPCSections(MF, PCSections);
1195 MI->setCFIType(MF, CFIType);
1196 if (!MemOperands.
empty())
1197 MI->setMemRefs(MF, MemOperands);
1199 MI->setDebugInstrNum(InstrNum);
1206 return error(
"expected a machine basic block reference");
1212 "expected end of string after the machine basic block reference");
1216bool MIParser::parseStandaloneNamedRegister(
Register &Reg) {
1219 return error(
"expected a named register");
1220 if (parseNamedRegister(Reg))
1224 return error(
"expected end of string after the register reference");
1228bool MIParser::parseStandaloneVirtualRegister(
VRegInfo *&Info) {
1231 return error(
"expected a virtual register");
1232 if (parseVirtualRegister(Info))
1236 return error(
"expected end of string after the register reference");
1240bool MIParser::parseStandaloneRegister(
Register &Reg) {
1244 return error(
"expected either a named or virtual register");
1247 if (parseRegister(Reg, Info))
1252 return error(
"expected end of string after the register reference");
1256bool MIParser::parseStandaloneStackObject(
int &FI) {
1259 return error(
"expected a stack object");
1260 if (parseStackFrameIndex(FI))
1263 return error(
"expected end of string after the stack object reference");
1267bool MIParser::parseStandaloneMDNode(
MDNode *&
Node) {
1273 if (parseDIExpression(
Node))
1276 if (parseDILocation(
Node))
1279 return error(
"expected a metadata node");
1281 return error(
"expected end of string after the metadata node");
1285bool MIParser::parseMachineMetadata() {
1288 return error(
"expected a metadata node");
1292 return error(
"expected metadata id after '!'");
1303 return error(
"expected a metadata node");
1307 if (parseMDTuple(MD, IsDistinct))
1310 auto FI = PFS.MachineForwardRefMDNodes.find(
ID);
1311 if (FI != PFS.MachineForwardRefMDNodes.end()) {
1313 PFS.MachineForwardRefMDNodes.erase(FI);
1315 assert(PFS.MachineMetadataNodes[
ID] == MD &&
"Tracking VH didn't work");
1317 if (PFS.MachineMetadataNodes.count(
ID))
1318 return error(
"Metadata id is already used");
1319 PFS.MachineMetadataNodes[
ID].reset(MD);
1325bool MIParser::parseMDTuple(
MDNode *&MD,
bool IsDistinct) {
1327 if (parseMDNodeVector(Elts))
1336 return error(
"expected '{' here");
1357 return error(
"expected end of metadata node");
1365bool MIParser::parseMetadata(
Metadata *&MD) {
1367 return error(
"expected '!' here");
1372 if (parseStringConstant(Str))
1379 return error(
"expected metadata id after '!'");
1381 SMLoc Loc = mapSMLoc(Token.location());
1388 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(
ID);
1389 if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {
1390 MD = NodeInfo->second.get();
1394 NodeInfo = PFS.MachineMetadataNodes.find(
ID);
1395 if (NodeInfo != PFS.MachineMetadataNodes.end()) {
1396 MD = NodeInfo->second.get();
1400 auto &FwdRef = PFS.MachineForwardRefMDNodes[
ID];
1401 FwdRef = std::make_pair(
1403 PFS.MachineMetadataNodes[
ID].reset(FwdRef.first.get());
1404 MD = FwdRef.first.get();
1411 return MO.
isDef() ?
"implicit-def" :
"implicit";
1416 assert(Reg.isPhysical() &&
"expected phys reg");
1444 const auto *
TRI = MF.getSubtarget().getRegisterInfo();
1445 assert(
TRI &&
"Expected target register info");
1446 for (
const auto &
I : ImplicitOperands) {
1450 Twine(
"missing implicit register operand '") +
1457bool MIParser::parseInstruction(
unsigned &OpCode,
unsigned &Flags) {
1517 return error(
"expected a machine instruction");
1518 StringRef InstrName = Token.stringValue();
1519 if (PFS.Target.parseInstrName(InstrName, OpCode))
1520 return error(
Twine(
"unknown machine instruction name '") + InstrName +
"'");
1525bool MIParser::parseNamedRegister(
Register &Reg) {
1528 if (PFS.Target.getRegisterByName(
Name, Reg))
1533bool MIParser::parseNamedVirtualRegister(
VRegInfo *&Info) {
1538 Info = &PFS.getVRegInfoNamed(
Name);
1542bool MIParser::parseVirtualRegister(
VRegInfo *&Info) {
1544 return parseNamedVirtualRegister(Info);
1549 Info = &PFS.getVRegInfo(
ID);
1554 switch (Token.kind()) {
1559 return parseNamedRegister(Reg);
1562 if (parseVirtualRegister(Info))
1574 return error(
"expected '_', register class, or register bank name");
1589 return error(Loc,
Twine(
"conflicting register classes, previously: ") +
1598 return error(Loc,
"register class specification on generic register");
1606 RegBank = PFS.Target.getRegBank(
Name);
1608 return error(Loc,
"expected '_', register class, or register bank name");
1619 return error(Loc,
"conflicting generic register banks");
1625 return error(Loc,
"register bank specification on normal register");
1630bool MIParser::parseRegisterFlag(
unsigned &Flags) {
1631 const unsigned OldFlags =
Flags;
1632 switch (Token.kind()) {
1666 if (OldFlags == Flags)
1669 return error(
"duplicate '" + Token.stringValue() +
"' register flag");
1674bool MIParser::parseSubRegisterIndex(
unsigned &
SubReg) {
1678 return error(
"expected a subregister index after '.'");
1679 auto Name = Token.stringValue();
1682 return error(
Twine(
"use of unknown subregister index '") +
Name +
"'");
1687bool MIParser::parseRegisterTiedDefIndex(
unsigned &TiedDefIdx) {
1691 return error(
"expected an integer literal after 'tied-def'");
1703 for (
unsigned I = 0, E =
Operands.size();
I != E; ++
I) {
1708 unsigned DefIdx = *
Operands[
I].TiedDefIdx;
1711 Twine(
"use of invalid tied-def operand index '" +
1712 Twine(DefIdx) +
"'; instruction has only ") +
1713 Twine(E) +
" operands");
1714 const auto &DefOperand =
Operands[DefIdx].Operand;
1715 if (!DefOperand.isReg() || !DefOperand.isDef())
1718 Twine(
"use of invalid tied-def operand index '") +
1719 Twine(DefIdx) +
"'; the operand #" +
Twine(DefIdx) +
1720 " isn't a defined register");
1722 for (
const auto &TiedPair : TiedRegisterPairs) {
1723 if (TiedPair.first == DefIdx)
1725 Twine(
"the tied-def operand #") +
Twine(DefIdx) +
1726 " is already tied with another register operand");
1728 TiedRegisterPairs.push_back(std::make_pair(DefIdx,
I));
1732 for (
const auto &TiedPair : TiedRegisterPairs)
1733 MI.tieOperands(TiedPair.first, TiedPair.second);
1738 std::optional<unsigned> &TiedDefIdx,
1741 while (Token.isRegisterFlag()) {
1742 if (parseRegisterFlag(Flags))
1745 if (!Token.isRegister())
1746 return error(
"expected a register after register flags");
1749 if (parseRegister(Reg,
RegInfo))
1754 if (parseSubRegisterIndex(
SubReg))
1756 if (!
Reg.isVirtual())
1757 return error(
"subregister index expects a virtual register");
1760 if (!
Reg.isVirtual())
1761 return error(
"register class specification expects a virtual register");
1763 if (parseRegisterClassOrBank(*
RegInfo))
1770 if (!parseRegisterTiedDefIndex(
Idx))
1775 if (parseLowLevelType(Token.location(), Ty))
1776 return error(
"expected tied-def or low-level type after '('");
1781 if (
MRI.getType(Reg).isValid() &&
MRI.getType(Reg) != Ty)
1782 return error(
"inconsistent type for generic virtual register");
1785 MRI.setType(Reg, Ty);
1790 if (!
Reg.isVirtual())
1791 return error(
"unexpected type on physical register");
1794 if (parseLowLevelType(Token.location(), Ty))
1800 if (
MRI.getType(Reg).isValid() &&
MRI.getType(Reg) != Ty)
1801 return error(
"inconsistent type for generic virtual register");
1804 MRI.setType(Reg, Ty);
1805 }
else if (
Reg.isVirtual()) {
1811 return error(
"generic virtual registers must have a type");
1816 return error(
"cannot have a killed def operand");
1819 return error(
"cannot have a dead use operand");
1833 const APSInt &
Int = Token.integerValue();
1834 if (
auto SImm =
Int.trySExtValue();
Int.isSigned() && SImm.has_value())
1836 else if (
auto UImm =
Int.tryZExtValue(); !
Int.isSigned() && UImm.has_value())
1839 return error(
"integer literal is too large to be an immediate operand");
1844bool MIParser::parseTargetImmMnemonic(
const unsigned OpCode,
1845 const unsigned OpIdx,
1849 auto Loc = Token.location();
1855 Len += Token.range().size();
1864 Src =
StringRef(Loc, Len + Token.stringValue().size());
1869 ->
bool { return error(Loc, Msg); }))
1881 auto Source = StringValue.
str();
1886 return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());
1892 return ::parseIRConstant(
1893 Loc, StringValue, PFS,
C,
1895 return error(Loc, Msg);
1908 return Size != 0 && isUInt<16>(
Size);
1912 return NumElts != 0 && isUInt<16>(NumElts);
1916 return isUInt<24>(AddrSpace);
1920 if (Token.range().front() ==
's' || Token.range().front() ==
'p') {
1923 return error(
"expected integers after 's'/'p' type character");
1926 if (Token.range().front() ==
's') {
1930 return error(
"invalid size for scalar type");
1937 }
else if (Token.range().front() ==
'p') {
1941 return error(
"invalid address space number");
1950 return error(Loc,
"expected sN, pA, <M x sN>, <M x pA>, <vscale x M x sN>, "
1951 "or <vscale x M x pA> for GlobalISel type");
1959 return error(
"expected <vscale x M x sN> or <vscale x M x pA>");
1963 auto GetError = [
this, &HasVScale, Loc]() {
1966 Loc,
"expected <vscale x M x sN> or <vscale M x pA> for vector type");
1967 return error(Loc,
"expected <M x sN> or <M x pA> for vector type");
1972 uint64_t NumElements = Token.integerValue().getZExtValue();
1974 return error(
"invalid number of vector elements");
1982 if (Token.range().front() !=
's' && Token.range().front() !=
'p')
1987 return error(
"expected integers after 's'/'p' type character");
1989 if (Token.range().front() ==
's') {
1992 return error(
"invalid size for scalar element in vector");
1994 }
else if (Token.range().front() ==
'p') {
1998 return error(
"invalid address space number");
2017 if (TypeStr.
front() !=
'i' && TypeStr.
front() !=
's' &&
2018 TypeStr.
front() !=
'p')
2020 "a typed immediate operand should start with one of 'i', 's', or 'p'");
2023 return error(
"expected integers after 'i'/'s'/'p' type character");
2025 auto Loc = Token.location();
2029 !(Token.range() ==
"true" || Token.range() ==
"false"))
2030 return error(
"expected an integer literal");
2040 auto Loc = Token.location();
2044 return error(
"expected a floating point literal");
2055 assert(S[0] ==
'0' && tolower(S[1]) ==
'x');
2057 if (!isxdigit(S[2]))
2060 APInt A(V.size()*4, V, 16);
2064 unsigned NumBits = (
A == 0) ? 32 :
A.getActiveBits();
2075 return ErrCB(Token.
location(),
"expected 32-bit integer (too large)");
2083 if (
A.getBitWidth() > 32)
2084 return ErrCB(Token.
location(),
"expected 32-bit integer (too large)");
2085 Result =
A.getZExtValue();
2091bool MIParser::getUnsigned(
unsigned &Result) {
2092 return ::getUnsigned(
2094 return error(Loc, Msg);
2104 auto MBBInfo = PFS.MBBSlots.find(
Number);
2105 if (MBBInfo == PFS.MBBSlots.end())
2106 return error(
Twine(
"use of undefined machine basic block #") +
2108 MBB = MBBInfo->second;
2111 if (!Token.stringValue().empty() && Token.stringValue() !=
MBB->
getName())
2113 " isn't '" + Token.stringValue() +
"'");
2126bool MIParser::parseStackFrameIndex(
int &FI) {
2131 auto ObjectInfo = PFS.StackObjectSlots.find(
ID);
2132 if (ObjectInfo == PFS.StackObjectSlots.end())
2136 if (
const auto *Alloca =
2137 MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
2138 Name = Alloca->getName();
2139 if (!Token.stringValue().empty() && Token.stringValue() !=
Name)
2141 "' isn't '" + Token.stringValue() +
"'");
2143 FI = ObjectInfo->second;
2149 if (parseStackFrameIndex(FI))
2155bool MIParser::parseFixedStackFrameIndex(
int &FI) {
2160 auto ObjectInfo = PFS.FixedStackObjectSlots.find(
ID);
2161 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
2162 return error(
Twine(
"use of undefined fixed stack object '%fixed-stack.") +
2165 FI = ObjectInfo->second;
2169bool MIParser::parseFixedStackObjectOperand(
MachineOperand &Dest) {
2171 if (parseFixedStackFrameIndex(FI))
2180 switch (Token.
kind()) {
2185 return ErrCB(Token.
location(),
Twine(
"use of undefined global value '") +
2186 Token.
range() +
"'");
2195 return ErrCB(Token.
location(),
Twine(
"use of undefined global value '@") +
2196 Twine(GVIdx) +
"'");
2205bool MIParser::parseGlobalValue(
GlobalValue *&GV) {
2206 return ::parseGlobalValue(
2209 return error(Loc, Msg);
2219 if (parseOperandsOffset(Dest))
2224bool MIParser::parseConstantPoolIndexOperand(
MachineOperand &Dest) {
2231 return error(
"use of undefined constant '%const." +
Twine(
ID) +
"'");
2234 if (parseOperandsOffset(Dest))
2244 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(
ID);
2245 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
2246 return error(
"use of undefined jump table '%jump-table." +
Twine(
ID) +
"'");
2254 const char *
Symbol = MF.createExternalSymbolName(Token.stringValue());
2257 if (parseOperandsOffset(Dest))
2267 if (parseOperandsOffset(Dest))
2272bool MIParser::parseSubRegisterIndexOperand(
MachineOperand &Dest) {
2275 unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
2276 if (SubRegIndex == 0)
2286 auto Loc = Token.location();
2289 return error(
"expected metadata id after '!'");
2293 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(
ID);
2294 if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {
2295 NodeInfo = PFS.MachineMetadataNodes.find(
ID);
2296 if (NodeInfo == PFS.MachineMetadataNodes.end())
2297 return error(Loc,
"use of undefined metadata '!" +
Twine(
ID) +
"'");
2300 Node = NodeInfo->second.get();
2304bool MIParser::parseDIExpression(
MDNode *&Expr) {
2327 return error(
Twine(
"invalid DWARF op '") + Token.stringValue() +
"'");
2331 Token.integerValue().isSigned())
2332 return error(
"expected unsigned integer");
2334 auto &
U = Token.integerValue();
2350bool MIParser::parseDILocation(
MDNode *&Loc) {
2354 bool HaveLine =
false;
2356 unsigned Column = 0;
2358 MDNode *InlinedAt =
nullptr;
2359 bool ImplicitCode =
false;
2367 if (Token.stringValue() ==
"line") {
2372 Token.integerValue().isSigned())
2373 return error(
"expected unsigned integer");
2374 Line = Token.integerValue().getZExtValue();
2379 if (Token.stringValue() ==
"column") {
2384 Token.integerValue().isSigned())
2385 return error(
"expected unsigned integer");
2386 Column = Token.integerValue().getZExtValue();
2390 if (Token.stringValue() ==
"scope") {
2395 return error(
"expected metadata node");
2396 if (!isa<DIScope>(Scope))
2397 return error(
"expected DIScope node");
2400 if (Token.stringValue() ==
"inlinedAt") {
2408 if (parseDILocation(InlinedAt))
2411 return error(
"expected metadata node");
2412 if (!isa<DILocation>(InlinedAt))
2413 return error(
"expected DILocation node");
2416 if (Token.stringValue() ==
"isImplicitCode") {
2421 return error(
"expected true/false");
2425 if (Token.stringValue() ==
"true")
2426 ImplicitCode =
true;
2427 else if (Token.stringValue() ==
"false")
2428 ImplicitCode =
false;
2430 return error(
"expected true/false");
2435 return error(
Twine(
"invalid DILocation argument '") +
2436 Token.stringValue() +
"'");
2444 return error(
"DILocation requires line number");
2446 return error(
"DILocation requires a scope");
2448 Loc =
DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
2449 InlinedAt, ImplicitCode);
2459 if (parseDIExpression(
Node))
2466bool MIParser::parseCFIOffset(
int &
Offset) {
2468 return error(
"expected a cfi offset");
2469 if (Token.integerValue().getSignificantBits() > 32)
2470 return error(
"expected a 32 bit integer (the cfi offset is too large)");
2471 Offset = (int)Token.integerValue().getExtValue();
2476bool MIParser::parseCFIRegister(
Register &Reg) {
2478 return error(
"expected a cfi register");
2480 if (parseNamedRegister(LLVMReg))
2482 const auto *
TRI = MF.getSubtarget().getRegisterInfo();
2483 assert(
TRI &&
"Expected target register info");
2484 int DwarfReg =
TRI->getDwarfRegNum(LLVMReg,
true);
2486 return error(
"invalid DWARF register");
2492bool MIParser::parseCFIAddressSpace(
unsigned &
AddressSpace) {
2494 return error(
"expected a cfi address space literal");
2495 if (Token.integerValue().isSigned())
2496 return error(
"expected an unsigned integer (cfi address space)");
2502bool MIParser::parseCFIEscapeValues(std::string &Values) {
2505 return error(
"expected a hexadecimal literal");
2509 if (
Value > UINT8_MAX)
2510 return error(
"expected a 8-bit integer (too large)");
2511 Values.push_back(
static_cast<uint8_t
>(
Value));
2518 auto Kind = Token.kind();
2526 if (parseCFIRegister(Reg))
2541 CFIIndex = MF.addFrameInst(
2545 if (parseCFIRegister(Reg))
2551 if (parseCFIOffset(
Offset))
2557 if (parseCFIOffset(
Offset))
2559 CFIIndex = MF.addFrameInst(
2581 if (parseCFIRegister(Reg))
2589 if (parseCFIRegister(Reg))
2596 parseCFIRegister(Reg2))
2611 if (parseCFIEscapeValues(Values))
2625 switch (Token.kind()) {
2627 BB = dyn_cast_or_null<BasicBlock>(
2628 F.getValueSymbolTable()->lookup(Token.stringValue()));
2630 return error(
Twine(
"use of undefined IR block '") + Token.range() +
"'");
2634 unsigned SlotNumber = 0;
2637 BB =
const_cast<BasicBlock *
>(getIRBlock(SlotNumber,
F));
2639 return error(
Twine(
"use of undefined IR block '%ir-block.") +
2640 Twine(SlotNumber) +
"'");
2656 return error(
"expected a global value");
2660 auto *
F = dyn_cast<Function>(GV);
2662 return error(
"expected an IR function reference");
2668 return error(
"expected an IR block reference");
2669 if (parseIRBlock(BB, *
F))
2675 if (parseOperandsOffset(Dest))
2684 return error(
"expected syntax intrinsic(@llvm.whatever)");
2687 return error(
"expected syntax intrinsic(@llvm.whatever)");
2689 std::string
Name = std::string(Token.stringValue());
2693 return error(
"expected ')' to terminate intrinsic name");
2703 return error(
"unknown intrinsic name");
2715 return error(
"expected syntax intpred(whatever) or floatpred(whatever");
2718 return error(
"whatever");
2741 return error(
"invalid floating-point predicate");
2756 return error(
"invalid integer predicate");
2762 return error(
"predicate should be terminated by ')'.");
2772 return error(
"expected syntax shufflemask(<integer or undef>, ...)");
2779 const APSInt &
Int = Token.integerValue();
2782 return error(
"expected integer constant");
2788 return error(
"shufflemask should be terminated by ')'.");
2800 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2803 return error(
"expected unsigned integer for instruction index");
2804 uint64_t InstrIdx = Token.integerValue().getZExtValue();
2805 assert(InstrIdx <= std::numeric_limits<unsigned>::max() &&
2806 "Instruction reference's instruction index is too large");
2810 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2813 return error(
"expected unsigned integer for operand index");
2814 uint64_t OpIdx = Token.integerValue().getZExtValue();
2815 assert(OpIdx <= std::numeric_limits<unsigned>::max() &&
2816 "Instruction reference's operand index is too large");
2820 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2832 return error(
"expected the name of the target index");
2834 if (PFS.Target.getTargetIndex(Token.stringValue(),
Index))
2835 return error(
"use of undefined target index '" + Token.stringValue() +
"'");
2840 if (parseOperandsOffset(Dest))
2845bool MIParser::parseCustomRegisterMaskOperand(
MachineOperand &Dest) {
2846 assert(Token.stringValue() ==
"CustomRegMask" &&
"Expected a custom RegMask");
2855 return error(
"expected a named register");
2857 if (parseNamedRegister(Reg))
2872bool MIParser::parseLiveoutRegisterMaskOperand(
MachineOperand &Dest) {
2880 return error(
"expected a named register");
2882 if (parseNamedRegister(Reg))
2897bool MIParser::parseMachineOperand(
const unsigned OpCode,
const unsigned OpIdx,
2899 std::optional<unsigned> &TiedDefIdx) {
2900 switch (Token.kind()) {
2915 return parseRegisterOperand(Dest, TiedDefIdx);
2917 return parseImmediateOperand(Dest);
2924 return parseFPImmediateOperand(Dest);
2926 return parseMBBOperand(Dest);
2928 return parseStackObjectOperand(Dest);
2930 return parseFixedStackObjectOperand(Dest);
2933 return parseGlobalAddressOperand(Dest);
2935 return parseConstantPoolIndexOperand(Dest);
2937 return parseJumpTableIndexOperand(Dest);
2939 return parseExternalSymbolOperand(Dest);
2941 return parseMCSymbolOperand(Dest);
2943 return parseSubRegisterIndexOperand(Dest);
2946 return parseMetadataOperand(Dest);
2963 return parseCFIOperand(Dest);
2965 return parseBlockAddressOperand(Dest);
2967 return parseIntrinsicOperand(Dest);
2969 return parseTargetIndexOperand(Dest);
2971 return parseLiveoutRegisterMaskOperand(Dest);
2974 return parsePredicateOperand(Dest);
2976 return parseShuffleMaskOperand(Dest);
2978 return parseDbgInstrRefOperand(Dest);
2982 if (
const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2986 }
else if (Token.stringValue() ==
"CustomRegMask") {
2987 return parseCustomRegisterMaskOperand(Dest);
2989 return parseTypedImmediateOperand(Dest);
2991 const auto *
TII = MF.getSubtarget().getInstrInfo();
2992 if (
const auto *Formatter =
TII->getMIRFormatter()) {
2993 return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
2999 return error(
"expected a machine operand");
3004bool MIParser::parseMachineOperandAndTargetFlags(
3005 const unsigned OpCode,
const unsigned OpIdx,
MachineOperand &Dest,
3006 std::optional<unsigned> &TiedDefIdx) {
3008 bool HasTargetFlags =
false;
3010 HasTargetFlags =
true;
3015 return error(
"expected the name of the target flag");
3016 if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
3017 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
3018 return error(
"use of undefined target flag '" + Token.stringValue() +
3025 return error(
"expected the name of the target flag");
3026 unsigned BitFlag = 0;
3027 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
3028 return error(
"use of undefined target flag '" + Token.stringValue() +
3037 auto Loc = Token.location();
3038 if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))
3040 if (!HasTargetFlags)
3043 return error(Loc,
"register operands can't have target flags");
3048bool MIParser::parseOffset(int64_t &
Offset) {
3055 return error(
"expected an integer literal after '" + Sign +
"'");
3056 if (Token.integerValue().getSignificantBits() > 64)
3057 return error(
"expected 64-bit integer (too large)");
3058 Offset = Token.integerValue().getExtValue();
3065bool MIParser::parseIRBlockAddressTaken(
BasicBlock *&BB) {
3069 return error(
"expected basic block after 'ir_block_address_taken'");
3071 if (parseIRBlock(BB, MF.getFunction()))
3078bool MIParser::parseAlignment(
uint64_t &Alignment) {
3082 return error(
"expected an integer literal after 'align'");
3083 if (getUint64(Alignment))
3088 return error(
"expected a power-of-2 literal after 'align'");
3093bool MIParser::parseAddrspace(
unsigned &Addrspace) {
3097 return error(
"expected an integer literal after 'addrspace'");
3114 switch (Token.
kind()) {
3120 unsigned SlotNumber = 0;
3148 return ErrCB(Token.
location(),
Twine(
"use of undefined IR value '") + Token.
range() +
"'");
3152bool MIParser::parseIRValue(
const Value *&V) {
3153 return ::parseIRValue(
3155 return error(Loc, Msg);
3159bool MIParser::getUint64(
uint64_t &Result) {
3160 if (Token.hasIntegerValue()) {
3161 if (Token.integerValue().getActiveBits() > 64)
3162 return error(
"expected 64-bit integer (too large)");
3163 Result = Token.integerValue().getZExtValue();
3170 if (
A.getBitWidth() > 64)
3171 return error(
"expected 64-bit integer (too large)");
3178bool MIParser::getHexUint(
APInt &Result) {
3179 return ::getHexUint(Token, Result);
3183 const auto OldFlags =
Flags;
3184 switch (Token.kind()) {
3199 if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
3200 return error(
"use of undefined target MMO flag '" + Token.stringValue() +
3208 if (OldFlags == Flags)
3211 return error(
"duplicate '" + Token.stringValue() +
"' memory operand flag");
3217 switch (Token.kind()) {
3219 PSV = MF.getPSVManager().getStack();
3222 PSV = MF.getPSVManager().getGOT();
3225 PSV = MF.getPSVManager().getJumpTable();
3228 PSV = MF.getPSVManager().getConstantPool();
3232 if (parseFixedStackFrameIndex(FI))
3234 PSV = MF.getPSVManager().getFixedStack(FI);
3240 if (parseStackFrameIndex(FI))
3242 PSV = MF.getPSVManager().getFixedStack(FI);
3248 switch (Token.kind()) {
3254 PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
3258 PSV = MF.getPSVManager().getExternalSymbolCallEntry(
3259 MF.createExternalSymbolName(Token.stringValue()));
3263 "expected a global value or an external symbol after 'call-entry'");
3268 const auto *
TII = MF.getSubtarget().getInstrInfo();
3269 if (
const auto *Formatter =
TII->getMIRFormatter()) {
3270 if (Formatter->parseCustomPseudoSourceValue(
3271 Token.stringValue(), MF, PFS, PSV,
3273 return error(Loc, Msg);
3277 return error(
"unable to parse target custom pseudo source value");
3293 if (parseMemoryPseudoSourceValue(PSV))
3306 return error(
"expected an IR value reference");
3307 const Value *
V =
nullptr;
3310 if (V && !
V->getType()->isPointerTy())
3311 return error(
"expected a pointer IR value");
3320bool MIParser::parseOptionalScope(
LLVMContext &Context,
3326 return error(
"expected '(' in syncscope");
3329 if (parseStringConstant(SSN))
3334 return error(
"expected ')' in syncscope");
3340bool MIParser::parseOptionalAtomicOrdering(
AtomicOrdering &Order) {
3359 return error(
"expected an atomic scope, ordering or a size specification");
3366 while (Token.isMemoryOperandFlag()) {
3367 if (parseMemoryOperandFlag(Flags))
3371 (Token.stringValue() !=
"load" && Token.stringValue() !=
"store"))
3372 return error(
"expected 'load' or 'store' memory operation");
3373 if (Token.stringValue() ==
"load")
3387 if (parseOptionalScope(MF.getFunction().getContext(), SSID))
3392 if (parseOptionalAtomicOrdering(Order))
3395 if (parseOptionalAtomicOrdering(FailureOrder))
3402 return error(
"expected memory LLT, the size integer literal or 'unknown-size' after "
3403 "memory operation");
3407 if (getUint64(
Size))
3419 if (parseLowLevelType(Token.location(), MemoryType))
3434 if (Token.stringValue() !=
Word)
3438 if (parseMachinePointerInfo(
Ptr))
3446 switch (Token.kind()) {
3450 if (parseAlignment(Alignment))
3452 if (
Ptr.Offset & (Alignment - 1)) {
3457 return error(
"specified alignment is more aligned than offset");
3459 BaseAlignment = Alignment;
3464 if (parseAlignment(BaseAlignment))
3468 if (parseAddrspace(
Ptr.AddrSpace))
3493 return error(
"expected 'align' or '!tbaa' or '!alias.scope' or "
3494 "'!noalias' or '!range'");
3499 Dest = MF.getMachineMemOperand(
Ptr, Flags, MemoryType,
Align(BaseAlignment),
3500 AAInfo, Range, SSID, Order, FailureOrder);
3504bool MIParser::parsePreOrPostInstrSymbol(
MCSymbol *&Symbol) {
3507 "Invalid token for a pre- post-instruction symbol!");
3510 return error(
"expected a symbol after 'pre-instr-symbol'");
3511 Symbol = getOrCreateMCSymbol(Token.stringValue());
3517 return error(
"expected ',' before the next machine operand");
3522bool MIParser::parseHeapAllocMarker(
MDNode *&
Node) {
3524 "Invalid token for a heap alloc marker!");
3529 return error(
"expected a MDNode after 'heap-alloc-marker'");
3534 return error(
"expected ',' before the next machine operand");
3539bool MIParser::parsePCSections(
MDNode *&
Node) {
3541 "Invalid token for a PC sections!");
3546 return error(
"expected a MDNode after 'pcsections'");
3551 return error(
"expected ',' before the next machine operand");
3561 for (
const auto &BB :
F) {
3567 Slots2BasicBlocks.
insert(std::make_pair(
unsigned(Slot), &BB));
3574 return Slots2BasicBlocks.
lookup(Slot);
3577const BasicBlock *MIParser::getIRBlock(
unsigned Slot) {
3578 if (Slots2BasicBlocks.empty())
3584 if (&
F == &MF.getFunction())
3585 return getIRBlock(Slot);
3597 return MF.getContext().getOrCreateSymbol(
Name);
3600bool MIParser::parseStringConstant(std::string &Result) {
3602 return error(
"expected string constant");
3603 Result = std::string(Token.stringValue());
3611 return MIParser(PFS,
Error, Src).parseBasicBlockDefinitions(PFS.
MBBSlots);
3616 return MIParser(PFS,
Error, Src).parseBasicBlocks();
3622 return MIParser(PFS,
Error, Src).parseStandaloneMBB(
MBB);
3628 return MIParser(PFS,
Error, Src).parseStandaloneRegister(Reg);
3634 return MIParser(PFS,
Error, Src).parseStandaloneNamedRegister(Reg);
3640 return MIParser(PFS,
Error, Src).parseStandaloneVirtualRegister(
Info);
3646 return MIParser(PFS,
Error, Src).parseStandaloneStackObject(FI);
3651 return MIParser(PFS,
Error, Src).parseStandaloneMDNode(Node);
3656 return MIParser(PFS,
Error, Src, SrcRange).parseMachineMetadata();
3664 ErrorCallback(Loc, Msg);
3668 return ::parseIRValue(Token, PFS, V, ErrorCallback);
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file defines the StringMap class.
This file implements a class to represent arbitrary precision integral constant values and operations...
This file implements the APSInt class, which is a simple class that represents an arbitrary sized int...
Atomic ordering constants.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
Analysis containing CSE Info
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
This file defines the DenseMap class.
const HexagonInstrInfo * TII
A common definition of LaneBitmask for use in TableGen and CodeGen.
Implement a low-level type suitable for MachineInstr level instruction selection.
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)
Creates the mapping from slot numbers to function's unnamed IR values.
static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)
static bool verifyScalarSize(uint64_t Size)
static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)
static bool getHexUint(const MIToken &Token, APInt &Result)
static bool verifyVectorElementCount(uint64_t NumElts)
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)
static bool verifyAddrSpace(uint64_t AddrSpace)
mir Rename Register Operands
unsigned const TargetRegisterInfo * TRI
This file provides utility analysis objects describing memory locations.
Module.h This file contains the declarations for the Module class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool parseMetadata(const StringRef &Input, uint64_t &FunctionHash, uint32_t &Attributes)
Parse Input that contains metadata.
This file defines the SmallVector class.
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
Class for arbitrary precision integers.
uint64_t getZExtValue() const
Get zero extended value.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
An arbitrary precision integer that knows its signedness.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
LLVM Basic Block Representation.
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
static BranchProbability getRaw(uint32_t N)
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
@ FCMP_OEQ
0 0 0 1 True if ordered and equal
@ FCMP_TRUE
1 1 1 1 Always true (always folded)
@ ICMP_SLT
signed less than
@ ICMP_SLE
signed less or equal
@ FCMP_OLT
0 1 0 0 True if ordered and less than
@ FCMP_ULE
1 1 0 1 True if unordered, less than, or equal
@ FCMP_OGT
0 0 1 0 True if ordered and greater than
@ FCMP_OGE
0 0 1 1 True if ordered and greater than or equal
@ ICMP_UGE
unsigned greater or equal
@ ICMP_UGT
unsigned greater than
@ ICMP_SGT
signed greater than
@ FCMP_ULT
1 1 0 0 True if unordered or less than
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
@ ICMP_ULT
unsigned less than
@ FCMP_UGT
1 0 1 0 True if unordered or greater than
@ FCMP_OLE
0 1 0 1 True if ordered and less than or equal
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
@ ICMP_SGE
signed greater or equal
@ FCMP_UNE
1 1 1 0 True if unordered or not equal
@ ICMP_ULE
unsigned less or equal
@ FCMP_UGE
1 0 1 1 True if unordered, greater than, or equal
@ FCMP_FALSE
0 0 0 0 Always false (always folded)
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
bool isFPPredicate() const
bool isIntPredicate() const
This is an important base class in LLVM.
This class represents an Operation in the Expression.
A parsed version of the target data layout string in and methods for querying it.
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
static constexpr ElementCount get(ScalarTy MinVal, bool Scalable)
Lightweight error class with error context and mandatory checking.
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Module * getParent()
Get the module that this global value is contained inside of...
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
static constexpr LLT vector(ElementCount EC, unsigned ScalarSizeInBits)
Get a low-level vector of some number of elements and element width.
static constexpr LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
static constexpr LLT token()
Get a low-level token; just a scalar with zero bits (or no size).
This is an important class for using LLVM in a threaded context.
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_undefined From now on the previous value of Register can't be restored anymore.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2, SMLoc Loc={})
.cfi_register Previous value of Register1 is saved in register Register2.
static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register, int Offset, unsigned AddressSpace, SMLoc Loc)
.cfi_llvm_def_aspace_cfa defines the rule for computing the CFA to be the result of evaluating the DW...
static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc={})
.cfi_negate_ra_state AArch64 negate RA state.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc={})
.cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment, SMLoc Loc={})
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, SMLoc Loc={}, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc={})
.cfi_window_save SPARC register window is saved.
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc={})
.cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_same_value Current value of Register is the same as in the previous frame.
Describe properties that are true of each instruction in the target description file.
ArrayRef< MCPhysReg > implicit_defs() const
Return a list of registers that are potentially written by any instance of this machine instruction.
bool isCall() const
Return true if the instruction is a call.
ArrayRef< MCPhysReg > implicit_uses() const
Return a list of registers that are potentially read by any instance of this machine instruction.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
void replaceAllUsesWith(Metadata *MD)
RAUW a temporary.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
static MDString * get(LLVMContext &Context, StringRef Str)
static MDTuple * getDistinct(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a distinct node.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
static TempMDTuple getTemporary(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a temporary node.
void setBBID(const UniqueBBID &V)
Sets the fixed BBID of this basic block.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
void setAddressTakenIRBlock(BasicBlock *BB)
Set this block to reflect that it corresponds to an IR-level basic block with a BlockAddress.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
void setCallFrameSize(unsigned N)
Set the call frame size on entry to this basic block.
void setAlignment(Align A)
Set alignment of the basic block.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void setSectionID(MBBSectionID V)
Sets the section ID for this basic block.
void setIsInlineAsmBrIndirectTarget(bool V=true)
Indicates if this is the indirect dest of an INLINEASM_BR.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
void setIsEHFuncletEntry(bool V=true)
Indicates if this is the entry block of an EH funclet.
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
void setMachineBlockAddressTaken()
Set this block to indicate that its address is used as something other than the target of a terminato...
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
Representation of each machine instruction.
void setFlag(MIFlag Flag)
Set a MI flag.
A description of a memory reference used in the backend.
Flags
Flags values. These may be or'd together.
@ MOVolatile
The memory access is volatile.
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
@ MOLoad
The memory access reads data.
@ MONonTemporal
The memory access is non-temporal.
@ MOInvariant
The memory access always returns the same value (or traps).
@ MOStore
The memory access writes data.
MachineOperand class - Representation of each machine instruction operand.
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineOperand CreateCImm(const ConstantInt *CI)
static MachineOperand CreateMetadata(const MDNode *Meta)
static MachineOperand CreatePredicate(unsigned Pred)
static MachineOperand CreateImm(int64_t Val)
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
static MachineOperand CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx)
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
void setTargetFlags(unsigned F)
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
static MachineOperand CreateFI(int Idx)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Register createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet.
This interface provides simple read-only access to a block of memory, and provides simple methods for...
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
const char * getBufferEnd() const
const char * getBufferStart() const
Manage lifetime of a slot tracker for printing IR.
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Special value supplied for machine level alias analysis.
Holds all the information related to register banks.
const RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
unsigned getNumRegBanks() const
Get the total number of register banks.
This class implements the register bank concept.
Wrapper class representing virtual and physical registers.
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Represents a location in source code.
static SMLoc getFromPointer(const char *Ptr)
Represents a range in source code.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.
unsigned getMainFileID() const
const MemoryBuffer * getMemoryBuffer(unsigned i) const
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const
Return an SMDiagnostic at the specified location with the specified string.
iterator find(StringRef Key)
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
StringRef - Represent a constant reference to a string, i.e.
std::string str() const
str - Get the contents as an std::string.
constexpr StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
StringRef drop_front(size_t N=1) const
Return a StringRef equal to 'this' but with the first N elements dropped.
constexpr size_t size() const
size - Get the string size.
char front() const
front - Get the first character in the string.
std::string lower() const
static constexpr size_t npos
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
TargetIntrinsicInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const RegisterBankInfo * getRegBankInfo() const
If the information for the register banks is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
Target - Wrapper for Target specific information.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
LLVM Value Representation.
An efficient, type-erasing, non-owning reference to a callable.
unsigned getOperationEncoding(StringRef OperationEncodingString)
unsigned getAttributeEncoding(StringRef EncodingString)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const CustomOperand< const MCSubtargetInfo & > Msg[]
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ C
The default llvm calling convention, compatible with C.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Debug
Register 'use' is for debugging purpose.
@ Renamable
Register that may be renamed.
@ Define
Register definition.
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
@ EarlyClobber
Register definition happens before uses.
@ System
Synchronized with respect to all concurrently executing threads.
Reg
All possible values of the reg field in the ModR/M byte.
std::optional< const char * > toString(const std::optional< DWARFFormValue > &V)
Take an optional DWARFFormValue and try to extract a string value from it.
support::ulittle32_t Word
Scope
Defines the scope in which this symbol should be visible: Default – Visible in the public interface o...
This is an optimization pass for GlobalISel generic memory operations.
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
uint64_t PowerOf2Ceil(uint64_t A)
Returns the power of two which is greater than or equal to the given value.
AtomicOrdering
Atomic ordering for LLVM's memory model.
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src, SMRange SourceRange, SMDiagnostic &Error)
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
MDNode * Scope
The tag for alias scope specification (used with noalias).
MDNode * TBAA
The tag for type-based alias analysis.
MDNode * NoAlias
The tag specifying the noalias scope.
This struct is a compact representation of a valid (non-zero power of two) alignment.
static constexpr LaneBitmask getAll()
static const MBBSectionID ExceptionSectionID
static const MBBSectionID ColdSectionID
A token produced by the machine instruction lexer.
bool hasIntegerValue() const
bool is(TokenKind K) const
StringRef stringValue() const
Return the token's string value.
@ kw_cfi_aarch64_negate_ra_sign_state
@ kw_cfi_llvm_def_aspace_cfa
@ kw_inlineasm_br_indirect_target
@ kw_cfi_def_cfa_register
@ kw_cfi_adjust_cfa_offset
@ kw_machine_block_address_taken
@ kw_ir_block_address_taken
StringRef::iterator location() const
const APSInt & integerValue() const
This class contains a discriminated union of information about pointers in memory operands,...
VRegInfo & getVRegInfo(Register Num)
const SlotMapping & IRSlots
const Value * getIRValue(unsigned Slot)
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
StringMap< VRegInfo * > VRegInfosNamed
DenseMap< unsigned, const Value * > Slots2Values
Maps from slot numbers to function's unnamed values.
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
DenseMap< Register, VRegInfo * > VRegInfos
VRegInfo & getVRegInfoNamed(StringRef RegName)
BumpPtrAllocator Allocator
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.
bool parseInstrName(StringRef InstrName, unsigned &OpCode)
Try to convert an instruction name to an opcode.
unsigned getSubRegIndex(StringRef Name)
Check if the given identifier is a name of a subregister index.
bool getTargetIndex(StringRef Name, int &Index)
Try to convert a name of target index to the corresponding target index.
void setTarget(const TargetSubtargetInfo &NewSubtarget)
bool getRegisterByName(StringRef RegName, Register &Reg)
Try to convert a register name to a register number.
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)
Try to convert a name of a MachineMemOperand target flag to the corresponding target flag.
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a bitmask target flag to the corresponding target flag.
const TargetRegisterClass * getRegClass(StringRef Name)
Check if the given identifier is a name of a register class.
const uint32_t * getRegMask(StringRef Identifier)
Check if the given identifier is a name of a register mask.
This struct contains the mappings from the slot numbers to unnamed metadata nodes,...
NumberedValues< GlobalValue * > GlobalValues