85 if (&Subtarget == &NewSubtarget)
88 Names2InstrOpCodes.
clear();
90 Names2RegMasks.
clear();
91 Names2SubRegIndices.
clear();
92 Names2TargetIndices.
clear();
93 Names2DirectTargetFlags.
clear();
94 Names2BitmaskTargetFlags.
clear();
95 Names2MMOTargetFlags.
clear();
97 initNames2RegClasses();
101void PerTargetMIParsingState::initNames2Regs() {
102 if (!Names2Regs.empty())
106 Names2Regs.insert(std::make_pair(
"noreg", 0));
108 assert(
TRI &&
"Expected target register info");
110 for (
unsigned I = 0,
E =
TRI->getNumRegs();
I <
E; ++
I) {
115 assert(WasInserted &&
"Expected registers to be unique case-insensitively");
122 auto RegInfo = Names2Regs.find(
RegName);
123 if (RegInfo == Names2Regs.end())
125 Reg = RegInfo->getValue();
129void PerTargetMIParsingState::initNames2InstrOpCodes() {
130 if (!Names2InstrOpCodes.
empty())
133 assert(
TII &&
"Expected target instruction info");
134 for (
unsigned I = 0,
E =
TII->getNumOpcodes();
I <
E; ++
I)
140 initNames2InstrOpCodes();
148void PerTargetMIParsingState::initNames2RegMasks() {
149 if (!Names2RegMasks.
empty())
152 assert(
TRI &&
"Expected target register info");
156 for (
size_t I = 0,
E = RegMasks.
size();
I <
E; ++
I)
158 std::make_pair(
StringRef(RegMaskNames[
I]).lower(), RegMasks[
I]));
162 initNames2RegMasks();
163 auto RegMaskInfo = Names2RegMasks.
find(Identifier);
164 if (RegMaskInfo == Names2RegMasks.
end())
166 return RegMaskInfo->getValue();
169void PerTargetMIParsingState::initNames2SubRegIndices() {
170 if (!Names2SubRegIndices.
empty())
173 for (
unsigned I = 1,
E =
TRI->getNumSubRegIndices();
I <
E; ++
I)
174 Names2SubRegIndices.
insert(
175 std::make_pair(
TRI->getSubRegIndexName(
I),
I));
179 initNames2SubRegIndices();
180 auto SubRegInfo = Names2SubRegIndices.
find(
Name);
181 if (SubRegInfo == Names2SubRegIndices.
end())
183 return SubRegInfo->getValue();
186void PerTargetMIParsingState::initNames2TargetIndices() {
187 if (!Names2TargetIndices.
empty())
190 assert(
TII &&
"Expected target instruction info");
191 auto Indices =
TII->getSerializableTargetIndices();
192 for (
const auto &
I : Indices)
197 initNames2TargetIndices();
198 auto IndexInfo = Names2TargetIndices.
find(
Name);
199 if (IndexInfo == Names2TargetIndices.
end())
201 Index = IndexInfo->second;
205void PerTargetMIParsingState::initNames2DirectTargetFlags() {
206 if (!Names2DirectTargetFlags.
empty())
210 assert(
TII &&
"Expected target instruction info");
212 for (
const auto &
I : Flags)
213 Names2DirectTargetFlags.
insert(
219 initNames2DirectTargetFlags();
220 auto FlagInfo = Names2DirectTargetFlags.
find(
Name);
221 if (FlagInfo == Names2DirectTargetFlags.
end())
223 Flag = FlagInfo->second;
227void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
228 if (!Names2BitmaskTargetFlags.
empty())
232 assert(
TII &&
"Expected target instruction info");
234 for (
const auto &
I : Flags)
235 Names2BitmaskTargetFlags.
insert(
241 initNames2BitmaskTargetFlags();
242 auto FlagInfo = Names2BitmaskTargetFlags.
find(
Name);
243 if (FlagInfo == Names2BitmaskTargetFlags.
end())
245 Flag = FlagInfo->second;
249void PerTargetMIParsingState::initNames2MMOTargetFlags() {
250 if (!Names2MMOTargetFlags.
empty())
254 assert(
TII &&
"Expected target instruction info");
255 auto Flags =
TII->getSerializableMachineMemOperandTargetFlags();
256 for (
const auto &
I : Flags)
262 initNames2MMOTargetFlags();
263 auto FlagInfo = Names2MMOTargetFlags.
find(
Name);
264 if (FlagInfo == Names2MMOTargetFlags.
end())
266 Flag = FlagInfo->second;
270void PerTargetMIParsingState::initNames2RegClasses() {
271 if (!Names2RegClasses.
empty())
275 for (
unsigned I = 0,
E =
TRI->getNumRegClasses();
I <
E; ++
I) {
276 const auto *RC =
TRI->getRegClass(
I);
282void PerTargetMIParsingState::initNames2RegBanks() {
283 if (!Names2RegBanks.
empty())
301 auto RegClassInfo = Names2RegClasses.
find(
Name);
302 if (RegClassInfo == Names2RegClasses.
end())
304 return RegClassInfo->getValue();
308 auto RegBankInfo = Names2RegBanks.
find(
Name);
309 if (RegBankInfo == Names2RegBanks.
end())
311 return RegBankInfo->getValue();
316 : MF(MF), SM(&SM), IRSlots(IRSlots),
Target(
T) {
320 auto I =
VRegInfos.insert(std::make_pair(Num,
nullptr));
324 Info->VReg =
MRI.createIncompleteVirtualRegister();
325 I.first->second =
Info;
327 return *
I.first->second;
337 I.first->second =
Info;
339 return *
I.first->second;
347 Slots2Values.
insert(std::make_pair(
unsigned(Slot), V));
355 for (
const auto &Arg :
F.args())
357 for (
const auto &BB :
F) {
359 for (
const auto &
I : BB)
374struct ParsedMachineOperand {
378 std::optional<unsigned> TiedDefIdx;
382 std::optional<unsigned> &TiedDefIdx)
383 : Operand(Operand), Begin(Begin),
End(
End), TiedDefIdx(TiedDefIdx) {
386 "Only used register operands can be tied");
408 void lex(
unsigned SkipChar = 0);
422 bool parseBasicBlocks();
428 bool parseStandaloneStackObject(
int &FI);
431 bool parseMDTuple(
MDNode *&MD,
bool IsDistinct);
446 bool parseRegisterFlag(
unsigned &Flags);
448 bool parseSubRegisterIndex(
unsigned &
SubReg);
449 bool parseRegisterTiedDefIndex(
unsigned &TiedDefIdx);
451 std::optional<unsigned> &TiedDefIdx,
462 bool parseStackFrameIndex(
int &FI);
464 bool parseFixedStackFrameIndex(
int &FI);
474 bool parseDIExpression(
MDNode *&Expr);
475 bool parseDILocation(
MDNode *&Expr);
477 bool parseCFIOffset(
int &
Offset);
480 bool parseCFIEscapeValues(std::string& Values);
491 bool parseMachineOperand(
const unsigned OpCode,
const unsigned OpIdx,
493 std::optional<unsigned> &TiedDefIdx);
494 bool parseMachineOperandAndTargetFlags(
const unsigned OpCode,
495 const unsigned OpIdx,
497 std::optional<unsigned> &TiedDefIdx);
498 bool parseOffset(int64_t &
Offset);
499 bool parseIRBlockAddressTaken(
BasicBlock *&BB);
500 bool parseAlignment(
uint64_t &Alignment);
501 bool parseAddrspace(
unsigned &Addrspace);
502 bool parseSectionID(std::optional<MBBSectionID> &SID);
503 bool parseBBID(std::optional<unsigned> &BBID);
504 bool parseCallFrameSize(
unsigned &CallFrameSize);
513 bool parsePreOrPostInstrSymbol(
MCSymbol *&Symbol);
517 bool parseTargetImmMnemonic(
const unsigned OpCode,
const unsigned OpIdx,
545 bool parseInstruction(
unsigned &OpCode,
unsigned &Flags);
561 bool parseStringConstant(std::string &Result);
578 SourceRange(SourceRange), PFS(PFS) {}
580void MIParser::lex(
unsigned SkipChar) {
586bool MIParser::error(
const Twine &Msg) {
return error(Token.location(), Msg); }
601 Source, std::nullopt, std::nullopt);
606 assert(SourceRange.isValid() &&
"Invalid source range");
628 return "<unknown token>";
633 if (Token.isNot(TokenKind))
640 if (Token.isNot(TokenKind))
647bool MIParser::parseSectionID(std::optional<MBBSectionID> &SID) {
653 return error(
"Unknown Section ID");
656 const StringRef &S = Token.stringValue();
657 if (S ==
"Exception")
659 else if (S ==
"Cold")
662 return error(
"Unknown Section ID");
669bool MIParser::parseBBID(std::optional<unsigned> &BBID) {
674 return error(
"Unknown BB ID");
681bool MIParser::parseCallFrameSize(
unsigned &CallFrameSize) {
686 return error(
"Unknown call frame size");
687 CallFrameSize =
Value;
692bool MIParser::parseBasicBlockDefinition(
698 auto Loc = Token.location();
699 auto Name = Token.stringValue();
701 bool MachineBlockAddressTaken =
false;
703 bool IsLandingPad =
false;
704 bool IsInlineAsmBrIndirectTarget =
false;
705 bool IsEHFuncletEntry =
false;
706 std::optional<MBBSectionID> SectionID;
708 std::optional<unsigned> BBID;
709 unsigned CallFrameSize = 0;
714 switch (Token.kind()) {
716 MachineBlockAddressTaken =
true;
720 if (parseIRBlockAddressTaken(AddressTakenIRBlock))
728 IsInlineAsmBrIndirectTarget =
true;
732 IsEHFuncletEntry =
true;
736 if (parseAlignment(Alignment))
742 if (parseIRBlock(BB, MF.getFunction()))
747 if (parseSectionID(SectionID))
755 if (parseCallFrameSize(CallFrameSize))
769 BB = dyn_cast_or_null<BasicBlock>(
770 MF.getFunction().getValueSymbolTable()->lookup(
Name));
773 "' is not defined in the function '" +
776 auto *
MBB = MF.CreateMachineBasicBlock(BB);
778 bool WasInserted = MBBSlots.
insert(std::make_pair(
ID,
MBB)).second;
780 return error(Loc,
Twine(
"redefinition of machine basic block with id #") +
784 if (MachineBlockAddressTaken)
786 if (AddressTakenIRBlock)
795 if (BBID.has_value()) {
798 if (!MF.hasBBSections())
806bool MIParser::parseBasicBlockDefinitions(
812 if (Token.isErrorOrEOF())
813 return Token.isError();
815 return error(
"expected a basic block definition before instructions");
816 unsigned BraceDepth = 0;
818 if (parseBasicBlockDefinition(MBBSlots))
820 bool IsAfterNewline =
false;
824 Token.isErrorOrEOF())
827 return error(
"basic block definition should be located at the start of "
830 IsAfterNewline =
true;
833 IsAfterNewline =
false;
838 return error(
"extraneous closing brace ('}')");
844 if (!Token.isError() && BraceDepth)
845 return error(
"expected '}'");
846 }
while (!Token.isErrorOrEOF());
847 return Token.isError();
855 if (Token.isNewlineOrEOF())
859 return error(
"expected a named register");
861 if (parseNamedRegister(Reg))
869 return error(
"expected a lane mask");
871 "Use correct get-function for lane mask");
874 return error(
"invalid lane mask value");
888 if (Token.isNewlineOrEOF())
892 return error(
"expected a machine basic block reference");
901 return error(
"expected an integer literal after '('");
935 bool ExplicitSuccessors =
false;
938 if (parseBasicBlockSuccessors(
MBB))
940 ExplicitSuccessors =
true;
942 if (parseBasicBlockLiveins(
MBB))
948 if (!Token.isNewlineOrEOF())
949 return error(
"expected line break at the end of a list");
954 bool IsInBundle =
false;
978 return error(
"nested instruction bundles are not allowed");
987 assert(Token.isNewlineOrEOF() &&
"MI is not fully parsed");
992 if (!ExplicitSuccessors) {
1000 AddFalthroughFrom = &
MBB;
1009bool MIParser::parseBasicBlocks() {
1014 if (Token.isErrorOrEOF())
1015 return Token.isError();
1024 if (AddFalthroughFrom) {
1028 AddFalthroughFrom =
nullptr;
1030 if (parseBasicBlock(*
MBB, AddFalthroughFrom))
1043 while (Token.isRegister() || Token.isRegisterFlag()) {
1044 auto Loc = Token.location();
1045 std::optional<unsigned> TiedDefIdx;
1046 if (parseRegisterOperand(MO, TiedDefIdx,
true))
1049 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1057 unsigned OpCode,
Flags = 0;
1058 if (Token.isError() || parseInstruction(OpCode, Flags))
1070 auto Loc = Token.location();
1071 std::optional<unsigned> TiedDefIdx;
1072 if (parseMachineOperandAndTargetFlags(OpCode,
Operands.size(), MO, TiedDefIdx))
1075 ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
1080 return error(
"expected ',' before the next machine operand");
1084 MCSymbol *PreInstrSymbol =
nullptr;
1086 if (parsePreOrPostInstrSymbol(PreInstrSymbol))
1088 MCSymbol *PostInstrSymbol =
nullptr;
1090 if (parsePreOrPostInstrSymbol(PostInstrSymbol))
1092 MDNode *HeapAllocMarker =
nullptr;
1094 if (parseHeapAllocMarker(HeapAllocMarker))
1096 MDNode *PCSections =
nullptr;
1098 if (parsePCSections(PCSections))
1101 unsigned CFIType = 0;
1105 return error(
"expected an integer literal after 'cfi-type'");
1115 unsigned InstrNum = 0;
1119 return error(
"expected an integer literal after 'debug-instr-number'");
1136 if (parseDILocation(
Node))
1139 return error(
"expected a metadata node after 'debug-location'");
1140 if (!isa<DILocation>(
Node))
1141 return error(
"referenced metadata is not a DILocation");
1149 while (!Token.isNewlineOrEOF()) {
1151 if (parseMachineMemoryOperand(
MemOp))
1154 if (Token.isNewlineOrEOF())
1157 return error(
"expected ',' before the next machine memory operand");
1162 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
1163 if (!MCID.isVariadic()) {
1165 if (verifyImplicitOperands(
Operands, MCID))
1169 MI = MF.CreateMachineInstr(MCID, DebugLocation,
true);
1170 MI->setFlags(Flags);
1172 unsigned NumExplicitOps = 0;
1173 for (
const auto &Operand :
Operands) {
1174 bool IsImplicitOp = Operand.Operand.isReg() && Operand.Operand.isImplicit();
1175 if (!IsImplicitOp) {
1176 if (!MCID.isVariadic() && NumExplicitOps >= MCID.getNumOperands() &&
1177 !Operand.Operand.isValidExcessOperand())
1178 return error(Operand.Begin,
"too many operands for instruction");
1183 MI->addOperand(MF, Operand.Operand);
1189 MI->setPreInstrSymbol(MF, PreInstrSymbol);
1190 if (PostInstrSymbol)
1191 MI->setPostInstrSymbol(MF, PostInstrSymbol);
1192 if (HeapAllocMarker)
1193 MI->setHeapAllocMarker(MF, HeapAllocMarker);
1195 MI->setPCSections(MF, PCSections);
1197 MI->setCFIType(MF, CFIType);
1198 if (!MemOperands.
empty())
1199 MI->setMemRefs(MF, MemOperands);
1201 MI->setDebugInstrNum(InstrNum);
1208 return error(
"expected a machine basic block reference");
1214 "expected end of string after the machine basic block reference");
1218bool MIParser::parseStandaloneNamedRegister(
Register &Reg) {
1221 return error(
"expected a named register");
1222 if (parseNamedRegister(Reg))
1226 return error(
"expected end of string after the register reference");
1230bool MIParser::parseStandaloneVirtualRegister(
VRegInfo *&Info) {
1233 return error(
"expected a virtual register");
1234 if (parseVirtualRegister(Info))
1238 return error(
"expected end of string after the register reference");
1242bool MIParser::parseStandaloneRegister(
Register &Reg) {
1246 return error(
"expected either a named or virtual register");
1249 if (parseRegister(Reg, Info))
1254 return error(
"expected end of string after the register reference");
1258bool MIParser::parseStandaloneStackObject(
int &FI) {
1261 return error(
"expected a stack object");
1262 if (parseStackFrameIndex(FI))
1265 return error(
"expected end of string after the stack object reference");
1269bool MIParser::parseStandaloneMDNode(
MDNode *&
Node) {
1275 if (parseDIExpression(
Node))
1278 if (parseDILocation(
Node))
1281 return error(
"expected a metadata node");
1283 return error(
"expected end of string after the metadata node");
1287bool MIParser::parseMachineMetadata() {
1290 return error(
"expected a metadata node");
1294 return error(
"expected metadata id after '!'");
1305 return error(
"expected a metadata node");
1309 if (parseMDTuple(MD, IsDistinct))
1312 auto FI = PFS.MachineForwardRefMDNodes.find(
ID);
1313 if (FI != PFS.MachineForwardRefMDNodes.end()) {
1315 PFS.MachineForwardRefMDNodes.erase(FI);
1317 assert(PFS.MachineMetadataNodes[
ID] == MD &&
"Tracking VH didn't work");
1319 if (PFS.MachineMetadataNodes.count(
ID))
1320 return error(
"Metadata id is already used");
1321 PFS.MachineMetadataNodes[
ID].reset(MD);
1327bool MIParser::parseMDTuple(
MDNode *&MD,
bool IsDistinct) {
1329 if (parseMDNodeVector(Elts))
1338 return error(
"expected '{' here");
1359 return error(
"expected end of metadata node");
1367bool MIParser::parseMetadata(
Metadata *&MD) {
1369 return error(
"expected '!' here");
1374 if (parseStringConstant(Str))
1381 return error(
"expected metadata id after '!'");
1383 SMLoc Loc = mapSMLoc(Token.location());
1390 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(
ID);
1391 if (NodeInfo != PFS.IRSlots.MetadataNodes.end()) {
1392 MD = NodeInfo->second.get();
1396 NodeInfo = PFS.MachineMetadataNodes.find(
ID);
1397 if (NodeInfo != PFS.MachineMetadataNodes.end()) {
1398 MD = NodeInfo->second.get();
1402 auto &FwdRef = PFS.MachineForwardRefMDNodes[
ID];
1403 FwdRef = std::make_pair(
1405 PFS.MachineMetadataNodes[
ID].reset(FwdRef.first.get());
1406 MD = FwdRef.first.get();
1413 return MO.
isDef() ?
"implicit-def" :
"implicit";
1418 assert(Reg.isPhysical() &&
"expected phys reg");
1446 const auto *
TRI = MF.getSubtarget().getRegisterInfo();
1447 assert(
TRI &&
"Expected target register info");
1448 for (
const auto &
I : ImplicitOperands) {
1452 Twine(
"missing implicit register operand '") +
1459bool MIParser::parseInstruction(
unsigned &OpCode,
unsigned &Flags) {
1513 return error(
"expected a machine instruction");
1514 StringRef InstrName = Token.stringValue();
1515 if (PFS.Target.parseInstrName(InstrName, OpCode))
1516 return error(
Twine(
"unknown machine instruction name '") + InstrName +
"'");
1521bool MIParser::parseNamedRegister(
Register &Reg) {
1524 if (PFS.Target.getRegisterByName(
Name, Reg))
1529bool MIParser::parseNamedVirtualRegister(
VRegInfo *&Info) {
1534 Info = &PFS.getVRegInfoNamed(
Name);
1538bool MIParser::parseVirtualRegister(
VRegInfo *&Info) {
1540 return parseNamedVirtualRegister(Info);
1545 Info = &PFS.getVRegInfo(
ID);
1550 switch (Token.kind()) {
1555 return parseNamedRegister(Reg);
1558 if (parseVirtualRegister(Info))
1570 return error(
"expected '_', register class, or register bank name");
1585 return error(Loc,
Twine(
"conflicting register classes, previously: ") +
1594 return error(Loc,
"register class specification on generic register");
1602 RegBank = PFS.Target.getRegBank(
Name);
1604 return error(Loc,
"expected '_', register class, or register bank name");
1615 return error(Loc,
"conflicting generic register banks");
1621 return error(Loc,
"register bank specification on normal register");
1626bool MIParser::parseRegisterFlag(
unsigned &Flags) {
1627 const unsigned OldFlags =
Flags;
1628 switch (Token.kind()) {
1662 if (OldFlags == Flags)
1665 return error(
"duplicate '" + Token.stringValue() +
"' register flag");
1670bool MIParser::parseSubRegisterIndex(
unsigned &
SubReg) {
1674 return error(
"expected a subregister index after '.'");
1675 auto Name = Token.stringValue();
1678 return error(
Twine(
"use of unknown subregister index '") +
Name +
"'");
1683bool MIParser::parseRegisterTiedDefIndex(
unsigned &TiedDefIdx) {
1687 return error(
"expected an integer literal after 'tied-def'");
1704 unsigned DefIdx = *
Operands[
I].TiedDefIdx;
1707 Twine(
"use of invalid tied-def operand index '" +
1708 Twine(DefIdx) +
"'; instruction has only ") +
1710 const auto &DefOperand =
Operands[DefIdx].Operand;
1711 if (!DefOperand.isReg() || !DefOperand.isDef())
1714 Twine(
"use of invalid tied-def operand index '") +
1715 Twine(DefIdx) +
"'; the operand #" +
Twine(DefIdx) +
1716 " isn't a defined register");
1718 for (
const auto &TiedPair : TiedRegisterPairs) {
1719 if (TiedPair.first == DefIdx)
1721 Twine(
"the tied-def operand #") +
Twine(DefIdx) +
1722 " is already tied with another register operand");
1724 TiedRegisterPairs.push_back(std::make_pair(DefIdx,
I));
1728 for (
const auto &TiedPair : TiedRegisterPairs)
1729 MI.tieOperands(TiedPair.first, TiedPair.second);
1734 std::optional<unsigned> &TiedDefIdx,
1737 while (Token.isRegisterFlag()) {
1738 if (parseRegisterFlag(Flags))
1741 if (!Token.isRegister())
1742 return error(
"expected a register after register flags");
1745 if (parseRegister(Reg,
RegInfo))
1750 if (parseSubRegisterIndex(
SubReg))
1752 if (!
Reg.isVirtual())
1753 return error(
"subregister index expects a virtual register");
1756 if (!
Reg.isVirtual())
1757 return error(
"register class specification expects a virtual register");
1759 if (parseRegisterClassOrBank(*
RegInfo))
1766 if (!parseRegisterTiedDefIndex(
Idx))
1771 if (parseLowLevelType(Token.location(), Ty))
1772 return error(
"expected tied-def or low-level type after '('");
1777 if (
MRI.getType(Reg).isValid() &&
MRI.getType(Reg) != Ty)
1778 return error(
"inconsistent type for generic virtual register");
1781 MRI.setType(Reg, Ty);
1786 if (!
Reg.isVirtual())
1787 return error(
"unexpected type on physical register");
1790 if (parseLowLevelType(Token.location(), Ty))
1796 if (
MRI.getType(Reg).isValid() &&
MRI.getType(Reg) != Ty)
1797 return error(
"inconsistent type for generic virtual register");
1800 MRI.setType(Reg, Ty);
1801 }
else if (
Reg.isVirtual()) {
1807 return error(
"generic virtual registers must have a type");
1812 return error(
"cannot have a killed def operand");
1815 return error(
"cannot have a dead use operand");
1829 const APSInt &
Int = Token.integerValue();
1830 if (
auto SImm =
Int.trySExtValue();
Int.isSigned() && SImm.has_value())
1832 else if (
auto UImm =
Int.tryZExtValue(); !
Int.isSigned() && UImm.has_value())
1835 return error(
"integer literal is too large to be an immediate operand");
1840bool MIParser::parseTargetImmMnemonic(
const unsigned OpCode,
1841 const unsigned OpIdx,
1845 auto Loc = Token.location();
1851 Len += Token.range().size();
1860 Src =
StringRef(Loc, Len + Token.stringValue().size());
1865 ->
bool { return error(Loc, Msg); }))
1877 auto Source = StringValue.
str();
1882 return ErrCB(Loc + Err.getColumnNo(), Err.getMessage());
1888 return ::parseIRConstant(
1889 Loc, StringValue, PFS,
C,
1891 return error(Loc, Msg);
1904 return Size != 0 && isUInt<16>(
Size);
1908 return NumElts != 0 && isUInt<16>(NumElts);
1912 return isUInt<24>(AddrSpace);
1916 if (Token.range().front() ==
's' || Token.range().front() ==
'p') {
1919 return error(
"expected integers after 's'/'p' type character");
1922 if (Token.range().front() ==
's') {
1925 return error(
"invalid size for scalar type");
1930 }
else if (Token.range().front() ==
'p') {
1934 return error(
"invalid address space number");
1944 "expected sN, pA, <M x sN>, or <M x pA> for GlobalISel type");
1948 return error(Loc,
"expected <M x sN> or <M x pA> for vector type");
1949 uint64_t NumElements = Token.integerValue().getZExtValue();
1951 return error(
"invalid number of vector elements");
1956 return error(Loc,
"expected <M x sN> or <M x pA> for vector type");
1959 if (Token.range().front() !=
's' && Token.range().front() !=
'p')
1960 return error(Loc,
"expected <M x sN> or <M x pA> for vector type");
1963 return error(
"expected integers after 's'/'p' type character");
1965 if (Token.range().front() ==
's') {
1968 return error(
"invalid size for scalar type");
1970 }
else if (Token.range().front() ==
'p') {
1974 return error(
"invalid address space number");
1978 return error(Loc,
"expected <M x sN> or <M x pA> for vector type");
1982 return error(Loc,
"expected <M x sN> or <M x pA> for vector type");
1992 if (TypeStr.
front() !=
'i' && TypeStr.
front() !=
's' &&
1993 TypeStr.
front() !=
'p')
1995 "a typed immediate operand should start with one of 'i', 's', or 'p'");
1998 return error(
"expected integers after 'i'/'s'/'p' type character");
2000 auto Loc = Token.location();
2004 !(Token.range() ==
"true" || Token.range() ==
"false"))
2005 return error(
"expected an integer literal");
2015 auto Loc = Token.location();
2019 return error(
"expected a floating point literal");
2030 assert(S[0] ==
'0' && tolower(S[1]) ==
'x');
2032 if (!isxdigit(S[2]))
2035 APInt A(V.size()*4, V, 16);
2039 unsigned NumBits = (
A == 0) ? 32 :
A.getActiveBits();
2050 return ErrCB(Token.
location(),
"expected 32-bit integer (too large)");
2058 if (
A.getBitWidth() > 32)
2059 return ErrCB(Token.
location(),
"expected 32-bit integer (too large)");
2060 Result =
A.getZExtValue();
2066bool MIParser::getUnsigned(
unsigned &Result) {
2067 return ::getUnsigned(
2069 return error(Loc, Msg);
2079 auto MBBInfo = PFS.MBBSlots.find(
Number);
2080 if (MBBInfo == PFS.MBBSlots.end())
2081 return error(
Twine(
"use of undefined machine basic block #") +
2083 MBB = MBBInfo->second;
2086 if (!Token.stringValue().empty() && Token.stringValue() !=
MBB->
getName())
2088 " isn't '" + Token.stringValue() +
"'");
2101bool MIParser::parseStackFrameIndex(
int &FI) {
2106 auto ObjectInfo = PFS.StackObjectSlots.find(
ID);
2107 if (ObjectInfo == PFS.StackObjectSlots.end())
2111 if (
const auto *Alloca =
2112 MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
2113 Name = Alloca->getName();
2114 if (!Token.stringValue().empty() && Token.stringValue() !=
Name)
2116 "' isn't '" + Token.stringValue() +
"'");
2118 FI = ObjectInfo->second;
2124 if (parseStackFrameIndex(FI))
2130bool MIParser::parseFixedStackFrameIndex(
int &FI) {
2135 auto ObjectInfo = PFS.FixedStackObjectSlots.find(
ID);
2136 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
2137 return error(
Twine(
"use of undefined fixed stack object '%fixed-stack.") +
2140 FI = ObjectInfo->second;
2144bool MIParser::parseFixedStackObjectOperand(
MachineOperand &Dest) {
2146 if (parseFixedStackFrameIndex(FI))
2155 switch (Token.
kind()) {
2160 return ErrCB(Token.
location(),
Twine(
"use of undefined global value '") +
2161 Token.
range() +
"'");
2169 return ErrCB(Token.
location(),
Twine(
"use of undefined global value '@") +
2170 Twine(GVIdx) +
"'");
2180bool MIParser::parseGlobalValue(
GlobalValue *&GV) {
2181 return ::parseGlobalValue(
2184 return error(Loc, Msg);
2194 if (parseOperandsOffset(Dest))
2199bool MIParser::parseConstantPoolIndexOperand(
MachineOperand &Dest) {
2206 return error(
"use of undefined constant '%const." +
Twine(
ID) +
"'");
2209 if (parseOperandsOffset(Dest))
2219 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(
ID);
2220 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
2221 return error(
"use of undefined jump table '%jump-table." +
Twine(
ID) +
"'");
2229 const char *
Symbol = MF.createExternalSymbolName(Token.stringValue());
2232 if (parseOperandsOffset(Dest))
2242 if (parseOperandsOffset(Dest))
2247bool MIParser::parseSubRegisterIndexOperand(
MachineOperand &Dest) {
2250 unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
2251 if (SubRegIndex == 0)
2261 auto Loc = Token.location();
2264 return error(
"expected metadata id after '!'");
2268 auto NodeInfo = PFS.IRSlots.MetadataNodes.find(
ID);
2269 if (NodeInfo == PFS.IRSlots.MetadataNodes.end()) {
2270 NodeInfo = PFS.MachineMetadataNodes.find(
ID);
2271 if (NodeInfo == PFS.MachineMetadataNodes.end())
2272 return error(Loc,
"use of undefined metadata '!" +
Twine(
ID) +
"'");
2275 Node = NodeInfo->second.get();
2279bool MIParser::parseDIExpression(
MDNode *&Expr) {
2302 return error(
Twine(
"invalid DWARF op '") + Token.stringValue() +
"'");
2306 Token.integerValue().isSigned())
2307 return error(
"expected unsigned integer");
2309 auto &
U = Token.integerValue();
2325bool MIParser::parseDILocation(
MDNode *&Loc) {
2329 bool HaveLine =
false;
2331 unsigned Column = 0;
2333 MDNode *InlinedAt =
nullptr;
2334 bool ImplicitCode =
false;
2342 if (Token.stringValue() ==
"line") {
2347 Token.integerValue().isSigned())
2348 return error(
"expected unsigned integer");
2349 Line = Token.integerValue().getZExtValue();
2354 if (Token.stringValue() ==
"column") {
2359 Token.integerValue().isSigned())
2360 return error(
"expected unsigned integer");
2361 Column = Token.integerValue().getZExtValue();
2365 if (Token.stringValue() ==
"scope") {
2370 return error(
"expected metadata node");
2371 if (!isa<DIScope>(Scope))
2372 return error(
"expected DIScope node");
2375 if (Token.stringValue() ==
"inlinedAt") {
2383 if (parseDILocation(InlinedAt))
2386 return error(
"expected metadata node");
2387 if (!isa<DILocation>(InlinedAt))
2388 return error(
"expected DILocation node");
2391 if (Token.stringValue() ==
"isImplicitCode") {
2396 return error(
"expected true/false");
2400 if (Token.stringValue() ==
"true")
2401 ImplicitCode =
true;
2402 else if (Token.stringValue() ==
"false")
2403 ImplicitCode =
false;
2405 return error(
"expected true/false");
2410 return error(
Twine(
"invalid DILocation argument '") +
2411 Token.stringValue() +
"'");
2419 return error(
"DILocation requires line number");
2421 return error(
"DILocation requires a scope");
2423 Loc =
DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
2424 InlinedAt, ImplicitCode);
2434 if (parseDIExpression(
Node))
2441bool MIParser::parseCFIOffset(
int &
Offset) {
2443 return error(
"expected a cfi offset");
2444 if (Token.integerValue().getSignificantBits() > 32)
2445 return error(
"expected a 32 bit integer (the cfi offset is too large)");
2446 Offset = (int)Token.integerValue().getExtValue();
2451bool MIParser::parseCFIRegister(
Register &Reg) {
2453 return error(
"expected a cfi register");
2455 if (parseNamedRegister(LLVMReg))
2457 const auto *
TRI = MF.getSubtarget().getRegisterInfo();
2458 assert(
TRI &&
"Expected target register info");
2459 int DwarfReg =
TRI->getDwarfRegNum(LLVMReg,
true);
2461 return error(
"invalid DWARF register");
2467bool MIParser::parseCFIAddressSpace(
unsigned &
AddressSpace) {
2469 return error(
"expected a cfi address space literal");
2470 if (Token.integerValue().isSigned())
2471 return error(
"expected an unsigned integer (cfi address space)");
2477bool MIParser::parseCFIEscapeValues(std::string &Values) {
2480 return error(
"expected a hexadecimal literal");
2484 if (
Value > UINT8_MAX)
2485 return error(
"expected a 8-bit integer (too large)");
2486 Values.push_back(
static_cast<uint8_t
>(
Value));
2493 auto Kind = Token.kind();
2501 if (parseCFIRegister(Reg))
2516 CFIIndex = MF.addFrameInst(
2520 if (parseCFIRegister(Reg))
2526 if (parseCFIOffset(
Offset))
2532 if (parseCFIOffset(
Offset))
2534 CFIIndex = MF.addFrameInst(
2556 if (parseCFIRegister(Reg))
2564 if (parseCFIRegister(Reg))
2571 parseCFIRegister(Reg2))
2586 if (parseCFIEscapeValues(Values))
2600 switch (Token.kind()) {
2602 BB = dyn_cast_or_null<BasicBlock>(
2603 F.getValueSymbolTable()->lookup(Token.stringValue()));
2605 return error(
Twine(
"use of undefined IR block '") + Token.range() +
"'");
2609 unsigned SlotNumber = 0;
2612 BB =
const_cast<BasicBlock *
>(getIRBlock(SlotNumber,
F));
2614 return error(
Twine(
"use of undefined IR block '%ir-block.") +
2615 Twine(SlotNumber) +
"'");
2631 return error(
"expected a global value");
2635 auto *
F = dyn_cast<Function>(GV);
2637 return error(
"expected an IR function reference");
2643 return error(
"expected an IR block reference");
2644 if (parseIRBlock(BB, *
F))
2650 if (parseOperandsOffset(Dest))
2659 return error(
"expected syntax intrinsic(@llvm.whatever)");
2662 return error(
"expected syntax intrinsic(@llvm.whatever)");
2664 std::string
Name = std::string(Token.stringValue());
2668 return error(
"expected ')' to terminate intrinsic name");
2678 return error(
"unknown intrinsic name");
2690 return error(
"expected syntax intpred(whatever) or floatpred(whatever");
2693 return error(
"whatever");
2716 return error(
"invalid floating-point predicate");
2731 return error(
"invalid integer predicate");
2737 return error(
"predicate should be terminated by ')'.");
2747 return error(
"expected syntax shufflemask(<integer or undef>, ...)");
2754 const APSInt &
Int = Token.integerValue();
2757 return error(
"expected integer constant");
2763 return error(
"shufflemask should be terminated by ')'.");
2775 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2778 return error(
"expected unsigned integer for instruction index");
2779 uint64_t InstrIdx = Token.integerValue().getZExtValue();
2780 assert(InstrIdx <= std::numeric_limits<unsigned>::max() &&
2781 "Instruction reference's instruction index is too large");
2785 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2788 return error(
"expected unsigned integer for operand index");
2789 uint64_t OpIdx = Token.integerValue().getZExtValue();
2790 assert(OpIdx <= std::numeric_limits<unsigned>::max() &&
2791 "Instruction reference's operand index is too large");
2795 return error(
"expected syntax dbg-instr-ref(<unsigned>, <unsigned>)");
2807 return error(
"expected the name of the target index");
2809 if (PFS.Target.getTargetIndex(Token.stringValue(),
Index))
2810 return error(
"use of undefined target index '" + Token.stringValue() +
"'");
2815 if (parseOperandsOffset(Dest))
2820bool MIParser::parseCustomRegisterMaskOperand(
MachineOperand &Dest) {
2821 assert(Token.stringValue() ==
"CustomRegMask" &&
"Expected a custom RegMask");
2830 return error(
"expected a named register");
2832 if (parseNamedRegister(Reg))
2847bool MIParser::parseLiveoutRegisterMaskOperand(
MachineOperand &Dest) {
2855 return error(
"expected a named register");
2857 if (parseNamedRegister(Reg))
2872bool MIParser::parseMachineOperand(
const unsigned OpCode,
const unsigned OpIdx,
2874 std::optional<unsigned> &TiedDefIdx) {
2875 switch (Token.kind()) {
2890 return parseRegisterOperand(Dest, TiedDefIdx);
2892 return parseImmediateOperand(Dest);
2899 return parseFPImmediateOperand(Dest);
2901 return parseMBBOperand(Dest);
2903 return parseStackObjectOperand(Dest);
2905 return parseFixedStackObjectOperand(Dest);
2908 return parseGlobalAddressOperand(Dest);
2910 return parseConstantPoolIndexOperand(Dest);
2912 return parseJumpTableIndexOperand(Dest);
2914 return parseExternalSymbolOperand(Dest);
2916 return parseMCSymbolOperand(Dest);
2918 return parseSubRegisterIndexOperand(Dest);
2921 return parseMetadataOperand(Dest);
2938 return parseCFIOperand(Dest);
2940 return parseBlockAddressOperand(Dest);
2942 return parseIntrinsicOperand(Dest);
2944 return parseTargetIndexOperand(Dest);
2946 return parseLiveoutRegisterMaskOperand(Dest);
2949 return parsePredicateOperand(Dest);
2951 return parseShuffleMaskOperand(Dest);
2953 return parseDbgInstrRefOperand(Dest);
2957 if (
const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2961 }
else if (Token.stringValue() ==
"CustomRegMask") {
2962 return parseCustomRegisterMaskOperand(Dest);
2964 return parseTypedImmediateOperand(Dest);
2966 const auto *
TII = MF.getSubtarget().getInstrInfo();
2967 if (
const auto *Formatter =
TII->getMIRFormatter()) {
2968 return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
2974 return error(
"expected a machine operand");
2979bool MIParser::parseMachineOperandAndTargetFlags(
2980 const unsigned OpCode,
const unsigned OpIdx,
MachineOperand &Dest,
2981 std::optional<unsigned> &TiedDefIdx) {
2983 bool HasTargetFlags =
false;
2985 HasTargetFlags =
true;
2990 return error(
"expected the name of the target flag");
2991 if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
2992 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
2993 return error(
"use of undefined target flag '" + Token.stringValue() +
3000 return error(
"expected the name of the target flag");
3001 unsigned BitFlag = 0;
3002 if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
3003 return error(
"use of undefined target flag '" + Token.stringValue() +
3012 auto Loc = Token.location();
3013 if (parseMachineOperand(OpCode, OpIdx, Dest, TiedDefIdx))
3015 if (!HasTargetFlags)
3018 return error(Loc,
"register operands can't have target flags");
3023bool MIParser::parseOffset(int64_t &
Offset) {
3030 return error(
"expected an integer literal after '" + Sign +
"'");
3031 if (Token.integerValue().getSignificantBits() > 64)
3032 return error(
"expected 64-bit integer (too large)");
3033 Offset = Token.integerValue().getExtValue();
3040bool MIParser::parseIRBlockAddressTaken(
BasicBlock *&BB) {
3044 return error(
"expected basic block after 'ir_block_address_taken'");
3046 if (parseIRBlock(BB, MF.getFunction()))
3053bool MIParser::parseAlignment(
uint64_t &Alignment) {
3057 return error(
"expected an integer literal after 'align'");
3058 if (getUint64(Alignment))
3063 return error(
"expected a power-of-2 literal after 'align'");
3068bool MIParser::parseAddrspace(
unsigned &Addrspace) {
3072 return error(
"expected an integer literal after 'addrspace'");
3089 switch (Token.
kind()) {
3095 unsigned SlotNumber = 0;
3123 return ErrCB(Token.
location(),
Twine(
"use of undefined IR value '") + Token.
range() +
"'");
3127bool MIParser::parseIRValue(
const Value *&V) {
3128 return ::parseIRValue(
3130 return error(Loc, Msg);
3134bool MIParser::getUint64(
uint64_t &Result) {
3135 if (Token.hasIntegerValue()) {
3136 if (Token.integerValue().getActiveBits() > 64)
3137 return error(
"expected 64-bit integer (too large)");
3138 Result = Token.integerValue().getZExtValue();
3145 if (
A.getBitWidth() > 64)
3146 return error(
"expected 64-bit integer (too large)");
3153bool MIParser::getHexUint(
APInt &Result) {
3154 return ::getHexUint(Token, Result);
3158 const auto OldFlags =
Flags;
3159 switch (Token.kind()) {
3174 if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
3175 return error(
"use of undefined target MMO flag '" + Token.stringValue() +
3183 if (OldFlags == Flags)
3186 return error(
"duplicate '" + Token.stringValue() +
"' memory operand flag");
3192 switch (Token.kind()) {
3194 PSV = MF.getPSVManager().getStack();
3197 PSV = MF.getPSVManager().getGOT();
3200 PSV = MF.getPSVManager().getJumpTable();
3203 PSV = MF.getPSVManager().getConstantPool();
3207 if (parseFixedStackFrameIndex(FI))
3209 PSV = MF.getPSVManager().getFixedStack(FI);
3215 if (parseStackFrameIndex(FI))
3217 PSV = MF.getPSVManager().getFixedStack(FI);
3223 switch (Token.kind()) {
3229 PSV = MF.getPSVManager().getGlobalValueCallEntry(GV);
3233 PSV = MF.getPSVManager().getExternalSymbolCallEntry(
3234 MF.createExternalSymbolName(Token.stringValue()));
3238 "expected a global value or an external symbol after 'call-entry'");
3243 const auto *
TII = MF.getSubtarget().getInstrInfo();
3244 if (
const auto *Formatter =
TII->getMIRFormatter()) {
3245 if (Formatter->parseCustomPseudoSourceValue(
3246 Token.stringValue(), MF, PFS, PSV,
3248 return error(Loc, Msg);
3252 return error(
"unable to parse target custom pseudo source value");
3268 if (parseMemoryPseudoSourceValue(PSV))
3281 return error(
"expected an IR value reference");
3282 const Value *
V =
nullptr;
3285 if (V && !
V->getType()->isPointerTy())
3286 return error(
"expected a pointer IR value");
3295bool MIParser::parseOptionalScope(
LLVMContext &Context,
3301 return error(
"expected '(' in syncscope");
3304 if (parseStringConstant(SSN))
3309 return error(
"expected ')' in syncscope");
3315bool MIParser::parseOptionalAtomicOrdering(
AtomicOrdering &Order) {
3334 return error(
"expected an atomic scope, ordering or a size specification");
3341 while (Token.isMemoryOperandFlag()) {
3342 if (parseMemoryOperandFlag(Flags))
3346 (Token.stringValue() !=
"load" && Token.stringValue() !=
"store"))
3347 return error(
"expected 'load' or 'store' memory operation");
3348 if (Token.stringValue() ==
"load")
3362 if (parseOptionalScope(MF.getFunction().getContext(), SSID))
3367 if (parseOptionalAtomicOrdering(Order))
3370 if (parseOptionalAtomicOrdering(FailureOrder))
3377 return error(
"expected memory LLT, the size integer literal or 'unknown-size' after "
3378 "memory operation");
3382 if (getUint64(
Size))
3394 if (parseLowLevelType(Token.location(), MemoryType))
3409 if (Token.stringValue() !=
Word)
3413 if (parseMachinePointerInfo(
Ptr))
3421 switch (Token.kind()) {
3425 if (parseAlignment(Alignment))
3427 if (
Ptr.Offset & (Alignment - 1)) {
3432 return error(
"specified alignment is more aligned than offset");
3434 BaseAlignment = Alignment;
3439 if (parseAlignment(BaseAlignment))
3443 if (parseAddrspace(
Ptr.AddrSpace))
3468 return error(
"expected 'align' or '!tbaa' or '!alias.scope' or "
3469 "'!noalias' or '!range'");
3474 Dest = MF.getMachineMemOperand(
Ptr, Flags, MemoryType,
Align(BaseAlignment),
3475 AAInfo, Range, SSID, Order, FailureOrder);
3479bool MIParser::parsePreOrPostInstrSymbol(
MCSymbol *&Symbol) {
3482 "Invalid token for a pre- post-instruction symbol!");
3485 return error(
"expected a symbol after 'pre-instr-symbol'");
3486 Symbol = getOrCreateMCSymbol(Token.stringValue());
3492 return error(
"expected ',' before the next machine operand");
3497bool MIParser::parseHeapAllocMarker(
MDNode *&
Node) {
3499 "Invalid token for a heap alloc marker!");
3504 return error(
"expected a MDNode after 'heap-alloc-marker'");
3509 return error(
"expected ',' before the next machine operand");
3514bool MIParser::parsePCSections(
MDNode *&
Node) {
3516 "Invalid token for a PC sections!");
3521 return error(
"expected a MDNode after 'pcsections'");
3526 return error(
"expected ',' before the next machine operand");
3536 for (
const auto &BB :
F) {
3542 Slots2BasicBlocks.
insert(std::make_pair(
unsigned(Slot), &BB));
3549 return Slots2BasicBlocks.
lookup(Slot);
3552const BasicBlock *MIParser::getIRBlock(
unsigned Slot) {
3553 if (Slots2BasicBlocks.empty())
3559 if (&
F == &MF.getFunction())
3560 return getIRBlock(Slot);
3572 return MF.getContext().getOrCreateSymbol(
Name);
3575bool MIParser::parseStringConstant(std::string &Result) {
3577 return error(
"expected string constant");
3578 Result = std::string(Token.stringValue());
3586 return MIParser(PFS,
Error, Src).parseBasicBlockDefinitions(PFS.
MBBSlots);
3591 return MIParser(PFS,
Error, Src).parseBasicBlocks();
3597 return MIParser(PFS,
Error, Src).parseStandaloneMBB(
MBB);
3603 return MIParser(PFS,
Error, Src).parseStandaloneRegister(Reg);
3609 return MIParser(PFS,
Error, Src).parseStandaloneNamedRegister(Reg);
3615 return MIParser(PFS,
Error, Src).parseStandaloneVirtualRegister(
Info);
3621 return MIParser(PFS,
Error, Src).parseStandaloneStackObject(FI);
3626 return MIParser(PFS,
Error, Src).parseStandaloneMDNode(Node);
3631 return MIParser(PFS,
Error, Src, SrcRange).parseMachineMetadata();
3639 ErrorCallback(Loc, Msg);
3643 return ::parseIRValue(Token, PFS, V, ErrorCallback);
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file defines the StringMap class.
This file implements a class to represent arbitrary precision integral constant values and operations...
This file implements the APSInt class, which is a simple class that represents an arbitrary sized int...
Atomic ordering constants.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Analysis containing CSE Info
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
This file defines the DenseMap class.
const HexagonInstrInfo * TII
A common definition of LaneBitmask for use in TableGen and CodeGen.
Implement a low-level type suitable for MachineInstr level instruction selection.
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)
static bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue, PerFunctionMIParsingState &PFS, const Constant *&C, ErrorCallbackType ErrCB)
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value * > &Slots2Values)
Creates the mapping from slot numbers to function's unnamed IR values.
static bool parseIRValue(const MIToken &Token, PerFunctionMIParsingState &PFS, const Value *&V, ErrorCallbackType ErrCB)
static bool verifyScalarSize(uint64_t Size)
static bool getUnsigned(const MIToken &Token, unsigned &Result, ErrorCallbackType ErrCB)
static bool getHexUint(const MIToken &Token, APInt &Result)
static bool verifyVectorElementCount(uint64_t NumElts)
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value * > &Slots2Values)
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock * > &Slots2BasicBlocks)
function_ref< bool(StringRef::iterator Loc, const Twine &)> ErrorCallbackType
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
static bool parseGlobalValue(const MIToken &Token, PerFunctionMIParsingState &PFS, GlobalValue *&GV, ErrorCallbackType ErrCB)
static bool verifyAddrSpace(uint64_t AddrSpace)
mir Rename Register Operands
unsigned const TargetRegisterInfo * TRI
This file provides utility analysis objects describing memory locations.
Module.h This file contains the declarations for the Module class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool parseMetadata(const StringRef &Input, uint64_t &FunctionHash, uint32_t &Attributes)
Parse Input that contains metadata.
This file defines the SmallVector class.
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
Class for arbitrary precision integers.
uint64_t getZExtValue() const
Get zero extended value.
uint64_t getLimitedValue(uint64_t Limit=UINT64_MAX) const
If this value is smaller than the specified limit, return it, otherwise return the limit value.
An arbitrary precision integer that knows its signedness.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
LLVM Basic Block Representation.
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
static BranchProbability getRaw(uint32_t N)
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
@ FCMP_OEQ
0 0 0 1 True if ordered and equal
@ FCMP_TRUE
1 1 1 1 Always true (always folded)
@ ICMP_SLT
signed less than
@ ICMP_SLE
signed less or equal
@ FCMP_OLT
0 1 0 0 True if ordered and less than
@ FCMP_ULE
1 1 0 1 True if unordered, less than, or equal
@ FCMP_OGT
0 0 1 0 True if ordered and greater than
@ FCMP_OGE
0 0 1 1 True if ordered and greater than or equal
@ ICMP_UGE
unsigned greater or equal
@ ICMP_UGT
unsigned greater than
@ ICMP_SGT
signed greater than
@ FCMP_ULT
1 1 0 0 True if unordered or less than
@ FCMP_ONE
0 1 1 0 True if ordered and operands are unequal
@ FCMP_UEQ
1 0 0 1 True if unordered or equal
@ ICMP_ULT
unsigned less than
@ FCMP_UGT
1 0 1 0 True if unordered or greater than
@ FCMP_OLE
0 1 0 1 True if ordered and less than or equal
@ FCMP_ORD
0 1 1 1 True if ordered (no nans)
@ ICMP_SGE
signed greater or equal
@ FCMP_UNE
1 1 1 0 True if unordered or not equal
@ ICMP_ULE
unsigned less or equal
@ FCMP_UGE
1 0 1 1 True if unordered, greater than, or equal
@ FCMP_FALSE
0 0 0 0 Always false (always folded)
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
bool isFPPredicate() const
bool isIntPredicate() const
This is an important base class in LLVM.
This class represents an Operation in the Expression.
A parsed version of the target data layout string in and methods for querying it.
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Lightweight error class with error context and mandatory checking.
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Module * getParent()
Get the module that this global value is contained inside of...
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
static constexpr LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
static constexpr LLT fixed_vector(unsigned NumElements, unsigned ScalarSizeInBits)
Get a low-level fixed-width vector of some number of elements and element width.
This is an important class for using LLVM in a threaded context.
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_undefined From now on the previous value of Register can't be restored anymore.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2, SMLoc Loc={})
.cfi_register Previous value of Register1 is saved in register Register2.
static MCCFIInstruction createLLVMDefAspaceCfa(MCSymbol *L, unsigned Register, int Offset, unsigned AddressSpace, SMLoc Loc)
.cfi_llvm_def_aspace_cfa defines the rule for computing the CFA to be the result of evaluating the DW...
static MCCFIInstruction createNegateRAState(MCSymbol *L, SMLoc Loc={})
.cfi_negate_ra_state AArch64 negate RA state.
static MCCFIInstruction createRememberState(MCSymbol *L, SMLoc Loc={})
.cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment, SMLoc Loc={})
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, SMLoc Loc={}, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
static MCCFIInstruction createWindowSave(MCSymbol *L, SMLoc Loc={})
.cfi_window_save SPARC register window is saved.
static MCCFIInstruction createRestoreState(MCSymbol *L, SMLoc Loc={})
.cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_same_value Current value of Register is the same as in the previous frame.
Describe properties that are true of each instruction in the target description file.
ArrayRef< MCPhysReg > implicit_defs() const
Return a list of registers that are potentially written by any instance of this machine instruction.
bool isCall() const
Return true if the instruction is a call.
ArrayRef< MCPhysReg > implicit_uses() const
Return a list of registers that are potentially read by any instance of this machine instruction.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
void replaceAllUsesWith(Metadata *MD)
RAUW a temporary.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
static MDString * get(LLVMContext &Context, StringRef Str)
static MDTuple * getDistinct(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a distinct node.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
static TempMDTuple getTemporary(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Return a temporary node.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
void setAddressTakenIRBlock(BasicBlock *BB)
Set this block to reflect that it corresponds to an IR-level basic block with a BlockAddress.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
void setCallFrameSize(unsigned N)
Set the call frame size on entry to this basic block.
void setAlignment(Align A)
Set alignment of the basic block.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void setSectionID(MBBSectionID V)
Sets the section ID for this basic block.
void setIsInlineAsmBrIndirectTarget(bool V=true)
Indicates if this is the indirect dest of an INLINEASM_BR.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
void setIsEHFuncletEntry(bool V=true)
Indicates if this is the entry block of an EH funclet.
void setBBID(unsigned V)
Sets the fixed BBID of this basic block.
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
void setMachineBlockAddressTaken()
Set this block to indicate that its address is used as something other than the target of a terminato...
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
Representation of each machine instruction.
void setFlag(MIFlag Flag)
Set a MI flag.
A description of a memory reference used in the backend.
Flags
Flags values. These may be or'd together.
@ MOVolatile
The memory access is volatile.
@ MODereferenceable
The memory access is dereferenceable (i.e., doesn't trap).
@ MOLoad
The memory access reads data.
@ MONonTemporal
The memory access is non-temporal.
@ MOInvariant
The memory access always returns the same value (or traps).
@ MOStore
The memory access writes data.
MachineOperand class - Representation of each machine instruction operand.
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static MachineOperand CreateCImm(const ConstantInt *CI)
static MachineOperand CreateMetadata(const MDNode *Meta)
static MachineOperand CreatePredicate(unsigned Pred)
static MachineOperand CreateImm(int64_t Val)
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
static MachineOperand CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx)
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
void setTargetFlags(unsigned F)
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
static MachineOperand CreateFI(int Idx)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Register createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet.
This interface provides simple read-only access to a block of memory, and provides simple methods for...
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
const char * getBufferEnd() const
const char * getBufferStart() const
Manage lifetime of a slot tracker for printing IR.
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Special value supplied for machine level alias analysis.
Holds all the information related to register banks.
const RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
unsigned getNumRegBanks() const
Get the total number of register banks.
This class implements the register bank concept.
Wrapper class representing virtual and physical registers.
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Represents a location in source code.
static SMLoc getFromPointer(const char *Ptr)
Represents a range in source code.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling.
unsigned getMainFileID() const
const MemoryBuffer * getMemoryBuffer(unsigned i) const
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges={}, ArrayRef< SMFixIt > FixIts={}) const
Return an SMDiagnostic at the specified location with the specified string.
iterator find(StringRef Key)
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
StringRef - Represent a constant reference to a string, i.e.
std::string str() const
str - Get the contents as an std::string.
constexpr StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
StringRef drop_front(size_t N=1) const
Return a StringRef equal to 'this' but with the first N elements dropped.
constexpr size_t size() const
size - Get the string size.
char front() const
front - Get the first character in the string.
std::string lower() const
static constexpr size_t npos
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
TargetIntrinsicInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const RegisterBankInfo * getRegBankInfo() const
If the information for the register banks is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
Target - Wrapper for Target specific information.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
LLVM Value Representation.
An efficient, type-erasing, non-owning reference to a callable.
unsigned getOperationEncoding(StringRef OperationEncodingString)
unsigned getAttributeEncoding(StringRef EncodingString)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const CustomOperand< const MCSubtargetInfo & > Msg[]
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ C
The default llvm calling convention, compatible with C.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Debug
Register 'use' is for debugging purpose.
@ Renamable
Register that may be renamed.
@ Define
Register definition.
@ InternalRead
Register reads a value that is defined inside the same instruction or bundle.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
@ EarlyClobber
Register definition happens before uses.
@ System
Synchronized with respect to all concurrently executing threads.
Reg
All possible values of the reg field in the ModR/M byte.
std::optional< const char * > toString(const std::optional< DWARFFormValue > &V)
Take an optional DWARFFormValue and try to extract a string value from it.
support::ulittle32_t Word
Scope
Defines the scope in which this symbol should be visible: Default – Visible in the public interface o...
This is an optimization pass for GlobalISel generic memory operations.
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
constexpr bool isPowerOf2_64(uint64_t Value)
Return true if the argument is a power of two > 0 (64 bit edition.)
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
uint64_t PowerOf2Ceil(uint64_t A)
Returns the power of two which is greater than or equal to the given value.
AtomicOrdering
Atomic ordering for LLVM's memory model.
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
bool parseRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src, SMRange SourceRange, SMDiagnostic &Error)
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg, StringRef Src, SMDiagnostic &Error)
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
MDNode * Scope
The tag for alias scope specification (used with noalias).
MDNode * TBAA
The tag for type-based alias analysis.
MDNode * NoAlias
The tag specifying the noalias scope.
This struct is a compact representation of a valid (non-zero power of two) alignment.
static constexpr LaneBitmask getAll()
static const MBBSectionID ExceptionSectionID
static const MBBSectionID ColdSectionID
A token produced by the machine instruction lexer.
bool hasIntegerValue() const
bool is(TokenKind K) const
StringRef stringValue() const
Return the token's string value.
@ kw_cfi_aarch64_negate_ra_sign_state
@ kw_cfi_llvm_def_aspace_cfa
@ kw_inlineasm_br_indirect_target
@ kw_cfi_def_cfa_register
@ kw_cfi_adjust_cfa_offset
@ kw_machine_block_address_taken
@ kw_ir_block_address_taken
StringRef::iterator location() const
const APSInt & integerValue() const
This class contains a discriminated union of information about pointers in memory operands,...
VRegInfo & getVRegInfo(Register Num)
const SlotMapping & IRSlots
const Value * getIRValue(unsigned Slot)
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
StringMap< VRegInfo * > VRegInfosNamed
DenseMap< unsigned, const Value * > Slots2Values
Maps from slot numbers to function's unnamed values.
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
DenseMap< Register, VRegInfo * > VRegInfos
VRegInfo & getVRegInfoNamed(StringRef RegName)
BumpPtrAllocator Allocator
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.