LLVM  10.0.0svn
MIParser.cpp
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1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the parsing of machine instructions.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 #include "MILexer.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/APSInt.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/None.h"
20 #include "llvm/ADT/Optional.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringMap.h"
23 #include "llvm/ADT/StringRef.h"
24 #include "llvm/ADT/StringSwitch.h"
25 #include "llvm/ADT/Twine.h"
27 #include "llvm/AsmParser/Parser.h"
43 #include "llvm/IR/BasicBlock.h"
44 #include "llvm/IR/Constants.h"
45 #include "llvm/IR/DataLayout.h"
47 #include "llvm/IR/DebugLoc.h"
48 #include "llvm/IR/Function.h"
49 #include "llvm/IR/InstrTypes.h"
50 #include "llvm/IR/Instructions.h"
51 #include "llvm/IR/Intrinsics.h"
52 #include "llvm/IR/Metadata.h"
53 #include "llvm/IR/Module.h"
55 #include "llvm/IR/Type.h"
56 #include "llvm/IR/Value.h"
58 #include "llvm/MC/LaneBitmask.h"
59 #include "llvm/MC/MCContext.h"
60 #include "llvm/MC/MCDwarf.h"
61 #include "llvm/MC/MCInstrDesc.h"
62 #include "llvm/MC/MCRegisterInfo.h"
65 #include "llvm/Support/Casting.h"
69 #include "llvm/Support/SMLoc.h"
70 #include "llvm/Support/SourceMgr.h"
74 #include <algorithm>
75 #include <cassert>
76 #include <cctype>
77 #include <cstddef>
78 #include <cstdint>
79 #include <limits>
80 #include <string>
81 #include <utility>
82 
83 using namespace llvm;
84 
86  const TargetSubtargetInfo &NewSubtarget) {
87 
88  // If the subtarget changed, over conservatively assume everything is invalid.
89  if (&Subtarget == &NewSubtarget)
90  return;
91 
92  Names2InstrOpCodes.clear();
93  Names2Regs.clear();
94  Names2RegMasks.clear();
95  Names2SubRegIndices.clear();
96  Names2TargetIndices.clear();
97  Names2DirectTargetFlags.clear();
98  Names2BitmaskTargetFlags.clear();
99  Names2MMOTargetFlags.clear();
100 
101  initNames2RegClasses();
102  initNames2RegBanks();
103 }
104 
105 void PerTargetMIParsingState::initNames2Regs() {
106  if (!Names2Regs.empty())
107  return;
108 
109  // The '%noreg' register is the register 0.
110  Names2Regs.insert(std::make_pair("noreg", 0));
111  const auto *TRI = Subtarget.getRegisterInfo();
112  assert(TRI && "Expected target register info");
113 
114  for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
115  bool WasInserted =
116  Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
117  .second;
118  (void)WasInserted;
119  assert(WasInserted && "Expected registers to be unique case-insensitively");
120  }
121 }
122 
124  unsigned &Reg) {
125  initNames2Regs();
126  auto RegInfo = Names2Regs.find(RegName);
127  if (RegInfo == Names2Regs.end())
128  return true;
129  Reg = RegInfo->getValue();
130  return false;
131 }
132 
133 void PerTargetMIParsingState::initNames2InstrOpCodes() {
134  if (!Names2InstrOpCodes.empty())
135  return;
136  const auto *TII = Subtarget.getInstrInfo();
137  assert(TII && "Expected target instruction info");
138  for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
139  Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
140 }
141 
143  unsigned &OpCode) {
144  initNames2InstrOpCodes();
145  auto InstrInfo = Names2InstrOpCodes.find(InstrName);
146  if (InstrInfo == Names2InstrOpCodes.end())
147  return true;
148  OpCode = InstrInfo->getValue();
149  return false;
150 }
151 
152 void PerTargetMIParsingState::initNames2RegMasks() {
153  if (!Names2RegMasks.empty())
154  return;
155  const auto *TRI = Subtarget.getRegisterInfo();
156  assert(TRI && "Expected target register info");
157  ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
158  ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
159  assert(RegMasks.size() == RegMaskNames.size());
160  for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
161  Names2RegMasks.insert(
162  std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
163 }
164 
166  initNames2RegMasks();
167  auto RegMaskInfo = Names2RegMasks.find(Identifier);
168  if (RegMaskInfo == Names2RegMasks.end())
169  return nullptr;
170  return RegMaskInfo->getValue();
171 }
172 
173 void PerTargetMIParsingState::initNames2SubRegIndices() {
174  if (!Names2SubRegIndices.empty())
175  return;
176  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
177  for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
178  Names2SubRegIndices.insert(
179  std::make_pair(TRI->getSubRegIndexName(I), I));
180 }
181 
183  initNames2SubRegIndices();
184  auto SubRegInfo = Names2SubRegIndices.find(Name);
185  if (SubRegInfo == Names2SubRegIndices.end())
186  return 0;
187  return SubRegInfo->getValue();
188 }
189 
190 void PerTargetMIParsingState::initNames2TargetIndices() {
191  if (!Names2TargetIndices.empty())
192  return;
193  const auto *TII = Subtarget.getInstrInfo();
194  assert(TII && "Expected target instruction info");
195  auto Indices = TII->getSerializableTargetIndices();
196  for (const auto &I : Indices)
197  Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
198 }
199 
201  initNames2TargetIndices();
202  auto IndexInfo = Names2TargetIndices.find(Name);
203  if (IndexInfo == Names2TargetIndices.end())
204  return true;
205  Index = IndexInfo->second;
206  return false;
207 }
208 
209 void PerTargetMIParsingState::initNames2DirectTargetFlags() {
210  if (!Names2DirectTargetFlags.empty())
211  return;
212 
213  const auto *TII = Subtarget.getInstrInfo();
214  assert(TII && "Expected target instruction info");
216  for (const auto &I : Flags)
217  Names2DirectTargetFlags.insert(
218  std::make_pair(StringRef(I.second), I.first));
219 }
220 
222  unsigned &Flag) {
223  initNames2DirectTargetFlags();
224  auto FlagInfo = Names2DirectTargetFlags.find(Name);
225  if (FlagInfo == Names2DirectTargetFlags.end())
226  return true;
227  Flag = FlagInfo->second;
228  return false;
229 }
230 
231 void PerTargetMIParsingState::initNames2BitmaskTargetFlags() {
232  if (!Names2BitmaskTargetFlags.empty())
233  return;
234 
235  const auto *TII = Subtarget.getInstrInfo();
236  assert(TII && "Expected target instruction info");
238  for (const auto &I : Flags)
239  Names2BitmaskTargetFlags.insert(
240  std::make_pair(StringRef(I.second), I.first));
241 }
242 
244  unsigned &Flag) {
245  initNames2BitmaskTargetFlags();
246  auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
247  if (FlagInfo == Names2BitmaskTargetFlags.end())
248  return true;
249  Flag = FlagInfo->second;
250  return false;
251 }
252 
253 void PerTargetMIParsingState::initNames2MMOTargetFlags() {
254  if (!Names2MMOTargetFlags.empty())
255  return;
256 
257  const auto *TII = Subtarget.getInstrInfo();
258  assert(TII && "Expected target instruction info");
259  auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
260  for (const auto &I : Flags)
261  Names2MMOTargetFlags.insert(std::make_pair(StringRef(I.second), I.first));
262 }
263 
266  initNames2MMOTargetFlags();
267  auto FlagInfo = Names2MMOTargetFlags.find(Name);
268  if (FlagInfo == Names2MMOTargetFlags.end())
269  return true;
270  Flag = FlagInfo->second;
271  return false;
272 }
273 
274 void PerTargetMIParsingState::initNames2RegClasses() {
275  if (!Names2RegClasses.empty())
276  return;
277 
278  const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo();
279  for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) {
280  const auto *RC = TRI->getRegClass(I);
281  Names2RegClasses.insert(
282  std::make_pair(StringRef(TRI->getRegClassName(RC)).lower(), RC));
283  }
284 }
285 
286 void PerTargetMIParsingState::initNames2RegBanks() {
287  if (!Names2RegBanks.empty())
288  return;
289 
290  const RegisterBankInfo *RBI = Subtarget.getRegBankInfo();
291  // If the target does not support GlobalISel, we may not have a
292  // register bank info.
293  if (!RBI)
294  return;
295 
296  for (unsigned I = 0, E = RBI->getNumRegBanks(); I < E; ++I) {
297  const auto &RegBank = RBI->getRegBank(I);
298  Names2RegBanks.insert(
299  std::make_pair(StringRef(RegBank.getName()).lower(), &RegBank));
300  }
301 }
302 
303 const TargetRegisterClass *
305  auto RegClassInfo = Names2RegClasses.find(Name);
306  if (RegClassInfo == Names2RegClasses.end())
307  return nullptr;
308  return RegClassInfo->getValue();
309 }
310 
312  auto RegBankInfo = Names2RegBanks.find(Name);
313  if (RegBankInfo == Names2RegBanks.end())
314  return nullptr;
315  return RegBankInfo->getValue();
316 }
317 
319  SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &T)
320  : MF(MF), SM(&SM), IRSlots(IRSlots), Target(T) {
321 }
322 
324  auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
325  if (I.second) {
327  VRegInfo *Info = new (Allocator) VRegInfo;
329  I.first->second = Info;
330  }
331  return *I.first->second;
332 }
333 
335  assert(RegName != "" && "Expected named reg.");
336 
337  auto I = VRegInfosNamed.insert(std::make_pair(RegName.str(), nullptr));
338  if (I.second) {
339  VRegInfo *Info = new (Allocator) VRegInfo;
341  I.first->second = Info;
342  }
343  return *I.first->second;
344 }
345 
346 namespace {
347 
348 /// A wrapper struct around the 'MachineOperand' struct that includes a source
349 /// range and other attributes.
350 struct ParsedMachineOperand {
351  MachineOperand Operand;
352  StringRef::iterator Begin;
354  Optional<unsigned> TiedDefIdx;
355 
356  ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
357  StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
358  : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
359  if (TiedDefIdx)
360  assert(Operand.isReg() && Operand.isUse() &&
361  "Only used register operands can be tied");
362  }
363 };
364 
365 class MIParser {
368  StringRef Source, CurrentSource;
369  MIToken Token;
371  /// Maps from slot numbers to function's unnamed basic blocks.
372  DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
373  /// Maps from slot numbers to function's unnamed values.
375 
376 public:
377  MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
378  StringRef Source);
379 
380  /// \p SkipChar gives the number of characters to skip before looking
381  /// for the next token.
382  void lex(unsigned SkipChar = 0);
383 
384  /// Report an error at the current location with the given message.
385  ///
386  /// This function always return true.
387  bool error(const Twine &Msg);
388 
389  /// Report an error at the given location with the given message.
390  ///
391  /// This function always return true.
392  bool error(StringRef::iterator Loc, const Twine &Msg);
393 
394  bool
395  parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
396  bool parseBasicBlocks();
397  bool parse(MachineInstr *&MI);
398  bool parseStandaloneMBB(MachineBasicBlock *&MBB);
399  bool parseStandaloneNamedRegister(unsigned &Reg);
400  bool parseStandaloneVirtualRegister(VRegInfo *&Info);
401  bool parseStandaloneRegister(unsigned &Reg);
402  bool parseStandaloneStackObject(int &FI);
403  bool parseStandaloneMDNode(MDNode *&Node);
404 
405  bool
406  parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
407  bool parseBasicBlock(MachineBasicBlock &MBB,
408  MachineBasicBlock *&AddFalthroughFrom);
409  bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
410  bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
411 
412  bool parseNamedRegister(unsigned &Reg);
413  bool parseVirtualRegister(VRegInfo *&Info);
414  bool parseNamedVirtualRegister(VRegInfo *&Info);
415  bool parseRegister(unsigned &Reg, VRegInfo *&VRegInfo);
416  bool parseRegisterFlag(unsigned &Flags);
417  bool parseRegisterClassOrBank(VRegInfo &RegInfo);
418  bool parseSubRegisterIndex(unsigned &SubReg);
419  bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
420  bool parseRegisterOperand(MachineOperand &Dest,
421  Optional<unsigned> &TiedDefIdx, bool IsDef = false);
422  bool parseImmediateOperand(MachineOperand &Dest);
423  bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
424  const Constant *&C);
425  bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
426  bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
427  bool parseTypedImmediateOperand(MachineOperand &Dest);
428  bool parseFPImmediateOperand(MachineOperand &Dest);
430  bool parseMBBOperand(MachineOperand &Dest);
431  bool parseStackFrameIndex(int &FI);
432  bool parseStackObjectOperand(MachineOperand &Dest);
433  bool parseFixedStackFrameIndex(int &FI);
434  bool parseFixedStackObjectOperand(MachineOperand &Dest);
435  bool parseGlobalValue(GlobalValue *&GV);
436  bool parseGlobalAddressOperand(MachineOperand &Dest);
437  bool parseConstantPoolIndexOperand(MachineOperand &Dest);
438  bool parseSubRegisterIndexOperand(MachineOperand &Dest);
439  bool parseJumpTableIndexOperand(MachineOperand &Dest);
440  bool parseExternalSymbolOperand(MachineOperand &Dest);
441  bool parseMCSymbolOperand(MachineOperand &Dest);
442  bool parseMDNode(MDNode *&Node);
443  bool parseDIExpression(MDNode *&Expr);
444  bool parseDILocation(MDNode *&Expr);
445  bool parseMetadataOperand(MachineOperand &Dest);
446  bool parseCFIOffset(int &Offset);
447  bool parseCFIRegister(unsigned &Reg);
448  bool parseCFIEscapeValues(std::string& Values);
449  bool parseCFIOperand(MachineOperand &Dest);
450  bool parseIRBlock(BasicBlock *&BB, const Function &F);
451  bool parseBlockAddressOperand(MachineOperand &Dest);
452  bool parseIntrinsicOperand(MachineOperand &Dest);
453  bool parsePredicateOperand(MachineOperand &Dest);
454  bool parseShuffleMaskOperand(MachineOperand &Dest);
455  bool parseTargetIndexOperand(MachineOperand &Dest);
456  bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
457  bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
458  bool parseMachineOperand(MachineOperand &Dest,
459  Optional<unsigned> &TiedDefIdx);
460  bool parseMachineOperandAndTargetFlags(MachineOperand &Dest,
461  Optional<unsigned> &TiedDefIdx);
462  bool parseOffset(int64_t &Offset);
463  bool parseAlignment(unsigned &Alignment);
464  bool parseAddrspace(unsigned &Addrspace);
465  bool parseOperandsOffset(MachineOperand &Op);
466  bool parseIRValue(const Value *&V);
467  bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
468  bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
469  bool parseMachinePointerInfo(MachinePointerInfo &Dest);
470  bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
471  bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
472  bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
473  bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);
474 
475 private:
476  /// Convert the integer literal in the current token into an unsigned integer.
477  ///
478  /// Return true if an error occurred.
479  bool getUnsigned(unsigned &Result);
480 
481  /// Convert the integer literal in the current token into an uint64.
482  ///
483  /// Return true if an error occurred.
484  bool getUint64(uint64_t &Result);
485 
486  /// Convert the hexadecimal literal in the current token into an unsigned
487  /// APInt with a minimum bitwidth required to represent the value.
488  ///
489  /// Return true if the literal does not represent an integer value.
490  bool getHexUint(APInt &Result);
491 
492  /// If the current token is of the given kind, consume it and return false.
493  /// Otherwise report an error and return true.
494  bool expectAndConsume(MIToken::TokenKind TokenKind);
495 
496  /// If the current token is of the given kind, consume it and return true.
497  /// Otherwise return false.
498  bool consumeIfPresent(MIToken::TokenKind TokenKind);
499 
500  bool parseInstruction(unsigned &OpCode, unsigned &Flags);
501 
502  bool assignRegisterTies(MachineInstr &MI,
504 
505  bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
506  const MCInstrDesc &MCID);
507 
508  const BasicBlock *getIRBlock(unsigned Slot);
509  const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
510 
511  const Value *getIRValue(unsigned Slot);
512 
513  /// Get or create an MCSymbol for a given name.
514  MCSymbol *getOrCreateMCSymbol(StringRef Name);
515 
516  /// parseStringConstant
517  /// ::= StringConstant
518  bool parseStringConstant(std::string &Result);
519 };
520 
521 } // end anonymous namespace
522 
523 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
525  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
526 {}
527 
528 void MIParser::lex(unsigned SkipChar) {
529  CurrentSource = lexMIToken(
530  CurrentSource.data() + SkipChar, Token,
531  [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
532 }
533 
534 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
535 
536 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
537  const SourceMgr &SM = *PFS.SM;
538  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
539  const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
540  if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
541  // Create an ordinary diagnostic when the source manager's buffer is the
542  // source string.
544  return true;
545  }
546  // Create a diagnostic for a YAML string literal.
547  Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
548  Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
549  Source, None, None);
550  return true;
551 }
552 
553 static const char *toString(MIToken::TokenKind TokenKind) {
554  switch (TokenKind) {
555  case MIToken::comma:
556  return "','";
557  case MIToken::equal:
558  return "'='";
559  case MIToken::colon:
560  return "':'";
561  case MIToken::lparen:
562  return "'('";
563  case MIToken::rparen:
564  return "')'";
565  default:
566  return "<unknown token>";
567  }
568 }
569 
570 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
571  if (Token.isNot(TokenKind))
572  return error(Twine("expected ") + toString(TokenKind));
573  lex();
574  return false;
575 }
576 
577 bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
578  if (Token.isNot(TokenKind))
579  return false;
580  lex();
581  return true;
582 }
583 
584 bool MIParser::parseBasicBlockDefinition(
587  unsigned ID = 0;
588  if (getUnsigned(ID))
589  return true;
590  auto Loc = Token.location();
591  auto Name = Token.stringValue();
592  lex();
593  bool HasAddressTaken = false;
594  bool IsLandingPad = false;
595  unsigned Alignment = 0;
596  BasicBlock *BB = nullptr;
597  if (consumeIfPresent(MIToken::lparen)) {
598  do {
599  // TODO: Report an error when multiple same attributes are specified.
600  switch (Token.kind()) {
602  HasAddressTaken = true;
603  lex();
604  break;
606  IsLandingPad = true;
607  lex();
608  break;
609  case MIToken::kw_align:
610  if (parseAlignment(Alignment))
611  return true;
612  break;
613  case MIToken::IRBlock:
614  // TODO: Report an error when both name and ir block are specified.
615  if (parseIRBlock(BB, MF.getFunction()))
616  return true;
617  lex();
618  break;
619  default:
620  break;
621  }
622  } while (consumeIfPresent(MIToken::comma));
623  if (expectAndConsume(MIToken::rparen))
624  return true;
625  }
626  if (expectAndConsume(MIToken::colon))
627  return true;
628 
629  if (!Name.empty()) {
630  BB = dyn_cast_or_null<BasicBlock>(
632  if (!BB)
633  return error(Loc, Twine("basic block '") + Name +
634  "' is not defined in the function '" +
635  MF.getName() + "'");
636  }
637  auto *MBB = MF.CreateMachineBasicBlock(BB);
638  MF.insert(MF.end(), MBB);
639  bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
640  if (!WasInserted)
641  return error(Loc, Twine("redefinition of machine basic block with id #") +
642  Twine(ID));
643  if (Alignment)
644  MBB->setAlignment(llvm::Align(Alignment));
645  if (HasAddressTaken)
646  MBB->setHasAddressTaken();
647  MBB->setIsEHPad(IsLandingPad);
648  return false;
649 }
650 
651 bool MIParser::parseBasicBlockDefinitions(
653  lex();
654  // Skip until the first machine basic block.
655  while (Token.is(MIToken::Newline))
656  lex();
657  if (Token.isErrorOrEOF())
658  return Token.isError();
659  if (Token.isNot(MIToken::MachineBasicBlockLabel))
660  return error("expected a basic block definition before instructions");
661  unsigned BraceDepth = 0;
662  do {
663  if (parseBasicBlockDefinition(MBBSlots))
664  return true;
665  bool IsAfterNewline = false;
666  // Skip until the next machine basic block.
667  while (true) {
668  if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
669  Token.isErrorOrEOF())
670  break;
671  else if (Token.is(MIToken::MachineBasicBlockLabel))
672  return error("basic block definition should be located at the start of "
673  "the line");
674  else if (consumeIfPresent(MIToken::Newline)) {
675  IsAfterNewline = true;
676  continue;
677  }
678  IsAfterNewline = false;
679  if (Token.is(MIToken::lbrace))
680  ++BraceDepth;
681  if (Token.is(MIToken::rbrace)) {
682  if (!BraceDepth)
683  return error("extraneous closing brace ('}')");
684  --BraceDepth;
685  }
686  lex();
687  }
688  // Verify that we closed all of the '{' at the end of a file or a block.
689  if (!Token.isError() && BraceDepth)
690  return error("expected '}'"); // FIXME: Report a note that shows '{'.
691  } while (!Token.isErrorOrEOF());
692  return Token.isError();
693 }
694 
695 bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
696  assert(Token.is(MIToken::kw_liveins));
697  lex();
698  if (expectAndConsume(MIToken::colon))
699  return true;
700  if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
701  return false;
702  do {
703  if (Token.isNot(MIToken::NamedRegister))
704  return error("expected a named register");
705  unsigned Reg = 0;
706  if (parseNamedRegister(Reg))
707  return true;
708  lex();
710  if (consumeIfPresent(MIToken::colon)) {
711  // Parse lane mask.
712  if (Token.isNot(MIToken::IntegerLiteral) &&
713  Token.isNot(MIToken::HexLiteral))
714  return error("expected a lane mask");
715  static_assert(sizeof(LaneBitmask::Type) == sizeof(unsigned),
716  "Use correct get-function for lane mask");
718  if (getUnsigned(V))
719  return error("invalid lane mask value");
720  Mask = LaneBitmask(V);
721  lex();
722  }
723  MBB.addLiveIn(Reg, Mask);
724  } while (consumeIfPresent(MIToken::comma));
725  return false;
726 }
727 
728 bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
729  assert(Token.is(MIToken::kw_successors));
730  lex();
731  if (expectAndConsume(MIToken::colon))
732  return true;
733  if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
734  return false;
735  do {
736  if (Token.isNot(MIToken::MachineBasicBlock))
737  return error("expected a machine basic block reference");
738  MachineBasicBlock *SuccMBB = nullptr;
739  if (parseMBBReference(SuccMBB))
740  return true;
741  lex();
742  unsigned Weight = 0;
743  if (consumeIfPresent(MIToken::lparen)) {
744  if (Token.isNot(MIToken::IntegerLiteral) &&
745  Token.isNot(MIToken::HexLiteral))
746  return error("expected an integer literal after '('");
747  if (getUnsigned(Weight))
748  return true;
749  lex();
750  if (expectAndConsume(MIToken::rparen))
751  return true;
752  }
753  MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
754  } while (consumeIfPresent(MIToken::comma));
755  MBB.normalizeSuccProbs();
756  return false;
757 }
758 
759 bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
760  MachineBasicBlock *&AddFalthroughFrom) {
761  // Skip the definition.
763  lex();
764  if (consumeIfPresent(MIToken::lparen)) {
765  while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
766  lex();
767  consumeIfPresent(MIToken::rparen);
768  }
769  consumeIfPresent(MIToken::colon);
770 
771  // Parse the liveins and successors.
772  // N.B: Multiple lists of successors and liveins are allowed and they're
773  // merged into one.
774  // Example:
775  // liveins: %edi
776  // liveins: %esi
777  //
778  // is equivalent to
779  // liveins: %edi, %esi
780  bool ExplicitSuccessors = false;
781  while (true) {
782  if (Token.is(MIToken::kw_successors)) {
783  if (parseBasicBlockSuccessors(MBB))
784  return true;
785  ExplicitSuccessors = true;
786  } else if (Token.is(MIToken::kw_liveins)) {
787  if (parseBasicBlockLiveins(MBB))
788  return true;
789  } else if (consumeIfPresent(MIToken::Newline)) {
790  continue;
791  } else
792  break;
793  if (!Token.isNewlineOrEOF())
794  return error("expected line break at the end of a list");
795  lex();
796  }
797 
798  // Parse the instructions.
799  bool IsInBundle = false;
800  MachineInstr *PrevMI = nullptr;
801  while (!Token.is(MIToken::MachineBasicBlockLabel) &&
802  !Token.is(MIToken::Eof)) {
803  if (consumeIfPresent(MIToken::Newline))
804  continue;
805  if (consumeIfPresent(MIToken::rbrace)) {
806  // The first parsing pass should verify that all closing '}' have an
807  // opening '{'.
808  assert(IsInBundle);
809  IsInBundle = false;
810  continue;
811  }
812  MachineInstr *MI = nullptr;
813  if (parse(MI))
814  return true;
815  MBB.insert(MBB.end(), MI);
816  if (IsInBundle) {
819  }
820  PrevMI = MI;
821  if (Token.is(MIToken::lbrace)) {
822  if (IsInBundle)
823  return error("nested instruction bundles are not allowed");
824  lex();
825  // This instruction is the start of the bundle.
827  IsInBundle = true;
828  if (!Token.is(MIToken::Newline))
829  // The next instruction can be on the same line.
830  continue;
831  }
832  assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
833  lex();
834  }
835 
836  // Construct successor list by searching for basic block machine operands.
837  if (!ExplicitSuccessors) {
839  bool IsFallthrough;
840  guessSuccessors(MBB, Successors, IsFallthrough);
841  for (MachineBasicBlock *Succ : Successors)
842  MBB.addSuccessor(Succ);
843 
844  if (IsFallthrough) {
845  AddFalthroughFrom = &MBB;
846  } else {
847  MBB.normalizeSuccProbs();
848  }
849  }
850 
851  return false;
852 }
853 
854 bool MIParser::parseBasicBlocks() {
855  lex();
856  // Skip until the first machine basic block.
857  while (Token.is(MIToken::Newline))
858  lex();
859  if (Token.isErrorOrEOF())
860  return Token.isError();
861  // The first parsing pass should have verified that this token is a MBB label
862  // in the 'parseBasicBlockDefinitions' method.
864  MachineBasicBlock *AddFalthroughFrom = nullptr;
865  do {
866  MachineBasicBlock *MBB = nullptr;
867  if (parseMBBReference(MBB))
868  return true;
869  if (AddFalthroughFrom) {
870  if (!AddFalthroughFrom->isSuccessor(MBB))
871  AddFalthroughFrom->addSuccessor(MBB);
872  AddFalthroughFrom->normalizeSuccProbs();
873  AddFalthroughFrom = nullptr;
874  }
875  if (parseBasicBlock(*MBB, AddFalthroughFrom))
876  return true;
877  // The method 'parseBasicBlock' should parse the whole block until the next
878  // block or the end of file.
879  assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
880  } while (Token.isNot(MIToken::Eof));
881  return false;
882 }
883 
885  // Parse any register operands before '='
888  while (Token.isRegister() || Token.isRegisterFlag()) {
889  auto Loc = Token.location();
890  Optional<unsigned> TiedDefIdx;
891  if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
892  return true;
893  Operands.push_back(
894  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
895  if (Token.isNot(MIToken::comma))
896  break;
897  lex();
898  }
899  if (!Operands.empty() && expectAndConsume(MIToken::equal))
900  return true;
901 
902  unsigned OpCode, Flags = 0;
903  if (Token.isError() || parseInstruction(OpCode, Flags))
904  return true;
905 
906  // Parse the remaining machine operands.
907  while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_pre_instr_symbol) &&
908  Token.isNot(MIToken::kw_post_instr_symbol) &&
909  Token.isNot(MIToken::kw_debug_location) &&
910  Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
911  auto Loc = Token.location();
912  Optional<unsigned> TiedDefIdx;
913  if (parseMachineOperandAndTargetFlags(MO, TiedDefIdx))
914  return true;
915  if (OpCode == TargetOpcode::DBG_VALUE && MO.isReg())
916  MO.setIsDebug();
917  Operands.push_back(
918  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
919  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
920  Token.is(MIToken::lbrace))
921  break;
922  if (Token.isNot(MIToken::comma))
923  return error("expected ',' before the next machine operand");
924  lex();
925  }
926 
927  MCSymbol *PreInstrSymbol = nullptr;
928  if (Token.is(MIToken::kw_pre_instr_symbol))
929  if (parsePreOrPostInstrSymbol(PreInstrSymbol))
930  return true;
931  MCSymbol *PostInstrSymbol = nullptr;
932  if (Token.is(MIToken::kw_post_instr_symbol))
933  if (parsePreOrPostInstrSymbol(PostInstrSymbol))
934  return true;
935 
936  DebugLoc DebugLocation;
937  if (Token.is(MIToken::kw_debug_location)) {
938  lex();
939  MDNode *Node = nullptr;
940  if (Token.is(MIToken::exclaim)) {
941  if (parseMDNode(Node))
942  return true;
943  } else if (Token.is(MIToken::md_dilocation)) {
944  if (parseDILocation(Node))
945  return true;
946  } else
947  return error("expected a metadata node after 'debug-location'");
948  if (!isa<DILocation>(Node))
949  return error("referenced metadata is not a DILocation");
950  DebugLocation = DebugLoc(Node);
951  }
952 
953  // Parse the machine memory operands.
955  if (Token.is(MIToken::coloncolon)) {
956  lex();
957  while (!Token.isNewlineOrEOF()) {
958  MachineMemOperand *MemOp = nullptr;
959  if (parseMachineMemoryOperand(MemOp))
960  return true;
961  MemOperands.push_back(MemOp);
962  if (Token.isNewlineOrEOF())
963  break;
964  if (Token.isNot(MIToken::comma))
965  return error("expected ',' before the next machine memory operand");
966  lex();
967  }
968  }
969 
970  const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
971  if (!MCID.isVariadic()) {
972  // FIXME: Move the implicit operand verification to the machine verifier.
973  if (verifyImplicitOperands(Operands, MCID))
974  return true;
975  }
976 
977  // TODO: Check for extraneous machine operands.
978  MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
979  MI->setFlags(Flags);
980  for (const auto &Operand : Operands)
981  MI->addOperand(MF, Operand.Operand);
982  if (assignRegisterTies(*MI, Operands))
983  return true;
984  if (PreInstrSymbol)
985  MI->setPreInstrSymbol(MF, PreInstrSymbol);
986  if (PostInstrSymbol)
987  MI->setPostInstrSymbol(MF, PostInstrSymbol);
988  if (!MemOperands.empty())
989  MI->setMemRefs(MF, MemOperands);
990  return false;
991 }
992 
993 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
994  lex();
995  if (Token.isNot(MIToken::MachineBasicBlock))
996  return error("expected a machine basic block reference");
997  if (parseMBBReference(MBB))
998  return true;
999  lex();
1000  if (Token.isNot(MIToken::Eof))
1001  return error(
1002  "expected end of string after the machine basic block reference");
1003  return false;
1004 }
1005 
1006 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
1007  lex();
1008  if (Token.isNot(MIToken::NamedRegister))
1009  return error("expected a named register");
1010  if (parseNamedRegister(Reg))
1011  return true;
1012  lex();
1013  if (Token.isNot(MIToken::Eof))
1014  return error("expected end of string after the register reference");
1015  return false;
1016 }
1017 
1018 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
1019  lex();
1020  if (Token.isNot(MIToken::VirtualRegister))
1021  return error("expected a virtual register");
1022  if (parseVirtualRegister(Info))
1023  return true;
1024  lex();
1025  if (Token.isNot(MIToken::Eof))
1026  return error("expected end of string after the register reference");
1027  return false;
1028 }
1029 
1030 bool MIParser::parseStandaloneRegister(unsigned &Reg) {
1031  lex();
1032  if (Token.isNot(MIToken::NamedRegister) &&
1033  Token.isNot(MIToken::VirtualRegister))
1034  return error("expected either a named or virtual register");
1035 
1036  VRegInfo *Info;
1037  if (parseRegister(Reg, Info))
1038  return true;
1039 
1040  lex();
1041  if (Token.isNot(MIToken::Eof))
1042  return error("expected end of string after the register reference");
1043  return false;
1044 }
1045 
1046 bool MIParser::parseStandaloneStackObject(int &FI) {
1047  lex();
1048  if (Token.isNot(MIToken::StackObject))
1049  return error("expected a stack object");
1050  if (parseStackFrameIndex(FI))
1051  return true;
1052  if (Token.isNot(MIToken::Eof))
1053  return error("expected end of string after the stack object reference");
1054  return false;
1055 }
1056 
1057 bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
1058  lex();
1059  if (Token.is(MIToken::exclaim)) {
1060  if (parseMDNode(Node))
1061  return true;
1062  } else if (Token.is(MIToken::md_diexpr)) {
1063  if (parseDIExpression(Node))
1064  return true;
1065  } else if (Token.is(MIToken::md_dilocation)) {
1066  if (parseDILocation(Node))
1067  return true;
1068  } else
1069  return error("expected a metadata node");
1070  if (Token.isNot(MIToken::Eof))
1071  return error("expected end of string after the metadata node");
1072  return false;
1073 }
1074 
1075 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
1076  assert(MO.isImplicit());
1077  return MO.isDef() ? "implicit-def" : "implicit";
1078 }
1079 
1080 static std::string getRegisterName(const TargetRegisterInfo *TRI,
1081  unsigned Reg) {
1082  assert(Register::isPhysicalRegister(Reg) && "expected phys reg");
1083  return StringRef(TRI->getName(Reg)).lower();
1084 }
1085 
1086 /// Return true if the parsed machine operands contain a given machine operand.
1087 static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
1089  for (const auto &I : Operands) {
1090  if (ImplicitOperand.isIdenticalTo(I.Operand))
1091  return true;
1092  }
1093  return false;
1094 }
1095 
1096 bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
1097  const MCInstrDesc &MCID) {
1098  if (MCID.isCall())
1099  // We can't verify call instructions as they can contain arbitrary implicit
1100  // register and register mask operands.
1101  return false;
1102 
1103  // Gather all the expected implicit operands.
1104  SmallVector<MachineOperand, 4> ImplicitOperands;
1105  if (MCID.ImplicitDefs)
1106  for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
1107  ImplicitOperands.push_back(
1108  MachineOperand::CreateReg(*ImpDefs, true, true));
1109  if (MCID.ImplicitUses)
1110  for (const MCPhysReg *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
1111  ImplicitOperands.push_back(
1112  MachineOperand::CreateReg(*ImpUses, false, true));
1113 
1114  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1115  assert(TRI && "Expected target register info");
1116  for (const auto &I : ImplicitOperands) {
1117  if (isImplicitOperandIn(I, Operands))
1118  continue;
1119  return error(Operands.empty() ? Token.location() : Operands.back().End,
1120  Twine("missing implicit register operand '") +
1121  printImplicitRegisterFlag(I) + " $" +
1122  getRegisterName(TRI, I.getReg()) + "'");
1123  }
1124  return false;
1125 }
1126 
1127 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
1128  // Allow frame and fast math flags for OPCODE
1129  while (Token.is(MIToken::kw_frame_setup) ||
1130  Token.is(MIToken::kw_frame_destroy) ||
1131  Token.is(MIToken::kw_nnan) ||
1132  Token.is(MIToken::kw_ninf) ||
1133  Token.is(MIToken::kw_nsz) ||
1134  Token.is(MIToken::kw_arcp) ||
1135  Token.is(MIToken::kw_contract) ||
1136  Token.is(MIToken::kw_afn) ||
1137  Token.is(MIToken::kw_reassoc) ||
1138  Token.is(MIToken::kw_nuw) ||
1139  Token.is(MIToken::kw_nsw) ||
1140  Token.is(MIToken::kw_exact) ||
1141  Token.is(MIToken::kw_fpexcept)) {
1142  // Mine frame and fast math flags
1143  if (Token.is(MIToken::kw_frame_setup))
1144  Flags |= MachineInstr::FrameSetup;
1145  if (Token.is(MIToken::kw_frame_destroy))
1146  Flags |= MachineInstr::FrameDestroy;
1147  if (Token.is(MIToken::kw_nnan))
1148  Flags |= MachineInstr::FmNoNans;
1149  if (Token.is(MIToken::kw_ninf))
1150  Flags |= MachineInstr::FmNoInfs;
1151  if (Token.is(MIToken::kw_nsz))
1152  Flags |= MachineInstr::FmNsz;
1153  if (Token.is(MIToken::kw_arcp))
1154  Flags |= MachineInstr::FmArcp;
1155  if (Token.is(MIToken::kw_contract))
1156  Flags |= MachineInstr::FmContract;
1157  if (Token.is(MIToken::kw_afn))
1158  Flags |= MachineInstr::FmAfn;
1159  if (Token.is(MIToken::kw_reassoc))
1160  Flags |= MachineInstr::FmReassoc;
1161  if (Token.is(MIToken::kw_nuw))
1162  Flags |= MachineInstr::NoUWrap;
1163  if (Token.is(MIToken::kw_nsw))
1164  Flags |= MachineInstr::NoSWrap;
1165  if (Token.is(MIToken::kw_exact))
1166  Flags |= MachineInstr::IsExact;
1167  if (Token.is(MIToken::kw_fpexcept))
1168  Flags |= MachineInstr::FPExcept;
1169 
1170  lex();
1171  }
1172  if (Token.isNot(MIToken::Identifier))
1173  return error("expected a machine instruction");
1174  StringRef InstrName = Token.stringValue();
1175  if (PFS.Target.parseInstrName(InstrName, OpCode))
1176  return error(Twine("unknown machine instruction name '") + InstrName + "'");
1177  lex();
1178  return false;
1179 }
1180 
1181 bool MIParser::parseNamedRegister(unsigned &Reg) {
1182  assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
1183  StringRef Name = Token.stringValue();
1184  if (PFS.Target.getRegisterByName(Name, Reg))
1185  return error(Twine("unknown register name '") + Name + "'");
1186  return false;
1187 }
1188 
1189 bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {
1190  assert(Token.is(MIToken::NamedVirtualRegister) && "Expected NamedVReg token");
1191  StringRef Name = Token.stringValue();
1192  // TODO: Check that the VReg name is not the same as a physical register name.
1193  // If it is, then print a warning (when warnings are implemented).
1194  Info = &PFS.getVRegInfoNamed(Name);
1195  return false;
1196 }
1197 
1198 bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
1199  if (Token.is(MIToken::NamedVirtualRegister))
1200  return parseNamedVirtualRegister(Info);
1201  assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
1202  unsigned ID;
1203  if (getUnsigned(ID))
1204  return true;
1205  Info = &PFS.getVRegInfo(ID);
1206  return false;
1207 }
1208 
1209 bool MIParser::parseRegister(unsigned &Reg, VRegInfo *&Info) {
1210  switch (Token.kind()) {
1211  case MIToken::underscore:
1212  Reg = 0;
1213  return false;
1215  return parseNamedRegister(Reg);
1218  if (parseVirtualRegister(Info))
1219  return true;
1220  Reg = Info->VReg;
1221  return false;
1222  // TODO: Parse other register kinds.
1223  default:
1224  llvm_unreachable("The current token should be a register");
1225  }
1226 }
1227 
1228 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
1229  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
1230  return error("expected '_', register class, or register bank name");
1231  StringRef::iterator Loc = Token.location();
1232  StringRef Name = Token.stringValue();
1233 
1234  // Was it a register class?
1235  const TargetRegisterClass *RC = PFS.Target.getRegClass(Name);
1236  if (RC) {
1237  lex();
1238 
1239  switch (RegInfo.Kind) {
1240  case VRegInfo::UNKNOWN:
1241  case VRegInfo::NORMAL:
1242  RegInfo.Kind = VRegInfo::NORMAL;
1243  if (RegInfo.Explicit && RegInfo.D.RC != RC) {
1245  return error(Loc, Twine("conflicting register classes, previously: ") +
1246  Twine(TRI.getRegClassName(RegInfo.D.RC)));
1247  }
1248  RegInfo.D.RC = RC;
1249  RegInfo.Explicit = true;
1250  return false;
1251 
1252  case VRegInfo::GENERIC:
1253  case VRegInfo::REGBANK:
1254  return error(Loc, "register class specification on generic register");
1255  }
1256  llvm_unreachable("Unexpected register kind");
1257  }
1258 
1259  // Should be a register bank or a generic register.
1260  const RegisterBank *RegBank = nullptr;
1261  if (Name != "_") {
1262  RegBank = PFS.Target.getRegBank(Name);
1263  if (!RegBank)
1264  return error(Loc, "expected '_', register class, or register bank name");
1265  }
1266 
1267  lex();
1268 
1269  switch (RegInfo.Kind) {
1270  case VRegInfo::UNKNOWN:
1271  case VRegInfo::GENERIC:
1272  case VRegInfo::REGBANK:
1273  RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
1274  if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
1275  return error(Loc, "conflicting generic register banks");
1276  RegInfo.D.RegBank = RegBank;
1277  RegInfo.Explicit = true;
1278  return false;
1279 
1280  case VRegInfo::NORMAL:
1281  return error(Loc, "register bank specification on normal register");
1282  }
1283  llvm_unreachable("Unexpected register kind");
1284 }
1285 
1286 bool MIParser::parseRegisterFlag(unsigned &Flags) {
1287  const unsigned OldFlags = Flags;
1288  switch (Token.kind()) {
1289  case MIToken::kw_implicit:
1290  Flags |= RegState::Implicit;
1291  break;
1293  Flags |= RegState::ImplicitDefine;
1294  break;
1295  case MIToken::kw_def:
1296  Flags |= RegState::Define;
1297  break;
1298  case MIToken::kw_dead:
1299  Flags |= RegState::Dead;
1300  break;
1301  case MIToken::kw_killed:
1302  Flags |= RegState::Kill;
1303  break;
1304  case MIToken::kw_undef:
1305  Flags |= RegState::Undef;
1306  break;
1307  case MIToken::kw_internal:
1308  Flags |= RegState::InternalRead;
1309  break;
1311  Flags |= RegState::EarlyClobber;
1312  break;
1313  case MIToken::kw_debug_use:
1314  Flags |= RegState::Debug;
1315  break;
1316  case MIToken::kw_renamable:
1317  Flags |= RegState::Renamable;
1318  break;
1319  default:
1320  llvm_unreachable("The current token should be a register flag");
1321  }
1322  if (OldFlags == Flags)
1323  // We know that the same flag is specified more than once when the flags
1324  // weren't modified.
1325  return error("duplicate '" + Token.stringValue() + "' register flag");
1326  lex();
1327  return false;
1328 }
1329 
1330 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
1331  assert(Token.is(MIToken::dot));
1332  lex();
1333  if (Token.isNot(MIToken::Identifier))
1334  return error("expected a subregister index after '.'");
1335  auto Name = Token.stringValue();
1336  SubReg = PFS.Target.getSubRegIndex(Name);
1337  if (!SubReg)
1338  return error(Twine("use of unknown subregister index '") + Name + "'");
1339  lex();
1340  return false;
1341 }
1342 
1343 bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
1344  if (!consumeIfPresent(MIToken::kw_tied_def))
1345  return true;
1346  if (Token.isNot(MIToken::IntegerLiteral))
1347  return error("expected an integer literal after 'tied-def'");
1348  if (getUnsigned(TiedDefIdx))
1349  return true;
1350  lex();
1351  if (expectAndConsume(MIToken::rparen))
1352  return true;
1353  return false;
1354 }
1355 
1356 bool MIParser::assignRegisterTies(MachineInstr &MI,
1357  ArrayRef<ParsedMachineOperand> Operands) {
1358  SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
1359  for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
1360  if (!Operands[I].TiedDefIdx)
1361  continue;
1362  // The parser ensures that this operand is a register use, so we just have
1363  // to check the tied-def operand.
1364  unsigned DefIdx = Operands[I].TiedDefIdx.getValue();
1365  if (DefIdx >= E)
1366  return error(Operands[I].Begin,
1367  Twine("use of invalid tied-def operand index '" +
1368  Twine(DefIdx) + "'; instruction has only ") +
1369  Twine(E) + " operands");
1370  const auto &DefOperand = Operands[DefIdx].Operand;
1371  if (!DefOperand.isReg() || !DefOperand.isDef())
1372  // FIXME: add note with the def operand.
1373  return error(Operands[I].Begin,
1374  Twine("use of invalid tied-def operand index '") +
1375  Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
1376  " isn't a defined register");
1377  // Check that the tied-def operand wasn't tied elsewhere.
1378  for (const auto &TiedPair : TiedRegisterPairs) {
1379  if (TiedPair.first == DefIdx)
1380  return error(Operands[I].Begin,
1381  Twine("the tied-def operand #") + Twine(DefIdx) +
1382  " is already tied with another register operand");
1383  }
1384  TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
1385  }
1386  // FIXME: Verify that for non INLINEASM instructions, the def and use tied
1387  // indices must be less than tied max.
1388  for (const auto &TiedPair : TiedRegisterPairs)
1389  MI.tieOperands(TiedPair.first, TiedPair.second);
1390  return false;
1391 }
1392 
1393 bool MIParser::parseRegisterOperand(MachineOperand &Dest,
1394  Optional<unsigned> &TiedDefIdx,
1395  bool IsDef) {
1396  unsigned Flags = IsDef ? RegState::Define : 0;
1397  while (Token.isRegisterFlag()) {
1398  if (parseRegisterFlag(Flags))
1399  return true;
1400  }
1401  if (!Token.isRegister())
1402  return error("expected a register after register flags");
1403  unsigned Reg;
1404  VRegInfo *RegInfo;
1405  if (parseRegister(Reg, RegInfo))
1406  return true;
1407  lex();
1408  unsigned SubReg = 0;
1409  if (Token.is(MIToken::dot)) {
1410  if (parseSubRegisterIndex(SubReg))
1411  return true;
1412  if (!Register::isVirtualRegister(Reg))
1413  return error("subregister index expects a virtual register");
1414  }
1415  if (Token.is(MIToken::colon)) {
1416  if (!Register::isVirtualRegister(Reg))
1417  return error("register class specification expects a virtual register");
1418  lex();
1419  if (parseRegisterClassOrBank(*RegInfo))
1420  return true;
1421  }
1423  if ((Flags & RegState::Define) == 0) {
1424  if (consumeIfPresent(MIToken::lparen)) {
1425  unsigned Idx;
1426  if (!parseRegisterTiedDefIndex(Idx))
1427  TiedDefIdx = Idx;
1428  else {
1429  // Try a redundant low-level type.
1430  LLT Ty;
1431  if (parseLowLevelType(Token.location(), Ty))
1432  return error("expected tied-def or low-level type after '('");
1433 
1434  if (expectAndConsume(MIToken::rparen))
1435  return true;
1436 
1437  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1438  return error("inconsistent type for generic virtual register");
1439 
1440  MRI.setType(Reg, Ty);
1441  }
1442  }
1443  } else if (consumeIfPresent(MIToken::lparen)) {
1444  // Virtual registers may have a tpe with GlobalISel.
1445  if (!Register::isVirtualRegister(Reg))
1446  return error("unexpected type on physical register");
1447 
1448  LLT Ty;
1449  if (parseLowLevelType(Token.location(), Ty))
1450  return true;
1451 
1452  if (expectAndConsume(MIToken::rparen))
1453  return true;
1454 
1455  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1456  return error("inconsistent type for generic virtual register");
1457 
1458  MRI.setType(Reg, Ty);
1459  } else if (Register::isVirtualRegister(Reg)) {
1460  // Generic virtual registers must have a type.
1461  // If we end up here this means the type hasn't been specified and
1462  // this is bad!
1463  if (RegInfo->Kind == VRegInfo::GENERIC ||
1464  RegInfo->Kind == VRegInfo::REGBANK)
1465  return error("generic virtual registers must have a type");
1466  }
1468  Reg, Flags & RegState::Define, Flags & RegState::Implicit,
1469  Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
1470  Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
1471  Flags & RegState::InternalRead, Flags & RegState::Renamable);
1472 
1473  return false;
1474 }
1475 
1476 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
1477  assert(Token.is(MIToken::IntegerLiteral));
1478  const APSInt &Int = Token.integerValue();
1479  if (Int.getMinSignedBits() > 64)
1480  return error("integer literal is too large to be an immediate operand");
1481  Dest = MachineOperand::CreateImm(Int.getExtValue());
1482  lex();
1483  return false;
1484 }
1485 
1486 bool MIParser::parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
1487  const Constant *&C) {
1488  auto Source = StringValue.str(); // The source has to be null terminated.
1489  SMDiagnostic Err;
1490  C = parseConstantValue(Source, Err, *MF.getFunction().getParent(),
1491  &PFS.IRSlots);
1492  if (!C)
1493  return error(Loc + Err.getColumnNo(), Err.getMessage());
1494  return false;
1495 }
1496 
1497 bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
1498  if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
1499  return true;
1500  lex();
1501  return false;
1502 }
1503 
1504 // See LLT implemntation for bit size limits.
1505 static bool verifyScalarSize(uint64_t Size) {
1506  return Size != 0 && isUInt<16>(Size);
1507 }
1508 
1509 static bool verifyVectorElementCount(uint64_t NumElts) {
1510  return NumElts != 0 && isUInt<16>(NumElts);
1511 }
1512 
1513 static bool verifyAddrSpace(uint64_t AddrSpace) {
1514  return isUInt<24>(AddrSpace);
1515 }
1516 
1517 bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
1518  if (Token.range().front() == 's' || Token.range().front() == 'p') {
1519  StringRef SizeStr = Token.range().drop_front();
1520  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1521  return error("expected integers after 's'/'p' type character");
1522  }
1523 
1524  if (Token.range().front() == 's') {
1525  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1526  if (!verifyScalarSize(ScalarSize))
1527  return error("invalid size for scalar type");
1528 
1529  Ty = LLT::scalar(ScalarSize);
1530  lex();
1531  return false;
1532  } else if (Token.range().front() == 'p') {
1533  const DataLayout &DL = MF.getDataLayout();
1534  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1535  if (!verifyAddrSpace(AS))
1536  return error("invalid address space number");
1537 
1538  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1539  lex();
1540  return false;
1541  }
1542 
1543  // Now we're looking for a vector.
1544  if (Token.isNot(MIToken::less))
1545  return error(Loc,
1546  "expected sN, pA, <M x sN>, or <M x pA> for GlobalISel type");
1547  lex();
1548 
1549  if (Token.isNot(MIToken::IntegerLiteral))
1550  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1551  uint64_t NumElements = Token.integerValue().getZExtValue();
1552  if (!verifyVectorElementCount(NumElements))
1553  return error("invalid number of vector elements");
1554 
1555  lex();
1556 
1557  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
1558  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1559  lex();
1560 
1561  if (Token.range().front() != 's' && Token.range().front() != 'p')
1562  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1563  StringRef SizeStr = Token.range().drop_front();
1564  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1565  return error("expected integers after 's'/'p' type character");
1566 
1567  if (Token.range().front() == 's') {
1568  auto ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1569  if (!verifyScalarSize(ScalarSize))
1570  return error("invalid size for scalar type");
1571  Ty = LLT::scalar(ScalarSize);
1572  } else if (Token.range().front() == 'p') {
1573  const DataLayout &DL = MF.getDataLayout();
1574  uint64_t AS = APSInt(Token.range().drop_front()).getZExtValue();
1575  if (!verifyAddrSpace(AS))
1576  return error("invalid address space number");
1577 
1578  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1579  } else
1580  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1581  lex();
1582 
1583  if (Token.isNot(MIToken::greater))
1584  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1585  lex();
1586 
1587  Ty = LLT::vector(NumElements, Ty);
1588  return false;
1589 }
1590 
1591 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
1592  assert(Token.is(MIToken::Identifier));
1593  StringRef TypeStr = Token.range();
1594  if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&
1595  TypeStr.front() != 'p')
1596  return error(
1597  "a typed immediate operand should start with one of 'i', 's', or 'p'");
1598  StringRef SizeStr = Token.range().drop_front();
1599  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1600  return error("expected integers after 'i'/'s'/'p' type character");
1601 
1602  auto Loc = Token.location();
1603  lex();
1604  if (Token.isNot(MIToken::IntegerLiteral)) {
1605  if (Token.isNot(MIToken::Identifier) ||
1606  !(Token.range() == "true" || Token.range() == "false"))
1607  return error("expected an integer literal");
1608  }
1609  const Constant *C = nullptr;
1610  if (parseIRConstant(Loc, C))
1611  return true;
1612  Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
1613  return false;
1614 }
1615 
1616 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
1617  auto Loc = Token.location();
1618  lex();
1619  if (Token.isNot(MIToken::FloatingPointLiteral) &&
1620  Token.isNot(MIToken::HexLiteral))
1621  return error("expected a floating point literal");
1622  const Constant *C = nullptr;
1623  if (parseIRConstant(Loc, C))
1624  return true;
1625  Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
1626  return false;
1627 }
1628 
1629 bool MIParser::getUnsigned(unsigned &Result) {
1630  if (Token.hasIntegerValue()) {
1631  const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
1632  uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
1633  if (Val64 == Limit)
1634  return error("expected 32-bit integer (too large)");
1635  Result = Val64;
1636  return false;
1637  }
1638  if (Token.is(MIToken::HexLiteral)) {
1639  APInt A;
1640  if (getHexUint(A))
1641  return true;
1642  if (A.getBitWidth() > 32)
1643  return error("expected 32-bit integer (too large)");
1644  Result = A.getZExtValue();
1645  return false;
1646  }
1647  return true;
1648 }
1649 
1651  assert(Token.is(MIToken::MachineBasicBlock) ||
1653  unsigned Number;
1654  if (getUnsigned(Number))
1655  return true;
1656  auto MBBInfo = PFS.MBBSlots.find(Number);
1657  if (MBBInfo == PFS.MBBSlots.end())
1658  return error(Twine("use of undefined machine basic block #") +
1659  Twine(Number));
1660  MBB = MBBInfo->second;
1661  // TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
1662  // we drop the <irname> from the bb.<id>.<irname> format.
1663  if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
1664  return error(Twine("the name of machine basic block #") + Twine(Number) +
1665  " isn't '" + Token.stringValue() + "'");
1666  return false;
1667 }
1668 
1669 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
1670  MachineBasicBlock *MBB;
1671  if (parseMBBReference(MBB))
1672  return true;
1673  Dest = MachineOperand::CreateMBB(MBB);
1674  lex();
1675  return false;
1676 }
1677 
1678 bool MIParser::parseStackFrameIndex(int &FI) {
1679  assert(Token.is(MIToken::StackObject));
1680  unsigned ID;
1681  if (getUnsigned(ID))
1682  return true;
1683  auto ObjectInfo = PFS.StackObjectSlots.find(ID);
1684  if (ObjectInfo == PFS.StackObjectSlots.end())
1685  return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
1686  "'");
1687  StringRef Name;
1688  if (const auto *Alloca =
1689  MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
1690  Name = Alloca->getName();
1691  if (!Token.stringValue().empty() && Token.stringValue() != Name)
1692  return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
1693  "' isn't '" + Token.stringValue() + "'");
1694  lex();
1695  FI = ObjectInfo->second;
1696  return false;
1697 }
1698 
1699 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
1700  int FI;
1701  if (parseStackFrameIndex(FI))
1702  return true;
1703  Dest = MachineOperand::CreateFI(FI);
1704  return false;
1705 }
1706 
1707 bool MIParser::parseFixedStackFrameIndex(int &FI) {
1708  assert(Token.is(MIToken::FixedStackObject));
1709  unsigned ID;
1710  if (getUnsigned(ID))
1711  return true;
1712  auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
1713  if (ObjectInfo == PFS.FixedStackObjectSlots.end())
1714  return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
1715  Twine(ID) + "'");
1716  lex();
1717  FI = ObjectInfo->second;
1718  return false;
1719 }
1720 
1721 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
1722  int FI;
1723  if (parseFixedStackFrameIndex(FI))
1724  return true;
1725  Dest = MachineOperand::CreateFI(FI);
1726  return false;
1727 }
1728 
1729 bool MIParser::parseGlobalValue(GlobalValue *&GV) {
1730  switch (Token.kind()) {
1732  const Module *M = MF.getFunction().getParent();
1733  GV = M->getNamedValue(Token.stringValue());
1734  if (!GV)
1735  return error(Twine("use of undefined global value '") + Token.range() +
1736  "'");
1737  break;
1738  }
1739  case MIToken::GlobalValue: {
1740  unsigned GVIdx;
1741  if (getUnsigned(GVIdx))
1742  return true;
1743  if (GVIdx >= PFS.IRSlots.GlobalValues.size())
1744  return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
1745  "'");
1746  GV = PFS.IRSlots.GlobalValues[GVIdx];
1747  break;
1748  }
1749  default:
1750  llvm_unreachable("The current token should be a global value");
1751  }
1752  return false;
1753 }
1754 
1755 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
1756  GlobalValue *GV = nullptr;
1757  if (parseGlobalValue(GV))
1758  return true;
1759  lex();
1760  Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
1761  if (parseOperandsOffset(Dest))
1762  return true;
1763  return false;
1764 }
1765 
1766 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
1767  assert(Token.is(MIToken::ConstantPoolItem));
1768  unsigned ID;
1769  if (getUnsigned(ID))
1770  return true;
1771  auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
1772  if (ConstantInfo == PFS.ConstantPoolSlots.end())
1773  return error("use of undefined constant '%const." + Twine(ID) + "'");
1774  lex();
1775  Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
1776  if (parseOperandsOffset(Dest))
1777  return true;
1778  return false;
1779 }
1780 
1781 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
1782  assert(Token.is(MIToken::JumpTableIndex));
1783  unsigned ID;
1784  if (getUnsigned(ID))
1785  return true;
1786  auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
1787  if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
1788  return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
1789  lex();
1790  Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
1791  return false;
1792 }
1793 
1794 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
1795  assert(Token.is(MIToken::ExternalSymbol));
1796  const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
1797  lex();
1798  Dest = MachineOperand::CreateES(Symbol);
1799  if (parseOperandsOffset(Dest))
1800  return true;
1801  return false;
1802 }
1803 
1804 bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {
1805  assert(Token.is(MIToken::MCSymbol));
1806  MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());
1807  lex();
1808  Dest = MachineOperand::CreateMCSymbol(Symbol);
1809  if (parseOperandsOffset(Dest))
1810  return true;
1811  return false;
1812 }
1813 
1814 bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
1815  assert(Token.is(MIToken::SubRegisterIndex));
1816  StringRef Name = Token.stringValue();
1817  unsigned SubRegIndex = PFS.Target.getSubRegIndex(Token.stringValue());
1818  if (SubRegIndex == 0)
1819  return error(Twine("unknown subregister index '") + Name + "'");
1820  lex();
1821  Dest = MachineOperand::CreateImm(SubRegIndex);
1822  return false;
1823 }
1824 
1825 bool MIParser::parseMDNode(MDNode *&Node) {
1826  assert(Token.is(MIToken::exclaim));
1827 
1828  auto Loc = Token.location();
1829  lex();
1830  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1831  return error("expected metadata id after '!'");
1832  unsigned ID;
1833  if (getUnsigned(ID))
1834  return true;
1835  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
1836  if (NodeInfo == PFS.IRSlots.MetadataNodes.end())
1837  return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
1838  lex();
1839  Node = NodeInfo->second.get();
1840  return false;
1841 }
1842 
1843 bool MIParser::parseDIExpression(MDNode *&Expr) {
1844  assert(Token.is(MIToken::md_diexpr));
1845  lex();
1846 
1847  // FIXME: Share this parsing with the IL parser.
1848  SmallVector<uint64_t, 8> Elements;
1849 
1850  if (expectAndConsume(MIToken::lparen))
1851  return true;
1852 
1853  if (Token.isNot(MIToken::rparen)) {
1854  do {
1855  if (Token.is(MIToken::Identifier)) {
1856  if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
1857  lex();
1858  Elements.push_back(Op);
1859  continue;
1860  }
1861  if (unsigned Enc = dwarf::getAttributeEncoding(Token.stringValue())) {
1862  lex();
1863  Elements.push_back(Enc);
1864  continue;
1865  }
1866  return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
1867  }
1868 
1869  if (Token.isNot(MIToken::IntegerLiteral) ||
1870  Token.integerValue().isSigned())
1871  return error("expected unsigned integer");
1872 
1873  auto &U = Token.integerValue();
1874  if (U.ugt(UINT64_MAX))
1875  return error("element too large, limit is " + Twine(UINT64_MAX));
1876  Elements.push_back(U.getZExtValue());
1877  lex();
1878 
1879  } while (consumeIfPresent(MIToken::comma));
1880  }
1881 
1882  if (expectAndConsume(MIToken::rparen))
1883  return true;
1884 
1885  Expr = DIExpression::get(MF.getFunction().getContext(), Elements);
1886  return false;
1887 }
1888 
1889 bool MIParser::parseDILocation(MDNode *&Loc) {
1890  assert(Token.is(MIToken::md_dilocation));
1891  lex();
1892 
1893  bool HaveLine = false;
1894  unsigned Line = 0;
1895  unsigned Column = 0;
1896  MDNode *Scope = nullptr;
1897  MDNode *InlinedAt = nullptr;
1898  bool ImplicitCode = false;
1899 
1900  if (expectAndConsume(MIToken::lparen))
1901  return true;
1902 
1903  if (Token.isNot(MIToken::rparen)) {
1904  do {
1905  if (Token.is(MIToken::Identifier)) {
1906  if (Token.stringValue() == "line") {
1907  lex();
1908  if (expectAndConsume(MIToken::colon))
1909  return true;
1910  if (Token.isNot(MIToken::IntegerLiteral) ||
1911  Token.integerValue().isSigned())
1912  return error("expected unsigned integer");
1913  Line = Token.integerValue().getZExtValue();
1914  HaveLine = true;
1915  lex();
1916  continue;
1917  }
1918  if (Token.stringValue() == "column") {
1919  lex();
1920  if (expectAndConsume(MIToken::colon))
1921  return true;
1922  if (Token.isNot(MIToken::IntegerLiteral) ||
1923  Token.integerValue().isSigned())
1924  return error("expected unsigned integer");
1925  Column = Token.integerValue().getZExtValue();
1926  lex();
1927  continue;
1928  }
1929  if (Token.stringValue() == "scope") {
1930  lex();
1931  if (expectAndConsume(MIToken::colon))
1932  return true;
1933  if (parseMDNode(Scope))
1934  return error("expected metadata node");
1935  if (!isa<DIScope>(Scope))
1936  return error("expected DIScope node");
1937  continue;
1938  }
1939  if (Token.stringValue() == "inlinedAt") {
1940  lex();
1941  if (expectAndConsume(MIToken::colon))
1942  return true;
1943  if (Token.is(MIToken::exclaim)) {
1944  if (parseMDNode(InlinedAt))
1945  return true;
1946  } else if (Token.is(MIToken::md_dilocation)) {
1947  if (parseDILocation(InlinedAt))
1948  return true;
1949  } else
1950  return error("expected metadata node");
1951  if (!isa<DILocation>(InlinedAt))
1952  return error("expected DILocation node");
1953  continue;
1954  }
1955  if (Token.stringValue() == "isImplicitCode") {
1956  lex();
1957  if (expectAndConsume(MIToken::colon))
1958  return true;
1959  if (!Token.is(MIToken::Identifier))
1960  return error("expected true/false");
1961  // As far as I can see, we don't have any existing need for parsing
1962  // true/false in MIR yet. Do it ad-hoc until there's something else
1963  // that needs it.
1964  if (Token.stringValue() == "true")
1965  ImplicitCode = true;
1966  else if (Token.stringValue() == "false")
1967  ImplicitCode = false;
1968  else
1969  return error("expected true/false");
1970  lex();
1971  continue;
1972  }
1973  }
1974  return error(Twine("invalid DILocation argument '") +
1975  Token.stringValue() + "'");
1976  } while (consumeIfPresent(MIToken::comma));
1977  }
1978 
1979  if (expectAndConsume(MIToken::rparen))
1980  return true;
1981 
1982  if (!HaveLine)
1983  return error("DILocation requires line number");
1984  if (!Scope)
1985  return error("DILocation requires a scope");
1986 
1987  Loc = DILocation::get(MF.getFunction().getContext(), Line, Column, Scope,
1988  InlinedAt, ImplicitCode);
1989  return false;
1990 }
1991 
1992 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
1993  MDNode *Node = nullptr;
1994  if (Token.is(MIToken::exclaim)) {
1995  if (parseMDNode(Node))
1996  return true;
1997  } else if (Token.is(MIToken::md_diexpr)) {
1998  if (parseDIExpression(Node))
1999  return true;
2000  }
2001  Dest = MachineOperand::CreateMetadata(Node);
2002  return false;
2003 }
2004 
2005 bool MIParser::parseCFIOffset(int &Offset) {
2006  if (Token.isNot(MIToken::IntegerLiteral))
2007  return error("expected a cfi offset");
2008  if (Token.integerValue().getMinSignedBits() > 32)
2009  return error("expected a 32 bit integer (the cfi offset is too large)");
2010  Offset = (int)Token.integerValue().getExtValue();
2011  lex();
2012  return false;
2013 }
2014 
2015 bool MIParser::parseCFIRegister(unsigned &Reg) {
2016  if (Token.isNot(MIToken::NamedRegister))
2017  return error("expected a cfi register");
2018  unsigned LLVMReg;
2019  if (parseNamedRegister(LLVMReg))
2020  return true;
2021  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2022  assert(TRI && "Expected target register info");
2023  int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
2024  if (DwarfReg < 0)
2025  return error("invalid DWARF register");
2026  Reg = (unsigned)DwarfReg;
2027  lex();
2028  return false;
2029 }
2030 
2031 bool MIParser::parseCFIEscapeValues(std::string &Values) {
2032  do {
2033  if (Token.isNot(MIToken::HexLiteral))
2034  return error("expected a hexadecimal literal");
2035  unsigned Value;
2036  if (getUnsigned(Value))
2037  return true;
2038  if (Value > UINT8_MAX)
2039  return error("expected a 8-bit integer (too large)");
2040  Values.push_back(static_cast<uint8_t>(Value));
2041  lex();
2042  } while (consumeIfPresent(MIToken::comma));
2043  return false;
2044 }
2045 
2046 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
2047  auto Kind = Token.kind();
2048  lex();
2049  int Offset;
2050  unsigned Reg;
2051  unsigned CFIIndex;
2052  switch (Kind) {
2054  if (parseCFIRegister(Reg))
2055  return true;
2056  CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
2057  break;
2059  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2060  parseCFIOffset(Offset))
2061  return true;
2062  CFIIndex =
2063  MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
2064  break;
2066  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2067  parseCFIOffset(Offset))
2068  return true;
2069  CFIIndex = MF.addFrameInst(
2070  MCCFIInstruction::createRelOffset(nullptr, Reg, Offset));
2071  break;
2073  if (parseCFIRegister(Reg))
2074  return true;
2075  CFIIndex =
2077  break;
2079  if (parseCFIOffset(Offset))
2080  return true;
2081  // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
2082  CFIIndex = MF.addFrameInst(
2083  MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
2084  break;
2086  if (parseCFIOffset(Offset))
2087  return true;
2088  CFIIndex = MF.addFrameInst(
2089  MCCFIInstruction::createAdjustCfaOffset(nullptr, Offset));
2090  break;
2092  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2093  parseCFIOffset(Offset))
2094  return true;
2095  // NB: MCCFIInstruction::createDefCfa negates the offset.
2096  CFIIndex =
2097  MF.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
2098  break;
2101  break;
2103  if (parseCFIRegister(Reg))
2104  return true;
2105  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
2106  break;
2109  break;
2111  if (parseCFIRegister(Reg))
2112  return true;
2113  CFIIndex = MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, Reg));
2114  break;
2115  case MIToken::kw_cfi_register: {
2116  unsigned Reg2;
2117  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
2118  parseCFIRegister(Reg2))
2119  return true;
2120 
2121  CFIIndex =
2122  MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2));
2123  break;
2124  }
2126  CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
2127  break;
2130  break;
2131  case MIToken::kw_cfi_escape: {
2132  std::string Values;
2133  if (parseCFIEscapeValues(Values))
2134  return true;
2135  CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, Values));
2136  break;
2137  }
2138  default:
2139  // TODO: Parse the other CFI operands.
2140  llvm_unreachable("The current token should be a cfi operand");
2141  }
2142  Dest = MachineOperand::CreateCFIIndex(CFIIndex);
2143  return false;
2144 }
2145 
2146 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
2147  switch (Token.kind()) {
2148  case MIToken::NamedIRBlock: {
2149  BB = dyn_cast_or_null<BasicBlock>(
2150  F.getValueSymbolTable()->lookup(Token.stringValue()));
2151  if (!BB)
2152  return error(Twine("use of undefined IR block '") + Token.range() + "'");
2153  break;
2154  }
2155  case MIToken::IRBlock: {
2156  unsigned SlotNumber = 0;
2157  if (getUnsigned(SlotNumber))
2158  return true;
2159  BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
2160  if (!BB)
2161  return error(Twine("use of undefined IR block '%ir-block.") +
2162  Twine(SlotNumber) + "'");
2163  break;
2164  }
2165  default:
2166  llvm_unreachable("The current token should be an IR block reference");
2167  }
2168  return false;
2169 }
2170 
2171 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
2172  assert(Token.is(MIToken::kw_blockaddress));
2173  lex();
2174  if (expectAndConsume(MIToken::lparen))
2175  return true;
2176  if (Token.isNot(MIToken::GlobalValue) &&
2177  Token.isNot(MIToken::NamedGlobalValue))
2178  return error("expected a global value");
2179  GlobalValue *GV = nullptr;
2180  if (parseGlobalValue(GV))
2181  return true;
2182  auto *F = dyn_cast<Function>(GV);
2183  if (!F)
2184  return error("expected an IR function reference");
2185  lex();
2186  if (expectAndConsume(MIToken::comma))
2187  return true;
2188  BasicBlock *BB = nullptr;
2189  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
2190  return error("expected an IR block reference");
2191  if (parseIRBlock(BB, *F))
2192  return true;
2193  lex();
2194  if (expectAndConsume(MIToken::rparen))
2195  return true;
2196  Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
2197  if (parseOperandsOffset(Dest))
2198  return true;
2199  return false;
2200 }
2201 
2202 bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
2203  assert(Token.is(MIToken::kw_intrinsic));
2204  lex();
2205  if (expectAndConsume(MIToken::lparen))
2206  return error("expected syntax intrinsic(@llvm.whatever)");
2207 
2208  if (Token.isNot(MIToken::NamedGlobalValue))
2209  return error("expected syntax intrinsic(@llvm.whatever)");
2210 
2211  std::string Name = Token.stringValue();
2212  lex();
2213 
2214  if (expectAndConsume(MIToken::rparen))
2215  return error("expected ')' to terminate intrinsic name");
2216 
2217  // Find out what intrinsic we're dealing with, first try the global namespace
2218  // and then the target's private intrinsics if that fails.
2221  if (ID == Intrinsic::not_intrinsic && TII)
2222  ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
2223 
2224  if (ID == Intrinsic::not_intrinsic)
2225  return error("unknown intrinsic name");
2227 
2228  return false;
2229 }
2230 
2231 bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
2232  assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
2233  bool IsFloat = Token.is(MIToken::kw_floatpred);
2234  lex();
2235 
2236  if (expectAndConsume(MIToken::lparen))
2237  return error("expected syntax intpred(whatever) or floatpred(whatever");
2238 
2239  if (Token.isNot(MIToken::Identifier))
2240  return error("whatever");
2241 
2242  CmpInst::Predicate Pred;
2243  if (IsFloat) {
2244  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2245  .Case("false", CmpInst::FCMP_FALSE)
2246  .Case("oeq", CmpInst::FCMP_OEQ)
2247  .Case("ogt", CmpInst::FCMP_OGT)
2248  .Case("oge", CmpInst::FCMP_OGE)
2249  .Case("olt", CmpInst::FCMP_OLT)
2250  .Case("ole", CmpInst::FCMP_OLE)
2251  .Case("one", CmpInst::FCMP_ONE)
2252  .Case("ord", CmpInst::FCMP_ORD)
2253  .Case("uno", CmpInst::FCMP_UNO)
2254  .Case("ueq", CmpInst::FCMP_UEQ)
2255  .Case("ugt", CmpInst::FCMP_UGT)
2256  .Case("uge", CmpInst::FCMP_UGE)
2257  .Case("ult", CmpInst::FCMP_ULT)
2258  .Case("ule", CmpInst::FCMP_ULE)
2259  .Case("une", CmpInst::FCMP_UNE)
2260  .Case("true", CmpInst::FCMP_TRUE)
2262  if (!CmpInst::isFPPredicate(Pred))
2263  return error("invalid floating-point predicate");
2264  } else {
2265  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
2266  .Case("eq", CmpInst::ICMP_EQ)
2267  .Case("ne", CmpInst::ICMP_NE)
2268  .Case("sgt", CmpInst::ICMP_SGT)
2269  .Case("sge", CmpInst::ICMP_SGE)
2270  .Case("slt", CmpInst::ICMP_SLT)
2271  .Case("sle", CmpInst::ICMP_SLE)
2272  .Case("ugt", CmpInst::ICMP_UGT)
2273  .Case("uge", CmpInst::ICMP_UGE)
2274  .Case("ult", CmpInst::ICMP_ULT)
2275  .Case("ule", CmpInst::ICMP_ULE)
2277  if (!CmpInst::isIntPredicate(Pred))
2278  return error("invalid integer predicate");
2279  }
2280 
2281  lex();
2282  Dest = MachineOperand::CreatePredicate(Pred);
2283  if (expectAndConsume(MIToken::rparen))
2284  return error("predicate should be terminated by ')'.");
2285 
2286  return false;
2287 }
2288 
2289 bool MIParser::parseShuffleMaskOperand(MachineOperand &Dest) {
2290  assert(Token.is(MIToken::kw_shufflemask));
2291 
2292  lex();
2293  if (expectAndConsume(MIToken::lparen))
2294  return error("expected syntax shufflemask(<integer or undef>, ...)");
2295 
2296  SmallVector<Constant *, 32> ShufMask;
2297  LLVMContext &Ctx = MF.getFunction().getContext();
2298  Type *I32Ty = Type::getInt32Ty(Ctx);
2299 
2300  bool AllZero = true;
2301  bool AllUndef = true;
2302 
2303  do {
2304  if (Token.is(MIToken::kw_undef)) {
2305  ShufMask.push_back(UndefValue::get(I32Ty));
2306  AllZero = false;
2307  } else if (Token.is(MIToken::IntegerLiteral)) {
2308  AllUndef = false;
2309  const APSInt &Int = Token.integerValue();
2310  if (!Int.isNullValue())
2311  AllZero = false;
2312  ShufMask.push_back(ConstantInt::get(I32Ty, Int.getExtValue()));
2313  } else
2314  return error("expected integer constant");
2315 
2316  lex();
2317  } while (consumeIfPresent(MIToken::comma));
2318 
2319  if (expectAndConsume(MIToken::rparen))
2320  return error("shufflemask should be terminated by ')'.");
2321 
2322  if (AllZero || AllUndef) {
2323  VectorType *VT = VectorType::get(I32Ty, ShufMask.size());
2324  Constant *C = AllZero ? Constant::getNullValue(VT) : UndefValue::get(VT);
2326  } else
2328 
2329  return false;
2330 }
2331 
2332 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
2333  assert(Token.is(MIToken::kw_target_index));
2334  lex();
2335  if (expectAndConsume(MIToken::lparen))
2336  return true;
2337  if (Token.isNot(MIToken::Identifier))
2338  return error("expected the name of the target index");
2339  int Index = 0;
2340  if (PFS.Target.getTargetIndex(Token.stringValue(), Index))
2341  return error("use of undefined target index '" + Token.stringValue() + "'");
2342  lex();
2343  if (expectAndConsume(MIToken::rparen))
2344  return true;
2345  Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
2346  if (parseOperandsOffset(Dest))
2347  return true;
2348  return false;
2349 }
2350 
2351 bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
2352  assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
2353  lex();
2354  if (expectAndConsume(MIToken::lparen))
2355  return true;
2356 
2358  while (true) {
2359  if (Token.isNot(MIToken::NamedRegister))
2360  return error("expected a named register");
2361  unsigned Reg;
2362  if (parseNamedRegister(Reg))
2363  return true;
2364  lex();
2365  Mask[Reg / 32] |= 1U << (Reg % 32);
2366  // TODO: Report an error if the same register is used more than once.
2367  if (Token.isNot(MIToken::comma))
2368  break;
2369  lex();
2370  }
2371 
2372  if (expectAndConsume(MIToken::rparen))
2373  return true;
2374  Dest = MachineOperand::CreateRegMask(Mask);
2375  return false;
2376 }
2377 
2378 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
2379  assert(Token.is(MIToken::kw_liveout));
2381  lex();
2382  if (expectAndConsume(MIToken::lparen))
2383  return true;
2384  while (true) {
2385  if (Token.isNot(MIToken::NamedRegister))
2386  return error("expected a named register");
2387  unsigned Reg;
2388  if (parseNamedRegister(Reg))
2389  return true;
2390  lex();
2391  Mask[Reg / 32] |= 1U << (Reg % 32);
2392  // TODO: Report an error if the same register is used more than once.
2393  if (Token.isNot(MIToken::comma))
2394  break;
2395  lex();
2396  }
2397  if (expectAndConsume(MIToken::rparen))
2398  return true;
2399  Dest = MachineOperand::CreateRegLiveOut(Mask);
2400  return false;
2401 }
2402 
2403 bool MIParser::parseMachineOperand(MachineOperand &Dest,
2404  Optional<unsigned> &TiedDefIdx) {
2405  switch (Token.kind()) {
2406  case MIToken::kw_implicit:
2408  case MIToken::kw_def:
2409  case MIToken::kw_dead:
2410  case MIToken::kw_killed:
2411  case MIToken::kw_undef:
2412  case MIToken::kw_internal:
2414  case MIToken::kw_debug_use:
2415  case MIToken::kw_renamable:
2416  case MIToken::underscore:
2420  return parseRegisterOperand(Dest, TiedDefIdx);
2422  return parseImmediateOperand(Dest);
2423  case MIToken::kw_half:
2424  case MIToken::kw_float:
2425  case MIToken::kw_double:
2426  case MIToken::kw_x86_fp80:
2427  case MIToken::kw_fp128:
2428  case MIToken::kw_ppc_fp128:
2429  return parseFPImmediateOperand(Dest);
2431  return parseMBBOperand(Dest);
2432  case MIToken::StackObject:
2433  return parseStackObjectOperand(Dest);
2435  return parseFixedStackObjectOperand(Dest);
2436  case MIToken::GlobalValue:
2438  return parseGlobalAddressOperand(Dest);
2440  return parseConstantPoolIndexOperand(Dest);
2442  return parseJumpTableIndexOperand(Dest);
2444  return parseExternalSymbolOperand(Dest);
2445  case MIToken::MCSymbol:
2446  return parseMCSymbolOperand(Dest);
2448  return parseSubRegisterIndexOperand(Dest);
2449  case MIToken::md_diexpr:
2450  case MIToken::exclaim:
2451  return parseMetadataOperand(Dest);
2467  return parseCFIOperand(Dest);
2469  return parseBlockAddressOperand(Dest);
2470  case MIToken::kw_intrinsic:
2471  return parseIntrinsicOperand(Dest);
2473  return parseTargetIndexOperand(Dest);
2474  case MIToken::kw_liveout:
2475  return parseLiveoutRegisterMaskOperand(Dest);
2476  case MIToken::kw_floatpred:
2477  case MIToken::kw_intpred:
2478  return parsePredicateOperand(Dest);
2480  return parseShuffleMaskOperand(Dest);
2481  case MIToken::Error:
2482  return true;
2483  case MIToken::Identifier:
2484  if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2485  Dest = MachineOperand::CreateRegMask(RegMask);
2486  lex();
2487  break;
2488  } else if (Token.stringValue() == "CustomRegMask") {
2489  return parseCustomRegisterMaskOperand(Dest);
2490  } else
2491  return parseTypedImmediateOperand(Dest);
2492  default:
2493  // FIXME: Parse the MCSymbol machine operand.
2494  return error("expected a machine operand");
2495  }
2496  return false;
2497 }
2498 
2499 bool MIParser::parseMachineOperandAndTargetFlags(
2500  MachineOperand &Dest, Optional<unsigned> &TiedDefIdx) {
2501  unsigned TF = 0;
2502  bool HasTargetFlags = false;
2503  if (Token.is(MIToken::kw_target_flags)) {
2504  HasTargetFlags = true;
2505  lex();
2506  if (expectAndConsume(MIToken::lparen))
2507  return true;
2508  if (Token.isNot(MIToken::Identifier))
2509  return error("expected the name of the target flag");
2510  if (PFS.Target.getDirectTargetFlag(Token.stringValue(), TF)) {
2511  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), TF))
2512  return error("use of undefined target flag '" + Token.stringValue() +
2513  "'");
2514  }
2515  lex();
2516  while (Token.is(MIToken::comma)) {
2517  lex();
2518  if (Token.isNot(MIToken::Identifier))
2519  return error("expected the name of the target flag");
2520  unsigned BitFlag = 0;
2521  if (PFS.Target.getBitmaskTargetFlag(Token.stringValue(), BitFlag))
2522  return error("use of undefined target flag '" + Token.stringValue() +
2523  "'");
2524  // TODO: Report an error when using a duplicate bit target flag.
2525  TF |= BitFlag;
2526  lex();
2527  }
2528  if (expectAndConsume(MIToken::rparen))
2529  return true;
2530  }
2531  auto Loc = Token.location();
2532  if (parseMachineOperand(Dest, TiedDefIdx))
2533  return true;
2534  if (!HasTargetFlags)
2535  return false;
2536  if (Dest.isReg())
2537  return error(Loc, "register operands can't have target flags");
2538  Dest.setTargetFlags(TF);
2539  return false;
2540 }
2541 
2542 bool MIParser::parseOffset(int64_t &Offset) {
2543  if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
2544  return false;
2545  StringRef Sign = Token.range();
2546  bool IsNegative = Token.is(MIToken::minus);
2547  lex();
2548  if (Token.isNot(MIToken::IntegerLiteral))
2549  return error("expected an integer literal after '" + Sign + "'");
2550  if (Token.integerValue().getMinSignedBits() > 64)
2551  return error("expected 64-bit integer (too large)");
2552  Offset = Token.integerValue().getExtValue();
2553  if (IsNegative)
2554  Offset = -Offset;
2555  lex();
2556  return false;
2557 }
2558 
2559 bool MIParser::parseAlignment(unsigned &Alignment) {
2560  assert(Token.is(MIToken::kw_align));
2561  lex();
2562  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2563  return error("expected an integer literal after 'align'");
2564  if (getUnsigned(Alignment))
2565  return true;
2566  lex();
2567 
2568  if (!isPowerOf2_32(Alignment))
2569  return error("expected a power-of-2 literal after 'align'");
2570 
2571  return false;
2572 }
2573 
2574 bool MIParser::parseAddrspace(unsigned &Addrspace) {
2575  assert(Token.is(MIToken::kw_addrspace));
2576  lex();
2577  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2578  return error("expected an integer literal after 'addrspace'");
2579  if (getUnsigned(Addrspace))
2580  return true;
2581  lex();
2582  return false;
2583 }
2584 
2585 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
2586  int64_t Offset = 0;
2587  if (parseOffset(Offset))
2588  return true;
2589  Op.setOffset(Offset);
2590  return false;
2591 }
2592 
2593 bool MIParser::parseIRValue(const Value *&V) {
2594  switch (Token.kind()) {
2595  case MIToken::NamedIRValue: {
2596  V = MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
2597  break;
2598  }
2599  case MIToken::IRValue: {
2600  unsigned SlotNumber = 0;
2601  if (getUnsigned(SlotNumber))
2602  return true;
2603  V = getIRValue(SlotNumber);
2604  break;
2605  }
2607  case MIToken::GlobalValue: {
2608  GlobalValue *GV = nullptr;
2609  if (parseGlobalValue(GV))
2610  return true;
2611  V = GV;
2612  break;
2613  }
2614  case MIToken::QuotedIRValue: {
2615  const Constant *C = nullptr;
2616  if (parseIRConstant(Token.location(), Token.stringValue(), C))
2617  return true;
2618  V = C;
2619  break;
2620  }
2621  default:
2622  llvm_unreachable("The current token should be an IR block reference");
2623  }
2624  if (!V)
2625  return error(Twine("use of undefined IR value '") + Token.range() + "'");
2626  return false;
2627 }
2628 
2629 bool MIParser::getUint64(uint64_t &Result) {
2630  if (Token.hasIntegerValue()) {
2631  if (Token.integerValue().getActiveBits() > 64)
2632  return error("expected 64-bit integer (too large)");
2633  Result = Token.integerValue().getZExtValue();
2634  return false;
2635  }
2636  if (Token.is(MIToken::HexLiteral)) {
2637  APInt A;
2638  if (getHexUint(A))
2639  return true;
2640  if (A.getBitWidth() > 64)
2641  return error("expected 64-bit integer (too large)");
2642  Result = A.getZExtValue();
2643  return false;
2644  }
2645  return true;
2646 }
2647 
2648 bool MIParser::getHexUint(APInt &Result) {
2649  assert(Token.is(MIToken::HexLiteral));
2650  StringRef S = Token.range();
2651  assert(S[0] == '0' && tolower(S[1]) == 'x');
2652  // This could be a floating point literal with a special prefix.
2653  if (!isxdigit(S[2]))
2654  return true;
2655  StringRef V = S.substr(2);
2656  APInt A(V.size()*4, V, 16);
2657 
2658  // If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
2659  // sure it isn't the case before constructing result.
2660  unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
2661  Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
2662  return false;
2663 }
2664 
2665 bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
2666  const auto OldFlags = Flags;
2667  switch (Token.kind()) {
2668  case MIToken::kw_volatile:
2670  break;
2673  break;
2676  break;
2677  case MIToken::kw_invariant:
2679  break;
2680  case MIToken::StringConstant: {
2682  if (PFS.Target.getMMOTargetFlag(Token.stringValue(), TF))
2683  return error("use of undefined target MMO flag '" + Token.stringValue() +
2684  "'");
2685  Flags |= TF;
2686  break;
2687  }
2688  default:
2689  llvm_unreachable("The current token should be a memory operand flag");
2690  }
2691  if (OldFlags == Flags)
2692  // We know that the same flag is specified more than once when the flags
2693  // weren't modified.
2694  return error("duplicate '" + Token.stringValue() + "' memory operand flag");
2695  lex();
2696  return false;
2697 }
2698 
2699 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
2700  switch (Token.kind()) {
2701  case MIToken::kw_stack:
2702  PSV = MF.getPSVManager().getStack();
2703  break;
2704  case MIToken::kw_got:
2705  PSV = MF.getPSVManager().getGOT();
2706  break;
2708  PSV = MF.getPSVManager().getJumpTable();
2709  break;
2711  PSV = MF.getPSVManager().getConstantPool();
2712  break;
2714  int FI;
2715  if (parseFixedStackFrameIndex(FI))
2716  return true;
2717  PSV = MF.getPSVManager().getFixedStack(FI);
2718  // The token was already consumed, so use return here instead of break.
2719  return false;
2720  }
2721  case MIToken::StackObject: {
2722  int FI;
2723  if (parseStackFrameIndex(FI))
2724  return true;
2725  PSV = MF.getPSVManager().getFixedStack(FI);
2726  // The token was already consumed, so use return here instead of break.
2727  return false;
2728  }
2730  lex();
2731  switch (Token.kind()) {
2732  case MIToken::GlobalValue:
2734  GlobalValue *GV = nullptr;
2735  if (parseGlobalValue(GV))
2736  return true;
2738  break;
2739  }
2742  MF.createExternalSymbolName(Token.stringValue()));
2743  break;
2744  default:
2745  return error(
2746  "expected a global value or an external symbol after 'call-entry'");
2747  }
2748  break;
2749  default:
2750  llvm_unreachable("The current token should be pseudo source value");
2751  }
2752  lex();
2753  return false;
2754 }
2755 
2756 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
2757  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
2758  Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
2759  Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
2760  Token.is(MIToken::kw_call_entry)) {
2761  const PseudoSourceValue *PSV = nullptr;
2762  if (parseMemoryPseudoSourceValue(PSV))
2763  return true;
2764  int64_t Offset = 0;
2765  if (parseOffset(Offset))
2766  return true;
2767  Dest = MachinePointerInfo(PSV, Offset);
2768  return false;
2769  }
2770  if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
2771  Token.isNot(MIToken::GlobalValue) &&
2772  Token.isNot(MIToken::NamedGlobalValue) &&
2773  Token.isNot(MIToken::QuotedIRValue))
2774  return error("expected an IR value reference");
2775  const Value *V = nullptr;
2776  if (parseIRValue(V))
2777  return true;
2778  if (!V->getType()->isPointerTy())
2779  return error("expected a pointer IR value");
2780  lex();
2781  int64_t Offset = 0;
2782  if (parseOffset(Offset))
2783  return true;
2784  Dest = MachinePointerInfo(V, Offset);
2785  return false;
2786 }
2787 
2788 bool MIParser::parseOptionalScope(LLVMContext &Context,
2789  SyncScope::ID &SSID) {
2790  SSID = SyncScope::System;
2791  if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
2792  lex();
2793  if (expectAndConsume(MIToken::lparen))
2794  return error("expected '(' in syncscope");
2795 
2796  std::string SSN;
2797  if (parseStringConstant(SSN))
2798  return true;
2799 
2800  SSID = Context.getOrInsertSyncScopeID(SSN);
2801  if (expectAndConsume(MIToken::rparen))
2802  return error("expected ')' in syncscope");
2803  }
2804 
2805  return false;
2806 }
2807 
2808 bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
2809  Order = AtomicOrdering::NotAtomic;
2810  if (Token.isNot(MIToken::Identifier))
2811  return false;
2812 
2813  Order = StringSwitch<AtomicOrdering>(Token.stringValue())
2814  .Case("unordered", AtomicOrdering::Unordered)
2815  .Case("monotonic", AtomicOrdering::Monotonic)
2816  .Case("acquire", AtomicOrdering::Acquire)
2817  .Case("release", AtomicOrdering::Release)
2821 
2822  if (Order != AtomicOrdering::NotAtomic) {
2823  lex();
2824  return false;
2825  }
2826 
2827  return error("expected an atomic scope, ordering or a size specification");
2828 }
2829 
2830 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
2831  if (expectAndConsume(MIToken::lparen))
2832  return true;
2834  while (Token.isMemoryOperandFlag()) {
2835  if (parseMemoryOperandFlag(Flags))
2836  return true;
2837  }
2838  if (Token.isNot(MIToken::Identifier) ||
2839  (Token.stringValue() != "load" && Token.stringValue() != "store"))
2840  return error("expected 'load' or 'store' memory operation");
2841  if (Token.stringValue() == "load")
2842  Flags |= MachineMemOperand::MOLoad;
2843  else
2844  Flags |= MachineMemOperand::MOStore;
2845  lex();
2846 
2847  // Optional 'store' for operands that both load and store.
2848  if (Token.is(MIToken::Identifier) && Token.stringValue() == "store") {
2849  Flags |= MachineMemOperand::MOStore;
2850  lex();
2851  }
2852 
2853  // Optional synchronization scope.
2854  SyncScope::ID SSID;
2855  if (parseOptionalScope(MF.getFunction().getContext(), SSID))
2856  return true;
2857 
2858  // Up to two atomic orderings (cmpxchg provides guarantees on failure).
2859  AtomicOrdering Order, FailureOrder;
2860  if (parseOptionalAtomicOrdering(Order))
2861  return true;
2862 
2863  if (parseOptionalAtomicOrdering(FailureOrder))
2864  return true;
2865 
2866  if (Token.isNot(MIToken::IntegerLiteral) &&
2867  Token.isNot(MIToken::kw_unknown_size))
2868  return error("expected the size integer literal or 'unknown-size' after "
2869  "memory operation");
2870  uint64_t Size;
2871  if (Token.is(MIToken::IntegerLiteral)) {
2872  if (getUint64(Size))
2873  return true;
2874  } else if (Token.is(MIToken::kw_unknown_size)) {
2876  }
2877  lex();
2878 
2880  if (Token.is(MIToken::Identifier)) {
2881  const char *Word =
2882  ((Flags & MachineMemOperand::MOLoad) &&
2883  (Flags & MachineMemOperand::MOStore))
2884  ? "on"
2885  : Flags & MachineMemOperand::MOLoad ? "from" : "into";
2886  if (Token.stringValue() != Word)
2887  return error(Twine("expected '") + Word + "'");
2888  lex();
2889 
2890  if (parseMachinePointerInfo(Ptr))
2891  return true;
2892  }
2893  unsigned BaseAlignment = (Size != MemoryLocation::UnknownSize ? Size : 1);
2894  AAMDNodes AAInfo;
2895  MDNode *Range = nullptr;
2896  while (consumeIfPresent(MIToken::comma)) {
2897  switch (Token.kind()) {
2898  case MIToken::kw_align:
2899  if (parseAlignment(BaseAlignment))
2900  return true;
2901  break;
2902  case MIToken::kw_addrspace:
2903  if (parseAddrspace(Ptr.AddrSpace))
2904  return true;
2905  break;
2906  case MIToken::md_tbaa:
2907  lex();
2908  if (parseMDNode(AAInfo.TBAA))
2909  return true;
2910  break;
2912  lex();
2913  if (parseMDNode(AAInfo.Scope))
2914  return true;
2915  break;
2916  case MIToken::md_noalias:
2917  lex();
2918  if (parseMDNode(AAInfo.NoAlias))
2919  return true;
2920  break;
2921  case MIToken::md_range:
2922  lex();
2923  if (parseMDNode(Range))
2924  return true;
2925  break;
2926  // TODO: Report an error on duplicate metadata nodes.
2927  default:
2928  return error("expected 'align' or '!tbaa' or '!alias.scope' or "
2929  "'!noalias' or '!range'");
2930  }
2931  }
2932  if (expectAndConsume(MIToken::rparen))
2933  return true;
2934  Dest = MF.getMachineMemOperand(Ptr, Flags, Size, BaseAlignment, AAInfo, Range,
2935  SSID, Order, FailureOrder);
2936  return false;
2937 }
2938 
2939 bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {
2940  assert((Token.is(MIToken::kw_pre_instr_symbol) ||
2941  Token.is(MIToken::kw_post_instr_symbol)) &&
2942  "Invalid token for a pre- post-instruction symbol!");
2943  lex();
2944  if (Token.isNot(MIToken::MCSymbol))
2945  return error("expected a symbol after 'pre-instr-symbol'");
2946  Symbol = getOrCreateMCSymbol(Token.stringValue());
2947  lex();
2948  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
2949  Token.is(MIToken::lbrace))
2950  return false;
2951  if (Token.isNot(MIToken::comma))
2952  return error("expected ',' before the next machine operand");
2953  lex();
2954  return false;
2955 }
2956 
2958  const Function &F,
2959  DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2960  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
2961  MST.incorporateFunction(F);
2962  for (auto &BB : F) {
2963  if (BB.hasName())
2964  continue;
2965  int Slot = MST.getLocalSlot(&BB);
2966  if (Slot == -1)
2967  continue;
2968  Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
2969  }
2970 }
2971 
2973  unsigned Slot,
2974  const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2975  auto BlockInfo = Slots2BasicBlocks.find(Slot);
2976  if (BlockInfo == Slots2BasicBlocks.end())
2977  return nullptr;
2978  return BlockInfo->second;
2979 }
2980 
2981 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
2982  if (Slots2BasicBlocks.empty())
2983  initSlots2BasicBlocks(MF.getFunction(), Slots2BasicBlocks);
2984  return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
2985 }
2986 
2987 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
2988  if (&F == &MF.getFunction())
2989  return getIRBlock(Slot);
2990  DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
2991  initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
2992  return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
2993 }
2994 
2995 static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
2996  DenseMap<unsigned, const Value *> &Slots2Values) {
2997  int Slot = MST.getLocalSlot(V);
2998  if (Slot == -1)
2999  return;
3000  Slots2Values.insert(std::make_pair(unsigned(Slot), V));
3001 }
3002 
3003 /// Creates the mapping from slot numbers to function's unnamed IR values.
3004 static void initSlots2Values(const Function &F,
3005  DenseMap<unsigned, const Value *> &Slots2Values) {
3006  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
3007  MST.incorporateFunction(F);
3008  for (const auto &Arg : F.args())
3009  mapValueToSlot(&Arg, MST, Slots2Values);
3010  for (const auto &BB : F) {
3011  mapValueToSlot(&BB, MST, Slots2Values);
3012  for (const auto &I : BB)
3013  mapValueToSlot(&I, MST, Slots2Values);
3014  }
3015 }
3016 
3017 const Value *MIParser::getIRValue(unsigned Slot) {
3018  if (Slots2Values.empty())
3019  initSlots2Values(MF.getFunction(), Slots2Values);
3020  auto ValueInfo = Slots2Values.find(Slot);
3021  if (ValueInfo == Slots2Values.end())
3022  return nullptr;
3023  return ValueInfo->second;
3024 }
3025 
3026 MCSymbol *MIParser::getOrCreateMCSymbol(StringRef Name) {
3027  // FIXME: Currently we can't recognize temporary or local symbols and call all
3028  // of the appropriate forms to create them. However, this handles basic cases
3029  // well as most of the special aspects are recognized by a prefix on their
3030  // name, and the input names should already be unique. For test cases, keeping
3031  // the symbol name out of the symbol table isn't terribly important.
3032  return MF.getContext().getOrCreateSymbol(Name);
3033 }
3034 
3035 bool MIParser::parseStringConstant(std::string &Result) {
3036  if (Token.isNot(MIToken::StringConstant))
3037  return error("expected string constant");
3038  Result = Token.stringValue();
3039  lex();
3040  return false;
3041 }
3042 
3044  StringRef Src,
3045  SMDiagnostic &Error) {
3046  return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
3047 }
3048 
3050  StringRef Src, SMDiagnostic &Error) {
3051  return MIParser(PFS, Error, Src).parseBasicBlocks();
3052 }
3053 
3055  MachineBasicBlock *&MBB, StringRef Src,
3056  SMDiagnostic &Error) {
3057  return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
3058 }
3059 
3061  unsigned &Reg, StringRef Src,
3062  SMDiagnostic &Error) {
3063  return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
3064 }
3065 
3067  unsigned &Reg, StringRef Src,
3068  SMDiagnostic &Error) {
3069  return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
3070 }
3071 
3073  VRegInfo *&Info, StringRef Src,
3074  SMDiagnostic &Error) {
3075  return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
3076 }
3077 
3079  int &FI, StringRef Src,
3080  SMDiagnostic &Error) {
3081  return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
3082 }
3083 
3085  MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
3086  return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
3087 }
bool isFPPredicate() const
Definition: InstrTypes.h:824
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
uint64_t CallInst * C
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
Definition: MemoryBuffer.h:69
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
Definition: MIParser.cpp:3043
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2957
A common definition of LaneBitmask for use in TableGen and CodeGen.
bool getTargetIndex(StringRef Name, int &Index)
Try to convert a name of target index to the corresponding target index.
Definition: MIParser.cpp:200
static LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
uint64_t getZExtValue() const
Get zero extended value.
Definition: APInt.h:1571
static MachineOperand CreateCImm(const ConstantInt *CI)
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
DenseMap< unsigned, unsigned > JumpTableSlots
Definition: MIParser.h:172
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:232
LLVMContext & Context
const T & back() const
back - Get the last element.
Definition: ArrayRef.h:157
MDNode * Scope
The tag for alias scope specification (used with noalias).
Definition: Metadata.h:660
Atomic ordering constants.
DenseMap< unsigned, unsigned > ConstantPoolSlots
Definition: MIParser.h:171
This class represents lattice values for constants.
Definition: AllocatorList.h:23
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:657
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
Definition: Parser.cpp:147
void setTargetFlags(unsigned F)
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:65
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
static BranchProbability getRaw(uint32_t N)
static MCCFIInstruction createRememberState(MCSymbol *L)
.cfi_remember_state Save all current rules for all registers.
Definition: MCDwarf.h:557
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:63
const MCPhysReg * getImplicitUses() const
Return a list of registers that are potentially read by any instance of this machine instruction...
Definition: MCInstrDesc.h:543
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:178
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:507
unsigned Reg
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID...
This file contains the declarations for metadata subclasses.
unsigned getNumRegBanks() const
Get the total number of register banks.
unsigned less or equal
Definition: InstrTypes.h:758
unsigned less than
Definition: InstrTypes.h:757
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:857
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag)
Try to convert a name of a MachineMemOperand target flag to the corresponding target flag...
Definition: MIParser.cpp:264
static bool verifyScalarSize(uint64_t Size)
Definition: MIParser.cpp:1505
static bool verifyVectorElementCount(uint64_t NumElts)
Definition: MIParser.cpp:1509
0 1 0 0 True if ordered and less than
Definition: InstrTypes.h:738
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
iterator find(StringRef Key)
Definition: StringMap.h:332
DenseMap< unsigned, int > StackObjectSlots
Definition: MIParser.h:170
LLT getType(unsigned Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register...
1 1 1 0 True if unordered or not equal
Definition: InstrTypes.h:748
#define error(X)
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:1165
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:389
virtual const RegisterBankInfo * getRegBankInfo() const
If the information for the register banks is available, return it.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
Metadata node.
Definition: Metadata.h:863
F(f)
Manage lifetime of a slot tracker for printing IR.
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3054
const TargetRegisterClass * RC
Definition: MIParser.h:40
void setTarget(const TargetSubtargetInfo &NewSubtarget)
Definition: MIParser.cpp:85
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:494
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, const DebugLoc &DL, bool NoImp=false)
CreateMachineInstr - Allocate a new MachineInstr.
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:501
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:67
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
const TargetRegisterClass * getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1517
static Constant * getNullValue(Type *Ty)
Constructor to create a &#39;0&#39; constant of arbitrary type.
Definition: Constants.cpp:289
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register)
.cfi_undefined From now on the previous value of Register can&#39;t be restored anymore.
Definition: MCDwarf.h:546
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:195
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
1 0 0 1 True if unordered or equal
Definition: InstrTypes.h:743
Holds all the information related to register banks.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:549
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:742
std::map< unsigned, TrackingMDNodeRef > MetadataNodes
Definition: SlotMapping.h:34
A description of a memory reference used in the backend.
std::string toString(Error E)
Write all error messages (if any) in E to a string.
Definition: Error.h:966
StringMap< VRegInfo * > VRegInfosNamed
Definition: MIParser.h:168
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
const HexagonInstrInfo * TII
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2972
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
LLVM_NODISCARD StringRef drop_front(size_t N=1) const
Return a StringRef equal to &#39;this&#39; but with the first N elements dropped.
Definition: StringRef.h:634
VRegInfo & getVRegInfoNamed(StringRef RegName)
Definition: MIParser.cpp:334
static bool verifyAddrSpace(uint64_t AddrSpace)
Definition: MIParser.cpp:1513
support::ulittle32_t Word
Definition: IRSymtab.h:50
unsigned SubReg
LLVM_NODISCARD R Default(T Value)
Definition: StringSwitch.h:181
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:83
0 1 0 1 True if ordered and less than or equal
Definition: InstrTypes.h:739
The memory access is dereferenceable (i.e., doesn&#39;t trap).
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
mir Rename Register Operands
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
This file implements a class to represent arbitrary precision integral constant values and operations...
AtomicOrdering
Atomic ordering for LLVM&#39;s memory model.
unsigned getNumRegClasses() const
DenseMap< unsigned, int > FixedStackObjectSlots
Definition: MIParser.h:169
static std::string getRegisterName(const TargetRegisterInfo *TRI, unsigned Reg)
Definition: MIParser.cpp:1080
const MemoryBuffer * getMemoryBuffer(unsigned i) const
Definition: SourceMgr.h:132
#define UINT64_MAX
Definition: DataTypes.h:83
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
PseudoSourceValueManager & getPSVManager() const
virtual unsigned lookupName(const char *Name, unsigned Len) const =0
Look up target intrinsic by name.
GlobalValue * getNamedValue(StringRef Name) const
Return the global value in the module with the specified name, of arbitrary type. ...
Definition: Module.cpp:113
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
LLVM_NODISCARD size_t size() const
size - Get the string size.
Definition: StringRef.h:144
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
void setPostInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just after the instruction itself.
virtual const TargetInstrInfo * getInstrInfo() const
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3072
static MachineOperand CreatePredicate(unsigned Pred)
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const PseudoSourceValue * getFixedStack(int FI)
Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot...
Analysis containing CSE Info
Definition: CSEInfo.cpp:20
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition: MCRegister.h:19
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:131
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:150
unsigned getMainFileID() const
Definition: SourceMgr.h:141
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
bool getDirectTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a direct target flag to the corresponding target flag.
Definition: MIParser.cpp:221
MCContext & getContext() const
The memory access is volatile.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register)
.cfi_same_value Current value of Register is the same as in the previous frame.
Definition: MCDwarf.h:552
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1165
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:42
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3078
static MCCFIInstruction createNegateRAState(MCSymbol *L)
.cfi_negate_ra_state AArch64 negate RA state.
Definition: MCDwarf.h:533
const MCPhysReg * getImplicitDefs() const
Return a list of registers that are potentially written by any instance of this machine instruction...
Definition: MCInstrDesc.h:565
const uint32_t * getRegMask(StringRef Identifier)
Check if the given identifier is a name of a register mask.
Definition: MIParser.cpp:165
unsigned const MachineRegisterInfo * MRI
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
Definition: MIParser.cpp:1075
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:480
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag)
Try to convert a name of a bitmask target flag to the corresponding target flag.
Definition: MIParser.cpp:243
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:428
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
Definition: Function.cpp:546
bool hasName() const
Definition: Value.h:251
LLVM Basic Block Representation.
Definition: BasicBlock.h:57
const PseudoSourceValue * getExternalSymbolCallEntry(const char *ES)
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:64
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:487
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
Definition: Constants.cpp:1465
static MachineOperand CreateFPImm(const ConstantFP *CFP)
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:148
static MCCFIInstruction createWindowSave(MCSymbol *L)
.cfi_window_save SPARC register window is saved.
Definition: MCDwarf.h:528
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:41
const TargetRegisterClass * getRegClass(StringRef Name)
Check if the given identifier is a name of a register class.
Definition: MIParser.cpp:304
This file contains the declarations for the subclasses of Constant, which represent the different fla...
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:223
unsigned getOperationEncoding(StringRef OperationEncodingString)
Definition: Dwarf.cpp:155
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:188
void setType(unsigned VReg, LLT Ty)
Set the low-level type of VReg to Ty.
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
BumpPtrAllocator Allocator
Definition: MIParser.h:160
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3066
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:302
bool isValid() const
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:732
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register...
Definition: MCDwarf.h:515
bool getRegisterByName(StringRef RegName, unsigned &Reg)
Try to convert a register name to a register number.
Definition: MIParser.cpp:123
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register)
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
Definition: MCDwarf.h:540
0 1 1 1 True if ordered (no nans)
Definition: InstrTypes.h:741
The memory access is non-temporal.
std::vector< GlobalValue * > GlobalValues
Definition: SlotMapping.h:33
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling...
Definition: SourceMgr.h:41
void setOffset(int64_t Offset)
1 1 1 1 Always true (always folded)
Definition: InstrTypes.h:749
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:205
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:843
const SlotMapping & IRSlots
Definition: MIParser.h:163
static MCCFIInstruction createRestoreState(MCSymbol *L)
.cfi_restore_state Restore the previously saved state.
Definition: MCDwarf.h:562
static UndefValue * get(Type *T)
Static factory methods - Return an &#39;undef&#39; object of the specified type.
Definition: Constants.cpp:1446
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:52
This class contains a discriminated union of information about pointers in memory operands...
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
1 1 0 1 True if unordered, less than, or equal
Definition: InstrTypes.h:747
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges=None, ArrayRef< SMFixIt > FixIts=None) const
Return an SMDiagnostic at the specified location with the specified string.
Definition: SourceMgr.cpp:163
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:40
signed greater than
Definition: InstrTypes.h:759
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
Definition: MIParser.cpp:3049
TargetIntrinsicInfo - Interface to description of machine instruction set.
Struct that holds a reference to a particular GUID in a global value summary.
The memory access writes data.
int64_t getExtValue() const
Get the correctly-extended int64_t value.
Definition: APSInt.h:93
0 0 1 0 True if ordered and greater than
Definition: InstrTypes.h:736
const RegisterBank * getRegBank(StringRef Name)
Check if the given identifier is a name of a register bank.
Definition: MIParser.cpp:311
unsigned createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet...
static MachineOperand CreateMetadata(const MDNode *Meta)
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
void setFlags(unsigned flags)
Definition: MachineInstr.h:306
RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
enum llvm::VRegInfo::uint8_t Kind
MachineOperand class - Representation of each machine instruction operand.
1 1 0 0 True if unordered or less than
Definition: InstrTypes.h:746
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
Module.h This file contains the declarations for the Module class.
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
Definition: MIParser.cpp:1087
StringRef getMessage() const
Definition: SourceMgr.h:292
signed less than
Definition: InstrTypes.h:761
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:643
MDNode * NoAlias
The tag specifying the noalias scope.
Definition: Metadata.h:663
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
Definition: Constants.cpp:653
uint32_t * allocateRegMask()
Allocate and initialize a register mask with NumRegister bits.
This class implements the register bank concept.
Definition: RegisterBank.h:28
bool parseInstrName(StringRef InstrName, unsigned &OpCode)
Try to convert an instruction name to an opcode.
Definition: MIParser.cpp:142
const Function & getFunction() const
Return the LLVM function that this machine code represents.
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
Definition: StringMap.h:370
This interface provides simple read-only access to a block of memory, and provides simple methods for...
Definition: MemoryBuffer.h:41
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Definition: Function.h:672
bool isIntPredicate() const
Definition: InstrTypes.h:825
signed less or equal
Definition: InstrTypes.h:762
Class to represent vector types.
Definition: DerivedTypes.h:427
Target - Wrapper for Target specific information.
Class for arbitrary precision integers.
Definition: APInt.h:69
Special value supplied for machine level alias analysis.
const PseudoSourceValue * getJumpTable()
Return a pseudo source value referencing a jump table.
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register...
const PseudoSourceValue * getGlobalValueCallEntry(const GlobalValue *GV)
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:54
const PseudoSourceValue * getGOT()
Return a pseudo source value referencing the global offset table (or something the like)...
This struct contains the mappings from the slot numbers to unnamed metadata nodes, global values and types.
Definition: SlotMapping.h:32
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3084
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:36
Flags
Flags values. These may be or&#39;d together.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
The memory access reads data.
TargetSubtargetInfo - Generic base class for all target subtargets.
unsigned getSubRegIndex(StringRef Name)
Check if the given identifier is a name of a subregister index.
Definition: MIParser.cpp:182
bool Explicit
VReg was explicitly specified in the .mir file.
Definition: MIParser.h:38
Representation of each machine instruction.
Definition: MachineInstr.h:64
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
union llvm::VRegInfo::@179 D
const char * getBufferEnd() const
Definition: MemoryBuffer.h:60
int getColumnNo() const
Definition: SourceMgr.h:290
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
static IntegerType * getInt32Ty(LLVMContext &C)
Definition: Type.cpp:175
void setPreInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just prior to the instruction itself.
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:129
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:55
unsigned greater or equal
Definition: InstrTypes.h:756
This file provides utility analysis objects describing memory locations.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:44
static VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Definition: Type.cpp:609
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
unsigned VReg
Definition: MIParser.h:43
static MachineOperand CreateImm(int64_t Val)
VRegInfo & getVRegInfo(unsigned Num)
Definition: MIParser.cpp:323
#define I(x, y, z)
Definition: MD5.cpp:58
The memory access always returns the same value (or traps).
iterator end()
Definition: DenseMap.h:82
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:272
0 1 1 0 True if ordered and operands are unequal
Definition: InstrTypes.h:740
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
Definition: MIParser.h:166
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:332
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
uint32_t Size
Definition: Profile.cpp:46
static MachineOperand CreateShuffleMask(const Constant *C)
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
1 0 1 0 True if unordered or greater than
Definition: InstrTypes.h:744
constexpr bool isUInt< 16 >(uint64_t x)
Definition: MathExtras.h:345
const char * getBufferStart() const
Definition: MemoryBuffer.h:59
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
std::string str() const
Return the twine contents as a std::string.
Definition: Twine.cpp:17
bool isReg() const
isReg - Tests if this is a MO_Register operand.
LLVM_NODISCARD const char * data() const
data - Get a pointer to the start of the string (which may not be null terminated).
Definition: StringRef.h:136
bool empty() const
Definition: StringMap.h:110
const PseudoSourceValue * getStack()
Return a pseudo source value referencing the area below the stack frame of a function, e.g., the argument space.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
void setMemRefs(MachineFunction &MF, ArrayRef< MachineMemOperand *> MemRefs)
Assign this MachineInstr&#39;s memory reference descriptor list.
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, PerTargetMIParsingState &Target)
Definition: MIParser.cpp:318
0 0 0 1 True if ordered and equal
Definition: InstrTypes.h:735
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:575
LLVM Value Representation.
Definition: Value.h:73
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
A token produced by the machine instruction lexer.
Definition: MILexer.h:27
1 0 1 1 True if unordered, greater than, or equal
Definition: InstrTypes.h:745
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:69
Lightweight error class with error context and mandatory checking.
Definition: Error.h:157
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
unsigned getAttributeEncoding(StringRef EncodingString)
Definition: Dwarf.cpp:199
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
IRTranslator LLVM IR MI
unsigned greater than
Definition: InstrTypes.h:755
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
static LLT vector(uint16_t NumElements, unsigned ScalarSizeInBits)
Get a low-level vector of some number of elements and element width.
const RegisterBank * RegBank
Definition: MIParser.h:41
static llvm::Error parse(DataExtractor &Data, uint64_t BaseAddr, LineEntryCallback const &Callback)
Definition: LineTable.cpp:54
Represents a location in source code.
Definition: SMLoc.h:23
PerTargetMIParsingState & Target
Definition: MIParser.h:164
void setIsDebug(bool Val=true)
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals)
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
Definition: MCDwarf.h:568
DenseMap< unsigned, VRegInfo * > VRegInfos
Definition: MIParser.h:167
bool parseRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:3060
0 0 1 1 True if ordered and greater than or equal
Definition: InstrTypes.h:737
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value *> &Slots2Values)
Definition: MIParser.cpp:2995
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value *> &Slots2Values)
Creates the mapping from slot numbers to function&#39;s unnamed IR values.
Definition: MIParser.cpp:3004
static MachineOperand CreateFI(int Idx)
const PseudoSourceValue * getConstantPool()
Return a pseudo source value referencing the constant pool.
iterator end()
Definition: StringMap.h:317
static Constant * get(ArrayRef< Constant *> V)
Definition: Constants.cpp:1110
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2)
.cfi_register Previous value of Register1 is saved in register Register2.
Definition: MCDwarf.h:522
iterator_range< arg_iterator > args()
Definition: Function.h:719
bool isNullValue() const
Determine if all bits are clear.
Definition: APInt.h:405
0 0 0 0 Always false (always folded)
Definition: InstrTypes.h:734
signed greater or equal
Definition: InstrTypes.h:760
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:143
const MCPhysReg * ImplicitUses
Definition: MCInstrDesc.h:187
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
bool isImplicit() const
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:261
void tieOperands(unsigned DefIdx, unsigned UseIdx)
Add a tie between the register operands at DefIdx and UseIdx.