LLVM  10.0.0svn
MIRPrinter.cpp
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1 //===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the class that prints out the LLVM IR and machine
10 // functions using the MIR serialization format.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/ADT/DenseMap.h"
16 #include "llvm/ADT/None.h"
17 #include "llvm/ADT/STLExtras.h"
19 #include "llvm/ADT/SmallPtrSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringRef.h"
22 #include "llvm/ADT/Twine.h"
39 #include "llvm/IR/BasicBlock.h"
40 #include "llvm/IR/Constants.h"
41 #include "llvm/IR/DebugInfo.h"
42 #include "llvm/IR/DebugLoc.h"
43 #include "llvm/IR/Function.h"
44 #include "llvm/IR/GlobalValue.h"
46 #include "llvm/IR/InstrTypes.h"
47 #include "llvm/IR/Instructions.h"
48 #include "llvm/IR/Intrinsics.h"
49 #include "llvm/IR/Module.h"
51 #include "llvm/IR/Value.h"
52 #include "llvm/MC/LaneBitmask.h"
53 #include "llvm/MC/MCContext.h"
54 #include "llvm/MC/MCDwarf.h"
55 #include "llvm/MC/MCSymbol.h"
58 #include "llvm/Support/Casting.h"
61 #include "llvm/Support/Format.h"
67 #include <algorithm>
68 #include <cassert>
69 #include <cinttypes>
70 #include <cstdint>
71 #include <iterator>
72 #include <string>
73 #include <utility>
74 #include <vector>
75 
76 using namespace llvm;
77 
79  "simplify-mir", cl::Hidden,
80  cl::desc("Leave out unnecessary information when printing MIR"));
81 
82 namespace {
83 
84 /// This structure describes how to print out stack object references.
85 struct FrameIndexOperand {
86  std::string Name;
87  unsigned ID;
88  bool IsFixed;
89 
90  FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
91  : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
92 
93  /// Return an ordinary stack object reference.
94  static FrameIndexOperand create(StringRef Name, unsigned ID) {
95  return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
96  }
97 
98  /// Return a fixed stack object reference.
99  static FrameIndexOperand createFixed(unsigned ID) {
100  return FrameIndexOperand("", ID, /*IsFixed=*/true);
101  }
102 };
103 
104 } // end anonymous namespace
105 
106 namespace llvm {
107 
108 /// This class prints out the machine functions using the MIR serialization
109 /// format.
110 class MIRPrinter {
111  raw_ostream &OS;
112  DenseMap<const uint32_t *, unsigned> RegisterMaskIds;
113  /// Maps from stack object indices to operand indices which will be used when
114  /// printing frame index machine operands.
115  DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
116 
117 public:
118  MIRPrinter(raw_ostream &OS) : OS(OS) {}
119 
120  void print(const MachineFunction &MF);
121 
122  void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
123  const TargetRegisterInfo *TRI);
124  void convert(ModuleSlotTracker &MST, yaml::MachineFrameInfo &YamlMFI,
125  const MachineFrameInfo &MFI);
126  void convert(yaml::MachineFunction &MF,
128  void convert(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
129  const MachineJumpTableInfo &JTI);
130  void convertStackObjects(yaml::MachineFunction &YMF,
131  const MachineFunction &MF, ModuleSlotTracker &MST);
132  void convertCallSiteObjects(yaml::MachineFunction &YMF,
133  const MachineFunction &MF,
134  ModuleSlotTracker &MST);
135 
136 private:
137  void initRegisterMaskIds(const MachineFunction &MF);
138 };
139 
140 /// This class prints out the machine instructions using the MIR serialization
141 /// format.
142 class MIPrinter {
143  raw_ostream &OS;
144  ModuleSlotTracker &MST;
145  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
146  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
147  /// Synchronization scope names registered with LLVMContext.
149 
150  bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
151  bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
152 
153 public:
155  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
156  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
157  : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
158  StackObjectOperandMapping(StackObjectOperandMapping) {}
159 
160  void print(const MachineBasicBlock &MBB);
161 
162  void print(const MachineInstr &MI);
163  void printStackObjectReference(int FrameIndex);
164  void print(const MachineInstr &MI, unsigned OpIdx,
165  const TargetRegisterInfo *TRI, bool ShouldPrintRegisterTies,
166  LLT TypeToPrint, bool PrintDef = true);
167 };
168 
169 } // end namespace llvm
170 
171 namespace llvm {
172 namespace yaml {
173 
174 /// This struct serializes the LLVM IR module.
175 template <> struct BlockScalarTraits<Module> {
176  static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
177  Mod.print(OS, nullptr);
178  }
179 
180  static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
181  llvm_unreachable("LLVM Module is supposed to be parsed separately");
182  return "";
183  }
184 };
185 
186 } // end namespace yaml
187 } // end namespace llvm
188 
189 static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
190  const TargetRegisterInfo *TRI) {
191  raw_string_ostream OS(Dest.Value);
192  OS << printReg(Reg, TRI);
193 }
194 
196  initRegisterMaskIds(MF);
197 
198  yaml::MachineFunction YamlMF;
199  YamlMF.Name = MF.getName();
200  YamlMF.Alignment = MF.getAlignment();
202  YamlMF.HasWinCFI = MF.hasWinCFI();
203 
204  YamlMF.Legalized = MF.getProperties().hasProperty(
208  YamlMF.Selected = MF.getProperties().hasProperty(
210  YamlMF.FailedISel = MF.getProperties().hasProperty(
212 
213  convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
216  convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
217  convertStackObjects(YamlMF, MF, MST);
218  convertCallSiteObjects(YamlMF, MF, MST);
219  if (const auto *ConstantPool = MF.getConstantPool())
220  convert(YamlMF, *ConstantPool);
221  if (const auto *JumpTableInfo = MF.getJumpTableInfo())
222  convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
223 
224  const TargetMachine &TM = MF.getTarget();
225  YamlMF.MachineFuncInfo =
226  std::unique_ptr<yaml::MachineFunctionInfo>(TM.convertFuncInfoToYAML(MF));
227 
228  raw_string_ostream StrOS(YamlMF.Body.Value.Value);
229  bool IsNewlineNeeded = false;
230  for (const auto &MBB : MF) {
231  if (IsNewlineNeeded)
232  StrOS << "\n";
233  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
234  .print(MBB);
235  IsNewlineNeeded = true;
236  }
237  StrOS.flush();
238  yaml::Output Out(OS);
239  if (!SimplifyMIR)
240  Out.setWriteDefaultValues(true);
241  Out << YamlMF;
242 }
243 
244 static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
245  const TargetRegisterInfo *TRI) {
246  assert(RegMask && "Can't print an empty register mask");
247  OS << StringRef("CustomRegMask(");
248 
249  bool IsRegInRegMaskFound = false;
250  for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
251  // Check whether the register is asserted in regmask.
252  if (RegMask[I / 32] & (1u << (I % 32))) {
253  if (IsRegInRegMaskFound)
254  OS << ',';
255  OS << printReg(I, TRI);
256  IsRegInRegMaskFound = true;
257  }
258  }
259 
260  OS << ')';
261 }
262 
263 static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
264  const MachineRegisterInfo &RegInfo,
265  const TargetRegisterInfo *TRI) {
266  raw_string_ostream OS(Dest.Value);
267  OS << printRegClassOrBank(Reg, RegInfo, TRI);
268 }
269 
270 template <typename T>
271 static void
273  T &Object, ModuleSlotTracker &MST) {
274  std::array<std::string *, 3> Outputs{{&Object.DebugVar.Value,
275  &Object.DebugExpr.Value,
276  &Object.DebugLoc.Value}};
277  std::array<const Metadata *, 3> Metas{{DebugVar.Var,
278  DebugVar.Expr,
279  DebugVar.Loc}};
280  for (unsigned i = 0; i < 3; ++i) {
281  raw_string_ostream StrOS(*Outputs[i]);
282  Metas[i]->printAsOperand(StrOS, MST);
283  }
284 }
285 
287  const MachineRegisterInfo &RegInfo,
288  const TargetRegisterInfo *TRI) {
289  MF.TracksRegLiveness = RegInfo.tracksLiveness();
290 
291  // Print the virtual register definitions.
292  for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
295  VReg.ID = I;
296  if (RegInfo.getVRegName(Reg) != "")
297  continue;
298  ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
299  unsigned PreferredReg = RegInfo.getSimpleHint(Reg);
300  if (PreferredReg)
301  printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
302  MF.VirtualRegisters.push_back(VReg);
303  }
304 
305  // Print the live ins.
306  for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
308  printRegMIR(LI.first, LiveIn.Register, TRI);
309  if (LI.second)
310  printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
311  MF.LiveIns.push_back(LiveIn);
312  }
313 
314  // Prints the callee saved registers.
315  if (RegInfo.isUpdatedCSRsInitialized()) {
316  const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
317  std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
318  for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
320  printRegMIR(*I, Reg, TRI);
321  CalleeSavedRegisters.push_back(Reg);
322  }
323  MF.CalleeSavedRegisters = CalleeSavedRegisters;
324  }
325 }
326 
328  yaml::MachineFrameInfo &YamlMFI,
329  const MachineFrameInfo &MFI) {
332  YamlMFI.HasStackMap = MFI.hasStackMap();
333  YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
334  YamlMFI.StackSize = MFI.getStackSize();
335  YamlMFI.OffsetAdjustment = MFI.getOffsetAdjustment();
336  YamlMFI.MaxAlignment = MFI.getMaxAlignment();
337  YamlMFI.AdjustsStack = MFI.adjustsStack();
338  YamlMFI.HasCalls = MFI.hasCalls();
340  ? MFI.getMaxCallFrameSize() : ~0u;
344  YamlMFI.HasVAStart = MFI.hasVAStart();
346  YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
347  if (MFI.getSavePoint()) {
348  raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
349  StrOS << printMBBReference(*MFI.getSavePoint());
350  }
351  if (MFI.getRestorePoint()) {
352  raw_string_ostream StrOS(YamlMFI.RestorePoint.Value);
353  StrOS << printMBBReference(*MFI.getRestorePoint());
354  }
355 }
356 
358  const MachineFunction &MF,
359  ModuleSlotTracker &MST) {
360  const MachineFrameInfo &MFI = MF.getFrameInfo();
362  // Process fixed stack objects.
363  unsigned ID = 0;
364  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I, ++ID) {
365  if (MFI.isDeadObjectIndex(I))
366  continue;
367 
369  YamlObject.ID = ID;
370  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
373  YamlObject.Offset = MFI.getObjectOffset(I);
374  YamlObject.Size = MFI.getObjectSize(I);
375  YamlObject.Alignment = MFI.getObjectAlignment(I);
376  YamlObject.StackID = (TargetStackID::Value)MFI.getStackID(I);
377  YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
378  YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
379  YMF.FixedStackObjects.push_back(YamlObject);
380  StackObjectOperandMapping.insert(
381  std::make_pair(I, FrameIndexOperand::createFixed(ID)));
382  }
383 
384  // Process ordinary stack objects.
385  ID = 0;
386  for (int I = 0, E = MFI.getObjectIndexEnd(); I < E; ++I, ++ID) {
387  if (MFI.isDeadObjectIndex(I))
388  continue;
389 
390  yaml::MachineStackObject YamlObject;
391  YamlObject.ID = ID;
392  if (const auto *Alloca = MFI.getObjectAllocation(I))
393  YamlObject.Name.Value =
394  Alloca->hasName() ? Alloca->getName() : "<unnamed alloca>";
395  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
400  YamlObject.Offset = MFI.getObjectOffset(I);
401  YamlObject.Size = MFI.getObjectSize(I);
402  YamlObject.Alignment = MFI.getObjectAlignment(I);
403  YamlObject.StackID = (TargetStackID::Value)MFI.getStackID(I);
404 
405  YMF.StackObjects.push_back(YamlObject);
406  StackObjectOperandMapping.insert(std::make_pair(
407  I, FrameIndexOperand::create(YamlObject.Name.Value, ID)));
408  }
409 
410  for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
411  if (!CSInfo.isSpilledToReg() && MFI.isDeadObjectIndex(CSInfo.getFrameIdx()))
412  continue;
413 
415  printRegMIR(CSInfo.getReg(), Reg, TRI);
416  if (!CSInfo.isSpilledToReg()) {
417  auto StackObjectInfo = StackObjectOperandMapping.find(CSInfo.getFrameIdx());
418  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
419  "Invalid stack object index");
420  const FrameIndexOperand &StackObject = StackObjectInfo->second;
421  if (StackObject.IsFixed) {
422  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRegister = Reg;
423  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRestored =
424  CSInfo.isRestored();
425  } else {
426  YMF.StackObjects[StackObject.ID].CalleeSavedRegister = Reg;
427  YMF.StackObjects[StackObject.ID].CalleeSavedRestored =
428  CSInfo.isRestored();
429  }
430  }
431  }
432  for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
433  auto LocalObject = MFI.getLocalFrameObjectMap(I);
434  auto StackObjectInfo = StackObjectOperandMapping.find(LocalObject.first);
435  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
436  "Invalid stack object index");
437  const FrameIndexOperand &StackObject = StackObjectInfo->second;
438  assert(!StackObject.IsFixed && "Expected a locally mapped stack object");
439  YMF.StackObjects[StackObject.ID].LocalOffset = LocalObject.second;
440  }
441 
442  // Print the stack object references in the frame information class after
443  // converting the stack objects.
444  if (MFI.hasStackProtectorIndex()) {
446  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
448  }
449 
450  // Print the debug variable information.
451  for (const MachineFunction::VariableDbgInfo &DebugVar :
452  MF.getVariableDbgInfo()) {
453  auto StackObjectInfo = StackObjectOperandMapping.find(DebugVar.Slot);
454  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
455  "Invalid stack object index");
456  const FrameIndexOperand &StackObject = StackObjectInfo->second;
457  if (StackObject.IsFixed) {
458  auto &Object = YMF.FixedStackObjects[StackObject.ID];
459  printStackObjectDbgInfo(DebugVar, Object, MST);
460  } else {
461  auto &Object = YMF.StackObjects[StackObject.ID];
462  printStackObjectDbgInfo(DebugVar, Object, MST);
463  }
464  }
465 }
466 
468  const MachineFunction &MF,
469  ModuleSlotTracker &MST) {
470  const auto *TRI = MF.getSubtarget().getRegisterInfo();
471  for (auto CSInfo : MF.getCallSitesInfo()) {
472  yaml::CallSiteInfo YmlCS;
474 
475  // Prepare instruction position.
476  MachineBasicBlock::const_iterator CallI = CSInfo.first->getIterator();
477  CallLocation.BlockNum = CallI->getParent()->getNumber();
478  // Get call instruction offset from the beginning of block.
479  CallLocation.Offset = std::distance(CallI->getParent()->begin(), CallI);
480  YmlCS.CallLocation = CallLocation;
481  // Construct call arguments and theirs forwarding register info.
482  for (auto ArgReg : CSInfo.second) {
484  YmlArgReg.ArgNo = ArgReg.ArgNo;
485  printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI);
486  YmlCS.ArgForwardingRegs.emplace_back(YmlArgReg);
487  }
488  YMF.CallSitesInfo.push_back(YmlCS);
489  }
490 
491  // Sort call info by position of call instructions.
492  llvm::sort(YMF.CallSitesInfo.begin(), YMF.CallSitesInfo.end(),
494  if (A.CallLocation.BlockNum == B.CallLocation.BlockNum)
495  return A.CallLocation.Offset < B.CallLocation.Offset;
496  return A.CallLocation.BlockNum < B.CallLocation.BlockNum;
497  });
498 }
499 
502  unsigned ID = 0;
503  for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
504  std::string Str;
505  raw_string_ostream StrOS(Str);
506  if (Constant.isMachineConstantPoolEntry()) {
507  Constant.Val.MachineCPVal->print(StrOS);
508  } else {
509  Constant.Val.ConstVal->printAsOperand(StrOS);
510  }
511 
512  yaml::MachineConstantPoolValue YamlConstant;
513  YamlConstant.ID = ID++;
514  YamlConstant.Value = StrOS.str();
515  YamlConstant.Alignment = Constant.getAlignment();
516  YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
517 
518  MF.Constants.push_back(YamlConstant);
519  }
520 }
521 
523  yaml::MachineJumpTable &YamlJTI,
524  const MachineJumpTableInfo &JTI) {
525  YamlJTI.Kind = JTI.getEntryKind();
526  unsigned ID = 0;
527  for (const auto &Table : JTI.getJumpTables()) {
528  std::string Str;
530  Entry.ID = ID++;
531  for (const auto *MBB : Table.MBBs) {
532  raw_string_ostream StrOS(Str);
533  StrOS << printMBBReference(*MBB);
534  Entry.Blocks.push_back(StrOS.str());
535  Str.clear();
536  }
537  YamlJTI.Entries.push_back(Entry);
538  }
539 }
540 
541 void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
542  const auto *TRI = MF.getSubtarget().getRegisterInfo();
543  unsigned I = 0;
544  for (const uint32_t *Mask : TRI->getRegMasks())
545  RegisterMaskIds.insert(std::make_pair(Mask, I++));
546 }
547 
550  bool &IsFallthrough) {
552 
553  for (const MachineInstr &MI : MBB) {
554  if (MI.isPHI())
555  continue;
556  for (const MachineOperand &MO : MI.operands()) {
557  if (!MO.isMBB())
558  continue;
559  MachineBasicBlock *Succ = MO.getMBB();
560  auto RP = Seen.insert(Succ);
561  if (RP.second)
562  Result.push_back(Succ);
563  }
564  }
565  MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr();
566  IsFallthrough = I == MBB.end() || !I->isBarrier();
567 }
568 
569 bool
570 MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
571  if (MBB.succ_size() <= 1)
572  return true;
573  if (!MBB.hasSuccessorProbabilities())
574  return true;
575 
576  SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
577  MBB.Probs.end());
579  Normalized.end());
580  SmallVector<BranchProbability,8> Equal(Normalized.size());
582 
583  return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
584 }
585 
586 bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
588  bool GuessedFallthrough;
589  guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
590  if (GuessedFallthrough) {
591  const MachineFunction &MF = *MBB.getParent();
592  MachineFunction::const_iterator NextI = std::next(MBB.getIterator());
593  if (NextI != MF.end()) {
594  MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
595  if (!is_contained(GuessedSuccs, Next))
596  GuessedSuccs.push_back(Next);
597  }
598  }
599  if (GuessedSuccs.size() != MBB.succ_size())
600  return false;
601  return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
602 }
603 
605  assert(MBB.getNumber() >= 0 && "Invalid MBB number");
606  OS << "bb." << MBB.getNumber();
607  bool HasAttributes = false;
608  if (const auto *BB = MBB.getBasicBlock()) {
609  if (BB->hasName()) {
610  OS << "." << BB->getName();
611  } else {
612  HasAttributes = true;
613  OS << " (";
614  int Slot = MST.getLocalSlot(BB);
615  if (Slot == -1)
616  OS << "<ir-block badref>";
617  else
618  OS << (Twine("%ir-block.") + Twine(Slot)).str();
619  }
620  }
621  if (MBB.hasAddressTaken()) {
622  OS << (HasAttributes ? ", " : " (");
623  OS << "address-taken";
624  HasAttributes = true;
625  }
626  if (MBB.isEHPad()) {
627  OS << (HasAttributes ? ", " : " (");
628  OS << "landing-pad";
629  HasAttributes = true;
630  }
631  if (MBB.getAlignment()) {
632  OS << (HasAttributes ? ", " : " (");
633  OS << "align " << MBB.getAlignment();
634  HasAttributes = true;
635  }
636  if (HasAttributes)
637  OS << ")";
638  OS << ":\n";
639 
640  bool HasLineAttributes = false;
641  // Print the successors
642  bool canPredictProbs = canPredictBranchProbabilities(MBB);
643  // Even if the list of successors is empty, if we cannot guess it,
644  // we need to print it to tell the parser that the list is empty.
645  // This is needed, because MI model unreachable as empty blocks
646  // with an empty successor list. If the parser would see that
647  // without the successor list, it would guess the code would
648  // fallthrough.
649  if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
650  !canPredictSuccessors(MBB)) {
651  OS.indent(2) << "successors: ";
652  for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
653  if (I != MBB.succ_begin())
654  OS << ", ";
655  OS << printMBBReference(**I);
656  if (!SimplifyMIR || !canPredictProbs)
657  OS << '('
658  << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
659  << ')';
660  }
661  OS << "\n";
662  HasLineAttributes = true;
663  }
664 
665  // Print the live in registers.
666  const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
667  if (MRI.tracksLiveness() && !MBB.livein_empty()) {
669  OS.indent(2) << "liveins: ";
670  bool First = true;
671  for (const auto &LI : MBB.liveins()) {
672  if (!First)
673  OS << ", ";
674  First = false;
675  OS << printReg(LI.PhysReg, &TRI);
676  if (!LI.LaneMask.all())
677  OS << ":0x" << PrintLaneMask(LI.LaneMask);
678  }
679  OS << "\n";
680  HasLineAttributes = true;
681  }
682 
683  if (HasLineAttributes)
684  OS << "\n";
685  bool IsInBundle = false;
686  for (auto I = MBB.instr_begin(), E = MBB.instr_end(); I != E; ++I) {
687  const MachineInstr &MI = *I;
688  if (IsInBundle && !MI.isInsideBundle()) {
689  OS.indent(2) << "}\n";
690  IsInBundle = false;
691  }
692  OS.indent(IsInBundle ? 4 : 2);
693  print(MI);
694  if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
695  OS << " {";
696  IsInBundle = true;
697  }
698  OS << "\n";
699  }
700  if (IsInBundle)
701  OS.indent(2) << "}\n";
702 }
703 
705  const auto *MF = MI.getMF();
706  const auto &MRI = MF->getRegInfo();
707  const auto &SubTarget = MF->getSubtarget();
708  const auto *TRI = SubTarget.getRegisterInfo();
709  assert(TRI && "Expected target register info");
710  const auto *TII = SubTarget.getInstrInfo();
711  assert(TII && "Expected target instruction info");
712  if (MI.isCFIInstruction())
713  assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
714 
715  SmallBitVector PrintedTypes(8);
716  bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
717  unsigned I = 0, E = MI.getNumOperands();
718  for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
719  !MI.getOperand(I).isImplicit();
720  ++I) {
721  if (I)
722  OS << ", ";
723  print(MI, I, TRI, ShouldPrintRegisterTies,
724  MI.getTypeToPrint(I, PrintedTypes, MRI),
725  /*PrintDef=*/false);
726  }
727 
728  if (I)
729  OS << " = ";
731  OS << "frame-setup ";
733  OS << "frame-destroy ";
735  OS << "nnan ";
737  OS << "ninf ";
739  OS << "nsz ";
741  OS << "arcp ";
743  OS << "contract ";
745  OS << "afn ";
747  OS << "reassoc ";
749  OS << "nuw ";
751  OS << "nsw ";
753  OS << "exact ";
755  OS << "fpexcept ";
756 
757  OS << TII->getName(MI.getOpcode());
758  if (I < E)
759  OS << ' ';
760 
761  bool NeedComma = false;
762  for (; I < E; ++I) {
763  if (NeedComma)
764  OS << ", ";
765  print(MI, I, TRI, ShouldPrintRegisterTies,
766  MI.getTypeToPrint(I, PrintedTypes, MRI));
767  NeedComma = true;
768  }
769 
770  // Print any optional symbols attached to this instruction as-if they were
771  // operands.
772  if (MCSymbol *PreInstrSymbol = MI.getPreInstrSymbol()) {
773  if (NeedComma)
774  OS << ',';
775  OS << " pre-instr-symbol ";
776  MachineOperand::printSymbol(OS, *PreInstrSymbol);
777  NeedComma = true;
778  }
779  if (MCSymbol *PostInstrSymbol = MI.getPostInstrSymbol()) {
780  if (NeedComma)
781  OS << ',';
782  OS << " post-instr-symbol ";
783  MachineOperand::printSymbol(OS, *PostInstrSymbol);
784  NeedComma = true;
785  }
786 
787  if (const DebugLoc &DL = MI.getDebugLoc()) {
788  if (NeedComma)
789  OS << ',';
790  OS << " debug-location ";
791  DL->printAsOperand(OS, MST);
792  }
793 
794  if (!MI.memoperands_empty()) {
795  OS << " :: ";
796  const LLVMContext &Context = MF->getFunction().getContext();
797  const MachineFrameInfo &MFI = MF->getFrameInfo();
798  bool NeedComma = false;
799  for (const auto *Op : MI.memoperands()) {
800  if (NeedComma)
801  OS << ", ";
802  Op->print(OS, MST, SSNs, Context, &MFI, TII);
803  NeedComma = true;
804  }
805  }
806 }
807 
809  auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
810  assert(ObjectInfo != StackObjectOperandMapping.end() &&
811  "Invalid frame index");
812  const FrameIndexOperand &Operand = ObjectInfo->second;
813  MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
814  Operand.Name);
815 }
816 
817 void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
818  const TargetRegisterInfo *TRI,
819  bool ShouldPrintRegisterTies, LLT TypeToPrint,
820  bool PrintDef) {
821  const MachineOperand &Op = MI.getOperand(OpIdx);
822  switch (Op.getType()) {
824  if (MI.isOperandSubregIdx(OpIdx)) {
827  break;
828  }
846  unsigned TiedOperandIdx = 0;
847  if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
848  TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
850  Op.print(OS, MST, TypeToPrint, PrintDef, /*IsStandalone=*/false,
851  ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
852  break;
853  }
855  printStackObjectReference(Op.getIndex());
856  break;
858  auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
859  if (RegMaskInfo != RegisterMaskIds.end())
860  OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
861  else
862  printCustomRegMask(Op.getRegMask(), OS, TRI);
863  break;
864  }
865  }
866 }
867 
868 void llvm::printMIR(raw_ostream &OS, const Module &M) {
869  yaml::Output Out(OS);
870  Out << const_cast<Module &>(M);
871 }
872 
874  MIRPrinter Printer(OS);
875  Printer.print(MF);
876 }
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs...
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
bool hasSuccessorProbabilities() const
Return true if any of the successors have probabilities attached to them.
A common definition of LaneBitmask for use in TableGen and CodeGen.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< MachineJumpTableEntry > & getJumpTables() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
instr_iterator instr_begin()
static void printStackObjectDbgInfo(const MachineFunction::VariableDbgInfo &DebugVar, T &Object, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:272
LLVMContext & Context
static StringRef input(StringRef Str, void *Ctxt, Module &Mod)
Definition: MIRPrinter.cpp:180
instr_iterator instr_end()
Atomic ordering constants.
This is a &#39;bitvector&#39; (really, a variable-sized bit array), optimized for the case when the array is ...
void convertCallSiteObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:467
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool hasVAStart() const
Returns true if the function calls the llvm.va_start intrinsic.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:65
bool hasStackProtectorIndex() const
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
This class prints out the machine functions using the MIR serialization format.
Definition: MIRPrinter.cpp:110
bool isCFIInstruction() const
const MachineFunctionProperties & getProperties() const
Get the function properties.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Optional< std::vector< FlowStringValue > > CalleeSavedRegisters
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:385
Serializable representation of CallSiteInfo.
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
const CallSiteInfoMap & getCallSitesInfo() const
int64_t getLocalFrameSize() const
Get the size of the local object blob.
Address of indexed Jump Table for switch.
unsigned Reg
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:123
MachineBasicBlock reference.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:93
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Manage lifetime of a slot tracker for printing IR.
std::unique_ptr< MachineFunctionInfo > MachineFuncInfo
Constant pool.
Mask of live-out registers.
print alias Alias Set Printer
TargetStackID::Value StackID
VariableDbgInfoMapTy & getVariableDbgInfo()
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
MachineInstrLoc CallLocation
Mask of preserved registers.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:548
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
const HexagonInstrInfo * TII
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Serializable representation of the fixed stack object from the MachineFrameInfo class.
MCCFIInstruction index.
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:414
Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
MachineBasicBlock * getRestorePoint() const
void print(const MachineBasicBlock &MBB)
Definition: MIRPrinter.cpp:604
Target-dependent index+offset operand.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:41
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Name of external global symbol.
unsigned getAlignment() const
getAlignment - Return the alignment (log2, not bytes) of the function.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:411
bool isImmutableObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an immutable object.
static cl::opt< bool > SimplifyMIR("simplify-mir", cl::Hidden, cl::desc("Leave out unnecessary information when printing MIR"))
std::vector< VirtualRegisterDefinition > VirtualRegisters
Immediate >64bit operand.
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
int getObjectIndexBegin() const
Return the minimum frame object index.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
This class is a data container for one entry in a MachineConstantPool.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
Printable printRegClassOrBank(unsigned Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
Definition: MachineInstr.h:352
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
MCSymbol * getPreInstrSymbol() const
Helper to extract a pre-instruction symbol if one has been added.
Definition: MachineInstr.h:557
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getCVBytesOfCalleeSavedRegisters() const
Returns how many bytes of callee-saved registers the target pushed in the prologue.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
Address of a global value.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
MIRPrinter(raw_ostream &OS)
Definition: MIRPrinter.cpp:118
const TargetRegisterInfo * getTargetRegisterInfo() const
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
std::vector< FlowStringValue > Blocks
unsigned const MachineRegisterInfo * MRI
Serializable representation of stack object from the MachineFrameInfo class.
ArrayRef< MachineMemOperand * > memoperands() const
Access to memory operands of the instruction.
Definition: MachineInstr.h:518
static void printRegMIR(unsigned Reg, yaml::StringValue &Dest, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:189
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:64
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:41
This file contains the declarations for the subclasses of Constant, which represent the different fla...
MachineJumpTable JumpTableInfo
bool isOperandSubregIdx(unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
Definition: MachineInstr.h:431
Identifies call instruction location in machine function.
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:370
unsigned getAlignment() const
Return alignment of the basic block.
int getStackProtectorIndex() const
Return the index for the stack protector object.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Address of a basic block.
virtual ArrayRef< const char * > getRegMaskNames() const =0
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:4274
void convertStackObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:357
unsigned MaxCallFrameSize
~0u means: not computed yet.
This class prints out the machine instructions using the MIR serialization format.
Definition: MIRPrinter.cpp:142
std::vector< MachineStackObject > StackObjects
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
self_iterator getIterator()
Definition: ilist_node.h:81
bool hasComplexRegisterTies() const
Return true when an instruction has tied register that can&#39;t be determined by the instruction&#39;s descr...
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:244
Serializable representation of MachineFrameInfo.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:205
void printMIR(raw_ostream &OS, const Module &M)
Print LLVM IR using the MIR serialization format to the given output stream.
Definition: MIRPrinter.cpp:868
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:843
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:52
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:4351
std::string & str()
Flushes the stream contents to the target string and returns the string&#39;s reference.
Definition: raw_ostream.h:498
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MCSymbol * getPostInstrSymbol() const
Helper to extract a post-instruction symbol if one has been added.
Definition: MachineInstr.h:569
void sort(IteratorTy Start, IteratorTy End)
Definition: STLExtras.h:1122
TargetIntrinsicInfo - Interface to description of machine instruction set.
const std::vector< MachineConstantPoolEntry > & getConstants() const
void print(raw_ostream &OS, AssemblyAnnotationWriter *AAW, bool ShouldPreserveUseListOrder=false, bool IsForDebug=false) const
Print the module to an output stream with an optional AssemblyAnnotationWriter.
Definition: AsmWriter.cpp:4191
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:417
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
Generic predicate for ISel.
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
Module.h This file contains the declarations for the Module class.
bool hasMustTailInVarArgFunc() const
Returns true if the function is variadic and contains a musttail call.
int64_t getImm() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
The access may modify the value stored in memory.
MCSymbol reference (for debug/eh info)
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
virtual yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const
Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
ArrayRef< std::pair< unsigned, unsigned > > liveins() const
A wrapper around std::string which contains a source range that&#39;s being set during parsing...
unsigned succ_size() const
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:64
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
std::vector< MachineFunctionLiveIn > LiveIns
static void output(const Module &Mod, void *Ctxt, raw_ostream &OS)
Definition: MIRPrinter.cpp:176
bool isUpdatedCSRsInitialized() const
Returns true if the updated CSR list was initialized and false otherwise.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isEHPad() const
Returns true if the block is a landing pad.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isAliasedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an object that might be pointed to by an LLVM IR v...
std::vector< Entry > Entries
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
#define I(x, y, z)
Definition: MD5.cpp:58
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
std::vector< MachineConstantPoolValue > Constants
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
int getOffsetAdjustment() const
Return the correction for frame offsets.
Abstract Stack Frame Index.
std::vector< CallSiteInfo > CallSitesInfo
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:286
This file defines passes to print out IR in various granularities.
uint8_t getStackID(int ObjectIdx) const
MachineBasicBlock * getSavePoint() const
bool memoperands_empty() const
Return true if we don&#39;t have any memory operands which described the memory access done by this instr...
Definition: MachineInstr.h:548
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasProperty(Property P) const
std::vector< FixedMachineStackObject > FixedStackObjects
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:482
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:575
JTEntryKind getEntryKind() const
Floating-point immediate operand.
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:250
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
void printStackObjectReference(int FrameIndex)
Definition: MIRPrinter.cpp:808
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
bool isMaxCallFrameSizeComputed() const
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:65
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
Address of indexed Constant in Constant Pool.
MachineJumpTableInfo::JTEntryKind Kind
unsigned getSimpleHint(unsigned VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint...
MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST, const DenseMap< const uint32_t *, unsigned > &RegisterMaskIds, const DenseMap< int, FrameIndexOperand > &StackObjectOperandMapping)
Definition: MIRPrinter.cpp:154
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:416
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
std::vector< ArgRegPair > ArgForwardingRegs
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
void print(const MachineFunction &MF)
Definition: MIRPrinter.cpp:195
uint32_t getNumerator() const
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
Definition: MachineInstr.h:297
StringRef getVRegName(unsigned Reg) const
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
bool isImplicit() const
bool hasCalls() const
Return true if the current function has any function calls.
Metadata reference (for debug info)
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1251