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SelectionDAGBuilder.h
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1 //===- SelectionDAGBuilder.h - Selection-DAG building -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements routines for translating from LLVM IR into SelectionDAG IR.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
14 #define LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
15 
16 #include "StatepointLowering.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/MapVector.h"
20 #include "llvm/ADT/SmallVector.h"
27 #include "llvm/IR/DebugLoc.h"
28 #include "llvm/IR/Instruction.h"
30 #include "llvm/Support/CodeGen.h"
33 #include <algorithm>
34 #include <cassert>
35 #include <cstdint>
36 #include <utility>
37 #include <vector>
38 
39 namespace llvm {
40 
41 class AAResults;
42 class AllocaInst;
43 class AtomicCmpXchgInst;
44 class AtomicRMWInst;
45 class AssumptionCache;
46 class BasicBlock;
47 class BranchInst;
48 class CallInst;
49 class CallBrInst;
50 class CatchPadInst;
51 class CatchReturnInst;
52 class CatchSwitchInst;
53 class CleanupPadInst;
54 class CleanupReturnInst;
55 class Constant;
56 class ConstrainedFPIntrinsic;
57 class DbgValueInst;
58 class DataLayout;
59 class DIExpression;
60 class DILocalVariable;
61 class DILocation;
62 class FenceInst;
63 class FunctionLoweringInfo;
64 class GCFunctionInfo;
65 class GCRelocateInst;
66 class GCResultInst;
67 class GCStatepointInst;
68 class IndirectBrInst;
69 class InvokeInst;
70 class LandingPadInst;
71 class LLVMContext;
72 class LoadInst;
73 class MachineBasicBlock;
74 class PHINode;
75 class ResumeInst;
76 class ReturnInst;
77 class SDDbgValue;
78 class SelectionDAG;
79 class StoreInst;
80 class SwiftErrorValueTracking;
81 class SwitchInst;
82 class TargetLibraryInfo;
83 class TargetMachine;
84 class Type;
85 class VAArgInst;
86 class UnreachableInst;
87 class Use;
88 class User;
89 class Value;
90 
91 //===----------------------------------------------------------------------===//
92 /// SelectionDAGBuilder - This is the common target-independent lowering
93 /// implementation that is parameterized by a TargetLowering object.
94 ///
96  /// The current instruction being visited.
97  const Instruction *CurInst = nullptr;
98 
100 
101  /// Maps argument value for unused arguments. This is used
102  /// to preserve debug information for incoming arguments.
103  DenseMap<const Value*, SDValue> UnusedArgNodeMap;
104 
105  /// Helper type for DanglingDebugInfoMap.
106  class DanglingDebugInfo {
107  const DbgValueInst *DI = nullptr;
108  unsigned SDNodeOrder = 0;
109 
110  public:
111  DanglingDebugInfo() = default;
112  DanglingDebugInfo(const DbgValueInst *DI, unsigned SDNO)
113  : DI(DI), SDNodeOrder(SDNO) {
114  assert(!DI->hasArgList() &&
115  "Dangling variadic debug values not supported yet");
116  }
117 
118  DILocalVariable *getVariable() const { return DI->getVariable(); }
119  DIExpression *getExpression() const { return DI->getExpression(); }
120  Value *getVariableLocationOp(unsigned Idx) const {
121  assert(Idx == 0 && "Dangling variadic debug values not supported yet");
122  return DI->getVariableLocationOp(Idx);
123  }
124  DebugLoc getDebugLoc() const { return DI->getDebugLoc(); }
125  unsigned getSDNodeOrder() const { return SDNodeOrder; }
126 
127  friend raw_ostream &operator<<(raw_ostream &OS,
128  const DanglingDebugInfo &Info) {
129  OS << "DDI(var=" << *Info.getVariable()
130  << ", val= " << *Info.getVariableLocationOp(0)
131  << ", expr=" << *Info.getExpression()
132  << ", order=" << Info.getSDNodeOrder()
133  << ", loc=" << Info.getDebugLoc() << ")";
134  return OS;
135  }
136  };
137 
138  /// Helper type for DanglingDebugInfoMap.
139  typedef std::vector<DanglingDebugInfo> DanglingDebugInfoVector;
140 
141  /// Keeps track of dbg_values for which we have not yet seen the referent.
142  /// We defer handling these until we do see it.
144 
145 public:
146  /// Loads are not emitted to the program immediately. We bunch them up and
147  /// then emit token factor nodes when possible. This allows us to get simple
148  /// disambiguation between loads without worrying about alias analysis.
150 
151  /// State used while lowering a statepoint sequence (gc_statepoint,
152  /// gc_relocate, and gc_result). See StatepointLowering.hpp/cpp for details.
154 
155 private:
156  /// CopyToReg nodes that copy values to virtual registers for export to other
157  /// blocks need to be emitted before any terminator instruction, but they have
158  /// no other ordering requirements. We bunch them up and the emit a single
159  /// tokenfactor for them just before terminator instructions.
160  SmallVector<SDValue, 8> PendingExports;
161 
162  /// Similar to loads, nodes corresponding to constrained FP intrinsics are
163  /// bunched up and emitted when necessary. These can be moved across each
164  /// other and any (normal) memory operation (load or store), but not across
165  /// calls or instructions having unspecified side effects. As a special
166  /// case, constrained FP intrinsics using fpexcept.strict may not be deleted
167  /// even if otherwise unused, so they need to be chained before any
168  /// terminator instruction (like PendingExports). We track the latter
169  /// set of nodes in a separate list.
170  SmallVector<SDValue, 8> PendingConstrainedFP;
171  SmallVector<SDValue, 8> PendingConstrainedFPStrict;
172 
173  /// Update root to include all chains from the Pending list.
174  SDValue updateRoot(SmallVectorImpl<SDValue> &Pending);
175 
176  /// A unique monotonically increasing number used to order the SDNodes we
177  /// create.
178  unsigned SDNodeOrder;
179 
180  /// Determine the rank by weight of CC in [First,Last]. If CC has more weight
181  /// than each cluster in the range, its rank is 0.
182  unsigned caseClusterRank(const SwitchCG::CaseCluster &CC,
185 
186  /// Emit comparison and split W into two subtrees.
187  void splitWorkItem(SwitchCG::SwitchWorkList &WorkList,
189  MachineBasicBlock *SwitchMBB);
190 
191  /// Lower W.
192  void lowerWorkItem(SwitchCG::SwitchWorkListItem W, Value *Cond,
193  MachineBasicBlock *SwitchMBB,
194  MachineBasicBlock *DefaultMBB);
195 
196  /// Peel the top probability case if it exceeds the threshold
198  peelDominantCaseCluster(const SwitchInst &SI,
199  SwitchCG::CaseClusterVector &Clusters,
200  BranchProbability &PeeledCaseProb);
201 
202 private:
203  const TargetMachine &TM;
204 
205 public:
206  /// Lowest valid SDNodeOrder. The special case 0 is reserved for scheduling
207  /// nodes without a corresponding SDNode.
208  static const unsigned LowestSDNodeOrder = 1;
209 
211  AAResults *AA = nullptr;
212  AssumptionCache *AC = nullptr;
214 
216  public:
218  : SwitchCG::SwitchLowering(funcinfo), SDB(sdb) {}
219 
223  SDB->addSuccessorWithProb(Src, Dst, Prob);
224  }
225 
226  private:
227  SelectionDAGBuilder *SDB;
228  };
229 
230  // Data related to deferred switch lowerings. Used to construct additional
231  // Basic Blocks in SelectionDAGISel::FinishBasicBlock.
232  std::unique_ptr<SDAGSwitchLowering> SL;
233 
234  /// A StackProtectorDescriptor structure used to communicate stack protector
235  /// information in between SelectBasicBlock and FinishBasicBlock.
237 
238  // Emit PHI-node-operand constants only once even if used by multiple
239  // PHI nodes.
241 
242  /// Information about the function as a whole.
244 
245  /// Information about the swifterror values used throughout the function.
247 
248  /// Garbage collection metadata for the function.
250 
251  /// Map a landing pad to the call site indexes.
253 
254  /// This is set to true if a call in the current block has been translated as
255  /// a tail call. In this case, no subsequent DAG nodes should be created.
256  bool HasTailCall = false;
257 
259 
262  : SDNodeOrder(LowestSDNodeOrder), TM(dag.getTarget()), DAG(dag),
263  SL(std::make_unique<SDAGSwitchLowering>(this, funcinfo)), FuncInfo(funcinfo),
264  SwiftError(swifterror) {}
265 
267  const TargetLibraryInfo *li);
268 
269  /// Clear out the current SelectionDAG and the associated state and prepare
270  /// this SelectionDAGBuilder object to be used for a new block. This doesn't
271  /// clear out information about additional blocks that are needed to complete
272  /// switch lowering or PHI node updating; that information is cleared out as
273  /// it is consumed.
274  void clear();
275 
276  /// Clear the dangling debug information map. This function is separated from
277  /// the clear so that debug information that is dangling in a basic block can
278  /// be properly resolved in a different basic block. This allows the
279  /// SelectionDAG to resolve dangling debug information attached to PHI nodes.
280  void clearDanglingDebugInfo();
281 
282  /// Return the current virtual root of the Selection DAG, flushing any
283  /// PendingLoad items. This must be done before emitting a store or any other
284  /// memory node that may need to be ordered after any prior load instructions.
286 
287  /// Similar to getMemoryRoot, but also flushes PendingConstrainedFP(Strict)
288  /// items. This must be done before emitting any call other any other node
289  /// that may need to be ordered after FP instructions due to other side
290  /// effects.
291  SDValue getRoot();
292 
293  /// Similar to getRoot, but instead of flushing all the PendingLoad items,
294  /// flush all the PendingExports (and PendingConstrainedFPStrict) items.
295  /// It is necessary to do this before emitting a terminator instruction.
297 
298  SDLoc getCurSDLoc() const {
299  return SDLoc(CurInst, SDNodeOrder);
300  }
301 
303  return CurInst ? CurInst->getDebugLoc() : DebugLoc();
304  }
305 
306  void CopyValueToVirtualRegister(const Value *V, unsigned Reg,
307  ISD::NodeType ExtendType = ISD::ANY_EXTEND);
308 
309  void visit(const Instruction &I);
310 
311  void visit(unsigned Opcode, const User &I);
312 
313  /// If there was virtual register allocated for the value V emit CopyFromReg
314  /// of the specified type Ty. Return empty SDValue() otherwise.
315  SDValue getCopyFromRegs(const Value *V, Type *Ty);
316 
317  /// Register a dbg_value which relies on a Value which we have not yet seen.
318  void addDanglingDebugInfo(const DbgValueInst *DI, unsigned Order);
319 
320  /// If we have dangling debug info that describes \p Variable, or an
321  /// overlapping part of variable considering the \p Expr, then this method
322  /// will drop that debug info as it isn't valid any longer.
323  void dropDanglingDebugInfo(const DILocalVariable *Variable,
324  const DIExpression *Expr);
325 
326  /// If we saw an earlier dbg_value referring to V, generate the debug data
327  /// structures now that we've seen its definition.
328  void resolveDanglingDebugInfo(const Value *V, SDValue Val);
329 
330  /// For the given dangling debuginfo record, perform last-ditch efforts to
331  /// resolve the debuginfo to something that is represented in this DAG. If
332  /// this cannot be done, produce an Undef debug value record.
333  void salvageUnresolvedDbgValue(DanglingDebugInfo &DDI);
334 
335  /// For a given list of Values, attempt to create and record a SDDbgValue in
336  /// the SelectionDAG.
338  DIExpression *Expr, DebugLoc DbgLoc, unsigned Order,
339  bool IsVariadic);
340 
341  /// Evict any dangling debug information, attempting to salvage it first.
342  void resolveOrClearDbgInfo();
343 
344  SDValue getValue(const Value *V);
345 
347  SDValue getValueImpl(const Value *V);
348 
349  void setValue(const Value *V, SDValue NewN) {
350  SDValue &N = NodeMap[V];
351  assert(!N.getNode() && "Already set a value for this node!");
352  N = NewN;
353  }
354 
355  void setUnusedArgValue(const Value *V, SDValue NewN) {
356  SDValue &N = UnusedArgNodeMap[V];
357  assert(!N.getNode() && "Already set a value for this node!");
358  N = NewN;
359  }
360 
363  MachineBasicBlock *SwitchBB,
365  BranchProbability FProb, bool InvertCond);
367  MachineBasicBlock *FBB,
368  MachineBasicBlock *CurBB,
369  MachineBasicBlock *SwitchBB,
371  bool InvertCond);
372  bool ShouldEmitAsBranches(const std::vector<SwitchCG::CaseBlock> &Cases);
373  bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB);
374  void CopyToExportRegsIfNeeded(const Value *V);
375  void ExportFromCurrentBlock(const Value *V);
376  void LowerCallTo(const CallBase &CB, SDValue Callee, bool IsTailCall,
377  bool IsMustTailCall, const BasicBlock *EHPadBB = nullptr);
378 
379  // Lower range metadata from 0 to N to assert zext to an integer of nearest
380  // floor power of two.
382  SDValue Op);
383 
385  const CallBase *Call, unsigned ArgIdx,
386  unsigned NumArgs, SDValue Callee,
387  Type *ReturnTy, bool IsPatchPoint);
388 
389  std::pair<SDValue, SDValue>
391  const BasicBlock *EHPadBB = nullptr);
392 
393  /// When an MBB was split during scheduling, update the
394  /// references that need to refer to the last resulting block.
396 
397  /// Describes a gc.statepoint or a gc.statepoint like thing for the purposes
398  /// of lowering into a STATEPOINT node.
400  /// Bases[i] is the base pointer for Ptrs[i]. Together they denote the set
401  /// of gc pointers this STATEPOINT has to relocate.
404 
405  /// The set of gc.relocate calls associated with this gc.statepoint.
407 
408  /// The full list of gc arguments to the gc.statepoint being lowered.
410 
411  /// The gc.statepoint instruction.
412  const Instruction *StatepointInstr = nullptr;
413 
414  /// The list of gc transition arguments present in the gc.statepoint being
415  /// lowered.
417 
418  /// The ID that the resulting STATEPOINT instruction has to report.
419  unsigned ID = -1;
420 
421  /// Information regarding the underlying call instruction.
423 
424  /// The deoptimization state associated with this gc.statepoint call, if
425  /// any.
427 
428  /// Flags associated with the meta arguments being lowered.
430 
431  /// The number of patchable bytes the call needs to get lowered into.
432  unsigned NumPatchBytes = -1;
433 
434  /// The exception handling unwind destination, in case this represents an
435  /// invoke of gc.statepoint.
436  const BasicBlock *EHPadBB = nullptr;
437 
439  };
440 
441  /// Lower \p SLI into a STATEPOINT instruction.
442  SDValue LowerAsSTATEPOINT(StatepointLoweringInfo &SI);
443 
444  // This function is responsible for the whole statepoint lowering process.
445  // It uniformly handles invoke and call statepoints.
446  void LowerStatepoint(const GCStatepointInst &I,
447  const BasicBlock *EHPadBB = nullptr);
448 
449  void LowerCallSiteWithDeoptBundle(const CallBase *Call, SDValue Callee,
450  const BasicBlock *EHPadBB);
451 
452  void LowerDeoptimizeCall(const CallInst *CI);
454 
455  void LowerCallSiteWithDeoptBundleImpl(const CallBase *Call, SDValue Callee,
456  const BasicBlock *EHPadBB,
457  bool VarArgDisallowed,
458  bool ForceVoidReturnTy);
459 
460  /// Returns the type of FrameIndex and TargetFrameIndex nodes.
463  }
464 
465 private:
466  // Terminator instructions.
467  void visitRet(const ReturnInst &I);
468  void visitBr(const BranchInst &I);
469  void visitSwitch(const SwitchInst &I);
470  void visitIndirectBr(const IndirectBrInst &I);
471  void visitUnreachable(const UnreachableInst &I);
472  void visitCleanupRet(const CleanupReturnInst &I);
473  void visitCatchSwitch(const CatchSwitchInst &I);
474  void visitCatchRet(const CatchReturnInst &I);
475  void visitCatchPad(const CatchPadInst &I);
476  void visitCleanupPad(const CleanupPadInst &CPI);
477 
478  BranchProbability getEdgeProbability(const MachineBasicBlock *Src,
479  const MachineBasicBlock *Dst) const;
480  void addSuccessorWithProb(
483 
484 public:
487  MachineBasicBlock *ParentBB);
490  MachineBasicBlock *SwitchBB);
492  BranchProbability BranchProbToNext, unsigned Reg,
497  MachineBasicBlock *SwitchBB);
498 
499 private:
500  // These all get lowered before this pass.
501  void visitInvoke(const InvokeInst &I);
502  void visitCallBr(const CallBrInst &I);
503  void visitResume(const ResumeInst &I);
504 
505  void visitUnary(const User &I, unsigned Opcode);
506  void visitFNeg(const User &I) { visitUnary(I, ISD::FNEG); }
507 
508  void visitBinary(const User &I, unsigned Opcode);
509  void visitShift(const User &I, unsigned Opcode);
510  void visitAdd(const User &I) { visitBinary(I, ISD::ADD); }
511  void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); }
512  void visitSub(const User &I) { visitBinary(I, ISD::SUB); }
513  void visitFSub(const User &I) { visitBinary(I, ISD::FSUB); }
514  void visitMul(const User &I) { visitBinary(I, ISD::MUL); }
515  void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); }
516  void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
517  void visitSRem(const User &I) { visitBinary(I, ISD::SREM); }
518  void visitFRem(const User &I) { visitBinary(I, ISD::FREM); }
519  void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); }
520  void visitSDiv(const User &I);
521  void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); }
522  void visitAnd (const User &I) { visitBinary(I, ISD::AND); }
523  void visitOr (const User &I) { visitBinary(I, ISD::OR); }
524  void visitXor (const User &I) { visitBinary(I, ISD::XOR); }
525  void visitShl (const User &I) { visitShift(I, ISD::SHL); }
526  void visitLShr(const User &I) { visitShift(I, ISD::SRL); }
527  void visitAShr(const User &I) { visitShift(I, ISD::SRA); }
528  void visitICmp(const User &I);
529  void visitFCmp(const User &I);
530  // Visit the conversion instructions
531  void visitTrunc(const User &I);
532  void visitZExt(const User &I);
533  void visitSExt(const User &I);
534  void visitFPTrunc(const User &I);
535  void visitFPExt(const User &I);
536  void visitFPToUI(const User &I);
537  void visitFPToSI(const User &I);
538  void visitUIToFP(const User &I);
539  void visitSIToFP(const User &I);
540  void visitPtrToInt(const User &I);
541  void visitIntToPtr(const User &I);
542  void visitBitCast(const User &I);
543  void visitAddrSpaceCast(const User &I);
544 
545  void visitExtractElement(const User &I);
546  void visitInsertElement(const User &I);
547  void visitShuffleVector(const User &I);
548 
549  void visitExtractValue(const ExtractValueInst &I);
550  void visitInsertValue(const InsertValueInst &I);
551  void visitLandingPad(const LandingPadInst &LP);
552 
553  void visitGetElementPtr(const User &I);
554  void visitSelect(const User &I);
555 
556  void visitAlloca(const AllocaInst &I);
557  void visitLoad(const LoadInst &I);
558  void visitStore(const StoreInst &I);
559  void visitMaskedLoad(const CallInst &I, bool IsExpanding = false);
560  void visitMaskedStore(const CallInst &I, bool IsCompressing = false);
561  void visitMaskedGather(const CallInst &I);
562  void visitMaskedScatter(const CallInst &I);
563  void visitAtomicCmpXchg(const AtomicCmpXchgInst &I);
564  void visitAtomicRMW(const AtomicRMWInst &I);
565  void visitFence(const FenceInst &I);
566  void visitPHI(const PHINode &I);
567  void visitCall(const CallInst &I);
568  bool visitMemCmpBCmpCall(const CallInst &I);
569  bool visitMemPCpyCall(const CallInst &I);
570  bool visitMemChrCall(const CallInst &I);
571  bool visitStrCpyCall(const CallInst &I, bool isStpcpy);
572  bool visitStrCmpCall(const CallInst &I);
573  bool visitStrLenCall(const CallInst &I);
574  bool visitStrNLenCall(const CallInst &I);
575  bool visitUnaryFloatCall(const CallInst &I, unsigned Opcode);
576  bool visitBinaryFloatCall(const CallInst &I, unsigned Opcode);
577  void visitAtomicLoad(const LoadInst &I);
578  void visitAtomicStore(const StoreInst &I);
579  void visitLoadFromSwiftError(const LoadInst &I);
580  void visitStoreToSwiftError(const StoreInst &I);
581  void visitFreeze(const FreezeInst &I);
582 
583  void visitInlineAsm(const CallBase &Call,
584  const BasicBlock *EHPadBB = nullptr);
585  void visitIntrinsicCall(const CallInst &I, unsigned Intrinsic);
586  void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic);
587  void visitConstrainedFPIntrinsic(const ConstrainedFPIntrinsic &FPI);
588  void visitVPLoad(const VPIntrinsic &VPIntrin, EVT VT,
589  SmallVector<SDValue, 7> &OpValues);
590  void visitVPStore(const VPIntrinsic &VPIntrin,
591  SmallVector<SDValue, 7> &OpValues);
592  void visitVPGather(const VPIntrinsic &VPIntrin, EVT VT,
593  SmallVector<SDValue, 7> &OpValues);
594  void visitVPScatter(const VPIntrinsic &VPIntrin,
595  SmallVector<SDValue, 7> &OpValues);
596  void visitVPStridedLoad(const VPIntrinsic &VPIntrin, EVT VT,
597  SmallVectorImpl<SDValue> &OpValues);
598  void visitVPStridedStore(const VPIntrinsic &VPIntrin,
599  SmallVectorImpl<SDValue> &OpValues);
600  void visitVPCmp(const VPCmpIntrinsic &VPIntrin);
601  void visitVectorPredicationIntrinsic(const VPIntrinsic &VPIntrin);
602 
603  void visitVAStart(const CallInst &I);
604  void visitVAArg(const VAArgInst &I);
605  void visitVAEnd(const CallInst &I);
606  void visitVACopy(const CallInst &I);
607  void visitStackmap(const CallInst &I);
608  void visitPatchpoint(const CallBase &CB, const BasicBlock *EHPadBB = nullptr);
609 
610  // These two are implemented in StatepointLowering.cpp
611  void visitGCRelocate(const GCRelocateInst &Relocate);
612  void visitGCResult(const GCResultInst &I);
613 
614  void visitVectorReduce(const CallInst &I, unsigned Intrinsic);
615  void visitVectorReverse(const CallInst &I);
616  void visitVectorSplice(const CallInst &I);
617  void visitStepVector(const CallInst &I);
618 
619  void visitUserOp1(const Instruction &I) {
620  llvm_unreachable("UserOp1 should not exist at instruction selection time!");
621  }
622  void visitUserOp2(const Instruction &I) {
623  llvm_unreachable("UserOp2 should not exist at instruction selection time!");
624  }
625 
626  void processIntegerCallValue(const Instruction &I,
627  SDValue Value, bool IsSigned);
628 
629  void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
630 
631  void emitInlineAsmError(const CallBase &Call, const Twine &Message);
632 
633  /// An enum that states to emit func argument dbg value the kind of intrinsic
634  /// it originally had. This controls the internal behavior of
635  /// EmitFuncArgumentDbgValue.
636  enum class FuncArgumentDbgValueKind {
637  Value, // This was originally a llvm.dbg.value.
638  Addr, // This was originally a llvm.dbg.addr.
639  Declare, // This was originally a llvm.dbg.declare.
640  };
641 
642  /// If V is an function argument then create corresponding DBG_VALUE machine
643  /// instruction for it now. At the end of instruction selection, they will be
644  /// inserted to the entry BB.
645  bool EmitFuncArgumentDbgValue(const Value *V, DILocalVariable *Variable,
646  DIExpression *Expr, DILocation *DL,
647  FuncArgumentDbgValueKind Kind,
648  const SDValue &N);
649 
650  /// Return the next block after MBB, or nullptr if there is none.
651  MachineBasicBlock *NextBlock(MachineBasicBlock *MBB);
652 
653  /// Update the DAG and DAG builder with the relevant information after
654  /// a new root node has been created which could be a tail call.
655  void updateDAGForMaybeTailCall(SDValue MaybeTC);
656 
657  /// Return the appropriate SDDbgValue based on N.
658  SDDbgValue *getDbgValue(SDValue N, DILocalVariable *Variable,
659  DIExpression *Expr, const DebugLoc &dl,
660  unsigned DbgSDNodeOrder);
661 
662  /// Lowers CallInst to an external symbol.
663  void lowerCallToExternalSymbol(const CallInst &I, const char *FunctionName);
664 
665  SDValue lowerStartEH(SDValue Chain, const BasicBlock *EHPadBB,
666  MCSymbol *&BeginLabel);
667  SDValue lowerEndEH(SDValue Chain, const InvokeInst *II,
668  const BasicBlock *EHPadBB, MCSymbol *BeginLabel);
669 };
670 
671 /// This struct represents the registers (physical or virtual)
672 /// that a particular set of values is assigned, and the type information about
673 /// the value. The most common situation is to represent one value at a time,
674 /// but struct or array values are handled element-wise as multiple values. The
675 /// splitting of aggregates is performed recursively, so that we never have
676 /// aggregate-typed registers. The values at this point do not necessarily have
677 /// legal types, so each value may require one or more registers of some legal
678 /// type.
679 ///
680 struct RegsForValue {
681  /// The value types of the values, which may not be legal, and
682  /// may need be promoted or synthesized from one or more registers.
684 
685  /// The value types of the registers. This is the same size as ValueVTs and it
686  /// records, for each value, what the type of the assigned register or
687  /// registers are. (Individual values are never synthesized from more than one
688  /// type of register.)
689  ///
690  /// With virtual registers, the contents of RegVTs is redundant with TLI's
691  /// getRegisterType member function, however when with physical registers
692  /// it is necessary to have a separate record of the types.
694 
695  /// This list holds the registers assigned to the values.
696  /// Each legal or promoted value requires one register, and each
697  /// expanded value requires multiple registers.
699 
700  /// This list holds the number of registers for each value.
702 
703  /// Records if this value needs to be treated in an ABI dependant manner,
704  /// different to normal type legalization.
706 
707  RegsForValue() = default;
708  RegsForValue(const SmallVector<unsigned, 4> &regs, MVT regvt, EVT valuevt,
711  const DataLayout &DL, unsigned Reg, Type *Ty,
713 
714  bool isABIMangled() const { return CallConv.has_value(); }
715 
716  /// Add the specified values to this one.
717  void append(const RegsForValue &RHS) {
718  ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
719  RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
720  Regs.append(RHS.Regs.begin(), RHS.Regs.end());
721  RegCount.push_back(RHS.Regs.size());
722  }
723 
724  /// Emit a series of CopyFromReg nodes that copies from this value and returns
725  /// the result as a ValueVTs value. This uses Chain/Flag as the input and
726  /// updates them for the output Chain/Flag. If the Flag pointer is NULL, no
727  /// flag is used.
729  const SDLoc &dl, SDValue &Chain, SDValue *Flag,
730  const Value *V = nullptr) const;
731 
732  /// Emit a series of CopyToReg nodes that copies the specified value into the
733  /// registers specified by this object. This uses Chain/Flag as the input and
734  /// updates them for the output Chain/Flag. If the Flag pointer is nullptr, no
735  /// flag is used. If V is not nullptr, then it is used in printing better
736  /// diagnostic messages on error.
737  void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl,
738  SDValue &Chain, SDValue *Flag, const Value *V = nullptr,
739  ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
740 
741  /// Add this value to the specified inlineasm node operand list. This adds the
742  /// code marker, matching input operand index (if applicable), and includes
743  /// the number of values added into it.
744  void AddInlineAsmOperands(unsigned Code, bool HasMatching,
745  unsigned MatchingIdx, const SDLoc &dl,
746  SelectionDAG &DAG, std::vector<SDValue> &Ops) const;
747 
748  /// Check if the total RegCount is greater than one.
749  bool occupiesMultipleRegs() const {
750  return std::accumulate(RegCount.begin(), RegCount.end(), 0) > 1;
751  }
752 
753  /// Return a list of registers and their sizes.
755 };
756 
757 } // end namespace llvm
758 
759 #endif // LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
llvm::ISD::SUB
@ SUB
Definition: ISDOpcodes.h:240
llvm::SelectionDAGBuilder::LowerStatepoint
void LowerStatepoint(const GCStatepointInst &I, const BasicBlock *EHPadBB=nullptr)
Definition: StatepointLowering.cpp:1039
llvm::SelectionDAGBuilder::LPadToCallSiteMap
DenseMap< MachineBasicBlock *, SmallVector< unsigned, 4 > > LPadToCallSiteMap
Map a landing pad to the call site indexes.
Definition: SelectionDAGBuilder.h:252
ValueTypes.h
llvm::objcarc::ARCInstKind::User
@ User
could "use" a pointer
llvm::DbgVariableIntrinsic::getExpression
DIExpression * getExpression() const
Definition: IntrinsicInst.h:291
llvm::SelectionDAGBuilder::SDAGSwitchLowering::addSuccessorWithProb
void addSuccessorWithProb(MachineBasicBlock *Src, MachineBasicBlock *Dst, BranchProbability Prob=BranchProbability::getUnknown()) override
Definition: SelectionDAGBuilder.h:220
llvm::SelectionDAGBuilder::CopyValueToVirtualRegister
void CopyValueToVirtualRegister(const Value *V, unsigned Reg, ISD::NodeType ExtendType=ISD::ANY_EXTEND)
Definition: SelectionDAGBuilder.cpp:10233
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::ReturnInst
Return a value (possibly void), from a function.
Definition: Instructions.h:3051
llvm::SDLoc
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Definition: SelectionDAGNodes.h:1106
llvm::DataLayout
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:113
llvm::ISD::OR
@ OR
Definition: ISDOpcodes.h:667
llvm::SelectionDAGBuilder::setValue
void setValue(const Value *V, SDValue NewN)
Definition: SelectionDAGBuilder.h:349
llvm::SelectionDAGBuilder::PendingLoads
SmallVector< SDValue, 8 > PendingLoads
Loads are not emitted to the program immediately.
Definition: SelectionDAGBuilder.h:149
llvm::HexagonISD::JT
@ JT
Definition: HexagonISelLowering.h:52
llvm::SwitchCG::SwitchLowering::SwitchLowering
SwitchLowering(FunctionLoweringInfo &funcinfo)
Definition: SwitchLoweringUtils.h:251
llvm::SwitchCG::CaseBlock
This structure is used to communicate between SelectionDAGBuilder and SDISel for the code generation ...
Definition: SwitchLoweringUtils.h:109
llvm::ISD::UDIV
@ UDIV
Definition: ISDOpcodes.h:243
llvm::SelectionDAGBuilder::CopyToExportRegsIfNeeded
void CopyToExportRegsIfNeeded(const Value *V)
CopyToExportRegsIfNeeded - If the given value has virtual registers created for it,...
Definition: SelectionDAGBuilder.cpp:2097
llvm::SelectionDAGBuilder::StatepointLoweringInfo::Bases
SmallVector< const Value *, 16 > Bases
Bases[i] is the base pointer for Ptrs[i].
Definition: SelectionDAGBuilder.h:402
llvm::RegsForValue::occupiesMultipleRegs
bool occupiesMultipleRegs() const
Check if the total RegCount is greater than one.
Definition: SelectionDAGBuilder.h:749
llvm::SwitchCG::SwitchLowering
Definition: SwitchLoweringUtils.h:249
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1199
llvm::RISCVFenceField::W
@ W
Definition: RISCVBaseInfo.h:266
llvm::SelectionDAGBuilder::visitJumpTable
void visitJumpTable(SwitchCG::JumpTable &JT)
visitJumpTable - Emit JumpTable node in the current MBB
Definition: SelectionDAGBuilder.cpp:2585
llvm::SelectionDAGBuilder::getValue
SDValue getValue(const Value *V)
getValue - Return an SDValue for the given Value.
Definition: SelectionDAGBuilder.cpp:1525
ErrorHandling.h
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
MapVector.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::GCTransitionArgs
ArrayRef< const Use > GCTransitionArgs
The list of gc transition arguments present in the gc.statepoint being lowered.
Definition: SelectionDAGBuilder.h:416
llvm::SelectionDAGBuilder::StatepointLoweringInfo::NumPatchBytes
unsigned NumPatchBytes
The number of patchable bytes the call needs to get lowered into.
Definition: SelectionDAGBuilder.h:432
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:766
llvm::GCFunctionInfo
Garbage collection metadata for a single function.
Definition: GCMetadata.h:77
llvm::SwitchCG::SwitchWorkListItem
Definition: SwitchLoweringUtils.h:239
llvm::Type
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
DenseMap.h
llvm::SelectionDAGBuilder::LowerCallSiteWithDeoptBundle
void LowerCallSiteWithDeoptBundle(const CallBase *Call, SDValue Callee, const BasicBlock *EHPadBB)
Definition: StatepointLowering.cpp:1194
llvm::SelectionDAGBuilder::StatepointLoweringInfo::EHPadBB
const BasicBlock * EHPadBB
The exception handling unwind destination, in case this represents an invoke of gc....
Definition: SelectionDAGBuilder.h:436
llvm::SwitchCG::CaseClusterIt
CaseClusterVector::iterator CaseClusterIt
Definition: SwitchLoweringUtils.h:87
llvm::DbgVariableIntrinsic::getVariable
DILocalVariable * getVariable() const
Definition: IntrinsicInst.h:287
llvm::Optional< CallingConv::ID >
llvm::MapVector
This class implements a map that also provides access to all stored values in a deterministic order.
Definition: MapVector.h:37
llvm::DIExpression
DWARF expression.
Definition: DebugInfoMetadata.h:2596
RHS
Value * RHS
Definition: X86PartialReduction.cpp:76
llvm::RegsForValue::getCopyFromRegs
SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V=nullptr) const
Emit a series of CopyFromReg nodes that copies from this value and returns the result as a ValueVTs v...
Definition: SelectionDAGBuilder.cpp:834
llvm::SelectionDAGBuilder::ConstantsOut
DenseMap< const Constant *, unsigned > ConstantsOut
Definition: SelectionDAGBuilder.h:240
llvm::RegsForValue::isABIMangled
bool isABIMangled() const
Definition: SelectionDAGBuilder.h:714
llvm::DbgVariableIntrinsic::getVariableLocationOp
Value * getVariableLocationOp(unsigned OpIdx) const
Definition: IntrinsicInst.cpp:92
llvm::SelectionDAGBuilder::visitSwitchCase
void visitSwitchCase(SwitchCG::CaseBlock &CB, MachineBasicBlock *SwitchBB)
visitSwitchCase - Emits the necessary code to represent a single node in the binary search tree resul...
Definition: SelectionDAGBuilder.cpp:2490
llvm::RegsForValue::getCopyToRegs
void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V=nullptr, ISD::NodeType PreferredExtendType=ISD::ANY_EXTEND) const
Emit a series of CopyToReg nodes that copies the specified value into the registers specified by this...
Definition: SelectionDAGBuilder.cpp:921
llvm::SelectionDAGBuilder::visitBitTestHeader
void visitBitTestHeader(SwitchCG::BitTestBlock &B, MachineBasicBlock *SwitchBB)
visitBitTestHeader - This function emits necessary code to produce value suitable for "bit tests"
Definition: SelectionDAGBuilder.cpp:2802
llvm::BasicBlock
LLVM Basic Block Representation.
Definition: BasicBlock.h:55
MachineValueType.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::GCArgs
ArrayRef< const Use > GCArgs
The full list of gc arguments to the gc.statepoint being lowered.
Definition: SelectionDAGBuilder.h:409
Context
LLVMContext & Context
Definition: NVVMIntrRange.cpp:66
llvm::GCStatepointInst
Represents a gc.statepoint intrinsic call.
Definition: Statepoint.h:61
llvm::SelectionDAGBuilder::handleDebugValue
bool handleDebugValue(ArrayRef< const Value * > Values, DILocalVariable *Var, DIExpression *Expr, DebugLoc DbgLoc, unsigned Order, bool IsVariadic)
For a given list of Values, attempt to create and record a SDDbgValue in the SelectionDAG.
Definition: SelectionDAGBuilder.cpp:1363
Instruction.h
TargetLowering.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::Ptrs
SmallVector< const Value *, 16 > Ptrs
Definition: SelectionDAGBuilder.h:403
llvm::SelectionDAGBuilder::DAG
SelectionDAG & DAG
Definition: SelectionDAGBuilder.h:210
llvm::SelectionDAGBuilder::AC
AssumptionCache * AC
Definition: SelectionDAGBuilder.h:212
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:220
SelectionDAGNodes.h
llvm::SelectionDAGBuilder::lowerRangeToAssertZExt
SDValue lowerRangeToAssertZExt(SelectionDAG &DAG, const Instruction &I, SDValue Op)
Definition: SelectionDAGBuilder.cpp:9394
llvm::ISD::Constant
@ Constant
Definition: ISDOpcodes.h:76
llvm::AAResults
Definition: AliasAnalysis.h:294
llvm::DbgValueInst
This represents the llvm.dbg.value instruction.
Definition: IntrinsicInst.h:387
llvm::DILocalVariable
Local variable.
Definition: DebugInfoMetadata.h:3096
llvm::RegsForValue::Regs
SmallVector< unsigned, 4 > Regs
This list holds the registers assigned to the values.
Definition: SelectionDAGBuilder.h:698
llvm::User
Definition: User.h:44
llvm::SelectionDAG::getTargetLoweringInfo
const TargetLowering & getTargetLoweringInfo() const
Definition: SelectionDAG.h:475
llvm::EVT
Extended Value Type.
Definition: ValueTypes.h:34
llvm::StackProtectorDescriptor
Encapsulates all of the information needed to generate a stack protector check, and signals to isel w...
Definition: CodeGenCommonISel.h:114
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition: TargetLowering.h:3486
SI
@ SI
Definition: SIInstrInfo.cpp:7882
TBB
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
Definition: RISCVRedundantCopyElimination.cpp:76
llvm::ISD::SRA
@ SRA
Definition: ISDOpcodes.h:692
llvm::SelectionDAGBuilder::resolveOrClearDbgInfo
void resolveOrClearDbgInfo()
Evict any dangling debug information, attempting to salvage it first.
Definition: SelectionDAGBuilder.cpp:1495
llvm::SelectionDAGBuilder::SDAGSwitchLowering
Definition: SelectionDAGBuilder.h:215
B
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
llvm::ISD::NodeType
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:40
llvm::Instruction
Definition: Instruction.h:42
llvm::MCID::Flag
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:147
llvm::SelectionDAGBuilder::setUnusedArgValue
void setUnusedArgValue(const Value *V, SDValue NewN)
Definition: SelectionDAGBuilder.h:355
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
llvm::SelectionDAGBuilder::clearDanglingDebugInfo
void clearDanglingDebugInfo()
Clear the dangling debug information map.
Definition: SelectionDAGBuilder.cpp:1069
SwitchLoweringUtils.h
llvm::operator<<
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
Definition: APFixedPoint.h:291
llvm::SelectionDAGBuilder::LowerDeoptimizeCall
void LowerDeoptimizeCall(const CallInst *CI)
Definition: StatepointLowering.cpp:1326
DebugLoc.h
llvm::DbgVariableIntrinsic::hasArgList
bool hasArgList() const
Definition: IntrinsicInst.h:259
Info
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:666
llvm::SmallVectorImpl::append
void append(ItTy in_start, ItTy in_end)
Add the specified range to the end of the SmallVector.
Definition: SmallVector.h:687
llvm::SelectionDAGBuilder::SelectionDAGBuilder
SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo, SwiftErrorValueTracking &swifterror, CodeGenOpt::Level ol)
Definition: SelectionDAGBuilder.h:260
llvm::BranchProbability::getUnknown
static BranchProbability getUnknown()
Definition: BranchProbability.h:51
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
BranchProbability.h
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:94
llvm::SelectionDAGBuilder::getMemoryRoot
SDValue getMemoryRoot()
Return the current virtual root of the Selection DAG, flushing any PendingLoad items.
Definition: SelectionDAGBuilder.cpp:1104
llvm::InvokeInst
Invoke instruction.
Definition: Instructions.h:3810
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition: ISDOpcodes.h:390
llvm::RegsForValue
This struct represents the registers (physical or virtual) that a particular set of values is assigne...
Definition: SelectionDAGBuilder.h:680
llvm::CleanupPadInst
Definition: Instructions.h:4489
llvm::TargetLoweringBase::getFrameIndexTy
MVT getFrameIndexTy(const DataLayout &DL) const
Return the type for frame index, which is determined by the alloca address space specified through th...
Definition: TargetLowering.h:369
llvm::SelectionDAGBuilder::getValueImpl
SDValue getValueImpl(const Value *V)
getValueImpl - Helper function for getValue and getNonRegisterValue.
Definition: SelectionDAGBuilder.cpp:1569
llvm::SelectionDAGBuilder::visitJumpTableHeader
void visitJumpTableHeader(SwitchCG::JumpTable &JT, SwitchCG::JumpTableHeader &JTH, MachineBasicBlock *SwitchBB)
visitJumpTableHeader - This function emits necessary code to produce index in the JumpTable from swit...
Definition: SelectionDAGBuilder.cpp:2600
llvm::SelectionDAGBuilder::salvageUnresolvedDbgValue
void salvageUnresolvedDbgValue(DanglingDebugInfo &DDI)
For the given dangling debuginfo record, perform last-ditch efforts to resolve the debuginfo to somet...
Definition: SelectionDAGBuilder.cpp:1299
uint64_t
llvm::SelectionDAGBuilder::init
void init(GCFunctionInfo *gfi, AAResults *AA, AssumptionCache *AC, const TargetLibraryInfo *li)
Definition: SelectionDAGBuilder.cpp:1044
llvm::CatchReturnInst
Definition: Instructions.h:4581
Addr
uint64_t Addr
Definition: ELFObjHandler.cpp:79
llvm::CallBrInst
CallBr instruction, tracking function calls that may not return control but instead transfer it to a ...
Definition: Instructions.h:4019
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
llvm::DenseMap
Definition: DenseMap.h:714
llvm::SelectionDAGBuilder::getCopyFromRegs
SDValue getCopyFromRegs(const Value *V, Type *Ty)
If there was virtual register allocated for the value V emit CopyFromReg of the specified type Ty.
Definition: SelectionDAGBuilder.cpp:1505
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::SwiftErrorValueTracking
Definition: SwiftErrorValueTracking.h:34
llvm::SelectionDAGBuilder::addDanglingDebugInfo
void addDanglingDebugInfo(const DbgValueInst *DI, unsigned Order)
Register a dbg_value which relies on a Value which we have not yet seen.
Definition: SelectionDAGBuilder.cpp:1194
ArrayRef.h
llvm::SelectionDAGBuilder::StatepointLoweringInfo::StatepointLoweringInfo
StatepointLoweringInfo(SelectionDAG &DAG)
Definition: SelectionDAGBuilder.h:438
TemplateParamKind::Type
@ Type
llvm::SelectionDAGBuilder::LowerAsSTATEPOINT
SDValue LowerAsSTATEPOINT(StatepointLoweringInfo &SI)
Lower SLI into a STATEPOINT instruction.
Definition: StatepointLowering.cpp:736
llvm::SelectionDAGBuilder::StatepointLowering
StatepointLoweringState StatepointLowering
State used while lowering a statepoint sequence (gc_statepoint, gc_relocate, and gc_result).
Definition: SelectionDAGBuilder.h:153
llvm::SelectionDAGBuilder::LibInfo
const TargetLibraryInfo * LibInfo
Definition: SelectionDAGBuilder.h:213
llvm::TargetLowering::CallLoweringInfo
This structure contains all information that is necessary for lowering calls.
Definition: TargetLowering.h:4134
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::TargetMachine
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:77
llvm::FunctionLoweringInfo
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
Definition: FunctionLoweringInfo.h:52
llvm::SelectionDAGBuilder::getFrameIndexTy
MVT getFrameIndexTy()
Returns the type of FrameIndex and TargetFrameIndex nodes.
Definition: SelectionDAGBuilder.h:461
llvm::SelectionDAGBuilder::SDAGSwitchLowering::SDAGSwitchLowering
SDAGSwitchLowering(SelectionDAGBuilder *sdb, FunctionLoweringInfo &funcinfo)
Definition: SelectionDAGBuilder.h:217
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition: ISDOpcodes.h:71
llvm::SwitchCG::JumpTableHeader
Definition: SwitchLoweringUtils.h:180
CodeGenCommonISel.h
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::RegsForValue::getRegsAndSizes
SmallVector< std::pair< unsigned, TypeSize >, 4 > getRegsAndSizes() const
Return a list of registers and their sizes.
Definition: SelectionDAGBuilder.cpp:1031
llvm::SelectionDAGBuilder::isExportableFromCurrentBlock
bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB)
Definition: SelectionDAGBuilder.cpp:2123
llvm::SelectionDAGBuilder::StatepointLoweringInfo
Describes a gc.statepoint or a gc.statepoint like thing for the purposes of lowering into a STATEPOIN...
Definition: SelectionDAGBuilder.h:399
getDebugLoc
static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, MachineBasicBlock::instr_iterator LastMI)
Return the first found DebugLoc that has a DILocation, given a range of instructions.
Definition: MachineInstrBundle.cpp:110
StatepointLowering.h
llvm::SelectionDAGBuilder::SwiftError
SwiftErrorValueTracking & SwiftError
Information about the swifterror values used throughout the function.
Definition: SelectionDAGBuilder.h:246
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: APInt.h:32
llvm::RegsForValue::RegVTs
SmallVector< MVT, 4 > RegVTs
The value types of the registers.
Definition: SelectionDAGBuilder.h:693
Cond
SmallVector< MachineOperand, 4 > Cond
Definition: BasicBlockSections.cpp:137
this
Analysis the ScalarEvolution expression for r is this
Definition: README.txt:8
llvm::AssumptionCache
A cache of @llvm.assume calls within a function.
Definition: AssumptionCache.h:42
llvm::SelectionDAGBuilder
SelectionDAGBuilder - This is the common target-independent lowering implementation that is parameter...
Definition: SelectionDAGBuilder.h:95
llvm::SwitchCG::CaseClusterVector
std::vector< CaseCluster > CaseClusterVector
Definition: SwitchLoweringUtils.h:86
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::ISD::SREM
@ SREM
Definition: ISDOpcodes.h:244
llvm::BranchProbability
Definition: BranchProbability.h:30
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition: AArch64SLSHardening.cpp:76
llvm::SelectionDAGBuilder::Context
LLVMContext * Context
Definition: SelectionDAGBuilder.h:258
CC
auto CC
Definition: RISCVRedundantCopyElimination.cpp:79
llvm::SelectionDAGBuilder::getCurSDLoc
SDLoc getCurSDLoc() const
Definition: SelectionDAGBuilder.h:298
llvm::Optional::has_value
constexpr bool has_value() const
Definition: Optional.h:285
llvm::SelectionDAGBuilder::LowestSDNodeOrder
static const unsigned LowestSDNodeOrder
Lowest valid SDNodeOrder.
Definition: SelectionDAGBuilder.h:208
llvm::SwitchCG::BitTestCase
Definition: SwitchLoweringUtils.h:195
llvm::CodeGenOpt::Level
Level
Definition: CodeGen.h:52
llvm::SelectionDAGBuilder::resolveDanglingDebugInfo
void resolveDanglingDebugInfo(const Value *V, SDValue Val)
If we saw an earlier dbg_value referring to V, generate the debug data structures now that we've seen...
Definition: SelectionDAGBuilder.cpp:1248
llvm::ISD::FMUL
@ FMUL
Definition: ISDOpcodes.h:392
llvm::SwitchCG::BitTestBlock
Definition: SwitchLoweringUtils.h:208
llvm::SelectionDAGBuilder::HasTailCall
bool HasTailCall
This is set to true if a call in the current block has been translated as a tail call.
Definition: SelectionDAGBuilder.h:256
llvm::ISD::XOR
@ XOR
Definition: ISDOpcodes.h:668
llvm::SwitchCG::JumpTable
Definition: SwitchLoweringUtils.h:165
llvm::SelectionDAGBuilder::SPDescriptor
StackProtectorDescriptor SPDescriptor
A StackProtectorDescriptor structure used to communicate stack protector information in between Selec...
Definition: SelectionDAGBuilder.h:236
llvm::SelectionDAGBuilder::StatepointLoweringInfo::CLI
TargetLowering::CallLoweringInfo CLI
Information regarding the underlying call instruction.
Definition: SelectionDAGBuilder.h:422
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::SelectionDAGBuilder::StatepointLoweringInfo::DeoptState
ArrayRef< const Use > DeoptState
The deoptimization state associated with this gc.statepoint call, if any.
Definition: SelectionDAGBuilder.h:426
llvm::ResumeInst
Resume the propagation of an exception.
Definition: Instructions.h:4254
llvm::RegsForValue::AddInlineAsmOperands
void AddInlineAsmOperands(unsigned Code, bool HasMatching, unsigned MatchingIdx, const SDLoc &dl, SelectionDAG &DAG, std::vector< SDValue > &Ops) const
Add this value to the specified inlineasm node operand list.
Definition: SelectionDAGBuilder.cpp:977
llvm::SelectionDAGBuilder::visitSPDescriptorParent
void visitSPDescriptorParent(StackProtectorDescriptor &SPD, MachineBasicBlock *ParentBB)
Codegen a new tail for a stack protector check ParentMBB which has had its tail spliced into a stack ...
Definition: SelectionDAGBuilder.cpp:2684
std
Definition: BitVector.h:851
llvm::RegsForValue::append
void append(const RegsForValue &RHS)
Add the specified values to this one.
Definition: SelectionDAGBuilder.h:717
llvm::SelectionDAGBuilder::LowerCallTo
void LowerCallTo(const CallBase &CB, SDValue Callee, bool IsTailCall, bool IsMustTailCall, const BasicBlock *EHPadBB=nullptr)
Definition: SelectionDAGBuilder.cpp:7829
llvm::SelectionDAGBuilder::AA
AAResults * AA
Definition: SelectionDAGBuilder.h:211
llvm::None
constexpr std::nullopt_t None
Definition: None.h:27
llvm::SelectionDAGBuilder::StatepointLoweringInfo::StatepointInstr
const Instruction * StatepointInstr
The gc.statepoint instruction.
Definition: SelectionDAGBuilder.h:412
llvm::AMDGPU::SendMsg::Op
Op
Definition: SIDefines.h:348
llvm::RegsForValue::ValueVTs
SmallVector< EVT, 4 > ValueVTs
The value types of the values, which may not be legal, and may need be promoted or synthesized from o...
Definition: SelectionDAGBuilder.h:683
llvm::SelectionDAG::getDataLayout
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:469
ISDOpcodes.h
llvm::SelectionDAGBuilder::FuncInfo
FunctionLoweringInfo & FuncInfo
Information about the function as a whole.
Definition: SelectionDAGBuilder.h:243
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::TargetLibraryInfo
Provides information about what library functions are available for the current target.
Definition: TargetLibraryInfo.h:225
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition: SelectionDAGNodes.h:145
llvm::SelectionDAGBuilder::LowerCallSiteWithDeoptBundleImpl
void LowerCallSiteWithDeoptBundleImpl(const CallBase *Call, SDValue Callee, const BasicBlock *EHPadBB, bool VarArgDisallowed, bool ForceVoidReturnTy)
Definition: StatepointLowering.cpp:1161
llvm::RegsForValue::CallConv
Optional< CallingConv::ID > CallConv
Records if this value needs to be treated in an ABI dependant manner, different to normal type legali...
Definition: SelectionDAGBuilder.h:705
llvm::CleanupReturnInst
Definition: Instructions.h:4662
llvm::IndirectBrInst
Indirect Branch Instruction.
Definition: Instructions.h:3675
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:239
llvm::SelectionDAGBuilder::StatepointLoweringInfo::GCRelocates
SmallVector< const GCRelocateInst *, 16 > GCRelocates
The set of gc.relocate calls associated with this gc.statepoint.
Definition: SelectionDAGBuilder.h:406
llvm::StatepointFlags
StatepointFlags
The statepoint intrinsic accepts a set of flags as its third argument.
Definition: Statepoint.h:39
CodeGen.h
llvm::CatchPadInst
Definition: Instructions.h:4530
llvm::Instruction::BinaryOps
BinaryOps
Definition: Instruction.h:788
llvm::StatepointLoweringState
This class tracks both per-statepoint and per-selectiondag information.
Definition: StatepointLowering.h:33
llvm::ISD::FSUB
@ FSUB
Definition: ISDOpcodes.h:391
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition: ISDOpcodes.h:691
SmallVector.h
llvm::SelectionDAGBuilder::visitBitTestCase
void visitBitTestCase(SwitchCG::BitTestBlock &BB, MachineBasicBlock *NextMBB, BranchProbability BranchProbToNext, unsigned Reg, SwitchCG::BitTestCase &B, MachineBasicBlock *SwitchBB)
visitBitTestCase - this function produces one "bit test"
Definition: SelectionDAGBuilder.cpp:2864
llvm::ISD::FREM
@ FREM
Definition: ISDOpcodes.h:394
llvm::Instruction::getDebugLoc
const DebugLoc & getDebugLoc() const
Return the debug location for this node as a DebugLoc.
Definition: Instruction.h:354
llvm::ISD::MUL
@ MUL
Definition: ISDOpcodes.h:241
llvm::ISD::UREM
@ UREM
Definition: ISDOpcodes.h:245
N
#define N
llvm::ISD::SRL
@ SRL
Definition: ISDOpcodes.h:693
llvm::SelectionDAGBuilder::getNonRegisterValue
SDValue getNonRegisterValue(const Value *V)
getNonRegisterValue - Return an SDValue for the given Value, but don't look in FuncInfo....
Definition: SelectionDAGBuilder.cpp:1546
llvm::SelectionDAGBuilder::LowerDeoptimizingReturn
void LowerDeoptimizingReturn()
Definition: StatepointLowering.cpp:1339
llvm::SelectionDAGBuilder::FindMergedConditions
void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB, Instruction::BinaryOps Opc, BranchProbability TProb, BranchProbability FProb, bool InvertCond)
Definition: SelectionDAGBuilder.cpp:2235
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
llvm::CallBase
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Definition: InstrTypes.h:1174
llvm::RegsForValue::RegsForValue
RegsForValue()=default
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::CallInst
This class represents a function call, abstracting a target machine's calling convention.
Definition: Instructions.h:1473
llvm::ISD::FNEG
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition: ISDOpcodes.h:911
llvm::SelectionDAGBuilder::visitSPDescriptorFailure
void visitSPDescriptorFailure(StackProtectorDescriptor &SPD)
Codegen the failure basic block for a stack protector check.
Definition: SelectionDAGBuilder.cpp:2779
BB
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM BB
Definition: README.txt:39
llvm::UnreachableInst
This function has undefined behavior.
Definition: Instructions.h:4770
llvm::SelectionDAGBuilder::EmitBranchForMergedCondition
void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB, BranchProbability TProb, BranchProbability FProb, bool InvertCond)
EmitBranchForMergedCondition - Helper method for FindMergedConditions.
Definition: SelectionDAGBuilder.cpp:2188
llvm::SelectionDAGBuilder::SL
std::unique_ptr< SDAGSwitchLowering > SL
Definition: SelectionDAGBuilder.h:232
llvm::SwitchInst
Multiway switch.
Definition: Instructions.h:3277
llvm::DebugLoc
A debug info location.
Definition: DebugLoc.h:33
llvm::SelectionDAGBuilder::lowerInvokable
std::pair< SDValue, SDValue > lowerInvokable(TargetLowering::CallLoweringInfo &CLI, const BasicBlock *EHPadBB=nullptr)
Definition: SelectionDAGBuilder.cpp:7789
llvm::SelectionDAGBuilder::clear
void clear()
Clear out the current SelectionDAG and the associated state and prepare this SelectionDAGBuilder obje...
Definition: SelectionDAGBuilder.cpp:1056
llvm::BranchInst
Conditional or Unconditional Branch instruction.
Definition: Instructions.h:3133
llvm::CatchSwitchInst
Definition: Instructions.h:4311
llvm::SelectionDAGBuilder::visit
void visit(const Instruction &I)
Definition: SelectionDAGBuilder.cpp:1133
llvm::SelectionDAGBuilder::getCurDebugLoc
DebugLoc getCurDebugLoc() const
Definition: SelectionDAGBuilder.h:302
llvm::SelectionDAGBuilder::ShouldEmitAsBranches
bool ShouldEmitAsBranches(const std::vector< SwitchCG::CaseBlock > &Cases)
If the set of cases should be emitted as a series of branches, return true.
Definition: SelectionDAGBuilder.cpp:2366
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::RegsForValue::RegCount
SmallVector< unsigned, 4 > RegCount
This list holds the number of registers for each value.
Definition: SelectionDAGBuilder.h:701
llvm::SelectionDAGBuilder::getRoot
SDValue getRoot()
Similar to getMemoryRoot, but also flushes PendingConstrainedFP(Strict) items.
Definition: SelectionDAGBuilder.cpp:1108
llvm::SelectionDAGBuilder::UpdateSplitBlock
void UpdateSplitBlock(MachineBasicBlock *First, MachineBasicBlock *Last)
When an MBB was split during scheduling, update the references that need to refer to the last resulti...
Definition: SelectionDAGBuilder.cpp:3105
llvm::SelectionDAGBuilder::ExportFromCurrentBlock
void ExportFromCurrentBlock(const Value *V)
ExportFromCurrentBlock - If this condition isn't known to be exported from the current basic block,...
Definition: SelectionDAGBuilder.cpp:2112
llvm::SelectionDAGBuilder::populateCallLoweringInfo
void populateCallLoweringInfo(TargetLowering::CallLoweringInfo &CLI, const CallBase *Call, unsigned ArgIdx, unsigned NumArgs, SDValue Callee, Type *ReturnTy, bool IsPatchPoint)
Populate a CallLowerinInfo (into CLI) based on the properties of the call being lowered.
Definition: SelectionDAGBuilder.cpp:9438
llvm::ISD::MCSymbol
@ MCSymbol
Definition: ISDOpcodes.h:172
llvm::SelectionDAGBuilder::dropDanglingDebugInfo
void dropDanglingDebugInfo(const DILocalVariable *Variable, const DIExpression *Expr)
If we have dangling debug info that describes Variable, or an overlapping part of variable considerin...
Definition: SelectionDAGBuilder.cpp:1221
llvm::SwitchCG::CaseCluster
A cluster of case labels.
Definition: SwitchLoweringUtils.h:42
llvm::SelectionDAGBuilder::getControlRoot
SDValue getControlRoot()
Similar to getRoot, but instead of flushing all the PendingLoad items, flush all the PendingExports (...
Definition: SelectionDAGBuilder.cpp:1124
llvm::ISD::FDIV
@ FDIV
Definition: ISDOpcodes.h:393
llvm::SelectionDAGBuilder::GFI
GCFunctionInfo * GFI
Garbage collection metadata for the function.
Definition: SelectionDAGBuilder.h:249