37#define DEBUG_TYPE "fastpretileconfig"
68 int getStackSpaceFor(
Register VirtReg);
69 void InitializeTileConfigStackSpace();
84 return "Fast Tile Register Preconfigure";
95char X86FastPreTileConfig::ID = 0;
98 "Fast Tile Register Preconfigure",
false,
false)
110 for (; &*
I !=
A && &*
I !=
B; ++
I)
118int X86FastPreTileConfig::getStackSpaceFor(
Register VirtReg) {
120 int SS = StackSlotForVirtReg[VirtReg];
127 unsigned Size =
TRI->getSpillSize(RC);
128 Align Alignment =
TRI->getSpillAlign(RC);
129 int FrameIdx = MFI->CreateSpillStackObject(
Size, Alignment);
132 StackSlotForVirtReg[VirtReg] = FrameIdx;
143 for (
const MachineInstr &UseInst :
MRI->use_nodbg_instructions(VirtReg)) {
144 if (UseInst.getParent() !=
MBB) {
163void X86FastPreTileConfig::InitializeTileConfigStackSpace() {
167 if (
ST->hasAVX512()) {
168 Register Zmm =
MRI->createVirtualRegister(&X86::VR512RegClass);
172 }
else if (
ST->hasAVX2()) {
173 Register Ymm =
MRI->createVirtualRegister(&X86::VR256RegClass);
181 assert(
ST->hasSSE2() &&
"AMX should assume SSE2 enabled");
182 unsigned StoreOpc =
ST->hasAVX() ? X86::VMOVUPSmr : X86::MOVUPSmr;
183 Register Xmm =
MRI->createVirtualRegister(&X86::VR128RegClass);
204 int FI = getStackSpaceFor(VirtReg);
221 int FI = getStackSpaceFor(OrigReg);
235 TileReg =
MRI->createVirtualRegister(&RC);
239 unsigned Opc = X86::PTILELOADDV;
240 Register StrideReg =
MRI->createVirtualRegister(&X86::GR64_NOSPRegClass);
243 TII->get(X86::MOV64ri), StrideReg)
273 if (
MI.isDebugInstr() ||
MI.getNumOperands() < 3 || !
MI.isPseudo())
281 if (Reg.isVirtual() &&
282 MRI->getRegClass(Reg)->getID() == X86::TILERegClassID)
284 if (Reg >= X86::TMM0 && Reg <= X86::TMM7)
297 }
else if (
MI->isCopy()) {
298 TileReg =
MI->getOperand(1).getReg();
304 assert(
MI->isPHI() &&
"Unexpected PHI when get shape.");
329 Register StackAddrReg =
MRI->createVirtualRegister(&X86::GR64_NOSPRegClass);
331 TII->get(X86::PHI), StackAddrReg);
332 Register RowReg =
MRI->createVirtualRegister(&X86::GR16RegClass);
334 TII->get(X86::PHI), RowReg);
335 Register ColReg =
MRI->createVirtualRegister(&X86::GR16RegClass);
337 TII->get(X86::PHI), ColReg);
339 VisitedPHIs[&
PHI] = {RowReg, ColReg, StackAddrReg};
341 for (
unsigned I = 1, E =
PHI.getNumOperands();
I != E;
I += 2) {
352 if (TileDefMI->
isPHI()) {
354 if (VisitedPHIs.count(TileDefMI)) {
364 Register InRowReg = VisitedPHIs[TileDefMI].Row;
365 Register InColReg = VisitedPHIs[TileDefMI].Col;
366 Register InStackAddrReg = VisitedPHIs[TileDefMI].StackAddr;
373 convertPHI(TileDefMI->
getParent(), *TileDefMI);
397 int FI = getStackSpaceFor(InTileReg);
399 MRI->createVirtualRegister(&X86::GR64_NOSPRegClass);
401 TII->get(X86::LEA64r), InStackAddrReg)
409 Register StrideReg =
MRI->createVirtualRegister(&X86::GR64_NOSPRegClass);
421 PHI.eraseFromParent();
422 VisitedPHIs.erase(&
PHI);
428 MRI->getRegClass(MO.
getReg())->getID() == X86::TILERegClassID)
453 while (!PHIs.
empty()) {
460 for (
unsigned I = 1, E =
PHI->getNumOperands();
I != E;
I += 2) {
467 InMO = &
PHI->getOperand(
I);
497 while (!PHIs.
empty()) {
500 convertPHI(&
MBB, *
MI);
511 bool HasUnconfigTile =
false;
515 CfgSS = MFI->CreateStackObject(
ST->getTileConfigSize(),
516 ST->getTileConfigAlignment(),
false);
519 LastShapeMI =
nullptr;
527 if (
Reg.isVirtual() &&
528 MRI->getRegClass(Reg)->getID() == X86::TILERegClassID)
549 if (HasTileOperand(
MRI,
MI))
550 HasUnconfigTile =
true;
553 if (
MI.isCall() && HasUnconfigTile) {
558 I = ++
MI.getIterator();
560 HasUnconfigTile =
false;
623 if (mayLiveOut(TileReg, LastTileCfg))
624 spill(++
MI.getIterator(), TileReg,
false);
631 reload(
UseMI.getIterator(), TileReg, RowMO, ColMO);
636 reload(
UseMI.getIterator(), TileReg, RowMO, ColMO);
642 if (HasUnconfigTile) {
644 if (LastShapeMI ==
nullptr || LastShapeMI->
isPHI())
655bool X86FastPreTileConfig::runOnMachineFunction(
MachineFunction &MFunc) {
658 if (X86FI->getAMXProgModel() != AMXProgModelEnum::ManagedRA)
664 TII =
ST->getInstrInfo();
666 TRI =
ST->getRegisterInfo();
669 unsigned NumVirtRegs =
MRI->getNumVirtRegs();
671 StackSlotForVirtReg.resize(NumVirtRegs);
672 MayLiveAcrossBlocks.clear();
676 MayLiveAcrossBlocks.resize(NumVirtRegs * 3);
682 canonicalizePHIs(
MBB);
690 Change |= configBasicBlock(*
MBB);
694 InitializeTileConfigStackSpace();
696 StackSlotForVirtReg.clear();
701 return new X86FastPreTileConfig();
unsigned const MachineRegisterInfo * MRI
MachineInstrBuilder & UseMI
MachineInstrBuilder MachineInstrBuilder & DefMI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
const HexagonInstrInfo * TII
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Fast Tile Register static false bool dominates(MachineBasicBlock &MBB, MachineBasicBlock::const_iterator A, MachineBasicBlock::const_iterator B)
static bool isTileRegDef(MachineRegisterInfo *MRI, MachineInstr &MI)
Fast Tile Register Preconfigure
static ShapeT getShape(MachineRegisterInfo *MRI, Register TileReg)
static bool isTileDef(MachineRegisterInfo *MRI, MachineInstr &MI)
FunctionPass class - This class is used to implement most global optimizations.
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
Store the specified register of the given register class to the specified stack frame index.
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addFrameIndex(int Idx) const
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
Representation of each machine instruction.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
const MachineBasicBlock * getParent() const
unsigned getNumOperands() const
Retuns the total number of operands.
iterator_range< mop_iterator > operands()
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const MachineOperand & getOperand(unsigned i) const
MachineOperand class - Representation of each machine instruction operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void setReg(Register Reg)
Change the register this operand corresponds to.
void setIsKill(bool Val=true)
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Wrapper class representing virtual and physical registers.
static unsigned virtReg2Index(Register Reg)
Convert a virtual register number to a 0-based index.
constexpr bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
MachineOperand * getRow() const
MachineOperand * getCol() const
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ Fast
Attempts to make calls as fast as possible (e.g.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
FunctionPass * createX86FastPreTileConfigPass()
Return a pass that preconfig the tile registers before fast reg allocation.
auto reverse(ContainerTy &&C)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
static const MachineInstrBuilder & addOffset(const MachineInstrBuilder &MIB, int Offset)
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
static const MachineInstrBuilder & addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg)
addDirectMem - This function is used to add a direct memory reference to the current instruction – th...
This struct is a compact representation of a valid (non-zero power of two) alignment.