LLVM 20.0.0git
LoopVectorize.cpp
Go to the documentation of this file.
1//===- LoopVectorize.cpp - A Loop Vectorizer ------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This is the LLVM loop vectorizer. This pass modifies 'vectorizable' loops
10// and generates target-independent LLVM-IR.
11// The vectorizer uses the TargetTransformInfo analysis to estimate the costs
12// of instructions in order to estimate the profitability of vectorization.
13//
14// The loop vectorizer combines consecutive loop iterations into a single
15// 'wide' iteration. After this transformation the index is incremented
16// by the SIMD vector width, and not by one.
17//
18// This pass has three parts:
19// 1. The main loop pass that drives the different parts.
20// 2. LoopVectorizationLegality - A unit that checks for the legality
21// of the vectorization.
22// 3. InnerLoopVectorizer - A unit that performs the actual
23// widening of instructions.
24// 4. LoopVectorizationCostModel - A unit that checks for the profitability
25// of vectorization. It decides on the optimal vector width, which
26// can be one, if vectorization is not profitable.
27//
28// There is a development effort going on to migrate loop vectorizer to the
29// VPlan infrastructure and to introduce outer loop vectorization support (see
30// docs/VectorizationPlan.rst and
31// http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html). For this
32// purpose, we temporarily introduced the VPlan-native vectorization path: an
33// alternative vectorization path that is natively implemented on top of the
34// VPlan infrastructure. See EnableVPlanNativePath for enabling.
35//
36//===----------------------------------------------------------------------===//
37//
38// The reduction-variable vectorization is based on the paper:
39// D. Nuzman and R. Henderson. Multi-platform Auto-vectorization.
40//
41// Variable uniformity checks are inspired by:
42// Karrenberg, R. and Hack, S. Whole Function Vectorization.
43//
44// The interleaved access vectorization is based on the paper:
45// Dorit Nuzman, Ira Rosen and Ayal Zaks. Auto-Vectorization of Interleaved
46// Data for SIMD
47//
48// Other ideas/concepts are from:
49// A. Zaks and D. Nuzman. Autovectorization in GCC-two years later.
50//
51// S. Maleki, Y. Gao, M. Garzaran, T. Wong and D. Padua. An Evaluation of
52// Vectorizing Compilers.
53//
54//===----------------------------------------------------------------------===//
55
58#include "VPRecipeBuilder.h"
59#include "VPlan.h"
60#include "VPlanAnalysis.h"
61#include "VPlanHCFGBuilder.h"
62#include "VPlanPatternMatch.h"
63#include "VPlanTransforms.h"
64#include "VPlanUtils.h"
65#include "VPlanVerifier.h"
66#include "llvm/ADT/APInt.h"
67#include "llvm/ADT/ArrayRef.h"
68#include "llvm/ADT/DenseMap.h"
70#include "llvm/ADT/Hashing.h"
71#include "llvm/ADT/MapVector.h"
72#include "llvm/ADT/STLExtras.h"
75#include "llvm/ADT/Statistic.h"
76#include "llvm/ADT/StringRef.h"
77#include "llvm/ADT/Twine.h"
78#include "llvm/ADT/TypeSwitch.h"
83#include "llvm/Analysis/CFG.h"
99#include "llvm/IR/Attributes.h"
100#include "llvm/IR/BasicBlock.h"
101#include "llvm/IR/CFG.h"
102#include "llvm/IR/Constant.h"
103#include "llvm/IR/Constants.h"
104#include "llvm/IR/DataLayout.h"
105#include "llvm/IR/DebugInfo.h"
106#include "llvm/IR/DebugLoc.h"
107#include "llvm/IR/DerivedTypes.h"
109#include "llvm/IR/Dominators.h"
110#include "llvm/IR/Function.h"
111#include "llvm/IR/IRBuilder.h"
112#include "llvm/IR/InstrTypes.h"
113#include "llvm/IR/Instruction.h"
114#include "llvm/IR/Instructions.h"
116#include "llvm/IR/Intrinsics.h"
117#include "llvm/IR/MDBuilder.h"
118#include "llvm/IR/Metadata.h"
119#include "llvm/IR/Module.h"
120#include "llvm/IR/Operator.h"
121#include "llvm/IR/PatternMatch.h"
123#include "llvm/IR/Type.h"
124#include "llvm/IR/Use.h"
125#include "llvm/IR/User.h"
126#include "llvm/IR/Value.h"
127#include "llvm/IR/Verifier.h"
128#include "llvm/Support/Casting.h"
130#include "llvm/Support/Debug.h"
145#include <algorithm>
146#include <cassert>
147#include <cstdint>
148#include <functional>
149#include <iterator>
150#include <limits>
151#include <memory>
152#include <string>
153#include <tuple>
154#include <utility>
155
156using namespace llvm;
157
158#define LV_NAME "loop-vectorize"
159#define DEBUG_TYPE LV_NAME
160
161#ifndef NDEBUG
162const char VerboseDebug[] = DEBUG_TYPE "-verbose";
163#endif
164
165/// @{
166/// Metadata attribute names
167const char LLVMLoopVectorizeFollowupAll[] = "llvm.loop.vectorize.followup_all";
169 "llvm.loop.vectorize.followup_vectorized";
171 "llvm.loop.vectorize.followup_epilogue";
172/// @}
173
174STATISTIC(LoopsVectorized, "Number of loops vectorized");
175STATISTIC(LoopsAnalyzed, "Number of loops analyzed for vectorization");
176STATISTIC(LoopsEpilogueVectorized, "Number of epilogues vectorized");
177
179 "enable-epilogue-vectorization", cl::init(true), cl::Hidden,
180 cl::desc("Enable vectorization of epilogue loops."));
181
183 "epilogue-vectorization-force-VF", cl::init(1), cl::Hidden,
184 cl::desc("When epilogue vectorization is enabled, and a value greater than "
185 "1 is specified, forces the given VF for all applicable epilogue "
186 "loops."));
187
189 "epilogue-vectorization-minimum-VF", cl::Hidden,
190 cl::desc("Only loops with vectorization factor equal to or larger than "
191 "the specified value are considered for epilogue vectorization."));
192
193/// Loops with a known constant trip count below this number are vectorized only
194/// if no scalar iteration overheads are incurred.
196 "vectorizer-min-trip-count", cl::init(16), cl::Hidden,
197 cl::desc("Loops with a constant trip count that is smaller than this "
198 "value are vectorized only if no scalar iteration overheads "
199 "are incurred."));
200
202 "vectorize-memory-check-threshold", cl::init(128), cl::Hidden,
203 cl::desc("The maximum allowed number of runtime memory checks"));
204
205// Option prefer-predicate-over-epilogue indicates that an epilogue is undesired,
206// that predication is preferred, and this lists all options. I.e., the
207// vectorizer will try to fold the tail-loop (epilogue) into the vector body
208// and predicate the instructions accordingly. If tail-folding fails, there are
209// different fallback strategies depending on these values:
211 enum Option {
215 };
216} // namespace PreferPredicateTy
217
219 "prefer-predicate-over-epilogue",
222 cl::desc("Tail-folding and predication preferences over creating a scalar "
223 "epilogue loop."),
225 "scalar-epilogue",
226 "Don't tail-predicate loops, create scalar epilogue"),
228 "predicate-else-scalar-epilogue",
229 "prefer tail-folding, create scalar epilogue if tail "
230 "folding fails."),
232 "predicate-dont-vectorize",
233 "prefers tail-folding, don't attempt vectorization if "
234 "tail-folding fails.")));
235
237 "force-tail-folding-style", cl::desc("Force the tail folding style"),
238 cl::init(TailFoldingStyle::None),
240 clEnumValN(TailFoldingStyle::None, "none", "Disable tail folding"),
242 TailFoldingStyle::Data, "data",
243 "Create lane mask for data only, using active.lane.mask intrinsic"),
244 clEnumValN(TailFoldingStyle::DataWithoutLaneMask,
245 "data-without-lane-mask",
246 "Create lane mask with compare/stepvector"),
247 clEnumValN(TailFoldingStyle::DataAndControlFlow, "data-and-control",
248 "Create lane mask using active.lane.mask intrinsic, and use "
249 "it for both data and control flow"),
250 clEnumValN(TailFoldingStyle::DataAndControlFlowWithoutRuntimeCheck,
251 "data-and-control-without-rt-check",
252 "Similar to data-and-control, but remove the runtime check"),
253 clEnumValN(TailFoldingStyle::DataWithEVL, "data-with-evl",
254 "Use predicated EVL instructions for tail folding. If EVL "
255 "is unsupported, fallback to data-without-lane-mask.")));
256
258 "vectorizer-maximize-bandwidth", cl::init(false), cl::Hidden,
259 cl::desc("Maximize bandwidth when selecting vectorization factor which "
260 "will be determined by the smallest type in loop."));
261
263 "enable-interleaved-mem-accesses", cl::init(false), cl::Hidden,
264 cl::desc("Enable vectorization on interleaved memory accesses in a loop"));
265
266/// An interleave-group may need masking if it resides in a block that needs
267/// predication, or in order to mask away gaps.
269 "enable-masked-interleaved-mem-accesses", cl::init(false), cl::Hidden,
270 cl::desc("Enable vectorization on masked interleaved memory accesses in a loop"));
271
273 "force-target-num-scalar-regs", cl::init(0), cl::Hidden,
274 cl::desc("A flag that overrides the target's number of scalar registers."));
275
277 "force-target-num-vector-regs", cl::init(0), cl::Hidden,
278 cl::desc("A flag that overrides the target's number of vector registers."));
279
281 "force-target-max-scalar-interleave", cl::init(0), cl::Hidden,
282 cl::desc("A flag that overrides the target's max interleave factor for "
283 "scalar loops."));
284
286 "force-target-max-vector-interleave", cl::init(0), cl::Hidden,
287 cl::desc("A flag that overrides the target's max interleave factor for "
288 "vectorized loops."));
289
291 "force-target-instruction-cost", cl::init(0), cl::Hidden,
292 cl::desc("A flag that overrides the target's expected cost for "
293 "an instruction to a single constant value. Mostly "
294 "useful for getting consistent testing."));
295
297 "force-target-supports-scalable-vectors", cl::init(false), cl::Hidden,
298 cl::desc(
299 "Pretend that scalable vectors are supported, even if the target does "
300 "not support them. This flag should only be used for testing."));
301
303 "small-loop-cost", cl::init(20), cl::Hidden,
304 cl::desc(
305 "The cost of a loop that is considered 'small' by the interleaver."));
306
308 "loop-vectorize-with-block-frequency", cl::init(true), cl::Hidden,
309 cl::desc("Enable the use of the block frequency analysis to access PGO "
310 "heuristics minimizing code growth in cold regions and being more "
311 "aggressive in hot regions."));
312
313// Runtime interleave loops for load/store throughput.
315 "enable-loadstore-runtime-interleave", cl::init(true), cl::Hidden,
316 cl::desc(
317 "Enable runtime interleaving until load/store ports are saturated"));
318
319/// The number of stores in a loop that are allowed to need predication.
321 "vectorize-num-stores-pred", cl::init(1), cl::Hidden,
322 cl::desc("Max number of stores to be predicated behind an if."));
323
325 "enable-ind-var-reg-heur", cl::init(true), cl::Hidden,
326 cl::desc("Count the induction variable only once when interleaving"));
327
329 "enable-cond-stores-vec", cl::init(true), cl::Hidden,
330 cl::desc("Enable if predication of stores during vectorization."));
331
333 "max-nested-scalar-reduction-interleave", cl::init(2), cl::Hidden,
334 cl::desc("The maximum interleave count to use when interleaving a scalar "
335 "reduction in a nested loop."));
336
337static cl::opt<bool>
338 PreferInLoopReductions("prefer-inloop-reductions", cl::init(false),
340 cl::desc("Prefer in-loop vector reductions, "
341 "overriding the targets preference."));
342
344 "force-ordered-reductions", cl::init(false), cl::Hidden,
345 cl::desc("Enable the vectorisation of loops with in-order (strict) "
346 "FP reductions"));
347
349 "prefer-predicated-reduction-select", cl::init(false), cl::Hidden,
350 cl::desc(
351 "Prefer predicating a reduction operation over an after loop select."));
352
353namespace llvm {
355 "enable-vplan-native-path", cl::Hidden,
356 cl::desc("Enable VPlan-native vectorization path with "
357 "support for outer loop vectorization."));
358} // namespace llvm
359
360// This flag enables the stress testing of the VPlan H-CFG construction in the
361// VPlan-native vectorization path. It must be used in conjuction with
362// -enable-vplan-native-path. -vplan-verify-hcfg can also be used to enable the
363// verification of the H-CFGs built.
365 "vplan-build-stress-test", cl::init(false), cl::Hidden,
366 cl::desc(
367 "Build VPlan for every supported loop nest in the function and bail "
368 "out right after the build (stress test the VPlan H-CFG construction "
369 "in the VPlan-native vectorization path)."));
370
372 "interleave-loops", cl::init(true), cl::Hidden,
373 cl::desc("Enable loop interleaving in Loop vectorization passes"));
375 "vectorize-loops", cl::init(true), cl::Hidden,
376 cl::desc("Run the Loop vectorization passes"));
377
379 "force-widen-divrem-via-safe-divisor", cl::Hidden,
380 cl::desc(
381 "Override cost based safe divisor widening for div/rem instructions"));
382
384 "vectorizer-maximize-bandwidth-for-vector-calls", cl::init(true),
386 cl::desc("Try wider VFs if they enable the use of vector variants"));
387
389 "enable-early-exit-vectorization", cl::init(false), cl::Hidden,
390 cl::desc(
391 "Enable vectorization of early exit loops with uncountable exits."));
392
393// Likelyhood of bypassing the vectorized loop because assumptions about SCEV
394// variables not overflowing do not hold. See `emitSCEVChecks`.
395static constexpr uint32_t SCEVCheckBypassWeights[] = {1, 127};
396// Likelyhood of bypassing the vectorized loop because pointers overlap. See
397// `emitMemRuntimeChecks`.
398static constexpr uint32_t MemCheckBypassWeights[] = {1, 127};
399// Likelyhood of bypassing the vectorized loop because there are zero trips left
400// after prolog. See `emitIterationCountCheck`.
401static constexpr uint32_t MinItersBypassWeights[] = {1, 127};
402
403/// A helper function that returns true if the given type is irregular. The
404/// type is irregular if its allocated size doesn't equal the store size of an
405/// element of the corresponding vector type.
406static bool hasIrregularType(Type *Ty, const DataLayout &DL) {
407 // Determine if an array of N elements of type Ty is "bitcast compatible"
408 // with a <N x Ty> vector.
409 // This is only true if there is no padding between the array elements.
410 return DL.getTypeAllocSizeInBits(Ty) != DL.getTypeSizeInBits(Ty);
411}
412
413/// Returns "best known" trip count for the specified loop \p L as defined by
414/// the following procedure:
415/// 1) Returns exact trip count if it is known.
416/// 2) Returns expected trip count according to profile data if any.
417/// 3) Returns upper bound estimate if known, and if \p CanUseConstantMax.
418/// 4) Returns std::nullopt if all of the above failed.
419static std::optional<unsigned>
421 bool CanUseConstantMax = true) {
422 // Check if exact trip count is known.
423 if (unsigned ExpectedTC = PSE.getSE()->getSmallConstantTripCount(L))
424 return ExpectedTC;
425
426 // Check if there is an expected trip count available from profile data.
428 if (auto EstimatedTC = getLoopEstimatedTripCount(L))
429 return *EstimatedTC;
430
431 if (!CanUseConstantMax)
432 return std::nullopt;
433
434 // Check if upper bound estimate is known.
435 if (unsigned ExpectedTC = PSE.getSmallConstantMaxTripCount())
436 return ExpectedTC;
437
438 return std::nullopt;
439}
440
441namespace {
442// Forward declare GeneratedRTChecks.
443class GeneratedRTChecks;
444
445using SCEV2ValueTy = DenseMap<const SCEV *, Value *>;
446} // namespace
447
448namespace llvm {
449
451
452/// InnerLoopVectorizer vectorizes loops which contain only one basic
453/// block to a specified vectorization factor (VF).
454/// This class performs the widening of scalars into vectors, or multiple
455/// scalars. This class also implements the following features:
456/// * It inserts an epilogue loop for handling loops that don't have iteration
457/// counts that are known to be a multiple of the vectorization factor.
458/// * It handles the code generation for reduction variables.
459/// * Scalarization (implementation using scalars) of un-vectorizable
460/// instructions.
461/// InnerLoopVectorizer does not perform any vectorization-legality
462/// checks, and relies on the caller to check for the different legality
463/// aspects. The InnerLoopVectorizer relies on the
464/// LoopVectorizationLegality class to provide information about the induction
465/// and reduction variables that were found to a given vectorization factor.
467public:
470 const TargetLibraryInfo *TLI,
474 unsigned UnrollFactor, LoopVectorizationLegality *LVL,
476 ProfileSummaryInfo *PSI, GeneratedRTChecks &RTChecks,
477 VPlan &Plan)
478 : OrigLoop(OrigLoop), PSE(PSE), LI(LI), DT(DT), TLI(TLI), TTI(TTI),
479 AC(AC), ORE(ORE), VF(VecWidth),
481 Builder(PSE.getSE()->getContext()), Legal(LVL), Cost(CM), BFI(BFI),
483 VectorPHVPB(Plan.getEntry()->getSingleSuccessor()) {
484 // Query this against the original loop and save it here because the profile
485 // of the original loop header may change as the transformation happens.
488 }
489
490 virtual ~InnerLoopVectorizer() = default;
491
492 /// Create a new empty loop that will contain vectorized instructions later
493 /// on, while the old loop will be used as the scalar remainder. Control flow
494 /// is generated around the vectorized (and scalar epilogue) loops consisting
495 /// of various checks and bypasses. Return the pre-header block of the new
496 /// loop. In the case of epilogue vectorization, this function is overriden to
497 /// handle the more complex control flow around the loops. \p ExpandedSCEVs is
498 /// used to look up SCEV expansions for expressions needed during skeleton
499 /// creation.
500 virtual BasicBlock *
501 createVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs);
502
503 /// Fix the vectorized code, taking care of header phi's, and more.
505
506 // Return true if any runtime check is added.
508
509 /// A helper function to scalarize a single Instruction in the innermost loop.
510 /// Generates a sequence of scalar instances for each lane between \p MinLane
511 /// and \p MaxLane, times each part between \p MinPart and \p MaxPart,
512 /// inclusive. Uses the VPValue operands from \p RepRecipe instead of \p
513 /// Instr's operands.
514 void scalarizeInstruction(const Instruction *Instr,
515 VPReplicateRecipe *RepRecipe, const VPLane &Lane,
516 VPTransformState &State);
517
518 /// Fix the non-induction PHIs in \p Plan.
520
521 /// Returns the original loop trip count.
522 Value *getTripCount() const { return TripCount; }
523
524 /// Used to set the trip count after ILV's construction and after the
525 /// preheader block has been executed. Note that this always holds the trip
526 /// count of the original loop for both main loop and epilogue vectorization.
527 void setTripCount(Value *TC) { TripCount = TC; }
528
529 // Retrieve the additional bypass value associated with an original
530 /// induction header phi.
532 return Induction2AdditionalBypassValue.at(OrigPhi);
533 }
534
535 /// Return the additional bypass block which targets the scalar loop by
536 /// skipping the epilogue loop after completing the main loop.
539 "Trying to access AdditionalBypassBlock but it has not been set");
541 }
542
543protected:
545
546 /// Set up the values of the IVs correctly when exiting the vector loop.
547 virtual void fixupIVUsers(PHINode *OrigPhi, const InductionDescriptor &II,
548 Value *VectorTripCount, BasicBlock *MiddleBlock,
549 VPTransformState &State);
550
551 /// Iteratively sink the scalarized operands of a predicated instruction into
552 /// the block that was created for it.
553 void sinkScalarOperands(Instruction *PredInst);
554
555 /// Returns (and creates if needed) the trip count of the widened loop.
557
558 /// Emit a bypass check to see if the vector trip count is zero, including if
559 /// it overflows.
561
562 /// Emit a bypass check to see if all of the SCEV assumptions we've
563 /// had to make are correct. Returns the block containing the checks or
564 /// nullptr if no checks have been added.
566
567 /// Emit bypass checks to check any memory assumptions we may have made.
568 /// Returns the block containing the checks or nullptr if no checks have been
569 /// added.
571
572 /// Emit basic blocks (prefixed with \p Prefix) for the iteration check,
573 /// vector loop preheader, middle block and scalar preheader.
575
576 /// Create and record the values for induction variables to resume coming from
577 /// the additional bypass block.
578 void createInductionAdditionalBypassValues(const SCEV2ValueTy &ExpandedSCEVs,
579 Value *MainVectorTripCount);
580
581 /// Allow subclasses to override and print debug traces before/after vplan
582 /// execution, when trace information is requested.
583 virtual void printDebugTracesAtStart() {}
584 virtual void printDebugTracesAtEnd() {}
585
586 /// Introduces a new VPIRBasicBlock for \p CheckIRBB to Plan between the
587 /// vector preheader and its predecessor, also connecting the new block to the
588 /// scalar preheader.
589 void introduceCheckBlockInVPlan(BasicBlock *CheckIRBB);
590
591 /// The original loop.
593
594 /// A wrapper around ScalarEvolution used to add runtime SCEV checks. Applies
595 /// dynamic knowledge to simplify SCEV expressions and converts them to a
596 /// more usable form.
598
599 /// Loop Info.
601
602 /// Dominator Tree.
604
605 /// Target Library Info.
607
608 /// Target Transform Info.
610
611 /// Assumption Cache.
613
614 /// Interface to emit optimization remarks.
616
617 /// The vectorization SIMD factor to use. Each vector will have this many
618 /// vector elements.
620
622
623 /// The vectorization unroll factor to use. Each scalar is vectorized to this
624 /// many different vector instructions.
625 unsigned UF;
626
627 /// The builder that we use
629
630 // --- Vectorization state ---
631
632 /// The vector-loop preheader.
634
635 /// The scalar-loop preheader.
637
638 /// Middle Block between the vector and the scalar.
640
641 /// A list of all bypass blocks. The first block is the entry of the loop.
643
644 /// Store instructions that were predicated.
646
647 /// Trip count of the original loop.
648 Value *TripCount = nullptr;
649
650 /// Trip count of the widened loop (TripCount - TripCount % (VF*UF))
652
653 /// The legality analysis.
655
656 /// The profitablity analysis.
658
659 // Record whether runtime checks are added.
660 bool AddedSafetyChecks = false;
661
662 /// BFI and PSI are used to check for profile guided size optimizations.
665
666 // Whether this loop should be optimized for size based on profile guided size
667 // optimizatios.
669
670 /// Structure to hold information about generated runtime checks, responsible
671 /// for cleaning the checks, if vectorization turns out unprofitable.
672 GeneratedRTChecks &RTChecks;
673
674 /// Mapping of induction phis to their additional bypass values. They
675 /// need to be added as operands to phi nodes in the scalar loop preheader
676 /// after the epilogue skeleton has been created.
678
679 /// The additional bypass block which conditionally skips over the epilogue
680 /// loop after executing the main loop. Needed to resume inductions and
681 /// reductions during epilogue vectorization.
683
685
686 /// The vector preheader block of \p Plan, used as target for check blocks
687 /// introduced during skeleton creation.
689};
690
691/// Encapsulate information regarding vectorization of a loop and its epilogue.
692/// This information is meant to be updated and used across two stages of
693/// epilogue vectorization.
696 unsigned MainLoopUF = 0;
698 unsigned EpilogueUF = 0;
703 Value *TripCount = nullptr;
706
708 ElementCount EVF, unsigned EUF,
710 : MainLoopVF(MVF), MainLoopUF(MUF), EpilogueVF(EVF), EpilogueUF(EUF),
712 assert(EUF == 1 &&
713 "A high UF for the epilogue loop is likely not beneficial.");
714 }
715};
716
717/// An extension of the inner loop vectorizer that creates a skeleton for a
718/// vectorized loop that has its epilogue (residual) also vectorized.
719/// The idea is to run the vplan on a given loop twice, firstly to setup the
720/// skeleton and vectorize the main loop, and secondly to complete the skeleton
721/// from the first step and vectorize the epilogue. This is achieved by
722/// deriving two concrete strategy classes from this base class and invoking
723/// them in succession from the loop vectorizer planner.
725public:
733 GeneratedRTChecks &Checks, VPlan &Plan)
735 EPI.MainLoopVF, EPI.MainLoopVF, EPI.MainLoopUF, LVL,
736 CM, BFI, PSI, Checks, Plan),
737 EPI(EPI) {}
738
739 // Override this function to handle the more complex control flow around the
740 // three loops.
741 BasicBlock *
742 createVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs) final {
743 return createEpilogueVectorizedLoopSkeleton(ExpandedSCEVs);
744 }
745
746 /// The interface for creating a vectorized skeleton using one of two
747 /// different strategies, each corresponding to one execution of the vplan
748 /// as described above.
749 virtual BasicBlock *
750 createEpilogueVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs) = 0;
751
752 /// Holds and updates state information required to vectorize the main loop
753 /// and its epilogue in two separate passes. This setup helps us avoid
754 /// regenerating and recomputing runtime safety checks. It also helps us to
755 /// shorten the iteration-count-check path length for the cases where the
756 /// iteration count of the loop is so small that the main vector loop is
757 /// completely skipped.
759};
760
761/// A specialized derived class of inner loop vectorizer that performs
762/// vectorization of *main* loops in the process of vectorizing loops and their
763/// epilogues.
765public:
773 GeneratedRTChecks &Check, VPlan &Plan)
775 EPI, LVL, CM, BFI, PSI, Check, Plan) {}
776 /// Implements the interface for creating a vectorized skeleton using the
777 /// *main loop* strategy (ie the first pass of vplan execution).
778 BasicBlock *
779 createEpilogueVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs) final;
780
781protected:
782 /// Emits an iteration count bypass check once for the main loop (when \p
783 /// ForEpilogue is false) and once for the epilogue loop (when \p
784 /// ForEpilogue is true).
785 BasicBlock *emitIterationCountCheck(BasicBlock *Bypass, bool ForEpilogue);
786 void printDebugTracesAtStart() override;
787 void printDebugTracesAtEnd() override;
788
790 Value *VectorTripCount, BasicBlock *MiddleBlock,
791 VPTransformState &State) override {};
792};
793
794// A specialized derived class of inner loop vectorizer that performs
795// vectorization of *epilogue* loops in the process of vectorizing loops and
796// their epilogues.
798public:
806 GeneratedRTChecks &Checks, VPlan &Plan)
808 EPI, LVL, CM, BFI, PSI, Checks, Plan) {
810 }
811 /// Implements the interface for creating a vectorized skeleton using the
812 /// *epilogue loop* strategy (ie the second pass of vplan execution).
813 BasicBlock *
814 createEpilogueVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs) final;
815
816protected:
817 /// Emits an iteration count bypass check after the main vector loop has
818 /// finished to see if there are any iterations left to execute by either
819 /// the vector epilogue or the scalar epilogue.
821 BasicBlock *Bypass,
822 BasicBlock *Insert);
823 void printDebugTracesAtStart() override;
824 void printDebugTracesAtEnd() override;
825};
826} // end namespace llvm
827
828/// Look for a meaningful debug location on the instruction or its operands.
830 if (!I)
831 return DebugLoc();
832
833 DebugLoc Empty;
834 if (I->getDebugLoc() != Empty)
835 return I->getDebugLoc();
836
837 for (Use &Op : I->operands()) {
838 if (Instruction *OpInst = dyn_cast<Instruction>(Op))
839 if (OpInst->getDebugLoc() != Empty)
840 return OpInst->getDebugLoc();
841 }
842
843 return I->getDebugLoc();
844}
845
846/// Write a \p DebugMsg about vectorization to the debug output stream. If \p I
847/// is passed, the message relates to that particular instruction.
848#ifndef NDEBUG
849static void debugVectorizationMessage(const StringRef Prefix,
850 const StringRef DebugMsg,
851 Instruction *I) {
852 dbgs() << "LV: " << Prefix << DebugMsg;
853 if (I != nullptr)
854 dbgs() << " " << *I;
855 else
856 dbgs() << '.';
857 dbgs() << '\n';
858}
859#endif
860
861/// Create an analysis remark that explains why vectorization failed
862///
863/// \p PassName is the name of the pass (e.g. can be AlwaysPrint). \p
864/// RemarkName is the identifier for the remark. If \p I is passed it is an
865/// instruction that prevents vectorization. Otherwise \p TheLoop is used for
866/// the location of the remark. If \p DL is passed, use it as debug location for
867/// the remark. \return the remark object that can be streamed to.
869createLVAnalysis(const char *PassName, StringRef RemarkName, Loop *TheLoop,
870 Instruction *I, DebugLoc DL = {}) {
871 Value *CodeRegion = I ? I->getParent() : TheLoop->getHeader();
872 // If debug location is attached to the instruction, use it. Otherwise if DL
873 // was not provided, use the loop's.
874 if (I && I->getDebugLoc())
875 DL = I->getDebugLoc();
876 else if (!DL)
877 DL = TheLoop->getStartLoc();
878
879 return OptimizationRemarkAnalysis(PassName, RemarkName, DL, CodeRegion);
880}
881
882namespace llvm {
883
884/// Return a value for Step multiplied by VF.
886 int64_t Step) {
887 assert(Ty->isIntegerTy() && "Expected an integer step");
888 return B.CreateElementCount(Ty, VF.multiplyCoefficientBy(Step));
889}
890
891/// Return the runtime value for VF.
893 return B.CreateElementCount(Ty, VF);
894}
895
897 const StringRef OREMsg, const StringRef ORETag,
898 OptimizationRemarkEmitter *ORE, Loop *TheLoop,
899 Instruction *I) {
900 LLVM_DEBUG(debugVectorizationMessage("Not vectorizing: ", DebugMsg, I));
901 LoopVectorizeHints Hints(TheLoop, true /* doesn't matter */, *ORE);
902 ORE->emit(
903 createLVAnalysis(Hints.vectorizeAnalysisPassName(), ORETag, TheLoop, I)
904 << "loop not vectorized: " << OREMsg);
905}
906
907/// Reports an informative message: print \p Msg for debugging purposes as well
908/// as an optimization remark. Uses either \p I as location of the remark, or
909/// otherwise \p TheLoop. If \p DL is passed, use it as debug location for the
910/// remark. If \p DL is passed, use it as debug location for the remark.
911static void reportVectorizationInfo(const StringRef Msg, const StringRef ORETag,
913 Loop *TheLoop, Instruction *I = nullptr,
914 DebugLoc DL = {}) {
916 LoopVectorizeHints Hints(TheLoop, true /* doesn't matter */, *ORE);
917 ORE->emit(createLVAnalysis(Hints.vectorizeAnalysisPassName(), ORETag, TheLoop,
918 I, DL)
919 << Msg);
920}
921
922/// Report successful vectorization of the loop. In case an outer loop is
923/// vectorized, prepend "outer" to the vectorization remark.
925 VectorizationFactor VF, unsigned IC) {
927 "Vectorizing: ", TheLoop->isInnermost() ? "innermost loop" : "outer loop",
928 nullptr));
929 StringRef LoopType = TheLoop->isInnermost() ? "" : "outer ";
930 ORE->emit([&]() {
931 return OptimizationRemark(LV_NAME, "Vectorized", TheLoop->getStartLoc(),
932 TheLoop->getHeader())
933 << "vectorized " << LoopType << "loop (vectorization width: "
934 << ore::NV("VectorizationFactor", VF.Width)
935 << ", interleaved count: " << ore::NV("InterleaveCount", IC) << ")";
936 });
937}
938
939} // end namespace llvm
940
941namespace llvm {
942
943// Loop vectorization cost-model hints how the scalar epilogue loop should be
944// lowered.
946
947 // The default: allowing scalar epilogues.
949
950 // Vectorization with OptForSize: don't allow epilogues.
952
953 // A special case of vectorisation with OptForSize: loops with a very small
954 // trip count are considered for vectorization under OptForSize, thereby
955 // making sure the cost of their loop body is dominant, free of runtime
956 // guards and scalar iteration overheads.
958
959 // Loop hint predicate indicating an epilogue is undesired.
961
962 // Directive indicating we must either tail fold or not vectorize
965
966using InstructionVFPair = std::pair<Instruction *, ElementCount>;
967
968/// LoopVectorizationCostModel - estimates the expected speedups due to
969/// vectorization.
970/// In many cases vectorization is not profitable. This can happen because of
971/// a number of reasons. In this class we mainly attempt to predict the
972/// expected speedup/slowdowns due to the supported instruction set. We use the
973/// TargetTransformInfo to query the different backends for the cost of
974/// different operations.
977
978public:
988 : ScalarEpilogueStatus(SEL), TheLoop(L), PSE(PSE), LI(LI), Legal(Legal),
989 TTI(TTI), TLI(TLI), DB(DB), AC(AC), ORE(ORE), TheFunction(F),
990 Hints(Hints), InterleaveInfo(IAI) {}
991
992 /// \return An upper bound for the vectorization factors (both fixed and
993 /// scalable). If the factors are 0, vectorization and interleaving should be
994 /// avoided up front.
995 FixedScalableVFPair computeMaxVF(ElementCount UserVF, unsigned UserIC);
996
997 /// \return True if runtime checks are required for vectorization, and false
998 /// otherwise.
1000
1001 /// Setup cost-based decisions for user vectorization factor.
1002 /// \return true if the UserVF is a feasible VF to be chosen.
1006 return expectedCost(UserVF).isValid();
1007 }
1008
1009 /// \return The size (in bits) of the smallest and widest types in the code
1010 /// that needs to be vectorized. We ignore values that remain scalar such as
1011 /// 64 bit loop indices.
1012 std::pair<unsigned, unsigned> getSmallestAndWidestTypes();
1013
1014 /// \return The desired interleave count.
1015 /// If interleave count has been specified by metadata it will be returned.
1016 /// Otherwise, the interleave count is computed and returned. VF and LoopCost
1017 /// are the selected vectorization factor and the cost of the selected VF.
1018 unsigned selectInterleaveCount(ElementCount VF, InstructionCost LoopCost);
1019
1020 /// Memory access instruction may be vectorized in more than one way.
1021 /// Form of instruction after vectorization depends on cost.
1022 /// This function takes cost-based decisions for Load/Store instructions
1023 /// and collects them in a map. This decisions map is used for building
1024 /// the lists of loop-uniform and loop-scalar instructions.
1025 /// The calculated cost is saved with widening decision in order to
1026 /// avoid redundant calculations.
1028
1029 /// A call may be vectorized in different ways depending on whether we have
1030 /// vectorized variants available and whether the target supports masking.
1031 /// This function analyzes all calls in the function at the supplied VF,
1032 /// makes a decision based on the costs of available options, and stores that
1033 /// decision in a map for use in planning and plan execution.
1035
1036 /// A struct that represents some properties of the register usage
1037 /// of a loop.
1039 /// Holds the number of loop invariant values that are used in the loop.
1040 /// The key is ClassID of target-provided register class.
1042 /// Holds the maximum number of concurrent live intervals in the loop.
1043 /// The key is ClassID of target-provided register class.
1045 };
1046
1047 /// \return Returns information about the register usages of the loop for the
1048 /// given vectorization factors.
1051
1052 /// Collect values we want to ignore in the cost model.
1053 void collectValuesToIgnore();
1054
1055 /// Collect all element types in the loop for which widening is needed.
1057
1058 /// Split reductions into those that happen in the loop, and those that happen
1059 /// outside. In loop reductions are collected into InLoopReductions.
1061
1062 /// Returns true if we should use strict in-order reductions for the given
1063 /// RdxDesc. This is true if the -enable-strict-reductions flag is passed,
1064 /// the IsOrdered flag of RdxDesc is set and we do not allow reordering
1065 /// of FP operations.
1066 bool useOrderedReductions(const RecurrenceDescriptor &RdxDesc) const {
1067 return !Hints->allowReordering() && RdxDesc.isOrdered();
1068 }
1069
1070 /// \returns The smallest bitwidth each instruction can be represented with.
1071 /// The vector equivalents of these instructions should be truncated to this
1072 /// type.
1074 return MinBWs;
1075 }
1076
1077 /// \returns True if it is more profitable to scalarize instruction \p I for
1078 /// vectorization factor \p VF.
1080 assert(VF.isVector() &&
1081 "Profitable to scalarize relevant only for VF > 1.");
1082 assert(
1083 TheLoop->isInnermost() &&
1084 "cost-model should not be used for outer loops (in VPlan-native path)");
1085
1086 auto Scalars = InstsToScalarize.find(VF);
1087 assert(Scalars != InstsToScalarize.end() &&
1088 "VF not yet analyzed for scalarization profitability");
1089 return Scalars->second.contains(I);
1090 }
1091
1092 /// Returns true if \p I is known to be uniform after vectorization.
1094 assert(
1095 TheLoop->isInnermost() &&
1096 "cost-model should not be used for outer loops (in VPlan-native path)");
1097 // Pseudo probe needs to be duplicated for each unrolled iteration and
1098 // vector lane so that profiled loop trip count can be accurately
1099 // accumulated instead of being under counted.
1100 if (isa<PseudoProbeInst>(I))
1101 return false;
1102
1103 if (VF.isScalar())
1104 return true;
1105
1106 auto UniformsPerVF = Uniforms.find(VF);
1107 assert(UniformsPerVF != Uniforms.end() &&
1108 "VF not yet analyzed for uniformity");
1109 return UniformsPerVF->second.count(I);
1110 }
1111
1112 /// Returns true if \p I is known to be scalar after vectorization.
1114 assert(
1115 TheLoop->isInnermost() &&
1116 "cost-model should not be used for outer loops (in VPlan-native path)");
1117 if (VF.isScalar())
1118 return true;
1119
1120 auto ScalarsPerVF = Scalars.find(VF);
1121 assert(ScalarsPerVF != Scalars.end() &&
1122 "Scalar values are not calculated for VF");
1123 return ScalarsPerVF->second.count(I);
1124 }
1125
1126 /// \returns True if instruction \p I can be truncated to a smaller bitwidth
1127 /// for vectorization factor \p VF.
1129 return VF.isVector() && MinBWs.contains(I) &&
1130 !isProfitableToScalarize(I, VF) &&
1132 }
1133
1134 /// Decision that was taken during cost calculation for memory instruction.
1137 CM_Widen, // For consecutive accesses with stride +1.
1138 CM_Widen_Reverse, // For consecutive accesses with stride -1.
1145
1146 /// Save vectorization decision \p W and \p Cost taken by the cost model for
1147 /// instruction \p I and vector width \p VF.
1150 assert(VF.isVector() && "Expected VF >=2");
1151 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost);
1152 }
1153
1154 /// Save vectorization decision \p W and \p Cost taken by the cost model for
1155 /// interleaving group \p Grp and vector width \p VF.
1159 assert(VF.isVector() && "Expected VF >=2");
1160 /// Broadcast this decicion to all instructions inside the group.
1161 /// When interleaving, the cost will only be assigned one instruction, the
1162 /// insert position. For other cases, add the appropriate fraction of the
1163 /// total cost to each instruction. This ensures accurate costs are used,
1164 /// even if the insert position instruction is not used.
1165 InstructionCost InsertPosCost = Cost;
1166 InstructionCost OtherMemberCost = 0;
1167 if (W != CM_Interleave)
1168 OtherMemberCost = InsertPosCost = Cost / Grp->getNumMembers();
1169 ;
1170 for (unsigned Idx = 0; Idx < Grp->getFactor(); ++Idx) {
1171 if (auto *I = Grp->getMember(Idx)) {
1172 if (Grp->getInsertPos() == I)
1173 WideningDecisions[std::make_pair(I, VF)] =
1174 std::make_pair(W, InsertPosCost);
1175 else
1176 WideningDecisions[std::make_pair(I, VF)] =
1177 std::make_pair(W, OtherMemberCost);
1178 }
1179 }
1180 }
1181
1182 /// Return the cost model decision for the given instruction \p I and vector
1183 /// width \p VF. Return CM_Unknown if this instruction did not pass
1184 /// through the cost modeling.
1186 assert(VF.isVector() && "Expected VF to be a vector VF");
1187 assert(
1188 TheLoop->isInnermost() &&
1189 "cost-model should not be used for outer loops (in VPlan-native path)");
1190
1191 std::pair<Instruction *, ElementCount> InstOnVF = std::make_pair(I, VF);
1192 auto Itr = WideningDecisions.find(InstOnVF);
1193 if (Itr == WideningDecisions.end())
1194 return CM_Unknown;
1195 return Itr->second.first;
1196 }
1197
1198 /// Return the vectorization cost for the given instruction \p I and vector
1199 /// width \p VF.
1201 assert(VF.isVector() && "Expected VF >=2");
1202 std::pair<Instruction *, ElementCount> InstOnVF = std::make_pair(I, VF);
1203 assert(WideningDecisions.contains(InstOnVF) &&
1204 "The cost is not calculated");
1205 return WideningDecisions[InstOnVF].second;
1206 }
1207
1212 std::optional<unsigned> MaskPos;
1214 };
1215
1217 Function *Variant, Intrinsic::ID IID,
1218 std::optional<unsigned> MaskPos,
1220 assert(!VF.isScalar() && "Expected vector VF");
1221 CallWideningDecisions[std::make_pair(CI, VF)] = {Kind, Variant, IID,
1222 MaskPos, Cost};
1223 }
1224
1226 ElementCount VF) const {
1227 assert(!VF.isScalar() && "Expected vector VF");
1228 return CallWideningDecisions.at(std::make_pair(CI, VF));
1229 }
1230
1231 /// Return True if instruction \p I is an optimizable truncate whose operand
1232 /// is an induction variable. Such a truncate will be removed by adding a new
1233 /// induction variable with the destination type.
1235 // If the instruction is not a truncate, return false.
1236 auto *Trunc = dyn_cast<TruncInst>(I);
1237 if (!Trunc)
1238 return false;
1239
1240 // Get the source and destination types of the truncate.
1241 Type *SrcTy = toVectorTy(cast<CastInst>(I)->getSrcTy(), VF);
1242 Type *DestTy = toVectorTy(cast<CastInst>(I)->getDestTy(), VF);
1243
1244 // If the truncate is free for the given types, return false. Replacing a
1245 // free truncate with an induction variable would add an induction variable
1246 // update instruction to each iteration of the loop. We exclude from this
1247 // check the primary induction variable since it will need an update
1248 // instruction regardless.
1249 Value *Op = Trunc->getOperand(0);
1250 if (Op != Legal->getPrimaryInduction() && TTI.isTruncateFree(SrcTy, DestTy))
1251 return false;
1252
1253 // If the truncated value is not an induction variable, return false.
1254 return Legal->isInductionPhi(Op);
1255 }
1256
1257 /// Collects the instructions to scalarize for each predicated instruction in
1258 /// the loop.
1260
1261 /// Collect Uniform and Scalar values for the given \p VF.
1262 /// The sets depend on CM decision for Load/Store instructions
1263 /// that may be vectorized as interleave, gather-scatter or scalarized.
1264 /// Also make a decision on what to do about call instructions in the loop
1265 /// at that VF -- scalarize, call a known vector routine, or call a
1266 /// vector intrinsic.
1268 // Do the analysis once.
1269 if (VF.isScalar() || Uniforms.contains(VF))
1270 return;
1272 collectLoopUniforms(VF);
1274 collectLoopScalars(VF);
1275 }
1276
1277 /// Returns true if the target machine supports masked store operation
1278 /// for the given \p DataType and kind of access to \p Ptr.
1279 bool isLegalMaskedStore(Type *DataType, Value *Ptr, Align Alignment) const {
1280 return Legal->isConsecutivePtr(DataType, Ptr) &&
1281 TTI.isLegalMaskedStore(DataType, Alignment);
1282 }
1283
1284 /// Returns true if the target machine supports masked load operation
1285 /// for the given \p DataType and kind of access to \p Ptr.
1286 bool isLegalMaskedLoad(Type *DataType, Value *Ptr, Align Alignment) const {
1287 return Legal->isConsecutivePtr(DataType, Ptr) &&
1288 TTI.isLegalMaskedLoad(DataType, Alignment);
1289 }
1290
1291 /// Returns true if the target machine can represent \p V as a masked gather
1292 /// or scatter operation.
1294 bool LI = isa<LoadInst>(V);
1295 bool SI = isa<StoreInst>(V);
1296 if (!LI && !SI)
1297 return false;
1298 auto *Ty = getLoadStoreType(V);
1300 if (VF.isVector())
1301 Ty = VectorType::get(Ty, VF);
1302 return (LI && TTI.isLegalMaskedGather(Ty, Align)) ||
1303 (SI && TTI.isLegalMaskedScatter(Ty, Align));
1304 }
1305
1306 /// Returns true if the target machine supports all of the reduction
1307 /// variables found for the given VF.
1309 return (all_of(Legal->getReductionVars(), [&](auto &Reduction) -> bool {
1310 const RecurrenceDescriptor &RdxDesc = Reduction.second;
1311 return TTI.isLegalToVectorizeReduction(RdxDesc, VF);
1312 }));
1313 }
1314
1315 /// Given costs for both strategies, return true if the scalar predication
1316 /// lowering should be used for div/rem. This incorporates an override
1317 /// option so it is not simply a cost comparison.
1319 InstructionCost SafeDivisorCost) const {
1320 switch (ForceSafeDivisor) {
1321 case cl::BOU_UNSET:
1322 return ScalarCost < SafeDivisorCost;
1323 case cl::BOU_TRUE:
1324 return false;
1325 case cl::BOU_FALSE:
1326 return true;
1327 }
1328 llvm_unreachable("impossible case value");
1329 }
1330
1331 /// Returns true if \p I is an instruction which requires predication and
1332 /// for which our chosen predication strategy is scalarization (i.e. we
1333 /// don't have an alternate strategy such as masking available).
1334 /// \p VF is the vectorization factor that will be used to vectorize \p I.
1336
1337 /// Returns true if \p I is an instruction that needs to be predicated
1338 /// at runtime. The result is independent of the predication mechanism.
1339 /// Superset of instructions that return true for isScalarWithPredication.
1340 bool isPredicatedInst(Instruction *I) const;
1341
1342 /// Return the costs for our two available strategies for lowering a
1343 /// div/rem operation which requires speculating at least one lane.
1344 /// First result is for scalarization (will be invalid for scalable
1345 /// vectors); second is for the safe-divisor strategy.
1346 std::pair<InstructionCost, InstructionCost>
1348 ElementCount VF) const;
1349
1350 /// Returns true if \p I is a memory instruction with consecutive memory
1351 /// access that can be widened.
1353
1354 /// Returns true if \p I is a memory instruction in an interleaved-group
1355 /// of memory accesses that can be vectorized with wide vector loads/stores
1356 /// and shuffles.
1358
1359 /// Check if \p Instr belongs to any interleaved access group.
1361 return InterleaveInfo.isInterleaved(Instr);
1362 }
1363
1364 /// Get the interleaved access group that \p Instr belongs to.
1367 return InterleaveInfo.getInterleaveGroup(Instr);
1368 }
1369
1370 /// Returns true if we're required to use a scalar epilogue for at least
1371 /// the final iteration of the original loop.
1372 bool requiresScalarEpilogue(bool IsVectorizing) const {
1373 if (!isScalarEpilogueAllowed()) {
1374 LLVM_DEBUG(dbgs() << "LV: Loop does not require scalar epilogue\n");
1375 return false;
1376 }
1377 // If we might exit from anywhere but the latch and early exit vectorization
1378 // is disabled, we must run the exiting iteration in scalar form.
1381 LLVM_DEBUG(dbgs() << "LV: Loop requires scalar epilogue: not exiting "
1382 "from latch block\n");
1383 return true;
1384 }
1385 if (IsVectorizing && InterleaveInfo.requiresScalarEpilogue()) {
1386 LLVM_DEBUG(dbgs() << "LV: Loop requires scalar epilogue: "
1387 "interleaved group requires scalar epilogue\n");
1388 return true;
1389 }
1390 LLVM_DEBUG(dbgs() << "LV: Loop does not require scalar epilogue\n");
1391 return false;
1392 }
1393
1394 /// Returns true if we're required to use a scalar epilogue for at least
1395 /// the final iteration of the original loop for all VFs in \p Range.
1396 /// A scalar epilogue must either be required for all VFs in \p Range or for
1397 /// none.
1399 auto RequiresScalarEpilogue = [this](ElementCount VF) {
1400 return requiresScalarEpilogue(VF.isVector());
1401 };
1402 bool IsRequired = all_of(Range, RequiresScalarEpilogue);
1403 assert(
1404 (IsRequired || none_of(Range, RequiresScalarEpilogue)) &&
1405 "all VFs in range must agree on whether a scalar epilogue is required");
1406 return IsRequired;
1407 }
1408
1409 /// Returns true if a scalar epilogue is not allowed due to optsize or a
1410 /// loop hint annotation.
1412 return ScalarEpilogueStatus == CM_ScalarEpilogueAllowed;
1413 }
1414
1415 /// Returns the TailFoldingStyle that is best for the current loop.
1416 TailFoldingStyle getTailFoldingStyle(bool IVUpdateMayOverflow = true) const {
1417 if (!ChosenTailFoldingStyle)
1419 return IVUpdateMayOverflow ? ChosenTailFoldingStyle->first
1420 : ChosenTailFoldingStyle->second;
1421 }
1422
1423 /// Selects and saves TailFoldingStyle for 2 options - if IV update may
1424 /// overflow or not.
1425 /// \param IsScalableVF true if scalable vector factors enabled.
1426 /// \param UserIC User specific interleave count.
1427 void setTailFoldingStyles(bool IsScalableVF, unsigned UserIC) {
1428 assert(!ChosenTailFoldingStyle && "Tail folding must not be selected yet.");
1429 if (!Legal->canFoldTailByMasking()) {
1430 ChosenTailFoldingStyle =
1432 return;
1433 }
1434
1435 if (!ForceTailFoldingStyle.getNumOccurrences()) {
1436 ChosenTailFoldingStyle = std::make_pair(
1437 TTI.getPreferredTailFoldingStyle(/*IVUpdateMayOverflow=*/true),
1438 TTI.getPreferredTailFoldingStyle(/*IVUpdateMayOverflow=*/false));
1439 return;
1440 }
1441
1442 // Set styles when forced.
1443 ChosenTailFoldingStyle = std::make_pair(ForceTailFoldingStyle.getValue(),
1444 ForceTailFoldingStyle.getValue());
1446 return;
1447 // Override forced styles if needed.
1448 // FIXME: use actual opcode/data type for analysis here.
1449 // FIXME: Investigate opportunity for fixed vector factor.
1450 bool EVLIsLegal = UserIC <= 1 &&
1451 TTI.hasActiveVectorLength(0, nullptr, Align()) &&
1453 if (!EVLIsLegal) {
1454 // If for some reason EVL mode is unsupported, fallback to
1455 // DataWithoutLaneMask to try to vectorize the loop with folded tail
1456 // in a generic way.
1457 ChosenTailFoldingStyle =
1460 LLVM_DEBUG(
1461 dbgs()
1462 << "LV: Preference for VP intrinsics indicated. Will "
1463 "not try to generate VP Intrinsics "
1464 << (UserIC > 1
1465 ? "since interleave count specified is greater than 1.\n"
1466 : "due to non-interleaving reasons.\n"));
1467 }
1468 }
1469
1470 /// Returns true if all loop blocks should be masked to fold tail loop.
1471 bool foldTailByMasking() const {
1472 // TODO: check if it is possible to check for None style independent of
1473 // IVUpdateMayOverflow flag in getTailFoldingStyle.
1475 }
1476
1477 /// Return maximum safe number of elements to be processed per vector
1478 /// iteration, which do not prevent store-load forwarding and are safe with
1479 /// regard to the memory dependencies. Required for EVL-based VPlans to
1480 /// correctly calculate AVL (application vector length) as min(remaining AVL,
1481 /// MaxSafeElements).
1482 /// TODO: need to consider adjusting cost model to use this value as a
1483 /// vectorization factor for EVL-based vectorization.
1484 std::optional<unsigned> getMaxSafeElements() const { return MaxSafeElements; }
1485
1486 /// Returns true if the instructions in this block requires predication
1487 /// for any reason, e.g. because tail folding now requires a predicate
1488 /// or because the block in the original loop was predicated.
1491 }
1492
1493 /// Returns true if VP intrinsics with explicit vector length support should
1494 /// be generated in the tail folded loop.
1495 bool foldTailWithEVL() const {
1497 }
1498
1499 /// Returns true if the Phi is part of an inloop reduction.
1500 bool isInLoopReduction(PHINode *Phi) const {
1501 return InLoopReductions.contains(Phi);
1502 }
1503
1504 /// Returns true if the predicated reduction select should be used to set the
1505 /// incoming value for the reduction phi.
1506 bool usePredicatedReductionSelect(unsigned Opcode, Type *PhiTy) const {
1507 // Force to use predicated reduction select since the EVL of the
1508 // second-to-last iteration might not be VF*UF.
1509 if (foldTailWithEVL())
1510 return true;
1513 Opcode, PhiTy, TargetTransformInfo::ReductionFlags());
1514 }
1515
1516 /// Estimate cost of an intrinsic call instruction CI if it were vectorized
1517 /// with factor VF. Return the cost of the instruction, including
1518 /// scalarization overhead if it's needed.
1520
1521 /// Estimate cost of a call instruction CI if it were vectorized with factor
1522 /// VF. Return the cost of the instruction, including scalarization overhead
1523 /// if it's needed.
1525
1526 /// Invalidates decisions already taken by the cost model.
1528 WideningDecisions.clear();
1529 CallWideningDecisions.clear();
1530 Uniforms.clear();
1531 Scalars.clear();
1532 }
1533
1534 /// Returns the expected execution cost. The unit of the cost does
1535 /// not matter because we use the 'cost' units to compare different
1536 /// vector widths. The cost that is returned is *not* normalized by
1537 /// the factor width.
1539
1540 bool hasPredStores() const { return NumPredStores > 0; }
1541
1542 /// Returns true if epilogue vectorization is considered profitable, and
1543 /// false otherwise.
1544 /// \p VF is the vectorization factor chosen for the original loop.
1545 /// \p Multiplier is an aditional scaling factor applied to VF before
1546 /// comparing to EpilogueVectorizationMinVF.
1548 const unsigned IC) const;
1549
1550 /// Returns the execution time cost of an instruction for a given vector
1551 /// width. Vector width of one means scalar.
1553
1554 /// Return the cost of instructions in an inloop reduction pattern, if I is
1555 /// part of that pattern.
1556 std::optional<InstructionCost>
1559
1560 /// Returns true if \p Op should be considered invariant and if it is
1561 /// trivially hoistable.
1563
1564private:
1565 unsigned NumPredStores = 0;
1566
1567 /// \return An upper bound for the vectorization factors for both
1568 /// fixed and scalable vectorization, where the minimum-known number of
1569 /// elements is a power-of-2 larger than zero. If scalable vectorization is
1570 /// disabled or unsupported, then the scalable part will be equal to
1571 /// ElementCount::getScalable(0).
1572 FixedScalableVFPair computeFeasibleMaxVF(unsigned MaxTripCount,
1573 ElementCount UserVF,
1574 bool FoldTailByMasking);
1575
1576 /// \return the maximized element count based on the targets vector
1577 /// registers and the loop trip-count, but limited to a maximum safe VF.
1578 /// This is a helper function of computeFeasibleMaxVF.
1579 ElementCount getMaximizedVFForTarget(unsigned MaxTripCount,
1580 unsigned SmallestType,
1581 unsigned WidestType,
1582 ElementCount MaxSafeVF,
1583 bool FoldTailByMasking);
1584
1585 /// Checks if scalable vectorization is supported and enabled. Caches the
1586 /// result to avoid repeated debug dumps for repeated queries.
1587 bool isScalableVectorizationAllowed();
1588
1589 /// \return the maximum legal scalable VF, based on the safe max number
1590 /// of elements.
1591 ElementCount getMaxLegalScalableVF(unsigned MaxSafeElements);
1592
1593 /// Calculate vectorization cost of memory instruction \p I.
1594 InstructionCost getMemoryInstructionCost(Instruction *I, ElementCount VF);
1595
1596 /// The cost computation for scalarized memory instruction.
1597 InstructionCost getMemInstScalarizationCost(Instruction *I, ElementCount VF);
1598
1599 /// The cost computation for interleaving group of memory instructions.
1600 InstructionCost getInterleaveGroupCost(Instruction *I, ElementCount VF);
1601
1602 /// The cost computation for Gather/Scatter instruction.
1603 InstructionCost getGatherScatterCost(Instruction *I, ElementCount VF);
1604
1605 /// The cost computation for widening instruction \p I with consecutive
1606 /// memory access.
1607 InstructionCost getConsecutiveMemOpCost(Instruction *I, ElementCount VF);
1608
1609 /// The cost calculation for Load/Store instruction \p I with uniform pointer -
1610 /// Load: scalar load + broadcast.
1611 /// Store: scalar store + (loop invariant value stored? 0 : extract of last
1612 /// element)
1613 InstructionCost getUniformMemOpCost(Instruction *I, ElementCount VF);
1614
1615 /// Estimate the overhead of scalarizing an instruction. This is a
1616 /// convenience wrapper for the type-based getScalarizationOverhead API.
1617 InstructionCost getScalarizationOverhead(Instruction *I, ElementCount VF,
1619
1620 /// Returns true if an artificially high cost for emulated masked memrefs
1621 /// should be used.
1622 bool useEmulatedMaskMemRefHack(Instruction *I, ElementCount VF);
1623
1624 /// Map of scalar integer values to the smallest bitwidth they can be legally
1625 /// represented as. The vector equivalents of these values should be truncated
1626 /// to this type.
1628
1629 /// A type representing the costs for instructions if they were to be
1630 /// scalarized rather than vectorized. The entries are Instruction-Cost
1631 /// pairs.
1632 using ScalarCostsTy = DenseMap<Instruction *, InstructionCost>;
1633
1634 /// A set containing all BasicBlocks that are known to present after
1635 /// vectorization as a predicated block.
1637 PredicatedBBsAfterVectorization;
1638
1639 /// Records whether it is allowed to have the original scalar loop execute at
1640 /// least once. This may be needed as a fallback loop in case runtime
1641 /// aliasing/dependence checks fail, or to handle the tail/remainder
1642 /// iterations when the trip count is unknown or doesn't divide by the VF,
1643 /// or as a peel-loop to handle gaps in interleave-groups.
1644 /// Under optsize and when the trip count is very small we don't allow any
1645 /// iterations to execute in the scalar loop.
1646 ScalarEpilogueLowering ScalarEpilogueStatus = CM_ScalarEpilogueAllowed;
1647
1648 /// Control finally chosen tail folding style. The first element is used if
1649 /// the IV update may overflow, the second element - if it does not.
1650 std::optional<std::pair<TailFoldingStyle, TailFoldingStyle>>
1651 ChosenTailFoldingStyle;
1652
1653 /// true if scalable vectorization is supported and enabled.
1654 std::optional<bool> IsScalableVectorizationAllowed;
1655
1656 /// Maximum safe number of elements to be processed per vector iteration,
1657 /// which do not prevent store-load forwarding and are safe with regard to the
1658 /// memory dependencies. Required for EVL-based veectorization, where this
1659 /// value is used as the upper bound of the safe AVL.
1660 std::optional<unsigned> MaxSafeElements;
1661
1662 /// A map holding scalar costs for different vectorization factors. The
1663 /// presence of a cost for an instruction in the mapping indicates that the
1664 /// instruction will be scalarized when vectorizing with the associated
1665 /// vectorization factor. The entries are VF-ScalarCostTy pairs.
1667
1668 /// Holds the instructions known to be uniform after vectorization.
1669 /// The data is collected per VF.
1671
1672 /// Holds the instructions known to be scalar after vectorization.
1673 /// The data is collected per VF.
1675
1676 /// Holds the instructions (address computations) that are forced to be
1677 /// scalarized.
1679
1680 /// PHINodes of the reductions that should be expanded in-loop.
1681 SmallPtrSet<PHINode *, 4> InLoopReductions;
1682
1683 /// A Map of inloop reduction operations and their immediate chain operand.
1684 /// FIXME: This can be removed once reductions can be costed correctly in
1685 /// VPlan. This was added to allow quick lookup of the inloop operations.
1686 DenseMap<Instruction *, Instruction *> InLoopReductionImmediateChains;
1687
1688 /// Returns the expected difference in cost from scalarizing the expression
1689 /// feeding a predicated instruction \p PredInst. The instructions to
1690 /// scalarize and their scalar costs are collected in \p ScalarCosts. A
1691 /// non-negative return value implies the expression will be scalarized.
1692 /// Currently, only single-use chains are considered for scalarization.
1693 InstructionCost computePredInstDiscount(Instruction *PredInst,
1694 ScalarCostsTy &ScalarCosts,
1695 ElementCount VF);
1696
1697 /// Collect the instructions that are uniform after vectorization. An
1698 /// instruction is uniform if we represent it with a single scalar value in
1699 /// the vectorized loop corresponding to each vector iteration. Examples of
1700 /// uniform instructions include pointer operands of consecutive or
1701 /// interleaved memory accesses. Note that although uniformity implies an
1702 /// instruction will be scalar, the reverse is not true. In general, a
1703 /// scalarized instruction will be represented by VF scalar values in the
1704 /// vectorized loop, each corresponding to an iteration of the original
1705 /// scalar loop.
1706 void collectLoopUniforms(ElementCount VF);
1707
1708 /// Collect the instructions that are scalar after vectorization. An
1709 /// instruction is scalar if it is known to be uniform or will be scalarized
1710 /// during vectorization. collectLoopScalars should only add non-uniform nodes
1711 /// to the list if they are used by a load/store instruction that is marked as
1712 /// CM_Scalarize. Non-uniform scalarized instructions will be represented by
1713 /// VF values in the vectorized loop, each corresponding to an iteration of
1714 /// the original scalar loop.
1715 void collectLoopScalars(ElementCount VF);
1716
1717 /// Keeps cost model vectorization decision and cost for instructions.
1718 /// Right now it is used for memory instructions only.
1720 std::pair<InstWidening, InstructionCost>>;
1721
1722 DecisionList WideningDecisions;
1723
1724 using CallDecisionList =
1725 DenseMap<std::pair<CallInst *, ElementCount>, CallWideningDecision>;
1726
1727 CallDecisionList CallWideningDecisions;
1728
1729 /// Returns true if \p V is expected to be vectorized and it needs to be
1730 /// extracted.
1731 bool needsExtract(Value *V, ElementCount VF) const {
1732 Instruction *I = dyn_cast<Instruction>(V);
1733 if (VF.isScalar() || !I || !TheLoop->contains(I) ||
1736 return false;
1737
1738 // Assume we can vectorize V (and hence we need extraction) if the
1739 // scalars are not computed yet. This can happen, because it is called
1740 // via getScalarizationOverhead from setCostBasedWideningDecision, before
1741 // the scalars are collected. That should be a safe assumption in most
1742 // cases, because we check if the operands have vectorizable types
1743 // beforehand in LoopVectorizationLegality.
1744 return !Scalars.contains(VF) || !isScalarAfterVectorization(I, VF);
1745 };
1746
1747 /// Returns a range containing only operands needing to be extracted.
1748 SmallVector<Value *, 4> filterExtractingOperands(Instruction::op_range Ops,
1749 ElementCount VF) const {
1751 Ops, [this, VF](Value *V) { return this->needsExtract(V, VF); }));
1752 }
1753
1754public:
1755 /// The loop that we evaluate.
1757
1758 /// Predicated scalar evolution analysis.
1760
1761 /// Loop Info analysis.
1763
1764 /// Vectorization legality.
1766
1767 /// Vector target information.
1769
1770 /// Target Library Info.
1772
1773 /// Demanded bits analysis.
1775
1776 /// Assumption cache.
1778
1779 /// Interface to emit optimization remarks.
1781
1783
1784 /// Loop Vectorize Hint.
1786
1787 /// The interleave access information contains groups of interleaved accesses
1788 /// with the same stride and close to each other.
1790
1791 /// Values to ignore in the cost model.
1793
1794 /// Values to ignore in the cost model when VF > 1.
1796
1797 /// All element types found in the loop.
1799};
1800} // end namespace llvm
1801
1802namespace {
1803/// Helper struct to manage generating runtime checks for vectorization.
1804///
1805/// The runtime checks are created up-front in temporary blocks to allow better
1806/// estimating the cost and un-linked from the existing IR. After deciding to
1807/// vectorize, the checks are moved back. If deciding not to vectorize, the
1808/// temporary blocks are completely removed.
1809class GeneratedRTChecks {
1810 /// Basic block which contains the generated SCEV checks, if any.
1811 BasicBlock *SCEVCheckBlock = nullptr;
1812
1813 /// The value representing the result of the generated SCEV checks. If it is
1814 /// nullptr, either no SCEV checks have been generated or they have been used.
1815 Value *SCEVCheckCond = nullptr;
1816
1817 /// Basic block which contains the generated memory runtime checks, if any.
1818 BasicBlock *MemCheckBlock = nullptr;
1819
1820 /// The value representing the result of the generated memory runtime checks.
1821 /// If it is nullptr, either no memory runtime checks have been generated or
1822 /// they have been used.
1823 Value *MemRuntimeCheckCond = nullptr;
1824
1825 DominatorTree *DT;
1826 LoopInfo *LI;
1828
1829 SCEVExpander SCEVExp;
1830 SCEVExpander MemCheckExp;
1831
1832 bool CostTooHigh = false;
1833 const bool AddBranchWeights;
1834
1835 Loop *OuterLoop = nullptr;
1836
1838
1839public:
1840 GeneratedRTChecks(PredicatedScalarEvolution &PSE, DominatorTree *DT,
1842 const DataLayout &DL, bool AddBranchWeights)
1843 : DT(DT), LI(LI), TTI(TTI), SCEVExp(*PSE.getSE(), DL, "scev.check"),
1844 MemCheckExp(*PSE.getSE(), DL, "scev.check"),
1845 AddBranchWeights(AddBranchWeights), PSE(PSE) {}
1846
1847 /// Generate runtime checks in SCEVCheckBlock and MemCheckBlock, so we can
1848 /// accurately estimate the cost of the runtime checks. The blocks are
1849 /// un-linked from the IR and are added back during vector code generation. If
1850 /// there is no vector code generation, the check blocks are removed
1851 /// completely.
1852 void create(Loop *L, const LoopAccessInfo &LAI,
1853 const SCEVPredicate &UnionPred, ElementCount VF, unsigned IC) {
1854
1855 // Hard cutoff to limit compile-time increase in case a very large number of
1856 // runtime checks needs to be generated.
1857 // TODO: Skip cutoff if the loop is guaranteed to execute, e.g. due to
1858 // profile info.
1859 CostTooHigh =
1861 if (CostTooHigh)
1862 return;
1863
1864 BasicBlock *LoopHeader = L->getHeader();
1865 BasicBlock *Preheader = L->getLoopPreheader();
1866
1867 // Use SplitBlock to create blocks for SCEV & memory runtime checks to
1868 // ensure the blocks are properly added to LoopInfo & DominatorTree. Those
1869 // may be used by SCEVExpander. The blocks will be un-linked from their
1870 // predecessors and removed from LI & DT at the end of the function.
1871 if (!UnionPred.isAlwaysTrue()) {
1872 SCEVCheckBlock = SplitBlock(Preheader, Preheader->getTerminator(), DT, LI,
1873 nullptr, "vector.scevcheck");
1874
1875 SCEVCheckCond = SCEVExp.expandCodeForPredicate(
1876 &UnionPred, SCEVCheckBlock->getTerminator());
1877 }
1878
1879 const auto &RtPtrChecking = *LAI.getRuntimePointerChecking();
1880 if (RtPtrChecking.Need) {
1881 auto *Pred = SCEVCheckBlock ? SCEVCheckBlock : Preheader;
1882 MemCheckBlock = SplitBlock(Pred, Pred->getTerminator(), DT, LI, nullptr,
1883 "vector.memcheck");
1884
1885 auto DiffChecks = RtPtrChecking.getDiffChecks();
1886 if (DiffChecks) {
1887 Value *RuntimeVF = nullptr;
1888 MemRuntimeCheckCond = addDiffRuntimeChecks(
1889 MemCheckBlock->getTerminator(), *DiffChecks, MemCheckExp,
1890 [VF, &RuntimeVF](IRBuilderBase &B, unsigned Bits) {
1891 if (!RuntimeVF)
1892 RuntimeVF = getRuntimeVF(B, B.getIntNTy(Bits), VF);
1893 return RuntimeVF;
1894 },
1895 IC);
1896 } else {
1897 MemRuntimeCheckCond = addRuntimeChecks(
1898 MemCheckBlock->getTerminator(), L, RtPtrChecking.getChecks(),
1900 }
1901 assert(MemRuntimeCheckCond &&
1902 "no RT checks generated although RtPtrChecking "
1903 "claimed checks are required");
1904 }
1905
1906 if (!MemCheckBlock && !SCEVCheckBlock)
1907 return;
1908
1909 // Unhook the temporary block with the checks, update various places
1910 // accordingly.
1911 if (SCEVCheckBlock)
1912 SCEVCheckBlock->replaceAllUsesWith(Preheader);
1913 if (MemCheckBlock)
1914 MemCheckBlock->replaceAllUsesWith(Preheader);
1915
1916 if (SCEVCheckBlock) {
1917 SCEVCheckBlock->getTerminator()->moveBefore(Preheader->getTerminator());
1918 new UnreachableInst(Preheader->getContext(), SCEVCheckBlock);
1919 Preheader->getTerminator()->eraseFromParent();
1920 }
1921 if (MemCheckBlock) {
1922 MemCheckBlock->getTerminator()->moveBefore(Preheader->getTerminator());
1923 new UnreachableInst(Preheader->getContext(), MemCheckBlock);
1924 Preheader->getTerminator()->eraseFromParent();
1925 }
1926
1927 DT->changeImmediateDominator(LoopHeader, Preheader);
1928 if (MemCheckBlock) {
1929 DT->eraseNode(MemCheckBlock);
1930 LI->removeBlock(MemCheckBlock);
1931 }
1932 if (SCEVCheckBlock) {
1933 DT->eraseNode(SCEVCheckBlock);
1934 LI->removeBlock(SCEVCheckBlock);
1935 }
1936
1937 // Outer loop is used as part of the later cost calculations.
1938 OuterLoop = L->getParentLoop();
1939 }
1940
1941 InstructionCost getCost() {
1942 if (SCEVCheckBlock || MemCheckBlock)
1943 LLVM_DEBUG(dbgs() << "Calculating cost of runtime checks:\n");
1944
1945 if (CostTooHigh) {
1947 Cost.setInvalid();
1948 LLVM_DEBUG(dbgs() << " number of checks exceeded threshold\n");
1949 return Cost;
1950 }
1951
1952 InstructionCost RTCheckCost = 0;
1953 if (SCEVCheckBlock)
1954 for (Instruction &I : *SCEVCheckBlock) {
1955 if (SCEVCheckBlock->getTerminator() == &I)
1956 continue;
1959 LLVM_DEBUG(dbgs() << " " << C << " for " << I << "\n");
1960 RTCheckCost += C;
1961 }
1962 if (MemCheckBlock) {
1963 InstructionCost MemCheckCost = 0;
1964 for (Instruction &I : *MemCheckBlock) {
1965 if (MemCheckBlock->getTerminator() == &I)
1966 continue;
1969 LLVM_DEBUG(dbgs() << " " << C << " for " << I << "\n");
1970 MemCheckCost += C;
1971 }
1972
1973 // If the runtime memory checks are being created inside an outer loop
1974 // we should find out if these checks are outer loop invariant. If so,
1975 // the checks will likely be hoisted out and so the effective cost will
1976 // reduce according to the outer loop trip count.
1977 if (OuterLoop) {
1978 ScalarEvolution *SE = MemCheckExp.getSE();
1979 // TODO: If profitable, we could refine this further by analysing every
1980 // individual memory check, since there could be a mixture of loop
1981 // variant and invariant checks that mean the final condition is
1982 // variant.
1983 const SCEV *Cond = SE->getSCEV(MemRuntimeCheckCond);
1984 if (SE->isLoopInvariant(Cond, OuterLoop)) {
1985 // It seems reasonable to assume that we can reduce the effective
1986 // cost of the checks even when we know nothing about the trip
1987 // count. Assume that the outer loop executes at least twice.
1988 unsigned BestTripCount = 2;
1989
1990 // Get the best known TC estimate.
1991 if (auto EstimatedTC = getSmallBestKnownTC(
1992 PSE, OuterLoop, /* CanUseConstantMax = */ false))
1993 BestTripCount = *EstimatedTC;
1994
1995 BestTripCount = std::max(BestTripCount, 1U);
1996 InstructionCost NewMemCheckCost = MemCheckCost / BestTripCount;
1997
1998 // Let's ensure the cost is always at least 1.
1999 NewMemCheckCost = std::max(*NewMemCheckCost.getValue(),
2001
2002 if (BestTripCount > 1)
2004 << "We expect runtime memory checks to be hoisted "
2005 << "out of the outer loop. Cost reduced from "
2006 << MemCheckCost << " to " << NewMemCheckCost << '\n');
2007
2008 MemCheckCost = NewMemCheckCost;
2009 }
2010 }
2011
2012 RTCheckCost += MemCheckCost;
2013 }
2014
2015 if (SCEVCheckBlock || MemCheckBlock)
2016 LLVM_DEBUG(dbgs() << "Total cost of runtime checks: " << RTCheckCost
2017 << "\n");
2018
2019 return RTCheckCost;
2020 }
2021
2022 /// Remove the created SCEV & memory runtime check blocks & instructions, if
2023 /// unused.
2024 ~GeneratedRTChecks() {
2025 SCEVExpanderCleaner SCEVCleaner(SCEVExp);
2026 SCEVExpanderCleaner MemCheckCleaner(MemCheckExp);
2027 if (!SCEVCheckCond)
2028 SCEVCleaner.markResultUsed();
2029
2030 if (!MemRuntimeCheckCond)
2031 MemCheckCleaner.markResultUsed();
2032
2033 if (MemRuntimeCheckCond) {
2034 auto &SE = *MemCheckExp.getSE();
2035 // Memory runtime check generation creates compares that use expanded
2036 // values. Remove them before running the SCEVExpanderCleaners.
2037 for (auto &I : make_early_inc_range(reverse(*MemCheckBlock))) {
2038 if (MemCheckExp.isInsertedInstruction(&I))
2039 continue;
2040 SE.forgetValue(&I);
2041 I.eraseFromParent();
2042 }
2043 }
2044 MemCheckCleaner.cleanup();
2045 SCEVCleaner.cleanup();
2046
2047 if (SCEVCheckCond)
2048 SCEVCheckBlock->eraseFromParent();
2049 if (MemRuntimeCheckCond)
2050 MemCheckBlock->eraseFromParent();
2051 }
2052
2053 /// Adds the generated SCEVCheckBlock before \p LoopVectorPreHeader and
2054 /// adjusts the branches to branch to the vector preheader or \p Bypass,
2055 /// depending on the generated condition.
2056 BasicBlock *emitSCEVChecks(BasicBlock *Bypass,
2057 BasicBlock *LoopVectorPreHeader) {
2058 if (!SCEVCheckCond)
2059 return nullptr;
2060
2061 Value *Cond = SCEVCheckCond;
2062 // Mark the check as used, to prevent it from being removed during cleanup.
2063 SCEVCheckCond = nullptr;
2064 if (auto *C = dyn_cast<ConstantInt>(Cond))
2065 if (C->isZero())
2066 return nullptr;
2067
2068 auto *Pred = LoopVectorPreHeader->getSinglePredecessor();
2069
2070 BranchInst::Create(LoopVectorPreHeader, SCEVCheckBlock);
2071 // Create new preheader for vector loop.
2072 if (OuterLoop)
2073 OuterLoop->addBasicBlockToLoop(SCEVCheckBlock, *LI);
2074
2075 SCEVCheckBlock->getTerminator()->eraseFromParent();
2076 SCEVCheckBlock->moveBefore(LoopVectorPreHeader);
2077 Pred->getTerminator()->replaceSuccessorWith(LoopVectorPreHeader,
2078 SCEVCheckBlock);
2079
2080 DT->addNewBlock(SCEVCheckBlock, Pred);
2081 DT->changeImmediateDominator(LoopVectorPreHeader, SCEVCheckBlock);
2082
2083 BranchInst &BI = *BranchInst::Create(Bypass, LoopVectorPreHeader, Cond);
2084 if (AddBranchWeights)
2085 setBranchWeights(BI, SCEVCheckBypassWeights, /*IsExpected=*/false);
2086 ReplaceInstWithInst(SCEVCheckBlock->getTerminator(), &BI);
2087 return SCEVCheckBlock;
2088 }
2089
2090 /// Adds the generated MemCheckBlock before \p LoopVectorPreHeader and adjusts
2091 /// the branches to branch to the vector preheader or \p Bypass, depending on
2092 /// the generated condition.
2093 BasicBlock *emitMemRuntimeChecks(BasicBlock *Bypass,
2094 BasicBlock *LoopVectorPreHeader) {
2095 // Check if we generated code that checks in runtime if arrays overlap.
2096 if (!MemRuntimeCheckCond)
2097 return nullptr;
2098
2099 auto *Pred = LoopVectorPreHeader->getSinglePredecessor();
2100 Pred->getTerminator()->replaceSuccessorWith(LoopVectorPreHeader,
2101 MemCheckBlock);
2102
2103 DT->addNewBlock(MemCheckBlock, Pred);
2104 DT->changeImmediateDominator(LoopVectorPreHeader, MemCheckBlock);
2105 MemCheckBlock->moveBefore(LoopVectorPreHeader);
2106
2107 if (OuterLoop)
2108 OuterLoop->addBasicBlockToLoop(MemCheckBlock, *LI);
2109
2110 BranchInst &BI =
2111 *BranchInst::Create(Bypass, LoopVectorPreHeader, MemRuntimeCheckCond);
2112 if (AddBranchWeights) {
2113 setBranchWeights(BI, MemCheckBypassWeights, /*IsExpected=*/false);
2114 }
2115 ReplaceInstWithInst(MemCheckBlock->getTerminator(), &BI);
2116 MemCheckBlock->getTerminator()->setDebugLoc(
2117 Pred->getTerminator()->getDebugLoc());
2118
2119 // Mark the check as used, to prevent it from being removed during cleanup.
2120 MemRuntimeCheckCond = nullptr;
2121 return MemCheckBlock;
2122 }
2123};
2124} // namespace
2125
2127 return Style == TailFoldingStyle::Data ||
2128 Style == TailFoldingStyle::DataAndControlFlow ||
2129 Style == TailFoldingStyle::DataAndControlFlowWithoutRuntimeCheck;
2130}
2131
2133 return Style == TailFoldingStyle::DataAndControlFlow ||
2134 Style == TailFoldingStyle::DataAndControlFlowWithoutRuntimeCheck;
2135}
2136
2137// Return true if \p OuterLp is an outer loop annotated with hints for explicit
2138// vectorization. The loop needs to be annotated with #pragma omp simd
2139// simdlen(#) or #pragma clang vectorize(enable) vectorize_width(#). If the
2140// vector length information is not provided, vectorization is not considered
2141// explicit. Interleave hints are not allowed either. These limitations will be
2142// relaxed in the future.
2143// Please, note that we are currently forced to abuse the pragma 'clang
2144// vectorize' semantics. This pragma provides *auto-vectorization hints*
2145// (i.e., LV must check that vectorization is legal) whereas pragma 'omp simd'
2146// provides *explicit vectorization hints* (LV can bypass legal checks and
2147// assume that vectorization is legal). However, both hints are implemented
2148// using the same metadata (llvm.loop.vectorize, processed by
2149// LoopVectorizeHints). This will be fixed in the future when the native IR
2150// representation for pragma 'omp simd' is introduced.
2151static bool isExplicitVecOuterLoop(Loop *OuterLp,
2153 assert(!OuterLp->isInnermost() && "This is not an outer loop");
2154 LoopVectorizeHints Hints(OuterLp, true /*DisableInterleaving*/, *ORE);
2155
2156 // Only outer loops with an explicit vectorization hint are supported.
2157 // Unannotated outer loops are ignored.
2159 return false;
2160
2161 Function *Fn = OuterLp->getHeader()->getParent();
2162 if (!Hints.allowVectorization(Fn, OuterLp,
2163 true /*VectorizeOnlyWhenForced*/)) {
2164 LLVM_DEBUG(dbgs() << "LV: Loop hints prevent outer loop vectorization.\n");
2165 return false;
2166 }
2167
2168 if (Hints.getInterleave() > 1) {
2169 // TODO: Interleave support is future work.
2170 LLVM_DEBUG(dbgs() << "LV: Not vectorizing: Interleave is not supported for "
2171 "outer loops.\n");
2172 Hints.emitRemarkWithHints();
2173 return false;
2174 }
2175
2176 return true;
2177}
2178
2182 // Collect inner loops and outer loops without irreducible control flow. For
2183 // now, only collect outer loops that have explicit vectorization hints. If we
2184 // are stress testing the VPlan H-CFG construction, we collect the outermost
2185 // loop of every loop nest.
2186 if (L.isInnermost() || VPlanBuildStressTest ||
2188 LoopBlocksRPO RPOT(&L);
2189 RPOT.perform(LI);
2190 if (!containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI)) {
2191 V.push_back(&L);
2192 // TODO: Collect inner loops inside marked outer loops in case
2193 // vectorization fails for the outer loop. Do not invoke
2194 // 'containsIrreducibleCFG' again for inner loops when the outer loop is
2195 // already known to be reducible. We can use an inherited attribute for
2196 // that.
2197 return;
2198 }
2199 }
2200 for (Loop *InnerL : L)
2201 collectSupportedLoops(*InnerL, LI, ORE, V);
2202}
2203
2204//===----------------------------------------------------------------------===//
2205// Implementation of LoopVectorizationLegality, InnerLoopVectorizer and
2206// LoopVectorizationCostModel and LoopVectorizationPlanner.
2207//===----------------------------------------------------------------------===//
2208
2209/// Compute the transformed value of Index at offset StartValue using step
2210/// StepValue.
2211/// For integer induction, returns StartValue + Index * StepValue.
2212/// For pointer induction, returns StartValue[Index * StepValue].
2213/// FIXME: The newly created binary instructions should contain nsw/nuw
2214/// flags, which can be found from the original scalar operations.
2215static Value *
2217 Value *Step,
2219 const BinaryOperator *InductionBinOp) {
2220 Type *StepTy = Step->getType();
2221 Value *CastedIndex = StepTy->isIntegerTy()
2222 ? B.CreateSExtOrTrunc(Index, StepTy)
2223 : B.CreateCast(Instruction::SIToFP, Index, StepTy);
2224 if (CastedIndex != Index) {
2225 CastedIndex->setName(CastedIndex->getName() + ".cast");
2226 Index = CastedIndex;
2227 }
2228
2229 // Note: the IR at this point is broken. We cannot use SE to create any new
2230 // SCEV and then expand it, hoping that SCEV's simplification will give us
2231 // a more optimal code. Unfortunately, attempt of doing so on invalid IR may
2232 // lead to various SCEV crashes. So all we can do is to use builder and rely
2233 // on InstCombine for future simplifications. Here we handle some trivial
2234 // cases only.
2235 auto CreateAdd = [&B](Value *X, Value *Y) {
2236 assert(X->getType() == Y->getType() && "Types don't match!");
2237 if (auto *CX = dyn_cast<ConstantInt>(X))
2238 if (CX->isZero())
2239 return Y;
2240 if (auto *CY = dyn_cast<ConstantInt>(Y))
2241 if (CY->isZero())
2242 return X;
2243 return B.CreateAdd(X, Y);
2244 };
2245
2246 // We allow X to be a vector type, in which case Y will potentially be
2247 // splatted into a vector with the same element count.
2248 auto CreateMul = [&B](Value *X, Value *Y) {
2249 assert(X->getType()->getScalarType() == Y->getType() &&
2250 "Types don't match!");
2251 if (auto *CX = dyn_cast<ConstantInt>(X))
2252 if (CX->isOne())
2253 return Y;
2254 if (auto *CY = dyn_cast<ConstantInt>(Y))
2255 if (CY->isOne())
2256 return X;
2257 VectorType *XVTy = dyn_cast<VectorType>(X->getType());
2258 if (XVTy && !isa<VectorType>(Y->getType()))
2259 Y = B.CreateVectorSplat(XVTy->getElementCount(), Y);
2260 return B.CreateMul(X, Y);
2261 };
2262
2263 switch (InductionKind) {
2265 assert(!isa<VectorType>(Index->getType()) &&
2266 "Vector indices not supported for integer inductions yet");
2267 assert(Index->getType() == StartValue->getType() &&
2268 "Index type does not match StartValue type");
2269 if (isa<ConstantInt>(Step) && cast<ConstantInt>(Step)->isMinusOne())
2270 return B.CreateSub(StartValue, Index);
2271 auto *Offset = CreateMul(Index, Step);
2272 return CreateAdd(StartValue, Offset);
2273 }
2275 return B.CreatePtrAdd(StartValue, CreateMul(Index, Step));
2277 assert(!isa<VectorType>(Index->getType()) &&
2278 "Vector indices not supported for FP inductions yet");
2279 assert(Step->getType()->isFloatingPointTy() && "Expected FP Step value");
2280 assert(InductionBinOp &&
2281 (InductionBinOp->getOpcode() == Instruction::FAdd ||
2282 InductionBinOp->getOpcode() == Instruction::FSub) &&
2283 "Original bin op should be defined for FP induction");
2284
2285 Value *MulExp = B.CreateFMul(Step, Index);
2286 return B.CreateBinOp(InductionBinOp->getOpcode(), StartValue, MulExp,
2287 "induction");
2288 }
2290 return nullptr;
2291 }
2292 llvm_unreachable("invalid enum");
2293}
2294
2295std::optional<unsigned> getMaxVScale(const Function &F,
2296 const TargetTransformInfo &TTI) {
2297 if (std::optional<unsigned> MaxVScale = TTI.getMaxVScale())
2298 return MaxVScale;
2299
2300 if (F.hasFnAttribute(Attribute::VScaleRange))
2301 return F.getFnAttribute(Attribute::VScaleRange).getVScaleRangeMax();
2302
2303 return std::nullopt;
2304}
2305
2306/// For the given VF and UF and maximum trip count computed for the loop, return
2307/// whether the induction variable might overflow in the vectorized loop. If not,
2308/// then we know a runtime overflow check always evaluates to false and can be
2309/// removed.
2312 ElementCount VF, std::optional<unsigned> UF = std::nullopt) {
2313 // Always be conservative if we don't know the exact unroll factor.
2314 unsigned MaxUF = UF ? *UF : Cost->TTI.getMaxInterleaveFactor(VF);
2315
2316 Type *IdxTy = Cost->Legal->getWidestInductionType();
2317 APInt MaxUIntTripCount = cast<IntegerType>(IdxTy)->getMask();
2318
2319 // We know the runtime overflow check is known false iff the (max) trip-count
2320 // is known and (max) trip-count + (VF * UF) does not overflow in the type of
2321 // the vector loop induction variable.
2322 if (unsigned TC = Cost->PSE.getSmallConstantMaxTripCount()) {
2323 uint64_t MaxVF = VF.getKnownMinValue();
2324 if (VF.isScalable()) {
2325 std::optional<unsigned> MaxVScale =
2326 getMaxVScale(*Cost->TheFunction, Cost->TTI);
2327 if (!MaxVScale)
2328 return false;
2329 MaxVF *= *MaxVScale;
2330 }
2331
2332 return (MaxUIntTripCount - TC).ugt(MaxVF * MaxUF);
2333 }
2334
2335 return false;
2336}
2337
2338// Return whether we allow using masked interleave-groups (for dealing with
2339// strided loads/stores that reside in predicated blocks, or for dealing
2340// with gaps).
2342 // If an override option has been passed in for interleaved accesses, use it.
2343 if (EnableMaskedInterleavedMemAccesses.getNumOccurrences() > 0)
2345
2347}
2348
2350 VPReplicateRecipe *RepRecipe,
2351 const VPLane &Lane,
2352 VPTransformState &State) {
2353 assert(!Instr->getType()->isAggregateType() && "Can't handle vectors");
2354
2355 // Does this instruction return a value ?
2356 bool IsVoidRetTy = Instr->getType()->isVoidTy();
2357
2358 Instruction *Cloned = Instr->clone();
2359 if (!IsVoidRetTy) {
2360 Cloned->setName(Instr->getName() + ".cloned");
2361#if !defined(NDEBUG)
2362 // Verify that VPlan type inference results agree with the type of the
2363 // generated values.
2364 assert(State.TypeAnalysis.inferScalarType(RepRecipe) == Cloned->getType() &&
2365 "inferred type and type from generated instructions do not match");
2366#endif
2367 }
2368
2369 RepRecipe->setFlags(Cloned);
2370
2371 if (auto DL = Instr->getDebugLoc())
2372 State.setDebugLocFrom(DL);
2373
2374 // Replace the operands of the cloned instructions with their scalar
2375 // equivalents in the new loop.
2376 for (const auto &I : enumerate(RepRecipe->operands())) {
2377 auto InputLane = Lane;
2378 VPValue *Operand = I.value();
2380 InputLane = VPLane::getFirstLane();
2381 Cloned->setOperand(I.index(), State.get(Operand, InputLane));
2382 }
2383 State.addNewMetadata(Cloned, Instr);
2384
2385 // Place the cloned scalar in the new loop.
2386 State.Builder.Insert(Cloned);
2387
2388 State.set(RepRecipe, Cloned, Lane);
2389
2390 // If we just cloned a new assumption, add it the assumption cache.
2391 if (auto *II = dyn_cast<AssumeInst>(Cloned))
2393
2394 // End if-block.
2395 VPRegionBlock *Parent = RepRecipe->getParent()->getParent();
2396 bool IfPredicateInstr = Parent ? Parent->isReplicator() : false;
2397 assert((Parent || all_of(RepRecipe->operands(),
2398 [](VPValue *Op) {
2399 return Op->isDefinedOutsideLoopRegions();
2400 })) &&
2401 "Expected a recipe is either within a region or all of its operands "
2402 "are defined outside the vectorized region.");
2403 if (IfPredicateInstr)
2404 PredicatedInstructions.push_back(Cloned);
2405}
2406
2407Value *
2409 if (VectorTripCount)
2410 return VectorTripCount;
2411
2412 Value *TC = getTripCount();
2413 IRBuilder<> Builder(InsertBlock->getTerminator());
2414
2415 Type *Ty = TC->getType();
2416 // This is where we can make the step a runtime constant.
2417 Value *Step = createStepForVF(Builder, Ty, VF, UF);
2418
2419 // If the tail is to be folded by masking, round the number of iterations N
2420 // up to a multiple of Step instead of rounding down. This is done by first
2421 // adding Step-1 and then rounding down. Note that it's ok if this addition
2422 // overflows: the vector induction variable will eventually wrap to zero given
2423 // that it starts at zero and its Step is a power of two; the loop will then
2424 // exit, with the last early-exit vector comparison also producing all-true.
2425 // For scalable vectors the VF is not guaranteed to be a power of 2, but this
2426 // is accounted for in emitIterationCountCheck that adds an overflow check.
2427 if (Cost->foldTailByMasking()) {
2429 "VF*UF must be a power of 2 when folding tail by masking");
2430 TC = Builder.CreateAdd(TC, Builder.CreateSub(Step, ConstantInt::get(Ty, 1)),
2431 "n.rnd.up");
2432 }
2433
2434 // Now we need to generate the expression for the part of the loop that the
2435 // vectorized body will execute. This is equal to N - (N % Step) if scalar
2436 // iterations are not required for correctness, or N - Step, otherwise. Step
2437 // is equal to the vectorization factor (number of SIMD elements) times the
2438 // unroll factor (number of SIMD instructions).
2439 Value *R = Builder.CreateURem(TC, Step, "n.mod.vf");
2440
2441 // There are cases where we *must* run at least one iteration in the remainder
2442 // loop. See the cost model for when this can happen. If the step evenly
2443 // divides the trip count, we set the remainder to be equal to the step. If
2444 // the step does not evenly divide the trip count, no adjustment is necessary
2445 // since there will already be scalar iterations. Note that the minimum
2446 // iterations check ensures that N >= Step.
2447 if (Cost->requiresScalarEpilogue(VF.isVector())) {
2448 auto *IsZero = Builder.CreateICmpEQ(R, ConstantInt::get(R->getType(), 0));
2449 R = Builder.CreateSelect(IsZero, Step, R);
2450 }
2451
2452 VectorTripCount = Builder.CreateSub(TC, R, "n.vec");
2453
2454 return VectorTripCount;
2455}
2456
2458 VPBlockBase *ScalarPH = Plan.getScalarPreheader();
2460 if (PreVectorPH->getNumSuccessors() != 1) {
2461 assert(PreVectorPH->getNumSuccessors() == 2 && "Expected 2 successors");
2462 assert(PreVectorPH->getSuccessors()[0] == ScalarPH &&
2463 "Unexpected successor");
2464 VPIRBasicBlock *CheckVPIRBB = Plan.createVPIRBasicBlock(CheckIRBB);
2465 VPBlockUtils::insertOnEdge(PreVectorPH, VectorPHVPB, CheckVPIRBB);
2466 PreVectorPH = CheckVPIRBB;
2467 }
2468 VPBlockUtils::connectBlocks(PreVectorPH, ScalarPH);
2469 PreVectorPH->swapSuccessors();
2470}
2471
2473 Value *Count = getTripCount();
2474 // Reuse existing vector loop preheader for TC checks.
2475 // Note that new preheader block is generated for vector loop.
2476 BasicBlock *const TCCheckBlock = LoopVectorPreHeader;
2477 IRBuilder<> Builder(TCCheckBlock->getTerminator());
2478
2479 // Generate code to check if the loop's trip count is less than VF * UF, or
2480 // equal to it in case a scalar epilogue is required; this implies that the
2481 // vector trip count is zero. This check also covers the case where adding one
2482 // to the backedge-taken count overflowed leading to an incorrect trip count
2483 // of zero. In this case we will also jump to the scalar loop.
2484 auto P = Cost->requiresScalarEpilogue(VF.isVector()) ? ICmpInst::ICMP_ULE
2486
2487 // If tail is to be folded, vector loop takes care of all iterations.
2488 Type *CountTy = Count->getType();
2489 Value *CheckMinIters = Builder.getFalse();
2490 auto CreateStep = [&]() -> Value * {
2491 // Create step with max(MinProTripCount, UF * VF).
2493 return createStepForVF(Builder, CountTy, VF, UF);
2494
2495 Value *MinProfTC =
2497 if (!VF.isScalable())
2498 return MinProfTC;
2500 Intrinsic::umax, MinProfTC, createStepForVF(Builder, CountTy, VF, UF));
2501 };
2502
2503 TailFoldingStyle Style = Cost->getTailFoldingStyle();
2504 if (Style == TailFoldingStyle::None) {
2505 Value *Step = CreateStep();
2506 ScalarEvolution &SE = *PSE.getSE();
2507 // TODO: Emit unconditional branch to vector preheader instead of
2508 // conditional branch with known condition.
2509 const SCEV *TripCountSCEV = SE.applyLoopGuards(SE.getSCEV(Count), OrigLoop);
2510 // Check if the trip count is < the step.
2511 if (SE.isKnownPredicate(P, TripCountSCEV, SE.getSCEV(Step))) {
2512 // TODO: Ensure step is at most the trip count when determining max VF and
2513 // UF, w/o tail folding.
2514 CheckMinIters = Builder.getTrue();
2516 TripCountSCEV, SE.getSCEV(Step))) {
2517 // Generate the minimum iteration check only if we cannot prove the
2518 // check is known to be true, or known to be false.
2519 CheckMinIters = Builder.CreateICmp(P, Count, Step, "min.iters.check");
2520 } // else step known to be < trip count, use CheckMinIters preset to false.
2521 } else if (VF.isScalable() &&
2524 // vscale is not necessarily a power-of-2, which means we cannot guarantee
2525 // an overflow to zero when updating induction variables and so an
2526 // additional overflow check is required before entering the vector loop.
2527
2528 // Get the maximum unsigned value for the type.
2529 Value *MaxUIntTripCount =
2530 ConstantInt::get(CountTy, cast<IntegerType>(CountTy)->getMask());
2531 Value *LHS = Builder.CreateSub(MaxUIntTripCount, Count);
2532
2533 // Don't execute the vector loop if (UMax - n) < (VF * UF).
2534 CheckMinIters = Builder.CreateICmp(ICmpInst::ICMP_ULT, LHS, CreateStep());
2535 }
2536
2537 // Create new preheader for vector loop.
2539 SplitBlock(TCCheckBlock, TCCheckBlock->getTerminator(), DT, LI, nullptr,
2540 "vector.ph");
2541
2542 assert(DT->properlyDominates(DT->getNode(TCCheckBlock),
2543 DT->getNode(Bypass)->getIDom()) &&
2544 "TC check is expected to dominate Bypass");
2545
2546 BranchInst &BI =
2547 *BranchInst::Create(Bypass, LoopVectorPreHeader, CheckMinIters);
2549 setBranchWeights(BI, MinItersBypassWeights, /*IsExpected=*/false);
2550 ReplaceInstWithInst(TCCheckBlock->getTerminator(), &BI);
2551 LoopBypassBlocks.push_back(TCCheckBlock);
2552
2553 // TODO: Wrap LoopVectorPreHeader in VPIRBasicBlock here.
2554 introduceCheckBlockInVPlan(TCCheckBlock);
2555}
2556
2558 BasicBlock *const SCEVCheckBlock =
2559 RTChecks.emitSCEVChecks(Bypass, LoopVectorPreHeader);
2560 if (!SCEVCheckBlock)
2561 return nullptr;
2562
2563 assert(!(SCEVCheckBlock->getParent()->hasOptSize() ||
2565 Cost->Hints->getForce() != LoopVectorizeHints::FK_Enabled)) &&
2566 "Cannot SCEV check stride or overflow when optimizing for size");
2567 assert(!LoopBypassBlocks.empty() &&
2568 "Should already be a bypass block due to iteration count check");
2569 LoopBypassBlocks.push_back(SCEVCheckBlock);
2570 AddedSafetyChecks = true;
2571
2572 introduceCheckBlockInVPlan(SCEVCheckBlock);
2573 return SCEVCheckBlock;
2574}
2575
2577 // VPlan-native path does not do any analysis for runtime checks currently.
2579 return nullptr;
2580
2581 BasicBlock *const MemCheckBlock =
2582 RTChecks.emitMemRuntimeChecks(Bypass, LoopVectorPreHeader);
2583
2584 // Check if we generated code that checks in runtime if arrays overlap. We put
2585 // the checks into a separate block to make the more common case of few
2586 // elements faster.
2587 if (!MemCheckBlock)
2588 return nullptr;
2589
2590 if (MemCheckBlock->getParent()->hasOptSize() || OptForSizeBasedOnProfile) {
2591 assert(Cost->Hints->getForce() == LoopVectorizeHints::FK_Enabled &&
2592 "Cannot emit memory checks when optimizing for size, unless forced "
2593 "to vectorize.");
2594 ORE->emit([&]() {
2595 return OptimizationRemarkAnalysis(DEBUG_TYPE, "VectorizationCodeSize",
2598 << "Code-size may be reduced by not forcing "
2599 "vectorization, or by source-code modifications "
2600 "eliminating the need for runtime checks "
2601 "(e.g., adding 'restrict').";
2602 });
2603 }
2604
2605 LoopBypassBlocks.push_back(MemCheckBlock);
2606
2607 AddedSafetyChecks = true;
2608
2609 introduceCheckBlockInVPlan(MemCheckBlock);
2610 return MemCheckBlock;
2611}
2612
2613/// Replace \p VPBB with a VPIRBasicBlock wrapping \p IRBB. All recipes from \p
2614/// VPBB are moved to the end of the newly created VPIRBasicBlock. VPBB must
2615/// have a single predecessor, which is rewired to the new VPIRBasicBlock. All
2616/// successors of VPBB, if any, are rewired to the new VPIRBasicBlock.
2618 VPIRBasicBlock *IRVPBB = VPBB->getPlan()->createVPIRBasicBlock(IRBB);
2619 for (auto &R : make_early_inc_range(*VPBB)) {
2620 assert(!R.isPhi() && "Tried to move phi recipe to end of block");
2621 R.moveBefore(*IRVPBB, IRVPBB->end());
2622 }
2623
2624 VPBlockUtils::reassociateBlocks(VPBB, IRVPBB);
2625 // VPBB is now dead and will be cleaned up when the plan gets destroyed.
2626}
2627
2630 assert(LoopVectorPreHeader && "Invalid loop structure");
2632 Cost->requiresScalarEpilogue(VF.isVector())) &&
2633 "loops not exiting via the latch without required epilogue?");
2634
2637 LI, nullptr, Twine(Prefix) + "middle.block");
2641 nullptr, Twine(Prefix) + "scalar.ph");
2643}
2644
2645/// Return the expanded step for \p ID using \p ExpandedSCEVs to look up SCEV
2646/// expansion results.
2648 const SCEV2ValueTy &ExpandedSCEVs) {
2649 const SCEV *Step = ID.getStep();
2650 if (auto *C = dyn_cast<SCEVConstant>(Step))
2651 return C->getValue();
2652 if (auto *U = dyn_cast<SCEVUnknown>(Step))
2653 return U->getValue();
2654 auto I = ExpandedSCEVs.find(Step);
2655 assert(I != ExpandedSCEVs.end() && "SCEV must be expanded at this point");
2656 return I->second;
2657}
2658
2659/// Knowing that loop \p L executes a single vector iteration, add instructions
2660/// that will get simplified and thus should not have any cost to \p
2661/// InstsToIgnore.
2664 SmallPtrSetImpl<Instruction *> &InstsToIgnore) {
2665 auto *Cmp = L->getLatchCmpInst();
2666 if (Cmp)
2667 InstsToIgnore.insert(Cmp);
2668 for (const auto &KV : IL) {
2669 // Extract the key by hand so that it can be used in the lambda below. Note
2670 // that captured structured bindings are a C++20 extension.
2671 const PHINode *IV = KV.first;
2672
2673 // Get next iteration value of the induction variable.
2674 Instruction *IVInst =
2675 cast<Instruction>(IV->getIncomingValueForBlock(L->getLoopLatch()));
2676 if (all_of(IVInst->users(),
2677 [&](const User *U) { return U == IV || U == Cmp; }))
2678 InstsToIgnore.insert(IVInst);
2679 }
2680}
2681
2683 const SCEV2ValueTy &ExpandedSCEVs, Value *MainVectorTripCount) {
2684 assert(MainVectorTripCount && "Must have bypass information");
2685
2686 Instruction *OldInduction = Legal->getPrimaryInduction();
2687 IRBuilder<> BypassBuilder(getAdditionalBypassBlock(),
2688 getAdditionalBypassBlock()->getFirstInsertionPt());
2689 for (const auto &InductionEntry : Legal->getInductionVars()) {
2690 PHINode *OrigPhi = InductionEntry.first;
2691 const InductionDescriptor &II = InductionEntry.second;
2692 Value *Step = getExpandedStep(II, ExpandedSCEVs);
2693 // For the primary induction the additional bypass end value is known.
2694 // Otherwise it is computed.
2695 Value *EndValueFromAdditionalBypass = MainVectorTripCount;
2696 if (OrigPhi != OldInduction) {
2697 auto *BinOp = II.getInductionBinOp();
2698 // Fast-math-flags propagate from the original induction instruction.
2699 if (isa_and_nonnull<FPMathOperator>(BinOp))
2700 BypassBuilder.setFastMathFlags(BinOp->getFastMathFlags());
2701
2702 // Compute the end value for the additional bypass.
2703 EndValueFromAdditionalBypass =
2704 emitTransformedIndex(BypassBuilder, MainVectorTripCount,
2705 II.getStartValue(), Step, II.getKind(), BinOp);
2706 EndValueFromAdditionalBypass->setName("ind.end");
2707 }
2708
2709 // Store the bypass value here, as it needs to be added as operand to its
2710 // scalar preheader phi node after the epilogue skeleton has been created.
2711 // TODO: Directly add as extra operand to the VPResumePHI recipe.
2712 assert(!Induction2AdditionalBypassValue.contains(OrigPhi) &&
2713 "entry for OrigPhi already exits");
2714 Induction2AdditionalBypassValue[OrigPhi] = EndValueFromAdditionalBypass;
2715 }
2716}
2717
2719 const SCEV2ValueTy &ExpandedSCEVs) {
2720 /*
2721 In this function we generate a new loop. The new loop will contain
2722 the vectorized instructions while the old loop will continue to run the
2723 scalar remainder.
2724
2725 [ ] <-- old preheader - loop iteration number check and SCEVs in Plan's
2726 / | preheader are expanded here. Eventually all required SCEV
2727 / | expansion should happen here.
2728 / v
2729 | [ ] <-- vector loop bypass (may consist of multiple blocks).
2730 | / |
2731 | / v
2732 || [ ] <-- vector pre header.
2733 |/ |
2734 | v
2735 | [ ] \
2736 | [ ]_| <-- vector loop (created during VPlan execution).
2737 | |
2738 | v
2739 \ -[ ] <--- middle-block (wrapped in VPIRBasicBlock with the branch to
2740 | | successors created during VPlan execution)
2741 \/ |
2742 /\ v
2743 | ->[ ] <--- new preheader (wrapped in VPIRBasicBlock).
2744 | |
2745 (opt) v <-- edge from middle to exit iff epilogue is not required.
2746 | [ ] \
2747 | [ ]_| <-- old scalar loop to handle remainder (scalar epilogue, header
2748 | | wrapped in VPIRBasicBlock).
2749 \ |
2750 \ v
2751 >[ ] <-- exit block(s). (wrapped in VPIRBasicBlock)
2752 ...
2753 */
2754
2755 // Create an empty vector loop, and prepare basic blocks for the runtime
2756 // checks.
2758
2759 // Now, compare the new count to zero. If it is zero skip the vector loop and
2760 // jump to the scalar loop. This check also covers the case where the
2761 // backedge-taken count is uint##_max: adding one to it will overflow leading
2762 // to an incorrect trip count of zero. In this (rare) case we will also jump
2763 // to the scalar loop.
2765
2766 // Generate the code to check any assumptions that we've made for SCEV
2767 // expressions.
2769
2770 // Generate the code that checks in runtime if arrays overlap. We put the
2771 // checks into a separate block to make the more common case of few elements
2772 // faster.
2774
2775 return LoopVectorPreHeader;
2776}
2777
2778// Fix up external users of the induction variable. At this point, we are
2779// in LCSSA form, with all external PHIs that use the IV having one input value,
2780// coming from the remainder loop. We need those PHIs to also have a correct
2781// value for the IV when arriving directly from the middle block.
2783 const InductionDescriptor &II,
2784 Value *VectorTripCount,
2785 BasicBlock *MiddleBlock,
2786 VPTransformState &State) {
2787 // There are two kinds of external IV usages - those that use the value
2788 // computed in the last iteration (the PHI) and those that use the penultimate
2789 // value (the value that feeds into the phi from the loop latch).
2790 // We allow both, but they, obviously, have different values.
2791
2792 DenseMap<Value *, Value *> MissingVals;
2793
2794 Value *EndValue = cast<PHINode>(OrigPhi->getIncomingValueForBlock(
2796 ->getIncomingValueForBlock(MiddleBlock);
2797
2798 // An external user of the last iteration's value should see the value that
2799 // the remainder loop uses to initialize its own IV.
2801 for (User *U : PostInc->users()) {
2802 Instruction *UI = cast<Instruction>(U);
2803 if (!OrigLoop->contains(UI)) {
2804 assert(isa<PHINode>(UI) && "Expected LCSSA form");
2805 MissingVals[UI] = EndValue;
2806 }
2807 }
2808
2809 // An external user of the penultimate value need to see EndValue - Step.
2810 // The simplest way to get this is to recompute it from the constituent SCEVs,
2811 // that is Start + (Step * (CRD - 1)).
2812 for (User *U : OrigPhi->users()) {
2813 auto *UI = cast<Instruction>(U);
2814 if (!OrigLoop->contains(UI)) {
2815 assert(isa<PHINode>(UI) && "Expected LCSSA form");
2816 IRBuilder<> B(MiddleBlock->getTerminator());
2817
2818 // Fast-math-flags propagate from the original induction instruction.
2819 if (isa_and_nonnull<FPMathOperator>(II.getInductionBinOp()))
2820 B.setFastMathFlags(II.getInductionBinOp()->getFastMathFlags());
2821
2822 VPValue *StepVPV = Plan.getSCEVExpansion(II.getStep());
2823 assert(StepVPV && "step must have been expanded during VPlan execution");
2824 Value *Step = StepVPV->isLiveIn() ? StepVPV->getLiveInIRValue()
2825 : State.get(StepVPV, VPLane(0));
2826 Value *Escape = nullptr;
2827 if (EndValue->getType()->isIntegerTy())
2828 Escape = B.CreateSub(EndValue, Step);
2829 else if (EndValue->getType()->isPointerTy())
2830 Escape = B.CreatePtrAdd(EndValue, B.CreateNeg(Step));
2831 else {
2832 assert(EndValue->getType()->isFloatingPointTy() &&
2833 "Unexpected induction type");
2834 Escape = B.CreateBinOp(II.getInductionBinOp()->getOpcode() ==
2835 Instruction::FAdd
2836 ? Instruction::FSub
2837 : Instruction::FAdd,
2838 EndValue, Step);
2839 }
2840 Escape->setName("ind.escape");
2841 MissingVals[UI] = Escape;
2842 }
2843 }
2844
2845 assert((MissingVals.empty() ||
2846 all_of(MissingVals,
2847 [MiddleBlock, this](const std::pair<Value *, Value *> &P) {
2848 return all_of(
2849 predecessors(cast<Instruction>(P.first)->getParent()),
2850 [MiddleBlock, this](BasicBlock *Pred) {
2851 return Pred == MiddleBlock ||
2852 Pred == OrigLoop->getLoopLatch();
2853 });
2854 })) &&
2855 "Expected escaping values from latch/middle.block only");
2856
2857 for (auto &I : MissingVals) {
2858 PHINode *PHI = cast<PHINode>(I.first);
2859 // One corner case we have to handle is two IVs "chasing" each-other,
2860 // that is %IV2 = phi [...], [ %IV1, %latch ]
2861 // In this case, if IV1 has an external use, we need to avoid adding both
2862 // "last value of IV1" and "penultimate value of IV2". So, verify that we
2863 // don't already have an incoming value for the middle block.
2864 if (PHI->getBasicBlockIndex(MiddleBlock) == -1)
2865 PHI->addIncoming(I.second, MiddleBlock);
2866 }
2867}
2868
2869namespace {
2870
2871struct CSEDenseMapInfo {
2872 static bool canHandle(const Instruction *I) {
2873 return isa<InsertElementInst>(I) || isa<ExtractElementInst>(I) ||
2874 isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I);
2875 }
2876
2877 static inline Instruction *getEmptyKey() {
2879 }
2880
2881 static inline Instruction *getTombstoneKey() {
2883 }
2884
2885 static unsigned getHashValue(const Instruction *I) {
2886 assert(canHandle(I) && "Unknown instruction!");
2887 return hash_combine(I->getOpcode(), hash_combine_range(I->value_op_begin(),
2888 I->value_op_end()));
2889 }
2890
2891 static bool isEqual(const Instruction *LHS, const Instruction *RHS) {
2892 if (LHS == getEmptyKey() || RHS == getEmptyKey() ||
2893 LHS == getTombstoneKey() || RHS == getTombstoneKey())
2894 return LHS == RHS;
2895 return LHS->isIdenticalTo(RHS);
2896 }
2897};
2898
2899} // end anonymous namespace
2900
2901///Perform cse of induction variable instructions.
2902static void cse(BasicBlock *BB) {
2903 // Perform simple cse.
2905 for (Instruction &In : llvm::make_early_inc_range(*BB)) {
2906 if (!CSEDenseMapInfo::canHandle(&In))
2907 continue;
2908
2909 // Check if we can replace this instruction with any of the
2910 // visited instructions.
2911 if (Instruction *V = CSEMap.lookup(&In)) {
2912 In.replaceAllUsesWith(V);
2913 In.eraseFromParent();
2914 continue;
2915 }
2916
2917 CSEMap[&In] = &In;
2918 }
2919}
2920
2923 ElementCount VF) const {
2924 // We only need to calculate a cost if the VF is scalar; for actual vectors
2925 // we should already have a pre-calculated cost at each VF.
2926 if (!VF.isScalar())
2927 return CallWideningDecisions.at(std::make_pair(CI, VF)).Cost;
2928
2930 Type *RetTy = CI->getType();
2932 if (auto RedCost = getReductionPatternCost(CI, VF, RetTy, CostKind))
2933 return *RedCost;
2934
2936 for (auto &ArgOp : CI->args())
2937 Tys.push_back(ArgOp->getType());
2938
2939 InstructionCost ScalarCallCost =
2941
2942 // If this is an intrinsic we may have a lower cost for it.
2944 InstructionCost IntrinsicCost = getVectorIntrinsicCost(CI, VF);
2945 return std::min(ScalarCallCost, IntrinsicCost);
2946 }
2947 return ScalarCallCost;
2948}
2949
2951 if (VF.isScalar() || (!Elt->isIntOrPtrTy() && !Elt->isFloatingPointTy()))
2952 return Elt;
2953 return VectorType::get(Elt, VF);
2954}
2955
2958 ElementCount VF) const {
2960 assert(ID && "Expected intrinsic call!");
2961 Type *RetTy = maybeVectorizeType(CI->getType(), VF);
2962 FastMathFlags FMF;
2963 if (auto *FPMO = dyn_cast<FPMathOperator>(CI))
2964 FMF = FPMO->getFastMathFlags();
2965
2968 SmallVector<Type *> ParamTys;
2969 std::transform(FTy->param_begin(), FTy->param_end(),
2970 std::back_inserter(ParamTys),
2971 [&](Type *Ty) { return maybeVectorizeType(Ty, VF); });
2972
2973 IntrinsicCostAttributes CostAttrs(ID, RetTy, Arguments, ParamTys, FMF,
2974 dyn_cast<IntrinsicInst>(CI));
2975 return TTI.getIntrinsicInstrCost(CostAttrs,
2977}
2978
2980 // Fix widened non-induction PHIs by setting up the PHI operands.
2982 fixNonInductionPHIs(State);
2983
2984 // Forget the original basic block.
2987
2988 // After vectorization, the exit blocks of the original loop will have
2989 // additional predecessors. Invalidate SCEVs for the exit phis in case SE
2990 // looked through single-entry phis.
2991 SmallVector<BasicBlock *> ExitBlocks;
2992 OrigLoop->getExitBlocks(ExitBlocks);
2993 for (BasicBlock *Exit : ExitBlocks)
2994 for (PHINode &PN : Exit->phis())
2996
2997 if (Cost->requiresScalarEpilogue(VF.isVector())) {
2998 // No edge from the middle block to the unique exit block has been inserted
2999 // and there is nothing to fix from vector loop; phis should have incoming
3000 // from scalar loop only.
3001 } else {
3002 // TODO: Check in VPlan to see if IV users need fixing instead of checking
3003 // the cost model.
3004
3005 // If we inserted an edge from the middle block to the unique exit block,
3006 // update uses outside the loop (phis) to account for the newly inserted
3007 // edge.
3008
3009 // Fix-up external users of the induction variables.
3010 for (const auto &Entry : Legal->getInductionVars())
3011 fixupIVUsers(Entry.first, Entry.second,
3013 }
3014
3016 sinkScalarOperands(&*PI);
3017
3018 VPRegionBlock *VectorRegion = State.Plan->getVectorLoopRegion();
3019 VPBasicBlock *HeaderVPBB = VectorRegion->getEntryBasicBlock();
3020 BasicBlock *HeaderBB = State.CFG.VPBB2IRBB[HeaderVPBB];
3021
3022 // Remove redundant induction instructions.
3023 cse(HeaderBB);
3024
3025 // Set/update profile weights for the vector and remainder loops as original
3026 // loop iterations are now distributed among them. Note that original loop
3027 // becomes the scalar remainder loop after vectorization.
3028 //
3029 // For cases like foldTailByMasking() and requiresScalarEpiloque() we may
3030 // end up getting slightly roughened result but that should be OK since
3031 // profile is not inherently precise anyway. Note also possible bypass of
3032 // vector code caused by legality checks is ignored, assigning all the weight
3033 // to the vector loop, optimistically.
3034 //
3035 // For scalable vectorization we can't know at compile time how many
3036 // iterations of the loop are handled in one vector iteration, so instead
3037 // assume a pessimistic vscale of '1'.
3038 Loop *VectorLoop = LI->getLoopFor(HeaderBB);
3040 VF.getKnownMinValue() * UF);
3041}
3042
3044 // The basic block and loop containing the predicated instruction.
3045 auto *PredBB = PredInst->getParent();
3046 auto *VectorLoop = LI->getLoopFor(PredBB);
3047
3048 // Initialize a worklist with the operands of the predicated instruction.
3049 SetVector<Value *> Worklist(PredInst->op_begin(), PredInst->op_end());
3050
3051 // Holds instructions that we need to analyze again. An instruction may be
3052 // reanalyzed if we don't yet know if we can sink it or not.
3053 SmallVector<Instruction *, 8> InstsToReanalyze;
3054
3055 // Returns true if a given use occurs in the predicated block. Phi nodes use
3056 // their operands in their corresponding predecessor blocks.
3057 auto IsBlockOfUsePredicated = [&](Use &U) -> bool {
3058 auto *I = cast<Instruction>(U.getUser());
3059 BasicBlock *BB = I->getParent();
3060 if (auto *Phi = dyn_cast<PHINode>(I))
3061 BB = Phi->getIncomingBlock(
3062 PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
3063 return BB == PredBB;
3064 };
3065
3066 // Iteratively sink the scalarized operands of the predicated instruction
3067 // into the block we created for it. When an instruction is sunk, it's
3068 // operands are then added to the worklist. The algorithm ends after one pass
3069 // through the worklist doesn't sink a single instruction.
3070 bool Changed;
3071 do {
3072 // Add the instructions that need to be reanalyzed to the worklist, and
3073 // reset the changed indicator.
3074 Worklist.insert(InstsToReanalyze.begin(), InstsToReanalyze.end());
3075 InstsToReanalyze.clear();
3076 Changed = false;
3077
3078 while (!Worklist.empty()) {
3079 auto *I = dyn_cast<Instruction>(Worklist.pop_back_val());
3080
3081 // We can't sink an instruction if it is a phi node, is not in the loop,
3082 // may have side effects or may read from memory.
3083 // TODO: Could do more granular checking to allow sinking
3084 // a load past non-store instructions.
3085 if (!I || isa<PHINode>(I) || !VectorLoop->contains(I) ||
3086 I->mayHaveSideEffects() || I->mayReadFromMemory())
3087 continue;
3088
3089 // If the instruction is already in PredBB, check if we can sink its
3090 // operands. In that case, VPlan's sinkScalarOperands() succeeded in
3091 // sinking the scalar instruction I, hence it appears in PredBB; but it
3092 // may have failed to sink I's operands (recursively), which we try
3093 // (again) here.
3094 if (I->getParent() == PredBB) {
3095 Worklist.insert(I->op_begin(), I->op_end());
3096 continue;
3097 }
3098
3099 // It's legal to sink the instruction if all its uses occur in the
3100 // predicated block. Otherwise, there's nothing to do yet, and we may
3101 // need to reanalyze the instruction.
3102 if (!llvm::all_of(I->uses(), IsBlockOfUsePredicated)) {
3103 InstsToReanalyze.push_back(I);
3104 continue;
3105 }
3106
3107 // Move the instruction to the beginning of the predicated block, and add
3108 // it's operands to the worklist.
3109 I->moveBefore(&*PredBB->getFirstInsertionPt());
3110 Worklist.insert(I->op_begin(), I->op_end());
3111
3112 // The sinking may have enabled other instructions to be sunk, so we will
3113 // need to iterate.
3114 Changed = true;
3115 }
3116 } while (Changed);
3117}
3118
3120 auto Iter = vp_depth_first_deep(Plan.getEntry());
3121 for (VPBasicBlock *VPBB : VPBlockUtils::blocksOnly<VPBasicBlock>(Iter)) {
3122 for (VPRecipeBase &P : VPBB->phis()) {
3123 VPWidenPHIRecipe *VPPhi = dyn_cast<VPWidenPHIRecipe>(&P);
3124 if (!VPPhi)
3125 continue;
3126 PHINode *NewPhi = cast<PHINode>(State.get(VPPhi));
3127 // Make sure the builder has a valid insert point.
3128 Builder.SetInsertPoint(NewPhi);
3129 for (unsigned Idx = 0; Idx < VPPhi->getNumOperands(); ++Idx) {
3130 VPValue *Inc = VPPhi->getIncomingValue(Idx);
3131 VPBasicBlock *VPBB = VPPhi->getIncomingBlock(Idx);
3132 NewPhi->addIncoming(State.get(Inc), State.CFG.VPBB2IRBB[VPBB]);
3133 }
3134 }
3135 }
3136}
3137
3138void LoopVectorizationCostModel::collectLoopScalars(ElementCount VF) {
3139 // We should not collect Scalars more than once per VF. Right now, this
3140 // function is called from collectUniformsAndScalars(), which already does
3141 // this check. Collecting Scalars for VF=1 does not make any sense.
3142 assert(VF.isVector() && !Scalars.contains(VF) &&
3143 "This function should not be visited twice for the same VF");
3144
3145 // This avoids any chances of creating a REPLICATE recipe during planning
3146 // since that would result in generation of scalarized code during execution,
3147 // which is not supported for scalable vectors.
3148 if (VF.isScalable()) {
3149 Scalars[VF].insert(Uniforms[VF].begin(), Uniforms[VF].end());
3150 return;
3151 }
3152
3154
3155 // These sets are used to seed the analysis with pointers used by memory
3156 // accesses that will remain scalar.
3158 SmallPtrSet<Instruction *, 8> PossibleNonScalarPtrs;
3159 auto *Latch = TheLoop->getLoopLatch();
3160
3161 // A helper that returns true if the use of Ptr by MemAccess will be scalar.
3162 // The pointer operands of loads and stores will be scalar as long as the
3163 // memory access is not a gather or scatter operation. The value operand of a
3164 // store will remain scalar if the store is scalarized.
3165 auto IsScalarUse = [&](Instruction *MemAccess, Value *Ptr) {
3166 InstWidening WideningDecision = getWideningDecision(MemAccess, VF);
3167 assert(WideningDecision != CM_Unknown &&
3168 "Widening decision should be ready at this moment");
3169 if (auto *Store = dyn_cast<StoreInst>(MemAccess))
3170 if (Ptr == Store->getValueOperand())
3171 return WideningDecision == CM_Scalarize;
3172 assert(Ptr == getLoadStorePointerOperand(MemAccess) &&
3173 "Ptr is neither a value or pointer operand");
3174 return WideningDecision != CM_GatherScatter;
3175 };
3176
3177 // A helper that returns true if the given value is a getelementptr
3178 // instruction contained in the loop.
3179 auto IsLoopVaryingGEP = [&](Value *V) {
3180 return isa<GetElementPtrInst>(V) && !TheLoop->isLoopInvariant(V);
3181 };
3182
3183 // A helper that evaluates a memory access's use of a pointer. If the use will
3184 // be a scalar use and the pointer is only used by memory accesses, we place
3185 // the pointer in ScalarPtrs. Otherwise, the pointer is placed in
3186 // PossibleNonScalarPtrs.
3187 auto EvaluatePtrUse = [&](Instruction *MemAccess, Value *Ptr) {
3188 // We only care about bitcast and getelementptr instructions contained in
3189 // the loop.
3190 if (!IsLoopVaryingGEP(Ptr))
3191 return;
3192
3193 // If the pointer has already been identified as scalar (e.g., if it was
3194 // also identified as uniform), there's nothing to do.
3195 auto *I = cast<Instruction>(Ptr);
3196 if (Worklist.count(I))
3197 return;
3198
3199 // If the use of the pointer will be a scalar use, and all users of the
3200 // pointer are memory accesses, place the pointer in ScalarPtrs. Otherwise,
3201 // place the pointer in PossibleNonScalarPtrs.
3202 if (IsScalarUse(MemAccess, Ptr) &&
3203 all_of(I->users(), IsaPred<LoadInst, StoreInst>))
3204 ScalarPtrs.insert(I);
3205 else
3206 PossibleNonScalarPtrs.insert(I);
3207 };
3208
3209 // We seed the scalars analysis with three classes of instructions: (1)
3210 // instructions marked uniform-after-vectorization and (2) bitcast,
3211 // getelementptr and (pointer) phi instructions used by memory accesses
3212 // requiring a scalar use.
3213 //
3214 // (1) Add to the worklist all instructions that have been identified as
3215 // uniform-after-vectorization.
3216 Worklist.insert(Uniforms[VF].begin(), Uniforms[VF].end());
3217
3218 // (2) Add to the worklist all bitcast and getelementptr instructions used by
3219 // memory accesses requiring a scalar use. The pointer operands of loads and
3220 // stores will be scalar unless the operation is a gather or scatter.
3221 // The value operand of a store will remain scalar if the store is scalarized.
3222 for (auto *BB : TheLoop->blocks())
3223 for (auto &I : *BB) {
3224 if (auto *Load = dyn_cast<LoadInst>(&I)) {
3225 EvaluatePtrUse(Load, Load->getPointerOperand());
3226 } else if (auto *Store = dyn_cast<StoreInst>(&I)) {
3227 EvaluatePtrUse(Store, Store->getPointerOperand());
3228 EvaluatePtrUse(Store, Store->getValueOperand());
3229 }
3230 }
3231 for (auto *I : ScalarPtrs)
3232 if (!PossibleNonScalarPtrs.count(I)) {
3233 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *I << "\n");
3234 Worklist.insert(I);
3235 }
3236
3237 // Insert the forced scalars.
3238 // FIXME: Currently VPWidenPHIRecipe() often creates a dead vector
3239 // induction variable when the PHI user is scalarized.
3240 auto ForcedScalar = ForcedScalars.find(VF);
3241 if (ForcedScalar != ForcedScalars.end())
3242 for (auto *I : ForcedScalar->second) {
3243 LLVM_DEBUG(dbgs() << "LV: Found (forced) scalar instruction: " << *I << "\n");
3244 Worklist.insert(I);
3245 }
3246
3247 // Expand the worklist by looking through any bitcasts and getelementptr
3248 // instructions we've already identified as scalar. This is similar to the
3249 // expansion step in collectLoopUniforms(); however, here we're only
3250 // expanding to include additional bitcasts and getelementptr instructions.
3251 unsigned Idx = 0;
3252 while (Idx != Worklist.size()) {
3253 Instruction *Dst = Worklist[Idx++];
3254 if (!IsLoopVaryingGEP(Dst->getOperand(0)))
3255 continue;
3256 auto *Src = cast<Instruction>(Dst->getOperand(0));
3257 if (llvm::all_of(Src->users(), [&](User *U) -> bool {
3258 auto *J = cast<Instruction>(U);
3259 return !TheLoop->contains(J) || Worklist.count(J) ||
3260 ((isa<LoadInst>(J) || isa<StoreInst>(J)) &&
3261 IsScalarUse(J, Src));
3262 })) {
3263 Worklist.insert(Src);
3264 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Src << "\n");
3265 }
3266 }
3267
3268 // An induction variable will remain scalar if all users of the induction
3269 // variable and induction variable update remain scalar.
3270 for (const auto &Induction : Legal->getInductionVars()) {
3271 auto *Ind = Induction.first;
3272 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
3273
3274 // If tail-folding is applied, the primary induction variable will be used
3275 // to feed a vector compare.
3276 if (Ind == Legal->getPrimaryInduction() && foldTailByMasking())
3277 continue;
3278
3279 // Returns true if \p Indvar is a pointer induction that is used directly by
3280 // load/store instruction \p I.
3281 auto IsDirectLoadStoreFromPtrIndvar = [&](Instruction *Indvar,
3282 Instruction *I) {
3283 return Induction.second.getKind() ==
3285 (isa<LoadInst>(I) || isa<StoreInst>(I)) &&
3286 Indvar == getLoadStorePointerOperand(I) && IsScalarUse(I, Indvar);
3287 };
3288
3289 // Determine if all users of the induction variable are scalar after
3290 // vectorization.
3291 bool ScalarInd = all_of(Ind->users(), [&](User *U) -> bool {
3292 auto *I = cast<Instruction>(U);
3293 return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I) ||
3294 IsDirectLoadStoreFromPtrIndvar(Ind, I);
3295 });
3296 if (!ScalarInd)
3297 continue;
3298
3299 // If the induction variable update is a fixed-order recurrence, neither the
3300 // induction variable or its update should be marked scalar after
3301 // vectorization.
3302 auto *IndUpdatePhi = dyn_cast<PHINode>(IndUpdate);
3303 if (IndUpdatePhi && Legal->isFixedOrderRecurrence(IndUpdatePhi))
3304 continue;
3305
3306 // Determine if all users of the induction variable update instruction are
3307 // scalar after vectorization.
3308 bool ScalarIndUpdate = all_of(IndUpdate->users(), [&](User *U) -> bool {
3309 auto *I = cast<Instruction>(U);
3310 return I == Ind || !TheLoop->contains(I) || Worklist.count(I) ||
3311 IsDirectLoadStoreFromPtrIndvar(IndUpdate, I);
3312 });
3313 if (!ScalarIndUpdate)
3314 continue;
3315
3316 // The induction variable and its update instruction will remain scalar.
3317 Worklist.insert(Ind);
3318 Worklist.insert(IndUpdate);
3319 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Ind << "\n");
3320 LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *IndUpdate
3321 << "\n");
3322 }
3323
3324 Scalars[VF].insert(Worklist.begin(), Worklist.end());
3325}
3326
3328 Instruction *I, ElementCount VF) const {
3329 if (!isPredicatedInst(I))
3330 return false;
3331
3332 // Do we have a non-scalar lowering for this predicated
3333 // instruction? No - it is scalar with predication.
3334 switch(I->getOpcode()) {
3335 default:
3336 return true;
3337 case Instruction::Call:
3338 if (VF.isScalar())
3339 return true;
3340 return CallWideningDecisions.at(std::make_pair(cast<CallInst>(I), VF))
3341 .Kind == CM_Scalarize;
3342 case Instruction::Load:
3343 case Instruction::Store: {
3345 auto *Ty = getLoadStoreType(I);
3346 Type *VTy = Ty;
3347 if (VF.isVector())
3348 VTy = VectorType::get(Ty, VF);
3349 const Align Alignment = getLoadStoreAlignment(I);
3350 return isa<LoadInst>(I) ? !(isLegalMaskedLoad(Ty, Ptr, Alignment) ||
3351 TTI.isLegalMaskedGather(VTy, Alignment))
3352 : !(isLegalMaskedStore(Ty, Ptr, Alignment) ||
3353 TTI.isLegalMaskedScatter(VTy, Alignment));
3354 }
3355 case Instruction::UDiv:
3356 case Instruction::SDiv:
3357 case Instruction::SRem:
3358 case Instruction::URem: {
3359 // We have the option to use the safe-divisor idiom to avoid predication.
3360 // The cost based decision here will always select safe-divisor for
3361 // scalable vectors as scalarization isn't legal.
3362 const auto [ScalarCost, SafeDivisorCost] = getDivRemSpeculationCost(I, VF);
3363 return isDivRemScalarWithPredication(ScalarCost, SafeDivisorCost);
3364 }
3365 }
3366}
3367
3368// TODO: Fold into LoopVectorizationLegality::isMaskRequired.
3370 // If predication is not needed, avoid it.
3371 // TODO: We can use the loop-preheader as context point here and get
3372 // context sensitive reasoning for isSafeToSpeculativelyExecute.
3373 if (!blockNeedsPredicationForAnyReason(I->getParent()) ||
3375 (isa<LoadInst, StoreInst, CallInst>(I) && !Legal->isMaskRequired(I)) ||
3376 isa<BranchInst, SwitchInst, PHINode, AllocaInst>(I))
3377 return false;
3378
3379 // If the instruction was executed conditionally in the original scalar loop,
3380 // predication is needed with a mask whose lanes are all possibly inactive.
3381 if (Legal->blockNeedsPredication(I->getParent()))
3382 return true;
3383
3384 // All that remain are instructions with side-effects originally executed in
3385 // the loop unconditionally, but now execute under a tail-fold mask (only)
3386 // having at least one active lane (the first). If the side-effects of the
3387 // instruction are invariant, executing it w/o (the tail-folding) mask is safe
3388 // - it will cause the same side-effects as when masked.
3389 switch(I->getOpcode()) {
3390 default:
3392 "instruction should have been considered by earlier checks");
3393 case Instruction::Call:
3394 // Side-effects of a Call are assumed to be non-invariant, needing a
3395 // (fold-tail) mask.
3397 "should have returned earlier for calls not needing a mask");
3398 return true;
3399 case Instruction::Load:
3400 // If the address is loop invariant no predication is needed.
3402 case Instruction::Store: {
3403 // For stores, we need to prove both speculation safety (which follows from
3404 // the same argument as loads), but also must prove the value being stored
3405 // is correct. The easiest form of the later is to require that all values
3406 // stored are the same.
3408 TheLoop->isLoopInvariant(cast<StoreInst>(I)->getValueOperand()));
3409 }
3410 case Instruction::UDiv:
3411 case Instruction::SDiv:
3412 case Instruction::SRem:
3413 case Instruction::URem:
3414 // If the divisor is loop-invariant no predication is needed.
3415 return !TheLoop->isLoopInvariant(I->getOperand(1));
3416 }
3417}
3418
3419std::pair<InstructionCost, InstructionCost>
3421 ElementCount VF) const {
3422 assert(I->getOpcode() == Instruction::UDiv ||
3423 I->getOpcode() == Instruction::SDiv ||
3424 I->getOpcode() == Instruction::SRem ||
3425 I->getOpcode() == Instruction::URem);
3427
3429
3430 // Scalarization isn't legal for scalable vector types
3431 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
3432 if (!VF.isScalable()) {
3433 // Get the scalarization cost and scale this amount by the probability of
3434 // executing the predicated block. If the instruction is not predicated,
3435 // we fall through to the next case.
3436 ScalarizationCost = 0;
3437
3438 // These instructions have a non-void type, so account for the phi nodes
3439 // that we will create. This cost is likely to be zero. The phi node
3440 // cost, if any, should be scaled by the block probability because it
3441 // models a copy at the end of each predicated block.
3442 ScalarizationCost += VF.getKnownMinValue() *
3443 TTI.getCFInstrCost(Instruction::PHI, CostKind);
3444
3445 // The cost of the non-predicated instruction.
3446 ScalarizationCost += VF.getKnownMinValue() *
3447 TTI.getArithmeticInstrCost(I->getOpcode(), I->getType(), CostKind);
3448
3449 // The cost of insertelement and extractelement instructions needed for
3450 // scalarization.
3451 ScalarizationCost += getScalarizationOverhead(I, VF, CostKind);
3452
3453 // Scale the cost by the probability of executing the predicated blocks.
3454 // This assumes the predicated block for each vector lane is equally
3455 // likely.
3456 ScalarizationCost = ScalarizationCost / getReciprocalPredBlockProb();
3457 }
3458 InstructionCost SafeDivisorCost = 0;
3459
3460 auto *VecTy = toVectorTy(I->getType(), VF);
3461
3462 // The cost of the select guard to ensure all lanes are well defined
3463 // after we speculate above any internal control flow.
3464 SafeDivisorCost +=
3465 TTI.getCmpSelInstrCost(Instruction::Select, VecTy,
3466 toVectorTy(Type::getInt1Ty(I->getContext()), VF),
3468
3469 // Certain instructions can be cheaper to vectorize if they have a constant
3470 // second vector operand. One example of this are shifts on x86.
3471 Value *Op2 = I->getOperand(1);
3472 auto Op2Info = TTI.getOperandInfo(Op2);
3473 if (Op2Info.Kind == TargetTransformInfo::OK_AnyValue &&
3474 Legal->isInvariant(Op2))
3476
3477 SmallVector<const Value *, 4> Operands(I->operand_values());
3478 SafeDivisorCost += TTI.getArithmeticInstrCost(
3479 I->getOpcode(), VecTy, CostKind,
3480 {TargetTransformInfo::OK_AnyValue, TargetTransformInfo::OP_None},
3481 Op2Info, Operands, I);
3482 return {ScalarizationCost, SafeDivisorCost};
3483}
3484
3486 Instruction *I, ElementCount VF) const {
3487 assert(isAccessInterleaved(I) && "Expecting interleaved access.");
3489 "Decision should not be set yet.");
3490 auto *Group = getInterleavedAccessGroup(I);
3491 assert(Group && "Must have a group.");
3492 unsigned InterleaveFactor = Group->getFactor();
3493
3494 // If the instruction's allocated size doesn't equal its type size, it
3495 // requires padding and will be scalarized.
3496 auto &DL = I->getDataLayout();
3497 auto *ScalarTy = getLoadStoreType(I);
3498 if (hasIrregularType(ScalarTy, DL))
3499 return false;
3500
3501 // We currently only know how to emit interleave/deinterleave with
3502 // Factor=2 for scalable vectors. This is purely an implementation
3503 // limit.
3504 if (VF.isScalable() && InterleaveFactor != 2)
3505 return false;
3506
3507 // If the group involves a non-integral pointer, we may not be able to
3508 // losslessly cast all values to a common type.
3509 bool ScalarNI = DL.isNonIntegralPointerType(ScalarTy);
3510 for (unsigned Idx = 0; Idx < InterleaveFactor; Idx++) {
3511 Instruction *Member = Group->getMember(Idx);
3512 if (!Member)
3513 continue;
3514 auto *MemberTy = getLoadStoreType(Member);
3515 bool MemberNI = DL.isNonIntegralPointerType(MemberTy);
3516 // Don't coerce non-integral pointers to integers or vice versa.
3517 if (MemberNI != ScalarNI)
3518 // TODO: Consider adding special nullptr value case here
3519 return false;
3520 if (MemberNI && ScalarNI &&
3521 ScalarTy->getPointerAddressSpace() !=
3522 MemberTy->getPointerAddressSpace())
3523 return false;
3524 }
3525
3526 // Check if masking is required.
3527 // A Group may need masking for one of two reasons: it resides in a block that
3528 // needs predication, or it was decided to use masking to deal with gaps
3529 // (either a gap at the end of a load-access that may result in a speculative
3530 // load, or any gaps in a store-access).
3531 bool PredicatedAccessRequiresMasking =
3532 blockNeedsPredicationForAnyReason(I->getParent()) &&
3534 bool LoadAccessWithGapsRequiresEpilogMasking =
3535 isa<LoadInst>(I) && Group->requiresScalarEpilogue() &&
3537 bool StoreAccessWithGapsRequiresMasking =
3538 isa<StoreInst>(I) && (Group->getNumMembers() < Group->getFactor());
3539 if (!PredicatedAccessRequiresMasking &&
3540 !LoadAccessWithGapsRequiresEpilogMasking &&
3541 !StoreAccessWithGapsRequiresMasking)
3542 return true;
3543
3544 // If masked interleaving is required, we expect that the user/target had
3545 // enabled it, because otherwise it either wouldn't have been created or
3546 // it should have been invalidated by the CostModel.
3548 "Masked interleave-groups for predicated accesses are not enabled.");
3549
3550 if (Group->isReverse())
3551 return false;
3552
3553 auto *Ty = getLoadStoreType(I);
3554 const Align Alignment = getLoadStoreAlignment(I);
3555 return isa<LoadInst>(I) ? TTI.isLegalMaskedLoad(Ty, Alignment)
3556 : TTI.isLegalMaskedStore(Ty, Alignment);
3557}
3558
3560 Instruction *I, ElementCount VF) {
3561 // Get and ensure we have a valid memory instruction.
3562 assert((isa<LoadInst, StoreInst>(I)) && "Invalid memory instruction");
3563
3565 auto *ScalarTy = getLoadStoreType(I);
3566
3567 // In order to be widened, the pointer should be consecutive, first of all.
3568 if (!Legal->isConsecutivePtr(ScalarTy, Ptr))
3569 return false;
3570
3571 // If the instruction is a store located in a predicated block, it will be
3572 // scalarized.
3573 if (isScalarWithPredication(I, VF))
3574 return false;
3575
3576 // If the instruction's allocated size doesn't equal it's type size, it
3577 // requires padding and will be scalarized.
3578 auto &DL = I->getDataLayout();
3579 if (hasIrregularType(ScalarTy, DL))
3580 return false;
3581
3582 return true;
3583}
3584
3585void LoopVectorizationCostModel::collectLoopUniforms(ElementCount VF) {
3586 // We should not collect Uniforms more than once per VF. Right now,
3587 // this function is called from collectUniformsAndScalars(), which
3588 // already does this check. Collecting Uniforms for VF=1 does not make any
3589 // sense.
3590
3591 assert(VF.isVector() && !Uniforms.contains(VF) &&
3592 "This function should not be visited twice for the same VF");
3593
3594 // Visit the list of Uniforms. If we find no uniform value, we won't
3595 // analyze again. Uniforms.count(VF) will return 1.
3596 Uniforms[VF].clear();
3597
3598 // Now we know that the loop is vectorizable!
3599 // Collect instructions inside the loop that will remain uniform after
3600 // vectorization.
3601
3602 // Global values, params and instructions outside of current loop are out of
3603 // scope.
3604 auto IsOutOfScope = [&](Value *V) -> bool {
3605 Instruction *I = dyn_cast<Instruction>(V);
3606 return (!I || !TheLoop->contains(I));
3607 };
3608
3609 // Worklist containing uniform instructions demanding lane 0.
3610 SetVector<Instruction *> Worklist;
3611
3612 // Add uniform instructions demanding lane 0 to the worklist. Instructions
3613 // that require predication must not be considered uniform after
3614 // vectorization, because that would create an erroneous replicating region
3615 // where only a single instance out of VF should be formed.
3616 auto AddToWorklistIfAllowed = [&](Instruction *I) -> void {
3617 if (IsOutOfScope(I)) {
3618 LLVM_DEBUG(dbgs() << "LV: Found not uniform due to scope: "
3619 << *I << "\n");
3620 return;
3621 }
3622 if (isPredicatedInst(I)) {
3623 LLVM_DEBUG(
3624 dbgs() << "LV: Found not uniform due to requiring predication: " << *I
3625 << "\n");
3626 return;
3627 }
3628 LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *I << "\n");
3629 Worklist.insert(I);
3630 };
3631
3632 // Start with the conditional branches exiting the loop. If the branch
3633 // condition is an instruction contained in the loop that is only used by the
3634 // branch, it is uniform. Note conditions from uncountable early exits are not
3635 // uniform.
3637 TheLoop->getExitingBlocks(Exiting);
3638 for (BasicBlock *E : Exiting) {
3640 continue;
3641 auto *Cmp = dyn_cast<Instruction>(E->getTerminator()->getOperand(0));
3642 if (Cmp && TheLoop->contains(Cmp) && Cmp->hasOneUse())
3643 AddToWorklistIfAllowed(Cmp);
3644 }
3645
3646 auto PrevVF = VF.divideCoefficientBy(2);
3647 // Return true if all lanes perform the same memory operation, and we can
3648 // thus choose to execute only one.
3649 auto IsUniformMemOpUse = [&](Instruction *I) {
3650 // If the value was already known to not be uniform for the previous
3651 // (smaller VF), it cannot be uniform for the larger VF.
3652 if (PrevVF.isVector()) {
3653 auto Iter = Uniforms.find(PrevVF);
3654 if (Iter != Uniforms.end() && !Iter->second.contains(I))
3655 return false;
3656 }
3657 if (!Legal->isUniformMemOp(*I, VF))
3658 return false;
3659 if (isa<LoadInst>(I))
3660 // Loading the same address always produces the same result - at least
3661 // assuming aliasing and ordering which have already been checked.
3662 return true;
3663 // Storing the same value on every iteration.
3664 return TheLoop->isLoopInvariant(cast<StoreInst>(I)->getValueOperand());
3665 };
3666
3667 auto IsUniformDecision = [&](Instruction *I, ElementCount VF) {
3668 InstWidening WideningDecision = getWideningDecision(I, VF);
3669 assert(WideningDecision != CM_Unknown &&
3670 "Widening decision should be ready at this moment");
3671
3672 if (IsUniformMemOpUse(I))
3673 return true;
3674
3675 return (WideningDecision == CM_Widen ||
3676 WideningDecision == CM_Widen_Reverse ||
3677 WideningDecision == CM_Interleave);
3678 };
3679
3680 // Returns true if Ptr is the pointer operand of a memory access instruction
3681 // I, I is known to not require scalarization, and the pointer is not also
3682 // stored.
3683 auto IsVectorizedMemAccessUse = [&](Instruction *I, Value *Ptr) -> bool {
3684 if (isa<StoreInst>(I) && I->getOperand(0) == Ptr)
3685 return false;
3686 return getLoadStorePointerOperand(I) == Ptr &&
3687 (IsUniformDecision(I, VF) || Legal->isInvariant(Ptr));
3688 };
3689
3690 // Holds a list of values which are known to have at least one uniform use.
3691 // Note that there may be other uses which aren't uniform. A "uniform use"
3692 // here is something which only demands lane 0 of the unrolled iterations;
3693 // it does not imply that all lanes produce the same value (e.g. this is not
3694 // the usual meaning of uniform)
3695 SetVector<Value *> HasUniformUse;
3696
3697 // Scan the loop for instructions which are either a) known to have only
3698 // lane 0 demanded or b) are uses which demand only lane 0 of their operand.
3699 for (auto *BB : TheLoop->blocks())
3700 for (auto &I : *BB) {
3701 if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(&I)) {
3702 switch (II->getIntrinsicID()) {
3703 case Intrinsic::sideeffect:
3704 case Intrinsic::experimental_noalias_scope_decl:
3705 case Intrinsic::assume:
3706 case Intrinsic::lifetime_start:
3707 case Intrinsic::lifetime_end:
3709 AddToWorklistIfAllowed(&I);
3710 break;
3711 default:
3712 break;
3713 }
3714 }
3715
3716 // ExtractValue instructions must be uniform, because the operands are
3717 // known to be loop-invariant.
3718 if (auto *EVI = dyn_cast<ExtractValueInst>(&I)) {
3719 assert(IsOutOfScope(EVI->getAggregateOperand()) &&
3720 "Expected aggregate value to be loop invariant");
3721 AddToWorklistIfAllowed(EVI);
3722 continue;
3723 }
3724
3725 // If there's no pointer operand, there's nothing to do.
3727 if (!Ptr)
3728 continue;
3729
3730 if (IsUniformMemOpUse(&I))
3731 AddToWorklistIfAllowed(&I);
3732
3733 if (IsVectorizedMemAccessUse(&I, Ptr))
3734 HasUniformUse.insert(Ptr);
3735 }
3736
3737 // Add to the worklist any operands which have *only* uniform (e.g. lane 0
3738 // demanding) users. Since loops are assumed to be in LCSSA form, this
3739 // disallows uses outside the loop as well.
3740 for (auto *V : HasUniformUse) {
3741 if (IsOutOfScope(V))
3742 continue;
3743 auto *I = cast<Instruction>(V);
3744 bool UsersAreMemAccesses = all_of(I->users(), [&](User *U) -> bool {
3745 auto *UI = cast<Instruction>(U);
3746 return TheLoop->contains(UI) && IsVectorizedMemAccessUse(UI, V);
3747 });
3748 if (UsersAreMemAccesses)
3749 AddToWorklistIfAllowed(I);
3750 }
3751
3752 // Expand Worklist in topological order: whenever a new instruction
3753 // is added , its users should be already inside Worklist. It ensures
3754 // a uniform instruction will only be used by uniform instructions.
3755 unsigned Idx = 0;
3756 while (Idx != Worklist.size()) {
3757 Instruction *I = Worklist[Idx++];
3758
3759 for (auto *OV : I->operand_values()) {
3760 // isOutOfScope operands cannot be uniform instructions.
3761 if (IsOutOfScope(OV))
3762 continue;
3763 // First order recurrence Phi's should typically be considered
3764 // non-uniform.
3765 auto *OP = dyn_cast<PHINode>(OV);
3767 continue;
3768 // If all the users of the operand are uniform, then add the
3769 // operand into the uniform worklist.
3770 auto *OI = cast<Instruction>(OV);
3771 if (llvm::all_of(OI->users(), [&](User *U) -> bool {
3772 auto *J = cast<Instruction>(U);
3773 return Worklist.count(J) || IsVectorizedMemAccessUse(J, OI);
3774 }))
3775 AddToWorklistIfAllowed(OI);
3776 }
3777 }
3778
3779 // For an instruction to be added into Worklist above, all its users inside
3780 // the loop should also be in Worklist. However, this condition cannot be
3781 // true for phi nodes that form a cyclic dependence. We must process phi
3782 // nodes separately. An induction variable will remain uniform if all users
3783 // of the induction variable and induction variable update remain uniform.
3784 // The code below handles both pointer and non-pointer induction variables.
3785 BasicBlock *Latch = TheLoop->getLoopLatch();
3786 for (const auto &Induction : Legal->getInductionVars()) {
3787 auto *Ind = Induction.first;
3788 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
3789
3790 // Determine if all users of the induction variable are uniform after
3791 // vectorization.
3792 bool UniformInd = all_of(Ind->users(), [&](User *U) -> bool {
3793 auto *I = cast<Instruction>(U);
3794 return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I) ||
3795 IsVectorizedMemAccessUse(I, Ind);
3796 });
3797 if (!UniformInd)
3798 continue;
3799
3800 // Determine if all users of the induction variable update instruction are
3801 // uniform after vectorization.
3802 bool UniformIndUpdate = all_of(IndUpdate->users(), [&](User *U) -> bool {
3803 auto *I = cast<Instruction>(U);
3804 return I == Ind || !TheLoop->contains(I) || Worklist.count(I) ||
3805 IsVectorizedMemAccessUse(I, IndUpdate);
3806 });
3807 if (!UniformIndUpdate)
3808 continue;
3809
3810 // The induction variable and its update instruction will remain uniform.
3811 AddToWorklistIfAllowed(Ind);
3812 AddToWorklistIfAllowed(IndUpdate);
3813 }
3814
3815 Uniforms[VF].insert(Worklist.begin(), Worklist.end());
3816}
3817
3819 LLVM_DEBUG(dbgs() << "LV: Performing code size checks.\n");
3820
3822 reportVectorizationFailure("Runtime ptr check is required with -Os/-Oz",
3823 "runtime pointer checks needed. Enable vectorization of this "
3824 "loop with '#pragma clang loop vectorize(enable)' when "
3825 "compiling with -Os/-Oz",
3826 "CantVersionLoopWithOptForSize", ORE, TheLoop);
3827 return true;
3828 }
3829
3830 if (!PSE.getPredicate().isAlwaysTrue()) {
3831 reportVectorizationFailure("Runtime SCEV check is required with -Os/-Oz",
3832 "runtime SCEV checks needed. Enable vectorization of this "
3833 "loop with '#pragma clang loop vectorize(enable)' when "
3834 "compiling with -Os/-Oz",
3835 "CantVersionLoopWithOptForSize", ORE, TheLoop);
3836 return true;
3837 }
3838
3839 // FIXME: Avoid specializing for stride==1 instead of bailing out.
3840 if (!Legal->getLAI()->getSymbolicStrides().empty()) {
3841 reportVectorizationFailure("Runtime stride check for small trip count",
3842 "runtime stride == 1 checks needed. Enable vectorization of "
3843 "this loop without such check by compiling with -Os/-Oz",
3844 "CantVersionLoopWithOptForSize", ORE, TheLoop);
3845 return true;
3846 }
3847
3848 return false;
3849}
3850
3851bool LoopVectorizationCostModel::isScalableVectorizationAllowed() {
3852 if (IsScalableVectorizationAllowed)
3853 return *IsScalableVectorizationAllowed;
3854
3855 IsScalableVectorizationAllowed = false;
3857 return false;
3858
3860 reportVectorizationInfo("Scalable vectorization is explicitly disabled",
3861 "ScalableVectorizationDisabled", ORE, TheLoop);
3862 return false;
3863 }
3864
3865 LLVM_DEBUG(dbgs() << "LV: Scalable vectorization is available\n");
3866
3867 auto MaxScalableVF = ElementCount::getScalable(
3868 std::numeric_limits<ElementCount::ScalarTy>::max());
3869
3870 // Test that the loop-vectorizer can legalize all operations for this MaxVF.
3871 // FIXME: While for scalable vectors this is currently sufficient, this should
3872 // be replaced by a more detailed mechanism that filters out specific VFs,
3873 // instead of invalidating vectorization for a whole set of VFs based on the
3874 // MaxVF.
3875
3876 // Disable scalable vectorization if the loop contains unsupported reductions.
3877 if (!canVectorizeReductions(MaxScalableVF)) {
3879 "Scalable vectorization not supported for the reduction "
3880 "operations found in this loop.",
3881 "ScalableVFUnfeasible", ORE, TheLoop);
3882 return false;
3883 }
3884
3885 // Disable scalable vectorization if the loop contains any instructions
3886 // with element types not supported for scalable vectors.
3887 if (any_of(ElementTypesInLoop, [&](Type *Ty) {
3888 return !Ty->isVoidTy() &&
3890 })) {
3891 reportVectorizationInfo("Scalable vectorization is not supported "
3892 "for all element types found in this loop.",
3893 "ScalableVFUnfeasible", ORE, TheLoop);
3894 return false;
3895 }
3896
3898 reportVectorizationInfo("The target does not provide maximum vscale value "
3899 "for safe distance analysis.",
3900 "ScalableVFUnfeasible", ORE, TheLoop);
3901 return false;
3902 }
3903
3904 IsScalableVectorizationAllowed = true;
3905 return true;
3906}
3907
3909LoopVectorizationCostModel::getMaxLegalScalableVF(unsigned MaxSafeElements) {
3910 if (!isScalableVectorizationAllowed())
3911 return ElementCount::getScalable(0);
3912
3913 auto MaxScalableVF = ElementCount::getScalable(
3914 std::numeric_limits<ElementCount::ScalarTy>::max());
3916 return MaxScalableVF;
3917
3918 std::optional<unsigned> MaxVScale = getMaxVScale(*TheFunction, TTI);
3919 // Limit MaxScalableVF by the maximum safe dependence distance.
3920 MaxScalableVF = ElementCount::getScalable(MaxSafeElements / *MaxVScale);
3921
3922 if (!MaxScalableVF)
3924 "Max legal vector width too small, scalable vectorization "
3925 "unfeasible.",
3926 "ScalableVFUnfeasible", ORE, TheLoop);
3927
3928 return MaxScalableVF;
3929}
3930
3931FixedScalableVFPair LoopVectorizationCostModel::computeFeasibleMaxVF(
3932 unsigned MaxTripCount, ElementCount UserVF, bool FoldTailByMasking) {
3934 unsigned SmallestType, WidestType;
3935 std::tie(SmallestType, WidestType) = getSmallestAndWidestTypes();
3936
3937 // Get the maximum safe dependence distance in bits computed by LAA.
3938 // It is computed by MaxVF * sizeOf(type) * 8, where type is taken from
3939 // the memory accesses that is most restrictive (involved in the smallest
3940 // dependence distance).
3941 unsigned MaxSafeElements =
3943
3944 auto MaxSafeFixedVF = ElementCount::getFixed(MaxSafeElements);
3945 auto MaxSafeScalableVF = getMaxLegalScalableVF(MaxSafeElements);
3947 this->MaxSafeElements = MaxSafeElements;
3948
3949 LLVM_DEBUG(dbgs() << "LV: The max safe fixed VF is: " << MaxSafeFixedVF
3950 << ".\n");
3951 LLVM_DEBUG(dbgs() << "LV: The max safe scalable VF is: " << MaxSafeScalableVF
3952 << ".\n");
3953
3954 // First analyze the UserVF, fall back if the UserVF should be ignored.
3955 if (UserVF) {
3956 auto MaxSafeUserVF =
3957 UserVF.isScalable() ? MaxSafeScalableVF : MaxSafeFixedVF;
3958
3959 if (ElementCount::isKnownLE(UserVF, MaxSafeUserVF)) {
3960 // If `VF=vscale x N` is safe, then so is `VF=N`
3961 if (UserVF.isScalable())
3962 return FixedScalableVFPair(
3963 ElementCount::getFixed(UserVF.getKnownMinValue()), UserVF);
3964
3965 return UserVF;
3966 }
3967
3968 assert(ElementCount::isKnownGT(UserVF, MaxSafeUserVF));
3969
3970 // Only clamp if the UserVF is not scalable. If the UserVF is scalable, it
3971 // is better to ignore the hint and let the compiler choose a suitable VF.
3972 if (!UserVF.isScalable()) {
3973 LLVM_DEBUG(dbgs() << "LV: User VF=" << UserVF
3974 << " is unsafe, clamping to max safe VF="
3975 << MaxSafeFixedVF << ".\n");
3976 ORE->emit([&]() {
3977 return OptimizationRemarkAnalysis(DEBUG_TYPE, "VectorizationFactor",
3979 TheLoop->getHeader())
3980 << "User-specified vectorization factor "
3981 << ore::NV("UserVectorizationFactor", UserVF)
3982 << " is unsafe, clamping to maximum safe vectorization factor "
3983 << ore::NV("VectorizationFactor", MaxSafeFixedVF);
3984 });
3985 return MaxSafeFixedVF;
3986 }
3987
3989 LLVM_DEBUG(dbgs() << "LV: User VF=" << UserVF
3990 << " is ignored because scalable vectors are not "
3991 "available.\n");
3992 ORE->emit([&]() {
3993 return OptimizationRemarkAnalysis(DEBUG_TYPE, "VectorizationFactor",
3995 TheLoop->getHeader())
3996 << "User-specified vectorization factor "
3997 << ore::NV("UserVectorizationFactor", UserVF)
3998 << " is ignored because the target does not support scalable "
3999 "vectors. The compiler will pick a more suitable value.";
4000 });
4001 } else {
4002 LLVM_DEBUG(dbgs() << "LV: User VF=" << UserVF
4003 << " is unsafe. Ignoring scalable UserVF.\n");
4004 ORE->emit([&]() {
4005 return OptimizationRemarkAnalysis(DEBUG_TYPE, "VectorizationFactor",
4007 TheLoop->getHeader())
4008 << "User-specified vectorization factor "
4009 << ore::NV("UserVectorizationFactor", UserVF)
4010 << " is unsafe. Ignoring the hint to let the compiler pick a "
4011 "more suitable value.";
4012 });
4013 }
4014 }
4015
4016 LLVM_DEBUG(dbgs() << "LV: The Smallest and Widest types: " << SmallestType
4017 << " / " << WidestType << " bits.\n");
4018
4021 if (auto MaxVF =
4022 getMaximizedVFForTarget(MaxTripCount, SmallestType, WidestType,
4023 MaxSafeFixedVF, FoldTailByMasking))
4024 Result.FixedVF = MaxVF;
4025
4026 if (auto MaxVF =
4027 getMaximizedVFForTarget(MaxTripCount, SmallestType, WidestType,
4028 MaxSafeScalableVF, FoldTailByMasking))
4029 if (MaxVF.isScalable()) {
4030 Result.ScalableVF = MaxVF;
4031 LLVM_DEBUG(dbgs() << "LV: Found feasible scalable VF = " << MaxVF
4032 << "\n");
4033 }
4034
4035 return Result;
4036}
4037
4041 // TODO: It may be useful to do since it's still likely to be dynamically
4042 // uniform if the target can skip.
4044 "Not inserting runtime ptr check for divergent target",
4045 "runtime pointer checks needed. Not enabled for divergent target",
4046 "CantVersionLoopWithDivergentTarget", ORE, TheLoop);
4048 }
4049
4050 unsigned TC = PSE.getSE()->getSmallConstantTripCount(TheLoop);
4051 unsigned MaxTC = PSE.getSmallConstantMaxTripCount();
4052 LLVM_DEBUG(dbgs() << "LV: Found trip count: " << TC << '\n');
4053 if (TC != MaxTC)
4054 LLVM_DEBUG(dbgs() << "LV: Found maximum trip count: " << MaxTC << '\n');
4055 if (TC == 1) {
4056 reportVectorizationFailure("Single iteration (non) loop",
4057 "loop trip count is one, irrelevant for vectorization",
4058 "SingleIterationLoop", ORE, TheLoop);
4060 }
4061
4062 switch (ScalarEpilogueStatus) {
4064 return computeFeasibleMaxVF(MaxTC, UserVF, false);
4066 [[fallthrough]];
4068 LLVM_DEBUG(
4069 dbgs() << "LV: vector predicate hint/switch found.\n"
4070 << "LV: Not allowing scalar epilogue, creating predicated "
4071 << "vector loop.\n");
4072 break;
4074 // fallthrough as a special case of OptForSize
4076 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotAllowedOptSize)
4077 LLVM_DEBUG(
4078 dbgs() << "LV: Not allowing scalar epilogue due to -Os/-Oz.\n");
4079 else
4080 LLVM_DEBUG(dbgs() << "LV: Not allowing scalar epilogue due to low trip "
4081 << "count.\n");
4082
4083 // Bail if runtime checks are required, which are not good when optimising
4084 // for size.
4087
4088 break;
4089 }
4090
4091 // The only loops we can vectorize without a scalar epilogue, are loops with
4092 // a bottom-test and a single exiting block. We'd have to handle the fact
4093 // that not every instruction executes on the last iteration. This will
4094 // require a lane mask which varies through the vector loop body. (TODO)
4096 // If there was a tail-folding hint/switch, but we can't fold the tail by
4097 // masking, fallback to a vectorization with a scalar epilogue.
4098 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotNeededUsePredicate) {
4099 LLVM_DEBUG(dbgs() << "LV: Cannot fold tail by masking: vectorize with a "
4100 "scalar epilogue instead.\n");
4101 ScalarEpilogueStatus = CM_ScalarEpilogueAllowed;
4102 return computeFeasibleMaxVF(MaxTC, UserVF, false);
4103 }
4105 }
4106
4107 // Now try the tail folding
4108
4109 // Invalidate interleave groups that require an epilogue if we can't mask
4110 // the interleave-group.
4112 assert(WideningDecisions.empty() && Uniforms.empty() && Scalars.empty() &&
4113 "No decisions should have been taken at this point");
4114 // Note: There is no need to invalidate any cost modeling decisions here, as
4115 // none were taken so far.
4117 }
4118
4119 FixedScalableVFPair MaxFactors = computeFeasibleMaxVF(MaxTC, UserVF, true);
4120
4121 // Avoid tail folding if the trip count is known to be a multiple of any VF
4122 // we choose.
4123 std::optional<unsigned> MaxPowerOf2RuntimeVF =
4124 MaxFactors.FixedVF.getFixedValue();
4125 if (MaxFactors.ScalableVF) {
4126 std::optional<unsigned> MaxVScale = getMaxVScale(*TheFunction, TTI);
4127 if (MaxVScale && TTI.isVScaleKnownToBeAPowerOfTwo()) {
4128 MaxPowerOf2RuntimeVF = std::max<unsigned>(
4129 *MaxPowerOf2RuntimeVF,
4130 *MaxVScale * MaxFactors.ScalableVF.getKnownMinValue());
4131 } else
4132 MaxPowerOf2RuntimeVF = std::nullopt; // Stick with tail-folding for now.
4133 }
4134
4135 if (MaxPowerOf2RuntimeVF && *MaxPowerOf2RuntimeVF > 0) {
4136 assert((UserVF.isNonZero() || isPowerOf2_32(*MaxPowerOf2RuntimeVF)) &&
4137 "MaxFixedVF must be a power of 2");
4138 unsigned MaxVFtimesIC =
4139 UserIC ? *MaxPowerOf2RuntimeVF * UserIC : *MaxPowerOf2RuntimeVF;
4140 ScalarEvolution *SE = PSE.getSE();
4141 // Currently only loops with countable exits are vectorized, but calling
4142 // getSymbolicMaxBackedgeTakenCount allows enablement work for loops with
4143 // uncountable exits whilst also ensuring the symbolic maximum and known
4144 // back-edge taken count remain identical for loops with countable exits.
4145 const SCEV *BackedgeTakenCount = PSE.getSymbolicMaxBackedgeTakenCount();
4146 assert(BackedgeTakenCount == PSE.getBackedgeTakenCount() &&
4147 "Invalid loop count");
4148 const SCEV *ExitCount = SE->getAddExpr(
4149 BackedgeTakenCount, SE->getOne(BackedgeTakenCount->getType()));
4150 const SCEV *Rem = SE->getURemExpr(
4151 SE->applyLoopGuards(ExitCount, TheLoop),
4152 SE->getConstant(BackedgeTakenCount->getType(), MaxVFtimesIC));
4153 if (Rem->isZero()) {
4154 // Accept MaxFixedVF if we do not have a tail.
4155 LLVM_DEBUG(dbgs() << "LV: No tail will remain for any chosen VF.\n");
4156 return MaxFactors;
4157 }
4158 }
4159
4160 // If we don't know the precise trip count, or if the trip count that we
4161 // found modulo the vectorization factor is not zero, try to fold the tail
4162 // by masking.
4163 // FIXME: look for a smaller MaxVF that does divide TC rather than masking.
4164 setTailFoldingStyles(MaxFactors.ScalableVF.isScalable(), UserIC);
4165 if (foldTailByMasking()) {
4167 LLVM_DEBUG(
4168 dbgs()
4169 << "LV: tail is folded with EVL, forcing unroll factor to be 1. Will "
4170 "try to generate VP Intrinsics with scalable vector "
4171 "factors only.\n");
4172 // Tail folded loop using VP intrinsics restricts the VF to be scalable
4173 // for now.
4174 // TODO: extend it for fixed vectors, if required.
4175 assert(MaxFactors.ScalableVF.isScalable() &&
4176 "Expected scalable vector factor.");
4177
4178 MaxFactors.FixedVF = ElementCount::getFixed(1);
4179 }
4180 return MaxFactors;
4181 }
4182
4183 // If there was a tail-folding hint/switch, but we can't fold the tail by
4184 // masking, fallback to a vectorization with a scalar epilogue.
4185 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotNeededUsePredicate) {
4186 LLVM_DEBUG(dbgs() << "LV: Cannot fold tail by masking: vectorize with a "
4187 "scalar epilogue instead.\n");
4188 ScalarEpilogueStatus = CM_ScalarEpilogueAllowed;
4189 return MaxFactors;
4190 }
4191
4192 if (ScalarEpilogueStatus == CM_ScalarEpilogueNotAllowedUsePredicate) {
4193 LLVM_DEBUG(dbgs() << "LV: Can't fold tail by masking: don't vectorize\n");
4195 }
4196
4197 if (TC == 0) {
4199 "unable to calculate the loop count due to complex control flow",
4200 "UnknownLoopCountComplexCFG", ORE, TheLoop);
4202 }
4203
4205 "Cannot optimize for size and vectorize at the same time.",
4206 "cannot optimize for size and vectorize at the same time. "
4207 "Enable vectorization of this loop with '#pragma clang loop "
4208 "vectorize(enable)' when compiling with -Os/-Oz",
4209 "NoTailLoopWithOptForSize", ORE, TheLoop);
4211}
4212
4213ElementCount LoopVectorizationCostModel::getMaximizedVFForTarget(
4214 unsigned MaxTripCount, unsigned SmallestType, unsigned WidestType,
4215 ElementCount MaxSafeVF, bool FoldTailByMasking) {
4216 bool ComputeScalableMaxVF = MaxSafeVF.isScalable();
4217 const TypeSize WidestRegister = TTI.getRegisterBitWidth(
4218 ComputeScalableMaxVF ? TargetTransformInfo::RGK_ScalableVector
4220
4221 // Convenience function to return the minimum of two ElementCounts.
4222 auto MinVF = [](const ElementCount &LHS, const ElementCount &RHS) {
4223 assert((LHS.isScalable() == RHS.isScalable()) &&
4224 "Scalable flags must match");
4225 return ElementCount::isKnownLT(LHS, RHS) ? LHS : RHS;
4226 };
4227
4228 // Ensure MaxVF is a power of 2; the dependence distance bound may not be.
4229 // Note that both WidestRegister and WidestType may not be a powers of 2.
4230 auto MaxVectorElementCount = ElementCount::get(
4231 llvm::bit_floor(WidestRegister.getKnownMinValue() / WidestType),
4232 ComputeScalableMaxVF);
4233 MaxVectorElementCount = MinVF(MaxVectorElementCount, MaxSafeVF);
4234 LLVM_DEBUG(dbgs() << "LV: The Widest register safe to use is: "
4235 << (MaxVectorElementCount * WidestType) << " bits.\n");
4236
4237 if (!MaxVectorElementCount) {
4238 LLVM_DEBUG(dbgs() << "LV: The target has no "
4239 << (ComputeScalableMaxVF ? "scalable" : "fixed")
4240 << " vector registers.\n");
4241 return ElementCount::getFixed(1);
4242 }
4243
4244 unsigned WidestRegisterMinEC = MaxVectorElementCount.getKnownMinValue();
4245 if (MaxVectorElementCount.isScalable() &&
4246 TheFunction->hasFnAttribute(Attribute::VScaleRange)) {
4247 auto Attr = TheFunction->getFnAttribute(Attribute::VScaleRange);
4248 auto Min = Attr.getVScaleRangeMin();
4249 WidestRegisterMinEC *= Min;
4250 }
4251
4252 // When a scalar epilogue is required, at least one iteration of the scalar
4253 // loop has to execute. Adjust MaxTripCount accordingly to avoid picking a
4254 // max VF that results in a dead vector loop.
4255 if (MaxTripCount > 0 && requiresScalarEpilogue(true))
4256 MaxTripCount -= 1;
4257
4258 if (MaxTripCount && MaxTripCount <= WidestRegisterMinEC &&
4259 (!FoldTailByMasking || isPowerOf2_32(MaxTripCount))) {
4260 // If upper bound loop trip count (TC) is known at compile time there is no
4261 // point in choosing VF greater than TC (as done in the loop below). Select
4262 // maximum power of two which doesn't exceed TC. If MaxVectorElementCount is
4263 // scalable, we only fall back on a fixed VF when the TC is less than or
4264 // equal to the known number of lanes.
4265 auto ClampedUpperTripCount = llvm::bit_floor(MaxTripCount);
4266 LLVM_DEBUG(dbgs() << "LV: Clamping the MaxVF to maximum power of two not "
4267 "exceeding the constant trip count: "
4268 << ClampedUpperTripCount << "\n");
4269 return ElementCount::get(
4270 ClampedUpperTripCount,
4271 FoldTailByMasking ? MaxVectorElementCount.isScalable() : false);
4272 }
4273
4275 ComputeScalableMaxVF ? TargetTransformInfo::RGK_ScalableVector
4277 ElementCount MaxVF = MaxVectorElementCount;
4278 if (MaximizeBandwidth ||
4279 (MaximizeBandwidth.getNumOccurrences() == 0 &&
4282 auto MaxVectorElementCountMaxBW = ElementCount::get(
4283 llvm::bit_floor(WidestRegister.getKnownMinValue() / SmallestType),
4284 ComputeScalableMaxVF);
4285 MaxVectorElementCountMaxBW = MinVF(MaxVectorElementCountMaxBW, MaxSafeVF);
4286
4287 // Collect all viable vectorization factors larger than the default MaxVF
4288 // (i.e. MaxVectorElementCount).
4290 for (ElementCount VS = MaxVectorElementCount * 2;
4291 ElementCount::isKnownLE(VS, MaxVectorElementCountMaxBW); VS *= 2)
4292 VFs.push_back(VS);
4293
4294 // For each VF calculate its register usage.
4295 auto RUs = calculateRegisterUsage(VFs);
4296
4297 // Select the largest VF which doesn't require more registers than existing
4298 // ones.
4299 for (int I = RUs.size() - 1; I >= 0; --I) {
4300 const auto &MLU = RUs[I].MaxLocalUsers;
4301 if (all_of(MLU, [&](decltype(MLU.front()) &LU) {
4302 return LU.second <= TTI.getNumberOfRegisters(LU.first);
4303 })) {
4304 MaxVF = VFs[I];
4305 break;
4306 }
4307 }
4308 if (ElementCount MinVF =
4309 TTI.getMinimumVF(SmallestType, ComputeScalableMaxVF)) {
4310 if (ElementCount::isKnownLT(MaxVF, MinVF)) {
4311 LLVM_DEBUG(dbgs() << "LV: Overriding calculated MaxVF(" << MaxVF
4312 << ") with target's minimum: " << MinVF << '\n');
4313 MaxVF = MinVF;
4314 }
4315 }
4316
4317 // Invalidate any widening decisions we might have made, in case the loop
4318 // requires prediction (decided later), but we have already made some
4319 // load/store widening decisions.
4321 }
4322 return MaxVF;
4323}
4324
4325/// Convenience function that returns the value of vscale_range iff
4326/// vscale_range.min == vscale_range.max or otherwise returns the value
4327/// returned by the corresponding TTI method.
4328static std::optional<unsigned>
4330 const Function *Fn = L->getHeader()->getParent();
4331 if (Fn->hasFnAttribute(Attribute::VScaleRange)) {
4332 auto Attr = Fn->getFnAttribute(Attribute::VScaleRange);
4333 auto Min = Attr.getVScaleRangeMin();
4334 auto Max = Attr.getVScaleRangeMax();
4335 if (Max && Min == Max)
4336 return Max;
4337 }
4338
4339 return TTI.getVScaleForTuning();
4340}
4341
4342/// This function attempts to return a value that represents the vectorization
4343/// factor at runtime. For fixed-width VFs we know this precisely at compile
4344/// time, but for scalable VFs we calculate it based on an estimate of the
4345/// vscale value.
4346static unsigned getEstimatedRuntimeVF(const Loop *L,
4347 const TargetTransformInfo &TTI,
4348 ElementCount VF) {
4349 unsigned EstimatedVF = VF.getKnownMinValue();
4350 if (VF.isScalable())
4351 if (std::optional<unsigned> VScale = getVScaleForTuning(L, TTI))
4352 EstimatedVF *= *VScale;
4353 assert(EstimatedVF >= 1 && "Estimated VF shouldn't be less than 1");
4354 return EstimatedVF;
4355}
4356
4357bool LoopVectorizationPlanner::isMoreProfitable(
4359 const unsigned MaxTripCount) const {
4360 InstructionCost CostA = A.Cost;
4361 InstructionCost CostB = B.Cost;
4362
4363 // Improve estimate for the vector width if it is scalable.
4364 unsigned EstimatedWidthA = A.Width.getKnownMinValue();
4365 unsigned EstimatedWidthB = B.Width.getKnownMinValue();
4366 if (std::optional<unsigned> VScale = getVScaleForTuning(OrigLoop, TTI)) {
4367 if (A.Width.isScalable())
4368 EstimatedWidthA *= *VScale;
4369 if (B.Width.isScalable())
4370 EstimatedWidthB *= *VScale;
4371 }
4372
4373 // Assume vscale may be larger than 1 (or the value being tuned for),
4374 // so that scalable vectorization is slightly favorable over fixed-width
4375 // vectorization.
4376 bool PreferScalable = !TTI.preferFixedOverScalableIfEqualCost() &&
4377 A.Width.isScalable() && !B.Width.isScalable();
4378
4379 auto CmpFn = [PreferScalable](const InstructionCost &LHS,
4380 const InstructionCost &RHS) {
4381 return PreferScalable ? LHS <= RHS : LHS < RHS;
4382 };
4383
4384 // To avoid the need for FP division:
4385 // (CostA / EstimatedWidthA) < (CostB / EstimatedWidthB)
4386 // <=> (CostA * EstimatedWidthB) < (CostB * EstimatedWidthA)
4387 if (!MaxTripCount)
4388 return CmpFn(CostA * EstimatedWidthB, CostB * EstimatedWidthA);
4389
4390 auto GetCostForTC = [MaxTripCount, this](unsigned VF,
4391 InstructionCost VectorCost,
4392 InstructionCost ScalarCost) {
4393 // If the trip count is a known (possibly small) constant, the trip count
4394 // will be rounded up to an integer number of iterations under
4395 // FoldTailByMasking. The total cost in that case will be
4396 // VecCost*ceil(TripCount/VF). When not folding the tail, the total
4397 // cost will be VecCost*floor(TC/VF) + ScalarCost*(TC%VF). There will be
4398 // some extra overheads, but for the purpose of comparing the costs of
4399 // different VFs we can use this to compare the total loop-body cost
4400 // expected after vectorization.
4401 if (CM.foldTailByMasking())
4402 return VectorCost * divideCeil(MaxTripCount, VF);
4403 return VectorCost * (MaxTripCount / VF) + ScalarCost * (MaxTripCount % VF);
4404 };
4405
4406 auto RTCostA = GetCostForTC(EstimatedWidthA, CostA, A.ScalarCost);
4407 auto RTCostB = GetCostForTC(EstimatedWidthB, CostB, B.ScalarCost);
4408 return CmpFn(RTCostA, RTCostB);
4409}
4410
4411bool LoopVectorizationPlanner::isMoreProfitable(
4412 const VectorizationFactor &A, const VectorizationFactor &B) const {
4413 const unsigned MaxTripCount = PSE.getSmallConstantMaxTripCount();
4414 return LoopVectorizationPlanner::isMoreProfitable(A, B, MaxTripCount);
4415}
4416
4419 using RecipeVFPair = std::pair<VPRecipeBase *, ElementCount>;
4420 SmallVector<RecipeVFPair> InvalidCosts;
4421 for (const auto &Plan : VPlans) {
4422 for (ElementCount VF : Plan->vectorFactors()) {
4423 VPCostContext CostCtx(CM.TTI, *CM.TLI, Legal->getWidestInductionType(),
4424 CM);
4425 precomputeCosts(*Plan, VF, CostCtx);
4426 auto Iter = vp_depth_first_deep(Plan->getVectorLoopRegion()->getEntry());
4427 for (VPBasicBlock *VPBB : VPBlockUtils::blocksOnly<VPBasicBlock>(Iter)) {
4428 for (auto &R : *VPBB) {
4429 if (!R.cost(VF, CostCtx).isValid())
4430 InvalidCosts.emplace_back(&R, VF);
4431 }
4432 }
4433 }
4434 }
4435 if (InvalidCosts.empty())
4436 return;
4437
4438 // Emit a report of VFs with invalid costs in the loop.
4439
4440 // Group the remarks per recipe, keeping the recipe order from InvalidCosts.
4442 unsigned I = 0;
4443 for (auto &Pair : InvalidCosts)
4444 if (!Numbering.count(Pair.first))
4445 Numbering[Pair.first] = I++;
4446
4447 // Sort the list, first on recipe(number) then on VF.
4448 sort(InvalidCosts, [&Numbering](RecipeVFPair &A, RecipeVFPair &B) {
4449 if (Numbering[A.first] != Numbering[B.first])
4450 return Numbering[A.first] < Numbering[B.first];
4451 const auto &LHS = A.second;
4452 const auto &RHS = B.second;
4453 return std::make_tuple(LHS.isScalable(), LHS.getKnownMinValue()) <
4454 std::make_tuple(RHS.isScalable(), RHS.getKnownMinValue());
4455 });
4456
4457 // For a list of ordered recipe-VF pairs:
4458 // [(load, VF1), (load, VF2), (store, VF1)]
4459 // group the recipes together to emit separate remarks for:
4460 // load (VF1, VF2)
4461 // store (VF1)
4462 auto Tail = ArrayRef<RecipeVFPair>(InvalidCosts);
4463 auto Subset = ArrayRef<RecipeVFPair>();
4464 do {
4465 if (Subset.empty())
4466 Subset = Tail.take_front(1);
4467
4468 VPRecipeBase *R = Subset.front().first;
4469
4470 unsigned Opcode =
4473 [](const auto *R) { return Instruction::PHI; })
4474 .Case<VPWidenSelectRecipe>(
4475 [](const auto *R) { return Instruction::Select; })
4476 .Case<VPWidenStoreRecipe>(
4477 [](const auto *R) { return Instruction::Store; })
4478 .Case<VPWidenLoadRecipe>(
4479 [](const auto *R) { return Instruction::Load; })
4480 .Case<VPWidenCallRecipe, VPWidenIntrinsicRecipe>(
4481 [](const auto *R) { return Instruction::Call; })
4484 [](const auto *R) { return R->getOpcode(); })
4485 .Case<VPInterleaveRecipe>([](const VPInterleaveRecipe *R) {
4486 return R->getStoredValues().empty() ? Instruction::Load
4487 : Instruction::Store;
4488 });
4489
4490 // If the next recipe is different, or if there are no other pairs,
4491 // emit a remark for the collated subset. e.g.
4492 // [(load, VF1), (load, VF2))]
4493 // to emit:
4494 // remark: invalid costs for 'load' at VF=(VF1, VF2)
4495 if (Subset == Tail || Tail[Subset.size()].first != R) {
4496 std::string OutString;
4497 raw_string_ostream OS(OutString);
4498 assert(!Subset.empty() && "Unexpected empty range");
4499 OS << "Recipe with invalid costs prevented vectorization at VF=(";
4500 for (const auto &Pair : Subset)
4501 OS << (Pair.second == Subset.front().second ? "" : ", ") << Pair.second;
4502 OS << "):";
4503 if (Opcode == Instruction::Call) {
4504 StringRef Name = "";
4505 if (auto *Int = dyn_cast<VPWidenIntrinsicRecipe>(R)) {
4506 Name = Int->getIntrinsicName();
4507 } else {
4508 auto *WidenCall = dyn_cast<VPWidenCallRecipe>(R);
4509 Function *CalledFn =
4510 WidenCall ? WidenCall->getCalledScalarFunction()
4511 : cast<Function>(R->getOperand(R->getNumOperands() - 1)
4512 ->getLiveInIRValue());
4513 Name = CalledFn->getName();
4514 }
4515 OS << " call to " << Name;
4516 } else
4517 OS << " " << Instruction::getOpcodeName(Opcode);
4518 reportVectorizationInfo(OutString, "InvalidCost", ORE, OrigLoop, nullptr,
4519 R->getDebugLoc());
4520 Tail = Tail.drop_front(Subset.size());
4521 Subset = {};
4522 } else
4523 // Grow the subset by one element
4524 Subset = Tail.take_front(Subset.size() + 1);
4525 } while (!Tail.empty());
4526}
4527
4528/// Check if any recipe of \p Plan will generate a vector value, which will be
4529/// assigned a vector register.
4531 const TargetTransformInfo &TTI) {
4532 assert(VF.isVector() && "Checking a scalar VF?");
4533 VPTypeAnalysis TypeInfo(Plan.getCanonicalIV()->getScalarType());
4534 DenseSet<VPRecipeBase *> EphemeralRecipes;
4535 collectEphemeralRecipesForVPlan(Plan, EphemeralRecipes);
4536 // Set of already visited types.
4537 DenseSet<Type *> Visited;
4538 for (VPBasicBlock *VPBB : VPBlockUtils::blocksOnly<VPBasicBlock>(
4540 for (VPRecipeBase &R : *VPBB) {
4541 if (EphemeralRecipes.contains(&R))
4542 continue;
4543 // Continue early if the recipe is considered to not produce a vector
4544 // result. Note that this includes VPInstruction where some opcodes may
4545 // produce a vector, to preserve existing behavior as VPInstructions model
4546 // aspects not directly mapped to existing IR instructions.
4547 switch (R.getVPDefID()) {
4548 case VPDef::VPDerivedIVSC:
4549 case VPDef::VPScalarIVStepsSC:
4550 case VPDef::VPScalarCastSC:
4551 case VPDef::VPReplicateSC:
4552 case VPDef::VPInstructionSC:
4553 case VPDef::VPCanonicalIVPHISC:
4554 case VPDef::VPVectorPointerSC:
4555 case VPDef::VPReverseVectorPointerSC:
4556 case VPDef::VPExpandSCEVSC:
4557 case VPDef::VPEVLBasedIVPHISC:
4558 case VPDef::VPPredInstPHISC:
4559 case VPDef::VPBranchOnMaskSC:
4560 continue;
4561 case VPDef::VPReductionSC:
4562 case VPDef::VPActiveLaneMaskPHISC:
4563 case VPDef::VPWidenCallSC:
4564 case VPDef::VPWidenCanonicalIVSC:
4565 case VPDef::VPWidenCastSC:
4566 case VPDef::VPWidenGEPSC:
4567 case VPDef::VPWidenIntrinsicSC:
4568 case VPDef::VPWidenSC:
4569 case VPDef::VPWidenSelectSC:
4570 case VPDef::VPBlendSC:
4571 case VPDef::VPFirstOrderRecurrencePHISC:
4572 case VPDef::VPWidenPHISC:
4573 case VPDef::VPWidenIntOrFpInductionSC:
4574 case VPDef::VPWidenPointerInductionSC:
4575 case VPDef::VPReductionPHISC:
4576 case VPDef::VPInterleaveSC:
4577 case VPDef::VPWidenLoadEVLSC:
4578 case VPDef::VPWidenLoadSC:
4579 case VPDef::VPWidenStoreEVLSC:
4580 case VPDef::VPWidenStoreSC:
4581 break;
4582 default:
4583 llvm_unreachable("unhandled recipe");
4584 }
4585
4586 auto WillWiden = [&TTI, VF](Type *ScalarTy) {
4587 Type *VectorTy = toVectorTy(ScalarTy, VF);
4588 unsigned NumLegalParts = TTI.getNumberOfParts(VectorTy);
4589 if (!NumLegalParts)
4590 return false;
4591 if (VF.isScalable()) {
4592 // <vscale x 1 x iN> is assumed to be profitable over iN because
4593 // scalable registers are a distinct register class from scalar
4594 // ones. If we ever find a target which wants to lower scalable
4595 // vectors back to scalars, we'll need to update this code to
4596 // explicitly ask TTI about the register class uses for each part.
4597 return NumLegalParts <= VF.getKnownMinValue();
4598 }
4599 // Two or more parts that share a register - are vectorized.
4600 return NumLegalParts < VF.getKnownMinValue();
4601 };
4602
4603 // If no def nor is a store, e.g., branches, continue - no value to check.
4604 if (R.getNumDefinedValues() == 0 &&
4605 !isa<VPWidenStoreRecipe, VPWidenStoreEVLRecipe, VPInterleaveRecipe>(
4606 &R))
4607 continue;
4608 // For multi-def recipes, currently only interleaved loads, suffice to
4609 // check first def only.
4610 // For stores check their stored value; for interleaved stores suffice
4611 // the check first stored value only. In all cases this is the second
4612 // operand.
4613 VPValue *ToCheck =
4614 R.getNumDefinedValues() >= 1 ? R.getVPValue(0) : R.getOperand(1);
4615 Type *ScalarTy = TypeInfo.inferScalarType(ToCheck);
4616 if (!Visited.insert({ScalarTy}).second)
4617 continue;
4618 if (WillWiden(ScalarTy))
4619 return true;
4620 }
4621 }
4622
4623 return false;
4624}
4625
4626#ifndef NDEBUG
4627VectorizationFactor LoopVectorizationPlanner::selectVectorizationFactor() {
4629 LLVM_DEBUG(dbgs() << "LV: Scalar loop costs: " << ExpectedCost << ".\n");
4630 assert(ExpectedCost.isValid() && "Unexpected invalid cost for scalar loop");
4631 assert(any_of(VPlans,
4632 [](std::unique_ptr<VPlan> &P) {
4633 return P->hasVF(ElementCount::getFixed(1));
4634 }) &&
4635 "Expected Scalar VF to be a candidate");
4636
4637 const VectorizationFactor ScalarCost(ElementCount::getFixed(1), ExpectedCost,
4638 ExpectedCost);
4639 VectorizationFactor ChosenFactor = ScalarCost;
4640
4641 bool ForceVectorization = Hints.getForce() == LoopVectorizeHints::FK_Enabled;
4642 if (ForceVectorization &&
4643 (VPlans.size() > 1 || !VPlans[0]->hasScalarVFOnly())) {
4644 // Ignore scalar width, because the user explicitly wants vectorization.
4645 // Initialize cost to max so that VF = 2 is, at least, chosen during cost
4646 // evaluation.
4647 ChosenFactor.Cost = InstructionCost::getMax();
4648 }
4649
4650 for (auto &P : VPlans) {
4651 for (ElementCount VF : P->vectorFactors()) {
4652 // The cost for scalar VF=1 is already calculated, so ignore it.
4653 if (VF.isScalar())
4654 continue;
4655
4657 VectorizationFactor Candidate(VF, C, ScalarCost.ScalarCost);
4658
4659 unsigned Width = getEstimatedRuntimeVF(OrigLoop, TTI, Candidate.Width);
4660 LLVM_DEBUG(dbgs() << "LV: Vector loop of width " << VF
4661 << " costs: " << (Candidate.Cost / Width));
4662 if (VF.isScalable())
4663 LLVM_DEBUG(dbgs() << " (assuming a minimum vscale of "
4664 << getVScaleForTuning(OrigLoop, TTI).value_or(1)
4665 << ")");
4666 LLVM_DEBUG(dbgs() << ".\n");
4667
4668 if (!ForceVectorization && !willGenerateVectors(*P, VF, TTI)) {
4669 LLVM_DEBUG(
4670 dbgs()
4671 << "LV: Not considering vector loop of width " << VF
4672 << " because it will not generate any vector instructions.\n");
4673 continue;
4674 }
4675
4676 if (isMoreProfitable(Candidate, ChosenFactor))
4677 ChosenFactor = Candidate;
4678 }
4679 }
4680
4683 "There are conditional stores.",
4684 "store that is conditionally executed prevents vectorization",
4685 "ConditionalStore", ORE, OrigLoop);
4686 ChosenFactor = ScalarCost;
4687 }
4688
4689 LLVM_DEBUG(if (ForceVectorization && !ChosenFactor.Width.isScalar() &&
4690 !isMoreProfitable(ChosenFactor, ScalarCost)) dbgs()
4691 << "LV: Vectorization seems to be not beneficial, "
4692 << "but was forced by a user.\n");
4693 LLVM_DEBUG(dbgs() << "LV: Selecting VF: " << ChosenFactor.Width << ".\n");
4694 return ChosenFactor;
4695}
4696#endif
4697
4698bool LoopVectorizationPlanner::isCandidateForEpilogueVectorization(
4699 ElementCount VF) const {
4700 // Cross iteration phis such as reductions need special handling and are
4701 // currently unsupported.
4702 if (any_of(OrigLoop->getHeader()->phis(),
4703 [&](PHINode &Phi) { return Legal->isFixedOrderRecurrence(&Phi); }))
4704 return false;
4705
4706 // Phis with uses outside of the loop require special handling and are
4707 // currently unsupported.
4708 for (const auto &Entry : Legal->getInductionVars()) {
4709 // Look for uses of the value of the induction at the last iteration.
4710 Value *PostInc =
4711 Entry.first->getIncomingValueForBlock(OrigLoop->getLoopLatch());
4712 for (User *U : PostInc->users())
4713 if (!OrigLoop->contains(cast<Instruction>(U)))
4714 return false;
4715 // Look for uses of penultimate value of the induction.
4716 for (User *U : Entry.first->users())
4717 if (!OrigLoop->contains(cast<Instruction>(U)))
4718 return false;
4719 }
4720
4721 // Epilogue vectorization code has not been auditted to ensure it handles
4722 // non-latch exits properly. It may be fine, but it needs auditted and
4723 // tested.
4724 // TODO: Add support for loops with an early exit.
4725 if (OrigLoop->getExitingBlock() != OrigLoop->getLoopLatch())
4726 return false;
4727
4728 return true;
4729}
4730
4732 const ElementCount VF, const unsigned IC) const {
4733 // FIXME: We need a much better cost-model to take different parameters such
4734 // as register pressure, code size increase and cost of extra branches into
4735 // account. For now we apply a very crude heuristic and only consider loops
4736 // with vectorization factors larger than a certain value.
4737
4738 // Allow the target to opt out entirely.
4740 return false;
4741
4742 // We also consider epilogue vectorization unprofitable for targets that don't
4743 // consider interleaving beneficial (eg. MVE).
4744 if (TTI.getMaxInterleaveFactor(VF) <= 1)
4745 return false;
4746
4747 // TODO: PR #108190 introduced a discrepancy between fixed-width and scalable
4748 // VFs when deciding profitability.
4749 // See related "TODO: extend to support scalable VFs." in
4750 // selectEpilogueVectorizationFactor.
4751 unsigned Multiplier = VF.isFixed() ? IC : 1;
4752 unsigned MinVFThreshold = EpilogueVectorizationMinVF.getNumOccurrences() > 0
4755 return getEstimatedRuntimeVF(TheLoop, TTI, VF * Multiplier) >= MinVFThreshold;
4756}
4757
4759 const ElementCount MainLoopVF, unsigned IC) {
4762 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization is disabled.\n");
4763 return Result;
4764 }
4765
4766 if (!CM.isScalarEpilogueAllowed()) {
4767 LLVM_DEBUG(dbgs() << "LEV: Unable to vectorize epilogue because no "
4768 "epilogue is allowed.\n");
4769 return Result;
4770 }
4771
4772 // Not really a cost consideration, but check for unsupported cases here to
4773 // simplify the logic.
4774 if (!isCandidateForEpilogueVectorization(MainLoopVF)) {
4775 LLVM_DEBUG(dbgs() << "LEV: Unable to vectorize epilogue because the loop "
4776 "is not a supported candidate.\n");
4777 return Result;
4778 }
4779
4781 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization factor is forced.\n");
4783 if (hasPlanWithVF(ForcedEC))
4784 return {ForcedEC, 0, 0};
4785
4786 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization forced factor is not "
4787 "viable.\n");
4788 return Result;
4789 }
4790
4791 if (OrigLoop->getHeader()->getParent()->hasOptSize() ||
4792 OrigLoop->getHeader()->getParent()->hasMinSize()) {
4793 LLVM_DEBUG(
4794 dbgs() << "LEV: Epilogue vectorization skipped due to opt for size.\n");
4795 return Result;
4796 }
4797
4798 if (!CM.isEpilogueVectorizationProfitable(MainLoopVF, IC)) {
4799 LLVM_DEBUG(dbgs() << "LEV: Epilogue vectorization is not profitable for "
4800 "this loop\n");
4801 return Result;
4802 }
4803
4804 // If MainLoopVF = vscale x 2, and vscale is expected to be 4, then we know
4805 // the main loop handles 8 lanes per iteration. We could still benefit from
4806 // vectorizing the epilogue loop with VF=4.
4807 ElementCount EstimatedRuntimeVF =
4808 ElementCount::getFixed(getEstimatedRuntimeVF(OrigLoop, TTI, MainLoopVF));
4809
4810 ScalarEvolution &SE = *PSE.getSE();
4811 Type *TCType = Legal->getWidestInductionType();
4812 const SCEV *RemainingIterations = nullptr;
4813 unsigned MaxTripCount = 0;
4814 for (auto &NextVF : ProfitableVFs) {
4815 // Skip candidate VFs without a corresponding VPlan.
4816 if (!hasPlanWithVF(NextVF.Width))
4817 continue;
4818
4819 // Skip candidate VFs with widths >= the (estimated) runtime VF (scalable
4820 // vectors) or > the VF of the main loop (fixed vectors).
4821 if ((!NextVF.Width.isScalable() && MainLoopVF.isScalable() &&
4822 ElementCount::isKnownGE(NextVF.Width, EstimatedRuntimeVF)) ||
4823 (NextVF.Width.isScalable() &&
4824 ElementCount::isKnownGE(NextVF.Width, MainLoopVF)) ||
4825 (!NextVF.Width.isScalable() && !MainLoopVF.isScalable() &&
4826 ElementCount::isKnownGT(NextVF.Width, MainLoopVF)))
4827 continue;
4828
4829 // If NextVF is greater than the number of remaining iterations, the
4830 // epilogue loop would be dead. Skip such factors.
4831 if (!MainLoopVF.isScalable() && !NextVF.Width.isScalable()) {
4832 // TODO: extend to support scalable VFs.
4833 if (!RemainingIterations) {
4835 getPlanFor(NextVF.Width).getTripCount(), SE);
4836 assert(!isa<SCEVCouldNotCompute>(TC) &&
4837 "Trip count SCEV must be computable");
4838 RemainingIterations = SE.getURemExpr(
4839 TC, SE.getConstant(TCType, MainLoopVF.getKnownMinValue() * IC));
4840 MaxTripCount = MainLoopVF.getKnownMinValue() * IC - 1;
4841 if (SE.isKnownPredicate(CmpInst::ICMP_ULT, RemainingIterations,
4842 SE.getConstant(TCType, MaxTripCount))) {
4843 MaxTripCount =
4844 SE.getUnsignedRangeMax(RemainingIterations).getZExtValue();
4845 }
4846 LLVM_DEBUG(dbgs() << "LEV: Maximum Trip Count for Epilogue: "
4847 << MaxTripCount << "\n");
4848 }
4849 if (SE.isKnownPredicate(
4851 SE.getConstant(TCType, NextVF.Width.getKnownMinValue()),
4852 RemainingIterations))
4853 continue;
4854 }
4855
4856 if (Result.Width.isScalar() ||
4857 isMoreProfitable(NextVF, Result, MaxTripCount))
4858 Result = NextVF;
4859 }
4860
4861 if (Result != VectorizationFactor::Disabled())
4862 LLVM_DEBUG(dbgs() << "LEV: Vectorizing epilogue loop with VF = "
4863 << Result.Width << "\n");
4864 return Result;
4865}
4866
4867std::pair<unsigned, unsigned>
4869 unsigned MinWidth = -1U;
4870 unsigned MaxWidth = 8;
4872 // For in-loop reductions, no element types are added to ElementTypesInLoop
4873 // if there are no loads/stores in the loop. In this case, check through the
4874 // reduction variables to determine the maximum width.
4875 if (ElementTypesInLoop.empty() && !Legal->getReductionVars().empty()) {
4876 // Reset MaxWidth so that we can find the smallest type used by recurrences
4877 // in the loop.
4878 MaxWidth = -1U;
4879 for (const auto &PhiDescriptorPair : Legal->getReductionVars()) {
4880 const RecurrenceDescriptor &RdxDesc = PhiDescriptorPair.second;
4881 // When finding the min width used by the recurrence we need to account
4882 // for casts on the input operands of the recurrence.
4883 MaxWidth = std::min<unsigned>(
4884 MaxWidth, std::min<unsigned>(
4887 }
4888 } else {
4889 for (Type *T : ElementTypesInLoop) {
4890 MinWidth = std::min<unsigned>(
4891 MinWidth, DL.getTypeSizeInBits(T->getScalarType()).getFixedValue());
4892 MaxWidth = std::max<unsigned>(
4893 MaxWidth, DL.getTypeSizeInBits(T->getScalarType()).getFixedValue());
4894 }
4895 }
4896 return {MinWidth, MaxWidth};
4897}
4898
4900 ElementTypesInLoop.clear();
4901 // For each block.
4902 for (BasicBlock *BB : TheLoop->blocks()) {
4903 // For each instruction in the loop.
4904 for (Instruction &I : BB->instructionsWithoutDebug()) {
4905 Type *T = I.getType();
4906
4907 // Skip ignored values.
4908 if (ValuesToIgnore.count(&I))
4909 continue;
4910
4911 // Only examine Loads, Stores and PHINodes.
4912 if (!isa<LoadInst>(I) && !isa<StoreInst>(I) && !isa<PHINode>(I))
4913 continue;
4914
4915 // Examine PHI nodes that are reduction variables. Update the type to
4916 // account for the recurrence type.
4917 if (auto *PN = dyn_cast<PHINode>(&I)) {
4918 if (!Legal->isReductionVariable(PN))
4919 continue;
4920 const RecurrenceDescriptor &RdxDesc =
4921 Legal->getReductionVars().find(PN)->second;
4924 RdxDesc.getRecurrenceType(),
4926 continue;
4927 T = RdxDesc.getRecurrenceType();
4928 }
4929
4930 // Examine the stored values.
4931 if (auto *ST = dyn_cast<StoreInst>(&I))
4932 T = ST->getValueOperand()->getType();
4933
4934 assert(T->isSized() &&
4935 "Expected the load/store/recurrence type to be sized");
4936
4937 ElementTypesInLoop.insert(T);
4938 }
4939 }
4940}
4941
4942unsigned
4944 InstructionCost LoopCost) {
4945 // -- The interleave heuristics --
4946 // We interleave the loop in order to expose ILP and reduce the loop overhead.
4947 // There are many micro-architectural considerations that we can't predict
4948 // at this level. For example, frontend pressure (on decode or fetch) due to
4949 // code size, or the number and capabilities of the execution ports.
4950 //
4951 // We use the following heuristics to select the interleave count:
4952 // 1. If the code has reductions, then we interleave to break the cross
4953 // iteration dependency.
4954 // 2. If the loop is really small, then we interleave to reduce the loop
4955 // overhead.
4956 // 3. We don't interleave if we think that we will spill registers to memory
4957 // due to the increased register pressure.
4958
4960 return 1;
4961
4962 // Do not interleave if EVL is preferred and no User IC is specified.
4963 if (foldTailWithEVL()) {
4964 LLVM_DEBUG(dbgs() << "LV: Preference for VP intrinsics indicated. "
4965 "Unroll factor forced to be 1.\n");
4966 return 1;
4967 }
4968
4969 // We used the distance for the interleave count.
4971 return 1;
4972
4973 // We don't attempt to perform interleaving for loops with uncountable early
4974 // exits because the VPInstruction::AnyOf code cannot currently handle
4975 // multiple parts.
4977 return 1;
4978
4979 auto BestKnownTC = getSmallBestKnownTC(PSE, TheLoop);
4980 const bool HasReductions = !Legal->getReductionVars().empty();
4981
4982 // If we did not calculate the cost for VF (because the user selected the VF)
4983 // then we calculate the cost of VF here.
4984 if (LoopCost == 0) {
4985 LoopCost = expectedCost(VF);
4986 assert(LoopCost.isValid() && "Expected to have chosen a VF with valid cost");
4987
4988 // Loop body is free and there is no need for interleaving.
4989 if (LoopCost == 0)
4990 return 1;
4991 }
4992
4994 // We divide by these constants so assume that we have at least one
4995 // instruction that uses at least one register.
4996 for (auto &Pair : R.MaxLocalUsers) {
4997 Pair.second = std::max(Pair.second, 1U);
4998 }
4999
5000 // We calculate the interleave count using the following formula.
5001 // Subtract the number of loop invariants from the number of available
5002 // registers. These registers are used by all of the interleaved instances.
5003 // Next, divide the remaining registers by the number of registers that is
5004 // required by the loop, in order to estimate how many parallel instances
5005 // fit without causing spills. All of this is rounded down if necessary to be
5006 // a power of two. We want power of two interleave count to simplify any
5007 // addressing operations or alignment considerations.
5008 // We also want power of two interleave counts to ensure that the induction
5009 // variable of the vector loop wraps to zero, when tail is folded by masking;
5010 // this currently happens when OptForSize, in which case IC is set to 1 above.
5011 unsigned IC = UINT_MAX;
5012
5013 for (const auto &Pair : R.MaxLocalUsers) {
5014 unsigned TargetNumRegisters = TTI.getNumberOfRegisters(Pair.first);
5015 LLVM_DEBUG(dbgs() << "LV: The target has " << TargetNumRegisters
5016 << " registers of "
5017 << TTI.getRegisterClassName(Pair.first)
5018 << " register class\n");
5019 if (VF.isScalar()) {
5020 if (ForceTargetNumScalarRegs.getNumOccurrences() > 0)
5021 TargetNumRegisters = ForceTargetNumScalarRegs;
5022 } else {
5023 if (ForceTargetNumVectorRegs.getNumOccurrences() > 0)
5024 TargetNumRegisters = ForceTargetNumVectorRegs;
5025 }
5026 unsigned MaxLocalUsers = Pair.second;
5027 unsigned LoopInvariantRegs = 0;
5028 if (R.LoopInvariantRegs.find(Pair.first) != R.LoopInvariantRegs.end())
5029 LoopInvariantRegs = R.LoopInvariantRegs[Pair.first];
5030
5031 unsigned TmpIC = llvm::bit_floor((TargetNumRegisters - LoopInvariantRegs) /
5032 MaxLocalUsers);
5033 // Don't count the induction variable as interleaved.
5035 TmpIC = llvm::bit_floor((TargetNumRegisters - LoopInvariantRegs - 1) /
5036 std::max(1U, (MaxLocalUsers - 1)));
5037 }
5038
5039 IC = std::min(IC, TmpIC);
5040 }
5041
5042 // Clamp the interleave ranges to reasonable counts.
5043 unsigned MaxInterleaveCount = TTI.getMaxInterleaveFactor(VF);
5044
5045 // Check if the user has overridden the max.
5046 if (VF.isScalar()) {
5047 if (ForceTargetMaxScalarInterleaveFactor.getNumOccurrences() > 0)
5048 MaxInterleaveCount = ForceTargetMaxScalarInterleaveFactor;
5049 } else {
5050 if (ForceTargetMaxVectorInterleaveFactor.getNumOccurrences() > 0)
5051 MaxInterleaveCount = ForceTargetMaxVectorInterleaveFactor;
5052 }
5053
5054 unsigned EstimatedVF = getEstimatedRuntimeVF(TheLoop, TTI, VF);
5055 unsigned KnownTC = PSE.getSE()->getSmallConstantTripCount(TheLoop);
5056 if (KnownTC > 0) {
5057 // At least one iteration must be scalar when this constraint holds. So the
5058 // maximum available iterations for interleaving is one less.
5059 unsigned AvailableTC =
5060 requiresScalarEpilogue(VF.isVector()) ? KnownTC - 1 : KnownTC;
5061
5062 // If trip count is known we select between two prospective ICs, where
5063 // 1) the aggressive IC is capped by the trip count divided by VF
5064 // 2) the conservative IC is capped by the trip count divided by (VF * 2)
5065 // The final IC is selected in a way that the epilogue loop trip count is
5066 // minimized while maximizing the IC itself, so that we either run the
5067 // vector loop at least once if it generates a small epilogue loop, or else
5068 // we run the vector loop at least twice.
5069
5070 unsigned InterleaveCountUB = bit_floor(
5071 std::max(1u, std::min(AvailableTC / EstimatedVF, MaxInterleaveCount)));
5072 unsigned InterleaveCountLB = bit_floor(std::max(
5073 1u, std::min(AvailableTC / (EstimatedVF * 2), MaxInterleaveCount)));
5074 MaxInterleaveCount = InterleaveCountLB;
5075
5076 if (InterleaveCountUB != InterleaveCountLB) {
5077 unsigned TailTripCountUB =
5078 (AvailableTC % (EstimatedVF * InterleaveCountUB));
5079 unsigned TailTripCountLB =
5080 (AvailableTC % (EstimatedVF * InterleaveCountLB));
5081 // If both produce same scalar tail, maximize the IC to do the same work
5082 // in fewer vector loop iterations
5083 if (TailTripCountUB == TailTripCountLB)
5084 MaxInterleaveCount = InterleaveCountUB;
5085 }
5086 } else if (BestKnownTC && *BestKnownTC > 0) {
5087 // At least one iteration must be scalar when this constraint holds. So the
5088 // maximum available iterations for interleaving is one less.
5089 unsigned AvailableTC = requiresScalarEpilogue(VF.isVector())
5090 ? (*BestKnownTC) - 1
5091 : *BestKnownTC;
5092
5093 // If trip count is an estimated compile time constant, limit the
5094 // IC to be capped by the trip count divided by VF * 2, such that the vector
5095 // loop runs at least twice to make interleaving seem profitable when there
5096 // is an epilogue loop present. Since exact Trip count is not known we
5097 // choose to be conservative in our IC estimate.
5098 MaxInterleaveCount = bit_floor(std::max(
5099 1u, std::min(AvailableTC / (EstimatedVF * 2), MaxInterleaveCount)));
5100 }
5101
5102 assert(MaxInterleaveCount > 0 &&
5103 "Maximum interleave count must be greater than 0");
5104
5105 // Clamp the calculated IC to be between the 1 and the max interleave count
5106 // that the target and trip count allows.
5107 if (IC > MaxInterleaveCount)
5108 IC = MaxInterleaveCount;
5109 else
5110 // Make sure IC is greater than 0.
5111 IC = std::max(1u, IC);
5112
5113 assert(IC > 0 && "Interleave count must be greater than 0.");
5114
5115 // Interleave if we vectorized this loop and there is a reduction that could
5116 // benefit from interleaving.
5117 if (VF.isVector() && HasReductions) {
5118 LLVM_DEBUG(dbgs() << "LV: Interleaving because of reductions.\n");
5119 return IC;
5120 }
5121
5122 // For any scalar loop that either requires runtime checks or predication we
5123 // are better off leaving this to the unroller. Note that if we've already
5124 // vectorized the loop we will have done the runtime check and so interleaving
5125 // won't require further checks.
5126 bool ScalarInterleavingRequiresPredication =
5127 (VF.isScalar() && any_of(TheLoop->blocks(), [this](BasicBlock *BB) {
5128 return Legal->blockNeedsPredication(BB);
5129 }));
5130 bool ScalarInterleavingRequiresRuntimePointerCheck =
5132
5133 // We want to interleave small loops in order to reduce the loop overhead and
5134 // potentially expose ILP opportunities.
5135 LLVM_DEBUG(dbgs() << "LV: Loop cost is " << LoopCost << '\n'
5136 << "LV: IC is " << IC << '\n'
5137 << "LV: VF is " << VF << '\n');
5138 const bool AggressivelyInterleaveReductions =
5139 TTI.enableAggressiveInterleaving(HasReductions);
5140 if (!ScalarInterleavingRequiresRuntimePointerCheck &&
5141 !ScalarInterleavingRequiresPredication && LoopCost < SmallLoopCost) {
5142 // We assume that the cost overhead is 1 and we use the cost model
5143 // to estimate the cost of the loop and interleave until the cost of the
5144 // loop overhead is about 5% of the cost of the loop.
5145 unsigned SmallIC = std::min(IC, (unsigned)llvm::bit_floor<uint64_t>(
5146 SmallLoopCost / *LoopCost.getValue()));
5147
5148 // Interleave until store/load ports (estimated by max interleave count) are
5149 // saturated.
5150 unsigned NumStores = Legal->getNumStores();
5151 unsigned NumLoads = Legal->getNumLoads();
5152 unsigned StoresIC = IC / (NumStores ? NumStores : 1);
5153 unsigned LoadsIC = IC / (NumLoads ? NumLoads : 1);
5154
5155 // There is little point in interleaving for reductions containing selects
5156 // and compares when VF=1 since it may just create more overhead than it's
5157 // worth for loops with small trip counts. This is because we still have to
5158 // do the final reduction after the loop.
5159 bool HasSelectCmpReductions =
5160 HasReductions &&
5161 any_of(Legal->getReductionVars(), [&](auto &Reduction) -> bool {
5162 const RecurrenceDescriptor &RdxDesc = Reduction.second;
5163 RecurKind RK = RdxDesc.getRecurrenceKind();
5164 return RecurrenceDescriptor::isAnyOfRecurrenceKind(RK) ||
5165 RecurrenceDescriptor::isFindLastIVRecurrenceKind(RK);
5166 });
5167 if (HasSelectCmpReductions) {
5168 LLVM_DEBUG(dbgs() << "LV: Not interleaving select-cmp reductions.\n");
5169 return 1;
5170 }
5171
5172 // If we have a scalar reduction (vector reductions are already dealt with
5173 // by this point), we can increase the critical path length if the loop
5174 // we're interleaving is inside another loop. For tree-wise reductions
5175 // set the limit to 2, and for ordered reductions it's best to disable
5176 // interleaving entirely.
5177 if (HasReductions && TheLoop->getLoopDepth() > 1) {
5178 bool HasOrderedReductions =
5179 any_of(Legal->getReductionVars(), [&](auto &Reduction) -> bool {
5180 const RecurrenceDescriptor &RdxDesc = Reduction.second;
5181 return RdxDesc.isOrdered();
5182 });
5183 if (HasOrderedReductions) {
5184 LLVM_DEBUG(
5185 dbgs() << "LV: Not interleaving scalar ordered reductions.\n");
5186 return 1;
5187 }
5188
5189 unsigned F = static_cast<unsigned>(MaxNestedScalarReductionIC);
5190 SmallIC = std::min(SmallIC, F);
5191 StoresIC = std::min(StoresIC, F);
5192 LoadsIC = std::min(LoadsIC, F);
5193 }
5194
5196 std::max(StoresIC, LoadsIC) > SmallIC) {
5197 LLVM_DEBUG(
5198 dbgs() << "LV: Interleaving to saturate store or load ports.\n");
5199 return std::max(StoresIC, LoadsIC);
5200 }
5201
5202 // If there are scalar reductions and TTI has enabled aggressive
5203 // interleaving for reductions, we will interleave to expose ILP.
5204 if (VF.isScalar() && AggressivelyInterleaveReductions) {
5205 LLVM_DEBUG(dbgs() << "LV: Interleaving to expose ILP.\n");
5206 // Interleave no less than SmallIC but not as aggressive as the normal IC
5207 // to satisfy the rare situation when resources are too limited.
5208 return std::max(IC / 2, SmallIC);
5209 }
5210
5211 LLVM_DEBUG(dbgs() << "LV: Interleaving to reduce branch cost.\n");
5212 return SmallIC;
5213 }
5214
5215 // Interleave if this is a large loop (small loops are already dealt with by
5216 // this point) that could benefit from interleaving.
5217 if (AggressivelyInterleaveReductions) {
5218 LLVM_DEBUG(dbgs() << "LV: Interleaving to expose ILP.\n");
5219 return IC;
5220 }
5221
5222 LLVM_DEBUG(dbgs() << "LV: Not Interleaving.\n");
5223 return 1;
5224}
5225
5228 // This function calculates the register usage by measuring the highest number
5229 // of values that are alive at a single location. Obviously, this is a very
5230 // rough estimation. We scan the loop in a topological order in order and
5231 // assign a number to each instruction. We use RPO to ensure that defs are
5232 // met before their users. We assume that each instruction that has in-loop
5233 // users starts an interval. We record every time that an in-loop value is
5234 // used, so we have a list of the first and last occurrences of each
5235 // instruction. Next, we transpose this data structure into a multi map that
5236 // holds the list of intervals that *end* at a specific location. This multi
5237 // map allows us to perform a linear search. We scan the instructions linearly
5238 // and record each time that a new interval starts, by placing it in a set.
5239 // If we find this value in the multi-map then we remove it from the set.
5240 // The max register usage is the maximum size of the set.
5241 // We also search for instructions that are defined outside the loop, but are
5242 // used inside the loop. We need this number separately from the max-interval
5243 // usage number because when we unroll, loop-invariant values do not take
5244 // more register.
5246 DFS.perform(LI);
5247
5248 RegisterUsage RU;
5249
5250 // Each 'key' in the map opens a new interval. The values
5251 // of the map are the index of the 'last seen' usage of the
5252 // instruction that is the key.
5254
5255 // Maps instruction to its index.
5257 // Marks the end of each interval.
5258 IntervalMap EndPoint;
5259 // Saves the list of instruction indices that are used in the loop.
5261 // Saves the list of values that are used in the loop but are defined outside
5262 // the loop (not including non-instruction values such as arguments and
5263 // constants).
5264 SmallSetVector<Instruction *, 8> LoopInvariants;
5265
5266 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO())) {
5267 for (Instruction &I : BB->instructionsWithoutDebug()) {
5268 IdxToInstr.push_back(&I);
5269
5270 // Save the end location of each USE.
5271 for (Value *U : I.operands()) {
5272 auto *Instr = dyn_cast<Instruction>(U);
5273
5274 // Ignore non-instruction values such as arguments, constants, etc.
5275 // FIXME: Might need some motivation why these values are ignored. If
5276 // for example an argument is used inside the loop it will increase the
5277 // register pressure (so shouldn't we add it to LoopInvariants).
5278 if (!Instr)
5279 continue;
5280
5281 // If this instruction is outside the loop then record it and continue.
5282 if (!TheLoop->contains(Instr)) {
5283 LoopInvariants.insert(Instr);
5284 continue;
5285 }
5286
5287 // Overwrite previous end points.
5288 EndPoint[Instr] = IdxToInstr.size();
5289 Ends.insert(Instr);
5290 }
5291 }
5292 }
5293
5294 // Saves the list of intervals that end with the index in 'key'.
5295 using InstrList = SmallVector<Instruction *, 2>;
5297
5298 // Transpose the EndPoints to a list of values that end at each index.
5299 for (auto &Interval : EndPoint)
5300 TransposeEnds[Interval.second].push_back(Interval.first);
5301
5302 SmallPtrSet<Instruction *, 8> OpenIntervals;
5305
5306 LLVM_DEBUG(dbgs() << "LV(REG): Calculating max register usage:\n");
5307
5308 const auto &TTICapture = TTI;
5309 auto GetRegUsage = [&TTICapture](Type *Ty, ElementCount VF) -> unsigned {
5310 if (Ty->isTokenTy() || !VectorType::isValidElementType(Ty) ||
5311 (VF.isScalable() &&
5312 !TTICapture.isElementTypeLegalForScalableVector(Ty)))
5313 return 0;
5314 return TTICapture.getRegUsageForType(VectorType::get(Ty, VF));
5315 };
5316
5317 for (unsigned int Idx = 0, Sz = IdxToInstr.size(); Idx < Sz; ++Idx) {
5318 Instruction *I = IdxToInstr[Idx];
5319
5320 // Remove all of the instructions that end at this location.
5321 InstrList &List = TransposeEnds[Idx];
5322 for (Instruction *ToRemove : List)
5323 OpenIntervals.erase(ToRemove);
5324
5325 // Ignore instructions that are never used within the loop.
5326 if (!Ends.count(I))
5327 continue;
5328
5329 // Skip ignored values.
5330 if (ValuesToIgnore.count(I))
5331 continue;
5332
5334
5335 // For each VF find the maximum usage of registers.
5336 for (unsigned J = 0, E = VFs.size(); J < E; ++J) {
5337 // Count the number of registers used, per register class, given all open
5338 // intervals.
5339 // Note that elements in this SmallMapVector will be default constructed
5340 // as 0. So we can use "RegUsage[ClassID] += n" in the code below even if
5341 // there is no previous entry for ClassID.
5343
5344 if (VFs[J].isScalar()) {
5345 for (auto *Inst : OpenIntervals) {
5346 unsigned ClassID =
5347 TTI.getRegisterClassForType(false, Inst->getType());
5348 // FIXME: The target might use more than one register for the type
5349 // even in the scalar case.
5350 RegUsage[ClassID] += 1;
5351 }
5352 } else {
5354 for (auto *Inst : OpenIntervals) {
5355 // Skip ignored values for VF > 1.
5356 if (VecValuesToIgnore.count(Inst))
5357 continue;
5358 if (isScalarAfterVectorization(Inst, VFs[J])) {
5359 unsigned ClassID =
5360 TTI.getRegisterClassForType(false, Inst->getType());
5361 // FIXME: The target might use more than one register for the type
5362 // even in the scalar case.
5363 RegUsage[ClassID] += 1;
5364 } else {
5365 unsigned ClassID =
5366 TTI.getRegisterClassForType(true, Inst->getType());
5367 RegUsage[ClassID] += GetRegUsage(Inst->getType(), VFs[J]);
5368 }
5369 }
5370 }
5371
5372 for (const auto &Pair : RegUsage) {
5373 auto &Entry = MaxUsages[J][Pair.first];
5374 Entry = std::max(Entry, Pair.second);
5375 }
5376 }
5377
5378 LLVM_DEBUG(dbgs() << "LV(REG): At #" << Idx << " Interval # "
5379 << OpenIntervals.size() << '\n');
5380
5381 // Add the current instruction to the list of open intervals.
5382 OpenIntervals.insert(I);
5383 }
5384
5385 for (unsigned Idx = 0, End = VFs.size(); Idx < End; ++Idx) {
5386 // Note that elements in this SmallMapVector will be default constructed
5387 // as 0. So we can use "Invariant[ClassID] += n" in the code below even if
5388 // there is no previous entry for ClassID.
5390
5391 for (auto *Inst : LoopInvariants) {
5392 // FIXME: The target might use more than one register for the type
5393 // even in the scalar case.
5394 bool IsScalar = all_of(Inst->users(), [&](User *U) {
5395 auto *I = cast<Instruction>(U);
5396 return TheLoop != LI->getLoopFor(I->getParent()) ||
5397 isScalarAfterVectorization(I, VFs[Idx]);
5398 });
5399
5400 ElementCount VF = IsScalar ? ElementCount::getFixed(1) : VFs[Idx];
5401 unsigned ClassID =
5402 TTI.getRegisterClassForType(VF.isVector(), Inst->getType());
5403 Invariant[ClassID] += GetRegUsage(Inst->getType(), VF);
5404 }
5405
5406 LLVM_DEBUG({
5407 dbgs() << "LV(REG): VF = " << VFs[Idx] << '\n';
5408 dbgs() << "LV(REG): Found max usage: " << MaxUsages[Idx].size()
5409 << " item\n";
5410 for (const auto &pair : MaxUsages[Idx]) {
5411 dbgs() << "LV(REG): RegisterClass: "
5412 << TTI.getRegisterClassName(pair.first) << ", " << pair.second
5413 << " registers\n";
5414 }
5415 dbgs() << "LV(REG): Found invariant usage: " << Invariant.size()
5416 << " item\n";
5417 for (const auto &pair : Invariant) {
5418 dbgs() << "LV(REG): RegisterClass: "
5419 << TTI.getRegisterClassName(pair.first) << ", " << pair.second
5420 << " registers\n";
5421 }
5422 });
5423
5424 RU.LoopInvariantRegs = Invariant;
5425 RU.MaxLocalUsers = MaxUsages[Idx];
5426 RUs[Idx] = RU;
5427 }
5428
5429 return RUs;
5430}
5431
5432bool LoopVectorizationCostModel::useEmulatedMaskMemRefHack(Instruction *I,
5433 ElementCount VF) {
5434 // TODO: Cost model for emulated masked load/store is completely
5435 // broken. This hack guides the cost model to use an artificially
5436 // high enough value to practically disable vectorization with such
5437 // operations, except where previously deployed legality hack allowed
5438 // using very low cost values. This is to avoid regressions coming simply
5439 // from moving "masked load/store" check from legality to cost model.
5440 // Masked Load/Gather emulation was previously never allowed.
5441 // Limited number of Masked Store/Scatter emulation was allowed.
5443 "Expecting a scalar emulated instruction");
5444 return isa<LoadInst>(I) ||
5445 (isa<StoreInst>(I) &&
5446 NumPredStores > NumberOfStoresToPredicate);
5447}
5448
5450 // If we aren't vectorizing the loop, or if we've already collected the
5451 // instructions to scalarize, there's nothing to do. Collection may already
5452 // have occurred if we have a user-selected VF and are now computing the
5453 // expected cost for interleaving.
5454 if (VF.isScalar() || VF.isZero() || InstsToScalarize.contains(VF))
5455 return;
5456
5457 // Initialize a mapping for VF in InstsToScalalarize. If we find that it's
5458 // not profitable to scalarize any instructions, the presence of VF in the
5459 // map will indicate that we've analyzed it already.
5460 ScalarCostsTy &ScalarCostsVF = InstsToScalarize[VF];
5461
5462 PredicatedBBsAfterVectorization[VF].clear();
5463
5464 // Find all the instructions that are scalar with predication in the loop and
5465 // determine if it would be better to not if-convert the blocks they are in.
5466 // If so, we also record the instructions to scalarize.
5467 for (BasicBlock *BB : TheLoop->blocks()) {
5469 continue;
5470 for (Instruction &I : *BB)
5471 if (isScalarWithPredication(&I, VF)) {
5472 ScalarCostsTy ScalarCosts;
5473 // Do not apply discount logic for:
5474 // 1. Scalars after vectorization, as there will only be a single copy
5475 // of the instruction.
5476 // 2. Scalable VF, as that would lead to invalid scalarization costs.
5477 // 3. Emulated masked memrefs, if a hacked cost is needed.
5478 if (!isScalarAfterVectorization(&I, VF) && !VF.isScalable() &&
5479 !useEmulatedMaskMemRefHack(&I, VF) &&
5480 computePredInstDiscount(&I, ScalarCosts, VF) >= 0) {
5481 ScalarCostsVF.insert(ScalarCosts.begin(), ScalarCosts.end());
5482 // Check if we decided to scalarize a call. If so, update the widening
5483 // decision of the call to CM_Scalarize with the computed scalar cost.
5484 for (const auto &[I, _] : ScalarCosts) {
5485 auto *CI = dyn_cast<CallInst>(I);
5486 if (!CI || !CallWideningDecisions.contains({CI, VF}))
5487 continue;
5488 CallWideningDecisions[{CI, VF}].Kind = CM_Scalarize;
5489 CallWideningDecisions[{CI, VF}].Cost = ScalarCosts[CI];
5490 }
5491 }
5492 // Remember that BB will remain after vectorization.
5493 PredicatedBBsAfterVectorization[VF].insert(BB);
5494 for (auto *Pred : predecessors(BB)) {
5495 if (Pred->getSingleSuccessor() == BB)
5496 PredicatedBBsAfterVectorization[VF].insert(Pred);
5497 }
5498 }
5499 }
5500}
5501
5502InstructionCost LoopVectorizationCostModel::computePredInstDiscount(
5503 Instruction *PredInst, ScalarCostsTy &ScalarCosts, ElementCount VF) {
5504 assert(!isUniformAfterVectorization(PredInst, VF) &&
5505 "Instruction marked uniform-after-vectorization will be predicated");
5506
5507 // Initialize the discount to zero, meaning that the scalar version and the
5508 // vector version cost the same.
5509 InstructionCost Discount = 0;
5510
5511 // Holds instructions to analyze. The instructions we visit are mapped in
5512 // ScalarCosts. Those instructions are the ones that would be scalarized if
5513 // we find that the scalar version costs less.
5515
5516 // Returns true if the given instruction can be scalarized.
5517 auto CanBeScalarized = [&](Instruction *I) -> bool {
5518 // We only attempt to scalarize instructions forming a single-use chain
5519 // from the original predicated block that would otherwise be vectorized.
5520 // Although not strictly necessary, we give up on instructions we know will
5521 // already be scalar to avoid traversing chains that are unlikely to be
5522 // beneficial.
5523 if (!I->hasOneUse() || PredInst->getParent() != I->getParent() ||
5525 return false;
5526
5527 // If the instruction is scalar with predication, it will be analyzed
5528 // separately. We ignore it within the context of PredInst.
5529 if (isScalarWithPredication(I, VF))
5530 return false;
5531
5532 // If any of the instruction's operands are uniform after vectorization,
5533 // the instruction cannot be scalarized. This prevents, for example, a
5534 // masked load from being scalarized.
5535 //
5536 // We assume we will only emit a value for lane zero of an instruction
5537 // marked uniform after vectorization, rather than VF identical values.
5538 // Thus, if we scalarize an instruction that uses a uniform, we would
5539 // create uses of values corresponding to the lanes we aren't emitting code
5540 // for. This behavior can be changed by allowing getScalarValue to clone
5541 // the lane zero values for uniforms rather than asserting.
5542 for (Use &U : I->operands())
5543 if (auto *J = dyn_cast<Instruction>(U.get()))
5544 if (isUniformAfterVectorization(J, VF))
5545 return false;
5546
5547 // Otherwise, we can scalarize the instruction.
5548 return true;
5549 };
5550
5551 // Compute the expected cost discount from scalarizing the entire expression
5552 // feeding the predicated instruction. We currently only consider expressions
5553 // that are single-use instruction chains.
5554 Worklist.push_back(PredInst);
5555 while (!Worklist.empty()) {
5556 Instruction *I = Worklist.pop_back_val();
5557
5558 // If we've already analyzed the instruction, there's nothing to do.
5559 if (ScalarCosts.contains(I))
5560 continue;
5561
5562 // Compute the cost of the vector instruction. Note that this cost already
5563 // includes the scalarization overhead of the predicated instruction.
5564 InstructionCost VectorCost = getInstructionCost(I, VF);
5565
5566 // Compute the cost of the scalarized instruction. This cost is the cost of
5567 // the instruction as if it wasn't if-converted and instead remained in the
5568 // predicated block. We will scale this cost by block probability after
5569 // computing the scalarization overhead.
5570 InstructionCost ScalarCost =
5572
5573 // Compute the scalarization overhead of needed insertelement instructions
5574 // and phi nodes.
5576 if (isScalarWithPredication(I, VF) && !I->getType()->isVoidTy()) {
5577 ScalarCost += TTI.getScalarizationOverhead(
5578 cast<VectorType>(toVectorTy(I->getType(), VF)),
5579 APInt::getAllOnes(VF.getFixedValue()), /*Insert*/ true,
5580 /*Extract*/ false, CostKind);
5581 ScalarCost +=
5582 VF.getFixedValue() * TTI.getCFInstrCost(Instruction::PHI, CostKind);
5583 }
5584
5585 // Compute the scalarization overhead of needed extractelement
5586 // instructions. For each of the instruction's operands, if the operand can
5587 // be scalarized, add it to the worklist; otherwise, account for the
5588 // overhead.
5589 for (Use &U : I->operands())
5590 if (auto *J = dyn_cast<Instruction>(U.get())) {
5591 assert(VectorType::isValidElementType(J->getType()) &&
5592 "Instruction has non-scalar type");
5593 if (CanBeScalarized(J))
5594 Worklist.push_back(J);
5595 else if (needsExtract(J, VF)) {
5596 ScalarCost += TTI.getScalarizationOverhead(
5597 cast<VectorType>(toVectorTy(J->getType(), VF)),
5598 APInt::getAllOnes(VF.getFixedValue()), /*Insert*/ false,
5599 /*Extract*/ true, CostKind);
5600 }
5601 }
5602
5603 // Scale the total scalar cost by block probability.
5604 ScalarCost /= getReciprocalPredBlockProb();
5605
5606 // Compute the discount. A non-negative discount means the vector version
5607 // of the instruction costs more, and scalarizing would be beneficial.
5608 Discount += VectorCost - ScalarCost;
5609 ScalarCosts[I] = ScalarCost;
5610 }
5611
5612 return Discount;
5613}
5614
5617
5618 // If the vector loop gets executed exactly once with the given VF, ignore the
5619 // costs of comparison and induction instructions, as they'll get simplified
5620 // away.
5621 SmallPtrSet<Instruction *, 2> ValuesToIgnoreForVF;
5623 if (VF.isFixed() && TC == VF.getFixedValue() && !foldTailByMasking())
5625 ValuesToIgnoreForVF);
5626
5627 // For each block.
5628 for (BasicBlock *BB : TheLoop->blocks()) {
5629 InstructionCost BlockCost;
5630
5631 // For each instruction in the old loop.
5632 for (Instruction &I : BB->instructionsWithoutDebug()) {
5633 // Skip ignored values.
5634 if (ValuesToIgnore.count(&I) || ValuesToIgnoreForVF.count(&I) ||
5635 (VF.isVector() && VecValuesToIgnore.count(&I)))
5636 continue;
5637
5639
5640 // Check if we should override the cost.
5641 if (C.isValid() && ForceTargetInstructionCost.getNumOccurrences() > 0)
5643
5644 BlockCost += C;
5645 LLVM_DEBUG(dbgs() << "LV: Found an estimated cost of " << C << " for VF "
5646 << VF << " For instruction: " << I << '\n');
5647 }
5648
5649 // If we are vectorizing a predicated block, it will have been
5650 // if-converted. This means that the block's instructions (aside from
5651 // stores and instructions that may divide by zero) will now be
5652 // unconditionally executed. For the scalar case, we may not always execute
5653 // the predicated block, if it is an if-else block. Thus, scale the block's
5654 // cost by the probability of executing it. blockNeedsPredication from
5655 // Legal is used so as to not include all blocks in tail folded loops.
5656 if (VF.isScalar() && Legal->blockNeedsPredication(BB))
5657 BlockCost /= getReciprocalPredBlockProb();
5658
5659 Cost += BlockCost;
5660 }
5661
5662 return Cost;
5663}
5664
5665/// Gets Address Access SCEV after verifying that the access pattern
5666/// is loop invariant except the induction variable dependence.
5667///
5668/// This SCEV can be sent to the Target in order to estimate the address
5669/// calculation cost.
5671 Value *Ptr,
5674 const Loop *TheLoop) {
5675
5676 auto *Gep = dyn_cast<GetElementPtrInst>(Ptr);
5677 if (!Gep)
5678 return nullptr;
5679
5680 // We are looking for a gep with all loop invariant indices except for one
5681 // which should be an induction variable.
5682 auto *SE = PSE.getSE();
5683 unsigned NumOperands = Gep->getNumOperands();
5684 for (unsigned Idx = 1; Idx < NumOperands; ++Idx) {
5685 Value *Opd = Gep->getOperand(Idx);
5686 if (!SE->isLoopInvariant(SE->getSCEV(Opd), TheLoop) &&
5687 !Legal->isInductionVariable(Opd))
5688 return nullptr;
5689 }
5690
5691 // Now we know we have a GEP ptr, %inv, %ind, %inv. return the Ptr SCEV.
5692 return PSE.getSCEV(Ptr);
5693}
5694
5696LoopVectorizationCostModel::getMemInstScalarizationCost(Instruction *I,
5697 ElementCount VF) {
5698 assert(VF.isVector() &&
5699 "Scalarization cost of instruction implies vectorization.");
5700 if (VF.isScalable())
5702
5703 Type *ValTy = getLoadStoreType(I);
5704 auto *SE = PSE.getSE();
5705
5706 unsigned AS = getLoadStoreAddressSpace(I);
5708 Type *PtrTy = toVectorTy(Ptr->getType(), VF);
5709 // NOTE: PtrTy is a vector to signal `TTI::getAddressComputationCost`
5710 // that it is being called from this specific place.
5711
5712 // Figure out whether the access is strided and get the stride value
5713 // if it's known in compile time
5714 const SCEV *PtrSCEV = getAddressAccessSCEV(Ptr, Legal, PSE, TheLoop);
5715
5716 // Get the cost of the scalar memory instruction and address computation.
5718 VF.getKnownMinValue() * TTI.getAddressComputationCost(PtrTy, SE, PtrSCEV);
5719
5720 // Don't pass *I here, since it is scalar but will actually be part of a
5721 // vectorized loop where the user of it is a vectorized instruction.
5723 const Align Alignment = getLoadStoreAlignment(I);
5724 Cost += VF.getKnownMinValue() * TTI.getMemoryOpCost(I->getOpcode(),
5725 ValTy->getScalarType(),
5726 Alignment, AS, CostKind);
5727
5728 // Get the overhead of the extractelement and insertelement instructions
5729 // we might create due to scalarization.
5730 Cost += getScalarizationOverhead(I, VF, CostKind);
5731
5732 // If we have a predicated load/store, it will need extra i1 extracts and
5733 // conditional branches, but may not be executed for each vector lane. Scale
5734 // the cost by the probability of executing the predicated block.
5735 if (isPredicatedInst(I)) {
5737
5738 // Add the cost of an i1 extract and a branch
5739 auto *VecI1Ty =
5742 VecI1Ty, APInt::getAllOnes(VF.getKnownMinValue()),
5743 /*Insert=*/false, /*Extract=*/true, CostKind);
5744 Cost += TTI.getCFInstrCost(Instruction::Br, CostKind);
5745
5746 if (useEmulatedMaskMemRefHack(I, VF))
5747 // Artificially setting to a high enough value to practically disable
5748 // vectorization with such operations.
5749 Cost = 3000000;
5750 }
5751
5752 return Cost;
5753}
5754
5756LoopVectorizationCostModel::getConsecutiveMemOpCost(Instruction *I,
5757 ElementCount VF) {
5758 Type *ValTy = getLoadStoreType(I);
5759 auto *VectorTy = cast<VectorType>(toVectorTy(ValTy, VF));
5761 unsigned AS = getLoadStoreAddressSpace(I);
5762 int ConsecutiveStride = Legal->isConsecutivePtr(ValTy, Ptr);
5764
5765 assert((ConsecutiveStride == 1 || ConsecutiveStride == -1) &&
5766 "Stride should be 1 or -1 for consecutive memory access");
5767 const Align Alignment = getLoadStoreAlignment(I);
5769 if (Legal->isMaskRequired(I)) {
5770 Cost += TTI.getMaskedMemoryOpCost(I->getOpcode(), VectorTy, Alignment, AS,
5771 CostKind);
5772 } else {
5773 TTI::OperandValueInfo OpInfo = TTI::getOperandInfo(I->getOperand(0));
5774 Cost += TTI.getMemoryOpCost(I->getOpcode(), VectorTy, Alignment, AS,
5775 CostKind, OpInfo, I);
5776 }
5777
5778 bool Reverse = ConsecutiveStride < 0;
5779 if (Reverse)
5781 CostKind, 0);
5782 return Cost;
5783}
5784
5786LoopVectorizationCostModel::getUniformMemOpCost(Instruction *I,
5787 ElementCount VF) {
5788 assert(Legal->isUniformMemOp(*I, VF));
5789
5790 Type *ValTy = getLoadStoreType(I);
5791 auto *VectorTy = cast<VectorType>(toVectorTy(ValTy, VF));
5792 const Align Alignment = getLoadStoreAlignment(I);
5793 unsigned AS = getLoadStoreAddressSpace(I);
5795 if (isa<LoadInst>(I)) {
5796 return TTI.getAddressComputationCost(ValTy) +
5797 TTI.getMemoryOpCost(Instruction::Load, ValTy, Alignment, AS,
5798 CostKind) +
5800 }
5801 StoreInst *SI = cast<StoreInst>(I);
5802
5803 bool IsLoopInvariantStoreValue = Legal->isInvariant(SI->getValueOperand());
5804 return TTI.getAddressComputationCost(ValTy) +
5805 TTI.getMemoryOpCost(Instruction::Store, ValTy, Alignment, AS,
5806 CostKind) +
5807 (IsLoopInvariantStoreValue
5808 ? 0
5809 : TTI.getVectorInstrCost(Instruction::ExtractElement, VectorTy,
5810 CostKind, VF.getKnownMinValue() - 1));
5811}
5812
5814LoopVectorizationCostModel::getGatherScatterCost(Instruction *I,
5815 ElementCount VF) {
5816 Type *ValTy = getLoadStoreType(I);
5817 auto *VectorTy = cast<VectorType>(toVectorTy(ValTy, VF));
5818 const Align Alignment = getLoadStoreAlignment(I);
5820
5821 return TTI.getAddressComputationCost(VectorTy) +
5823 I->getOpcode(), VectorTy, Ptr, Legal->isMaskRequired(I), Alignment,
5825}
5826
5828LoopVectorizationCostModel::getInterleaveGroupCost(Instruction *I,
5829 ElementCount VF) {
5830 const auto *Group = getInterleavedAccessGroup(I);
5831 assert(Group && "Fail to get an interleaved access group.");
5832
5833 Instruction *InsertPos = Group->getInsertPos();
5834 Type *ValTy = getLoadStoreType(InsertPos);
5835 auto *VectorTy = cast<VectorType>(toVectorTy(ValTy, VF));
5836 unsigned AS = getLoadStoreAddressSpace(InsertPos);
5838
5839 unsigned InterleaveFactor = Group->getFactor();
5840 auto *WideVecTy = VectorType::get(ValTy, VF * InterleaveFactor);
5841
5842 // Holds the indices of existing members in the interleaved group.
5844 for (unsigned IF = 0; IF < InterleaveFactor; IF++)
5845 if (Group->getMember(IF))
5846 Indices.push_back(IF);
5847
5848 // Calculate the cost of the whole interleaved group.
5849 bool UseMaskForGaps =
5850 (Group->requiresScalarEpilogue() && !isScalarEpilogueAllowed()) ||
5851 (isa<StoreInst>(I) && (Group->getNumMembers() < Group->getFactor()));
5853 InsertPos->getOpcode(), WideVecTy, Group->getFactor(), Indices,
5854 Group->getAlign(), AS, CostKind, Legal->isMaskRequired(I),
5855 UseMaskForGaps);
5856
5857 if (Group->isReverse()) {
5858 // TODO: Add support for reversed masked interleaved access.
5860 "Reverse masked interleaved access not supported.");
5861 Cost += Group->getNumMembers() *
5863 CostKind, 0);
5864 }
5865 return Cost;
5866}
5867
5868std::optional<InstructionCost>
5870 Instruction *I, ElementCount VF, Type *Ty,
5872 using namespace llvm::PatternMatch;
5873 // Early exit for no inloop reductions
5874 if (InLoopReductions.empty() || VF.isScalar() || !isa<VectorType>(Ty))
5875 return std::nullopt;
5876 auto *VectorTy = cast<VectorType>(Ty);
5877
5878 // We are looking for a pattern of, and finding the minimal acceptable cost:
5879 // reduce(mul(ext(A), ext(B))) or
5880 // reduce(mul(A, B)) or
5881 // reduce(ext(A)) or
5882 // reduce(A).
5883 // The basic idea is that we walk down the tree to do that, finding the root
5884 // reduction instruction in InLoopReductionImmediateChains. From there we find
5885 // the pattern of mul/ext and test the cost of the entire pattern vs the cost
5886 // of the components. If the reduction cost is lower then we return it for the
5887 // reduction instruction and 0 for the other instructions in the pattern. If
5888 // it is not we return an invalid cost specifying the orignal cost method
5889 // should be used.
5890 Instruction *RetI = I;
5891 if (match(RetI, m_ZExtOrSExt(m_Value()))) {
5892 if (!RetI->hasOneUser())
5893 return std::nullopt;
5894 RetI = RetI->user_back();
5895 }
5896
5897 if (match(RetI, m_OneUse(m_Mul(m_Value(), m_Value()))) &&
5898 RetI->user_back()->getOpcode() == Instruction::Add) {
5899 RetI = RetI->user_back();
5900 }
5901
5902 // Test if the found instruction is a reduction, and if not return an invalid
5903 // cost specifying the parent to use the original cost modelling.
5904 if (!InLoopReductionImmediateChains.count(RetI))
5905 return std::nullopt;
5906
5907 // Find the reduction this chain is a part of and calculate the basic cost of
5908 // the reduction on its own.
5909 Instruction *LastChain = InLoopReductionImmediateChains.at(RetI);
5910 Instruction *ReductionPhi = LastChain;
5911 while (!isa<PHINode>(ReductionPhi))
5912 ReductionPhi = InLoopReductionImmediateChains.at(ReductionPhi);
5913
5914 const RecurrenceDescriptor &RdxDesc =
5915 Legal->getReductionVars().find(cast<PHINode>(ReductionPhi))->second;
5916
5917 InstructionCost BaseCost;
5918 RecurKind RK = RdxDesc.getRecurrenceKind();
5921 BaseCost = TTI.getMinMaxReductionCost(MinMaxID, VectorTy,
5922 RdxDesc.getFastMathFlags(), CostKind);
5923 } else {
5925 RdxDesc.getOpcode(), VectorTy, RdxDesc.getFastMathFlags(), CostKind);
5926 }
5927
5928 // For a call to the llvm.fmuladd intrinsic we need to add the cost of a
5929 // normal fmul instruction to the cost of the fadd reduction.
5930 if (RK == RecurKind::FMulAdd)
5931 BaseCost +=
5932 TTI.getArithmeticInstrCost(Instruction::FMul, VectorTy, CostKind);
5933
5934 // If we're using ordered reductions then we can just return the base cost
5935 // here, since getArithmeticReductionCost calculates the full ordered
5936 // reduction cost when FP reassociation is not allowed.
5937 if (useOrderedReductions(RdxDesc))
5938 return BaseCost;
5939
5940 // Get the operand that was not the reduction chain and match it to one of the
5941 // patterns, returning the better cost if it is found.
5942 Instruction *RedOp = RetI->getOperand(1) == LastChain
5943 ? dyn_cast<Instruction>(RetI->getOperand(0))
5944 : dyn_cast<Instruction>(RetI->getOperand(1));
5945
5946 VectorTy = VectorType::get(I->getOperand(0)->getType(), VectorTy);
5947
5948 Instruction *Op0, *Op1;
5949 if (RedOp && RdxDesc.getOpcode() == Instruction::Add &&
5950 match(RedOp,
5952 match(Op0, m_ZExtOrSExt(m_Value())) &&
5953 Op0->getOpcode() == Op1->getOpcode() &&
5954 Op0->getOperand(0)->getType() == Op1->getOperand(0)->getType() &&
5956 (Op0->getOpcode() == RedOp->getOpcode() || Op0 == Op1)) {
5957
5958 // Matched reduce.add(ext(mul(ext(A), ext(B)))
5959 // Note that the extend opcodes need to all match, or if A==B they will have
5960 // been converted to zext(mul(sext(A), sext(A))) as it is known positive,
5961 // which is equally fine.
5962 bool IsUnsigned = isa<ZExtInst>(Op0);
5963 auto *ExtType = VectorType::get(Op0->getOperand(0)->getType(), VectorTy);
5964 auto *MulType = VectorType::get(Op0->getType(), VectorTy);
5965
5966 InstructionCost ExtCost =
5967 TTI.getCastInstrCost(Op0->getOpcode(), MulType, ExtType,
5969 InstructionCost MulCost =
5970 TTI.getArithmeticInstrCost(Instruction::Mul, MulType, CostKind);
5971 InstructionCost Ext2Cost =
5972 TTI.getCastInstrCost(RedOp->getOpcode(), VectorTy, MulType,
5974
5976 IsUnsigned, RdxDesc.getRecurrenceType(), ExtType, CostKind);
5977
5978 if (RedCost.isValid() &&
5979 RedCost < ExtCost * 2 + MulCost + Ext2Cost + BaseCost)
5980 return I == RetI ? RedCost : 0;
5981 } else if (RedOp && match(RedOp, m_ZExtOrSExt(m_Value())) &&
5982 !TheLoop->isLoopInvariant(RedOp)) {
5983 // Matched reduce(ext(A))
5984 bool IsUnsigned = isa<ZExtInst>(RedOp);
5985 auto *ExtType = VectorType::get(RedOp->getOperand(0)->getType(), VectorTy);
5987 RdxDesc.getOpcode(), IsUnsigned, RdxDesc.getRecurrenceType(), ExtType,
5988 RdxDesc.getFastMathFlags(), CostKind);
5989
5990 InstructionCost ExtCost =
5991 TTI.getCastInstrCost(RedOp->getOpcode(), VectorTy, ExtType,
5993 if (RedCost.isValid() && RedCost < BaseCost + ExtCost)
5994 return I == RetI ? RedCost : 0;
5995 } else if (RedOp && RdxDesc.getOpcode() == Instruction::Add &&
5996 match(RedOp, m_Mul(m_Instruction(Op0), m_Instruction(Op1)))) {
5997 if (match(Op0, m_ZExtOrSExt(m_Value())) &&
5998 Op0->getOpcode() == Op1->getOpcode() &&
6000 bool IsUnsigned = isa<ZExtInst>(Op0);
6001 Type *Op0Ty = Op0->getOperand(0)->getType();
6002 Type *Op1Ty = Op1->getOperand(0)->getType();
6003 Type *LargestOpTy =
6004 Op0Ty->getIntegerBitWidth() < Op1Ty->getIntegerBitWidth() ? Op1Ty
6005 : Op0Ty;
6006 auto *ExtType = VectorType::get(LargestOpTy, VectorTy);
6007
6008 // Matched reduce.add(mul(ext(A), ext(B))), where the two ext may be of
6009 // different sizes. We take the largest type as the ext to reduce, and add
6010 // the remaining cost as, for example reduce(mul(ext(ext(A)), ext(B))).
6012 Op0->getOpcode(), VectorTy, VectorType::get(Op0Ty, VectorTy),
6015 Op1->getOpcode(), VectorTy, VectorType::get(Op1Ty, VectorTy),
6017 InstructionCost MulCost =
6018 TTI.getArithmeticInstrCost(Instruction::Mul, VectorTy, CostKind);
6019
6021 IsUnsigned, RdxDesc.getRecurrenceType(), ExtType, CostKind);
6022 InstructionCost ExtraExtCost = 0;
6023 if (Op0Ty != LargestOpTy || Op1Ty != LargestOpTy) {
6024 Instruction *ExtraExtOp = (Op0Ty != LargestOpTy) ? Op0 : Op1;
6025 ExtraExtCost = TTI.getCastInstrCost(
6026 ExtraExtOp->getOpcode(), ExtType,
6027 VectorType::get(ExtraExtOp->getOperand(0)->getType(), VectorTy),
6029 }
6030
6031 if (RedCost.isValid() &&
6032 (RedCost + ExtraExtCost) < (ExtCost0 + ExtCost1 + MulCost + BaseCost))
6033 return I == RetI ? RedCost : 0;
6034 } else if (!match(I, m_ZExtOrSExt(m_Value()))) {
6035 // Matched reduce.add(mul())
6036 InstructionCost MulCost =
6037 TTI.getArithmeticInstrCost(Instruction::Mul, VectorTy, CostKind);
6038
6040 true, RdxDesc.getRecurrenceType(), VectorTy, CostKind);
6041
6042 if (RedCost.isValid() && RedCost < MulCost + BaseCost)
6043 return I == RetI ? RedCost : 0;
6044 }
6045 }
6046
6047 return I == RetI ? std::optional<InstructionCost>(BaseCost) : std::nullopt;
6048}
6049
6051LoopVectorizationCostModel::getMemoryInstructionCost(Instruction *I,
6052 ElementCount VF) {
6053 // Calculate scalar cost only. Vectorization cost should be ready at this
6054 // moment.
6055 if (VF.isScalar()) {
6056 Type *ValTy = getLoadStoreType(I);
6057 const Align Alignment = getLoadStoreAlignment(I);
6058 unsigned AS = getLoadStoreAddressSpace(I);
6059
6060 TTI::OperandValueInfo OpInfo = TTI::getOperandInfo(I->getOperand(0));
6061 return TTI.getAddressComputationCost(ValTy) +
6062 TTI.getMemoryOpCost(I->getOpcode(), ValTy, Alignment, AS,
6063 TTI::TCK_RecipThroughput, OpInfo, I);
6064 }
6065 return getWideningCost(I, VF);
6066}
6067
6068InstructionCost LoopVectorizationCostModel::getScalarizationOverhead(
6070
6071 // There is no mechanism yet to create a scalable scalarization loop,
6072 // so this is currently Invalid.
6073 if (VF.isScalable())
6075
6076 if (VF.isScalar())
6077 return 0;
6078
6080 Type *RetTy = toVectorTy(I->getType(), VF);
6081 if (!RetTy->isVoidTy() &&
6082 (!isa<LoadInst>(I) || !TTI.supportsEfficientVectorElementLoadStore()))
6084 cast<VectorType>(RetTy), APInt::getAllOnes(VF.getKnownMinValue()),
6085 /*Insert*/ true,
6086 /*Extract*/ false, CostKind);
6087
6088 // Some targets keep addresses scalar.
6089 if (isa<LoadInst>(I) && !TTI.prefersVectorizedAddressing())
6090 return Cost;
6091
6092 // Some targets support efficient element stores.
6093 if (isa<StoreInst>(I) && TTI.supportsEfficientVectorElementLoadStore())
6094 return Cost;
6095
6096 // Collect operands to consider.
6097 CallInst *CI = dyn_cast<CallInst>(I);
6098 Instruction::op_range Ops = CI ? CI->args() : I->operands();
6099
6100 // Skip operands that do not require extraction/scalarization and do not incur
6101 // any overhead.
6103 for (auto *V : filterExtractingOperands(Ops, VF))
6104 Tys.push_back(maybeVectorizeType(V->getType(), VF));
6106 filterExtractingOperands(Ops, VF), Tys, CostKind);
6107}
6108
6110 if (VF.isScalar())
6111 return;
6112 NumPredStores = 0;
6113 for (BasicBlock *BB : TheLoop->blocks()) {
6114 // For each instruction in the old loop.
6115 for (Instruction &I : *BB) {
6117 if (!Ptr)
6118 continue;
6119
6120 // TODO: We should generate better code and update the cost model for
6121 // predicated uniform stores. Today they are treated as any other
6122 // predicated store (see added test cases in
6123 // invariant-store-vectorization.ll).
6124 if (isa<StoreInst>(&I) && isScalarWithPredication(&I, VF))
6125 NumPredStores++;
6126
6127 if (Legal->isUniformMemOp(I, VF)) {
6128 auto IsLegalToScalarize = [&]() {
6129 if (!VF.isScalable())
6130 // Scalarization of fixed length vectors "just works".
6131 return true;
6132
6133 // We have dedicated lowering for unpredicated uniform loads and
6134 // stores. Note that even with tail folding we know that at least
6135 // one lane is active (i.e. generalized predication is not possible
6136 // here), and the logic below depends on this fact.
6137 if (!foldTailByMasking())
6138 return true;
6139
6140 // For scalable vectors, a uniform memop load is always
6141 // uniform-by-parts and we know how to scalarize that.
6142 if (isa<LoadInst>(I))
6143 return true;
6144
6145 // A uniform store isn't neccessarily uniform-by-part
6146 // and we can't assume scalarization.
6147 auto &SI = cast<StoreInst>(I);
6148 return TheLoop->isLoopInvariant(SI.getValueOperand());
6149 };
6150
6151 const InstructionCost GatherScatterCost =
6153 getGatherScatterCost(&I, VF) : InstructionCost::getInvalid();
6154
6155 // Load: Scalar load + broadcast
6156 // Store: Scalar store + isLoopInvariantStoreValue ? 0 : extract
6157 // FIXME: This cost is a significant under-estimate for tail folded
6158 // memory ops.
6159 const InstructionCost ScalarizationCost =
6160 IsLegalToScalarize() ? getUniformMemOpCost(&I, VF)
6162
6163 // Choose better solution for the current VF, Note that Invalid
6164 // costs compare as maximumal large. If both are invalid, we get
6165 // scalable invalid which signals a failure and a vectorization abort.
6166 if (GatherScatterCost < ScalarizationCost)
6167 setWideningDecision(&I, VF, CM_GatherScatter, GatherScatterCost);
6168 else
6169 setWideningDecision(&I, VF, CM_Scalarize, ScalarizationCost);
6170 continue;
6171 }
6172
6173 // We assume that widening is the best solution when possible.
6174 if (memoryInstructionCanBeWidened(&I, VF)) {
6175 InstructionCost Cost = getConsecutiveMemOpCost(&I, VF);
6176 int ConsecutiveStride = Legal->isConsecutivePtr(
6178 assert((ConsecutiveStride == 1 || ConsecutiveStride == -1) &&
6179 "Expected consecutive stride.");
6180 InstWidening Decision =
6181 ConsecutiveStride == 1 ? CM_Widen : CM_Widen_Reverse;
6182 setWideningDecision(&I, VF, Decision, Cost);
6183 continue;
6184 }
6185
6186 // Choose between Interleaving, Gather/Scatter or Scalarization.
6188 unsigned NumAccesses = 1;
6189 if (isAccessInterleaved(&I)) {
6190 const auto *Group = getInterleavedAccessGroup(&I);
6191 assert(Group && "Fail to get an interleaved access group.");
6192
6193 // Make one decision for the whole group.
6194 if (getWideningDecision(&I, VF) != CM_Unknown)
6195 continue;
6196
6197 NumAccesses = Group->getNumMembers();
6199 InterleaveCost = getInterleaveGroupCost(&I, VF);
6200 }
6201
6202 InstructionCost GatherScatterCost =
6204 ? getGatherScatterCost(&I, VF) * NumAccesses
6206
6207 InstructionCost ScalarizationCost =
6208 getMemInstScalarizationCost(&I, VF) * NumAccesses;
6209
6210 // Choose better solution for the current VF,
6211 // write down this decision and use it during vectorization.
6213 InstWidening Decision;
6214 if (InterleaveCost <= GatherScatterCost &&
6215 InterleaveCost < ScalarizationCost) {
6216 Decision = CM_Interleave;
6217 Cost = InterleaveCost;
6218 } else if (GatherScatterCost < ScalarizationCost) {
6219 Decision = CM_GatherScatter;
6220 Cost = GatherScatterCost;
6221 } else {
6222 Decision = CM_Scalarize;
6223 Cost = ScalarizationCost;
6224 }
6225 // If the instructions belongs to an interleave group, the whole group
6226 // receives the same decision. The whole group receives the cost, but
6227 // the cost will actually be assigned to one instruction.
6228 if (const auto *Group = getInterleavedAccessGroup(&I))
6229 setWideningDecision(Group, VF, Decision, Cost);
6230 else
6231 setWideningDecision(&I, VF, Decision, Cost);
6232 }
6233 }
6234
6235 // Make sure that any load of address and any other address computation
6236 // remains scalar unless there is gather/scatter support. This avoids
6237 // inevitable extracts into address registers, and also has the benefit of
6238 // activating LSR more, since that pass can't optimize vectorized
6239 // addresses.
6241 return;
6242
6243 // Start with all scalar pointer uses.
6245 for (BasicBlock *BB : TheLoop->blocks())
6246 for (Instruction &I : *BB) {
6247 Instruction *PtrDef =
6248 dyn_cast_or_null<Instruction>(getLoadStorePointerOperand(&I));
6249 if (PtrDef && TheLoop->contains(PtrDef) &&
6251 AddrDefs.insert(PtrDef);
6252 }
6253
6254 // Add all instructions used to generate the addresses.
6256 append_range(Worklist, AddrDefs);
6257 while (!Worklist.empty()) {
6258 Instruction *I = Worklist.pop_back_val();
6259 for (auto &Op : I->operands())
6260 if (auto *InstOp = dyn_cast<Instruction>(Op))
6261 if ((InstOp->getParent() == I->getParent()) && !isa<PHINode>(InstOp) &&
6262 AddrDefs.insert(InstOp).second)
6263 Worklist.push_back(InstOp);
6264 }
6265
6266 for (auto *I : AddrDefs) {
6267 if (isa<LoadInst>(I)) {
6268 // Setting the desired widening decision should ideally be handled in
6269 // by cost functions, but since this involves the task of finding out
6270 // if the loaded register is involved in an address computation, it is
6271 // instead changed here when we know this is the case.
6272 InstWidening Decision = getWideningDecision(I, VF);
6273 if (Decision == CM_Widen || Decision == CM_Widen_Reverse)
6274 // Scalarize a widened load of address.
6276 I, VF, CM_Scalarize,
6277 (VF.getKnownMinValue() *
6278 getMemoryInstructionCost(I, ElementCount::getFixed(1))));
6279 else if (const auto *Group = getInterleavedAccessGroup(I)) {
6280 // Scalarize an interleave group of address loads.
6281 for (unsigned I = 0; I < Group->getFactor(); ++I) {
6282 if (Instruction *Member = Group->getMember(I))
6284 Member, VF, CM_Scalarize,
6285 (VF.getKnownMinValue() *
6286 getMemoryInstructionCost(Member, ElementCount::getFixed(1))));
6287 }
6288 }
6289 } else
6290 // Make sure I gets scalarized and a cost estimate without
6291 // scalarization overhead.
6292 ForcedScalars[VF].insert(I);
6293 }
6294}
6295
6297 assert(!VF.isScalar() &&
6298 "Trying to set a vectorization decision for a scalar VF");
6299
6300 auto ForcedScalar = ForcedScalars.find(VF);
6301 for (BasicBlock *BB : TheLoop->blocks()) {
6302 // For each instruction in the old loop.
6303 for (Instruction &I : *BB) {
6304 CallInst *CI = dyn_cast<CallInst>(&I);
6305
6306 if (!CI)
6307 continue;
6308
6313 Function *ScalarFunc = CI->getCalledFunction();
6314 Type *ScalarRetTy = CI->getType();
6315 SmallVector<Type *, 4> Tys, ScalarTys;
6316 for (auto &ArgOp : CI->args())
6317 ScalarTys.push_back(ArgOp->getType());
6318
6319 // Estimate cost of scalarized vector call. The source operands are
6320 // assumed to be vectors, so we need to extract individual elements from
6321 // there, execute VF scalar calls, and then gather the result into the
6322 // vector return value.
6323 InstructionCost ScalarCallCost =
6324 TTI.getCallInstrCost(ScalarFunc, ScalarRetTy, ScalarTys, CostKind);
6325
6326 // Compute costs of unpacking argument values for the scalar calls and
6327 // packing the return values to a vector.
6328 InstructionCost ScalarizationCost =
6329 getScalarizationOverhead(CI, VF, CostKind);
6330
6331 ScalarCost = ScalarCallCost * VF.getKnownMinValue() + ScalarizationCost;
6332 // Honor ForcedScalars and UniformAfterVectorization decisions.
6333 // TODO: For calls, it might still be more profitable to widen. Use
6334 // VPlan-based cost model to compare different options.
6335 if (VF.isVector() && ((ForcedScalar != ForcedScalars.end() &&
6336 ForcedScalar->second.contains(CI)) ||
6337 isUniformAfterVectorization(CI, VF))) {
6338 setCallWideningDecision(CI, VF, CM_Scalarize, nullptr,
6339 Intrinsic::not_intrinsic, std::nullopt,
6340 ScalarCost);
6341 continue;
6342 }
6343
6344 bool MaskRequired = Legal->isMaskRequired(CI);
6345 // Compute corresponding vector type for return value and arguments.
6346 Type *RetTy = toVectorTy(ScalarRetTy, VF);
6347 for (Type *ScalarTy : ScalarTys)
6348 Tys.push_back(toVectorTy(ScalarTy, VF));
6349
6350 // An in-loop reduction using an fmuladd intrinsic is a special case;
6351 // we don't want the normal cost for that intrinsic.
6353 if (auto RedCost = getReductionPatternCost(CI, VF, RetTy, CostKind)) {
6356 std::nullopt, *RedCost);
6357 continue;
6358 }
6359
6360 // Find the cost of vectorizing the call, if we can find a suitable
6361 // vector variant of the function.
6362 bool UsesMask = false;
6363 VFInfo FuncInfo;
6364 Function *VecFunc = nullptr;
6365 // Search through any available variants for one we can use at this VF.
6366 for (VFInfo &Info : VFDatabase::getMappings(*CI)) {
6367 // Must match requested VF.
6368 if (Info.Shape.VF != VF)
6369 continue;
6370
6371 // Must take a mask argument if one is required
6372 if (MaskRequired && !Info.isMasked())
6373 continue;
6374
6375 // Check that all parameter kinds are supported
6376 bool ParamsOk = true;
6377 for (VFParameter Param : Info.Shape.Parameters) {
6378 switch (Param.ParamKind) {
6380 break;
6382 Value *ScalarParam = CI->getArgOperand(Param.ParamPos);
6383 // Make sure the scalar parameter in the loop is invariant.
6384 if (!PSE.getSE()->isLoopInvariant(PSE.getSCEV(ScalarParam),
6385 TheLoop))
6386 ParamsOk = false;
6387 break;
6388 }
6390 Value *ScalarParam = CI->getArgOperand(Param.ParamPos);
6391 // Find the stride for the scalar parameter in this loop and see if
6392 // it matches the stride for the variant.
6393 // TODO: do we need to figure out the cost of an extract to get the
6394 // first lane? Or do we hope that it will be folded away?
6395 ScalarEvolution *SE = PSE.getSE();
6396 const auto *SAR =
6397 dyn_cast<SCEVAddRecExpr>(SE->getSCEV(ScalarParam));
6398
6399 if (!SAR || SAR->getLoop() != TheLoop) {
6400 ParamsOk = false;
6401 break;
6402 }
6403
6404 const SCEVConstant *Step =
6405 dyn_cast<SCEVConstant>(SAR->getStepRecurrence(*SE));
6406
6407 if (!Step ||
6408 Step->getAPInt().getSExtValue() != Param.LinearStepOrPos)
6409 ParamsOk = false;
6410
6411 break;
6412 }
6414 UsesMask = true;
6415 break;
6416 default:
6417 ParamsOk = false;
6418 break;
6419 }
6420 }
6421
6422 if (!ParamsOk)
6423 continue;
6424
6425 // Found a suitable candidate, stop here.
6426 VecFunc = CI->getModule()->getFunction(Info.VectorName);
6427 FuncInfo = Info;
6428 break;
6429 }
6430
6431 // Add in the cost of synthesizing a mask if one wasn't required.
6432 InstructionCost MaskCost = 0;
6433 if (VecFunc && UsesMask && !MaskRequired)
6434 MaskCost = TTI.getShuffleCost(
6437 VecFunc->getFunctionType()->getContext()),
6438 VF));
6439
6440 if (TLI && VecFunc && !CI->isNoBuiltin())
6441 VectorCost =
6442 TTI.getCallInstrCost(nullptr, RetTy, Tys, CostKind) + MaskCost;
6443
6444 // Find the cost of an intrinsic; some targets may have instructions that
6445 // perform the operation without needing an actual call.
6447 if (IID != Intrinsic::not_intrinsic)
6448 IntrinsicCost = getVectorIntrinsicCost(CI, VF);
6449
6450 InstructionCost Cost = ScalarCost;
6451 InstWidening Decision = CM_Scalarize;
6452
6453 if (VectorCost <= Cost) {
6454 Cost = VectorCost;
6455 Decision = CM_VectorCall;
6456 }
6457
6458 if (IntrinsicCost <= Cost) {
6459 Cost = IntrinsicCost;
6460 Decision = CM_IntrinsicCall;
6461 }
6462
6463 setCallWideningDecision(CI, VF, Decision, VecFunc, IID,
6465 }
6466 }
6467}
6468
6470 if (!Legal->isInvariant(Op))
6471 return false;
6472 // Consider Op invariant, if it or its operands aren't predicated
6473 // instruction in the loop. In that case, it is not trivially hoistable.
6474 auto *OpI = dyn_cast<Instruction>(Op);
6475 return !OpI || !TheLoop->contains(OpI) ||
6476 (!isPredicatedInst(OpI) &&
6477 (!isa<PHINode>(OpI) || OpI->getParent() != TheLoop->getHeader()) &&
6478 all_of(OpI->operands(),
6479 [this](Value *Op) { return shouldConsiderInvariant(Op); }));
6480}
6481
6484 ElementCount VF) {
6485 // If we know that this instruction will remain uniform, check the cost of
6486 // the scalar version.
6488 VF = ElementCount::getFixed(1);
6489
6490 if (VF.isVector() && isProfitableToScalarize(I, VF))
6491 return InstsToScalarize[VF][I];
6492
6493 // Forced scalars do not have any scalarization overhead.
6494 auto ForcedScalar = ForcedScalars.find(VF);
6495 if (VF.isVector() && ForcedScalar != ForcedScalars.end()) {
6496 auto InstSet = ForcedScalar->second;
6497 if (InstSet.count(I))
6499 VF.getKnownMinValue();
6500 }
6501
6502 Type *RetTy = I->getType();
6504 RetTy = IntegerType::get(RetTy->getContext(), MinBWs[I]);
6505 auto *SE = PSE.getSE();
6507
6508 auto HasSingleCopyAfterVectorization = [this](Instruction *I,
6509 ElementCount VF) -> bool {
6510 if (VF.isScalar())
6511 return true;
6512
6513 auto Scalarized = InstsToScalarize.find(VF);
6514 assert(Scalarized != InstsToScalarize.end() &&
6515 "VF not yet analyzed for scalarization profitability");
6516 return !Scalarized->second.count(I) &&
6517 llvm::all_of(I->users(), [&](User *U) {
6518 auto *UI = cast<Instruction>(U);
6519 return !Scalarized->second.count(UI);
6520 });
6521 };
6522 (void)HasSingleCopyAfterVectorization;
6523
6524 Type *VectorTy;
6525 if (isScalarAfterVectorization(I, VF)) {
6526 // With the exception of GEPs and PHIs, after scalarization there should
6527 // only be one copy of the instruction generated in the loop. This is
6528 // because the VF is either 1, or any instructions that need scalarizing
6529 // have already been dealt with by the time we get here. As a result,
6530 // it means we don't have to multiply the instruction cost by VF.
6531 assert(I->getOpcode() == Instruction::GetElementPtr ||
6532 I->getOpcode() == Instruction::PHI ||
6533 (I->getOpcode() == Instruction::BitCast &&
6534 I->getType()->isPointerTy()) ||
6535 HasSingleCopyAfterVectorization(I, VF));
6536 VectorTy = RetTy;
6537 } else
6538 VectorTy = toVectorTy(RetTy, VF);
6539
6540 if (VF.isVector() && VectorTy->isVectorTy() &&
6541 !TTI.getNumberOfParts(VectorTy))
6543
6544 // TODO: We need to estimate the cost of intrinsic calls.
6545 switch (I->getOpcode()) {
6546 case Instruction::GetElementPtr:
6547 // We mark this instruction as zero-cost because the cost of GEPs in
6548 // vectorized code depends on whether the corresponding memory instruction
6549 // is scalarized or not. Therefore, we handle GEPs with the memory
6550 // instruction cost.
6551 return 0;
6552 case Instruction::Br: {
6553 // In cases of scalarized and predicated instructions, there will be VF
6554 // predicated blocks in the vectorized loop. Each branch around these
6555 // blocks requires also an extract of its vector compare i1 element.
6556 // Note that the conditional branch from the loop latch will be replaced by
6557 // a single branch controlling the loop, so there is no extra overhead from
6558 // scalarization.
6559 bool ScalarPredicatedBB = false;
6560 BranchInst *BI = cast<BranchInst>(I);
6561 if (VF.isVector() && BI->isConditional() &&
6562 (PredicatedBBsAfterVectorization[VF].count(BI->getSuccessor(0)) ||
6563 PredicatedBBsAfterVectorization[VF].count(BI->getSuccessor(1))) &&
6564 BI->getParent() != TheLoop->getLoopLatch())
6565 ScalarPredicatedBB = true;
6566
6567 if (ScalarPredicatedBB) {
6568 // Not possible to scalarize scalable vector with predicated instructions.
6569 if (VF.isScalable())
6571 // Return cost for branches around scalarized and predicated blocks.
6572 auto *VecI1Ty =
6573 VectorType::get(IntegerType::getInt1Ty(RetTy->getContext()), VF);
6574 return (
6576 VecI1Ty, APInt::getAllOnes(VF.getFixedValue()),
6577 /*Insert*/ false, /*Extract*/ true, CostKind) +
6578 (TTI.getCFInstrCost(Instruction::Br, CostKind) * VF.getFixedValue()));
6579 }
6580
6581 if (I->getParent() == TheLoop->getLoopLatch() || VF.isScalar())
6582 // The back-edge branch will remain, as will all scalar branches.
6583 return TTI.getCFInstrCost(Instruction::Br, CostKind);
6584
6585 // This branch will be eliminated by if-conversion.
6586 return 0;
6587 // Note: We currently assume zero cost for an unconditional branch inside
6588 // a predicated block since it will become a fall-through, although we
6589 // may decide in the future to call TTI for all branches.
6590 }
6591 case Instruction::Switch: {
6592 if (VF.isScalar())
6593 return TTI.getCFInstrCost(Instruction::Switch, CostKind);
6594 auto *Switch = cast<SwitchInst>(I);
6595 return Switch->getNumCases() *
6597 Instruction::ICmp,
6598 toVectorTy(Switch->getCondition()->getType(), VF),
6599 toVectorTy(Type::getInt1Ty(I->getContext()), VF),
6601 }
6602 case Instruction::PHI: {
6603 auto *Phi = cast<PHINode>(I);
6604
6605 // First-order recurrences are replaced by vector shuffles inside the loop.
6606 if (VF.isVector() && Legal->isFixedOrderRecurrence(Phi)) {
6607 // For <vscale x 1 x i64>, if vscale = 1 we are unable to extract the
6608 // penultimate value of the recurrence.
6609 // TODO: Consider vscale_range info.
6610 if (VF.isScalable() && VF.getKnownMinValue() == 1)
6613 std::iota(Mask.begin(), Mask.end(), VF.getKnownMinValue() - 1);
6615 cast<VectorType>(VectorTy), Mask, CostKind,
6616 VF.getKnownMinValue() - 1);
6617 }
6618
6619 // Phi nodes in non-header blocks (not inductions, reductions, etc.) are
6620 // converted into select instructions. We require N - 1 selects per phi
6621 // node, where N is the number of incoming values.
6622 if (VF.isVector() && Phi->getParent() != TheLoop->getHeader()) {
6623 Type *ResultTy = Phi->getType();
6624
6625 // All instructions in an Any-of reduction chain are narrowed to bool.
6626 // Check if that is the case for this phi node.
6627 auto *HeaderUser = cast_if_present<PHINode>(
6628 find_singleton<User>(Phi->users(), [this](User *U, bool) -> User * {
6629 auto *Phi = dyn_cast<PHINode>(U);
6630 if (Phi && Phi->getParent() == TheLoop->getHeader())
6631 return Phi;
6632 return nullptr;
6633 }));
6634 if (HeaderUser) {
6635 auto &ReductionVars = Legal->getReductionVars();
6636 auto Iter = ReductionVars.find(HeaderUser);
6637 if (Iter != ReductionVars.end() &&
6639 Iter->second.getRecurrenceKind()))
6640 ResultTy = Type::getInt1Ty(Phi->getContext());
6641 }
6642 return (Phi->getNumIncomingValues() - 1) *
6644 Instruction::Select, toVectorTy(ResultTy, VF),
6645 toVectorTy(Type::getInt1Ty(Phi->getContext()), VF),
6647 }
6648
6649 // When tail folding with EVL, if the phi is part of an out of loop
6650 // reduction then it will be transformed into a wide vp_merge.
6651 if (VF.isVector() && foldTailWithEVL() &&
6654 Intrinsic::vp_merge, toVectorTy(Phi->getType(), VF),
6655 {toVectorTy(Type::getInt1Ty(Phi->getContext()), VF)});
6656 return TTI.getIntrinsicInstrCost(ICA, CostKind);
6657 }
6658
6659 return TTI.getCFInstrCost(Instruction::PHI, CostKind);
6660 }
6661 case Instruction::UDiv:
6662 case Instruction::SDiv:
6663 case Instruction::URem:
6664 case Instruction::SRem:
6665 if (VF.isVector() && isPredicatedInst(I)) {
6666 const auto [ScalarCost, SafeDivisorCost] = getDivRemSpeculationCost(I, VF);
6667 return isDivRemScalarWithPredication(ScalarCost, SafeDivisorCost) ?
6668 ScalarCost : SafeDivisorCost;
6669 }
6670 // We've proven all lanes safe to speculate, fall through.
6671 [[fallthrough]];
6672 case Instruction::Add:
6673 case Instruction::Sub: {
6674 auto Info = Legal->getHistogramInfo(I);
6675 if (Info && VF.isVector()) {
6676 const HistogramInfo *HGram = Info.value();
6677 // Assume that a non-constant update value (or a constant != 1) requires
6678 // a multiply, and add that into the cost.
6680 ConstantInt *RHS = dyn_cast<ConstantInt>(I->getOperand(1));
6681 if (!RHS || RHS->getZExtValue() != 1)
6682 MulCost = TTI.getArithmeticInstrCost(Instruction::Mul, VectorTy);
6683
6684 // Find the cost of the histogram operation itself.
6685 Type *PtrTy = VectorType::get(HGram->Load->getPointerOperandType(), VF);
6686 Type *ScalarTy = I->getType();
6687 Type *MaskTy = VectorType::get(Type::getInt1Ty(I->getContext()), VF);
6688 IntrinsicCostAttributes ICA(Intrinsic::experimental_vector_histogram_add,
6689 Type::getVoidTy(I->getContext()),
6690 {PtrTy, ScalarTy, MaskTy});
6691
6692 // Add the costs together with the add/sub operation.
6695 MulCost + TTI.getArithmeticInstrCost(I->getOpcode(), VectorTy);
6696 }
6697 [[fallthrough]];
6698 }
6699 case Instruction::FAdd:
6700 case Instruction::FSub:
6701 case Instruction::Mul:
6702 case Instruction::FMul:
6703 case Instruction::FDiv:
6704 case Instruction::FRem:
6705 case Instruction::Shl:
6706 case Instruction::LShr:
6707 case Instruction::AShr:
6708 case Instruction::And:
6709 case Instruction::Or:
6710 case Instruction::Xor: {
6711 // If we're speculating on the stride being 1, the multiplication may
6712 // fold away. We can generalize this for all operations using the notion
6713 // of neutral elements. (TODO)
6714 if (I->getOpcode() == Instruction::Mul &&
6715 (PSE.getSCEV(I->getOperand(0))->isOne() ||
6716 PSE.getSCEV(I->getOperand(1))->isOne()))
6717 return 0;
6718
6719 // Detect reduction patterns
6720 if (auto RedCost = getReductionPatternCost(I, VF, VectorTy, CostKind))
6721 return *RedCost;
6722
6723 // Certain instructions can be cheaper to vectorize if they have a constant
6724 // second vector operand. One example of this are shifts on x86.
6725 Value *Op2 = I->getOperand(1);
6726 if (!isa<Constant>(Op2) && PSE.getSE()->isSCEVable(Op2->getType()) &&
6727 isa<SCEVConstant>(PSE.getSCEV(Op2))) {
6728 Op2 = cast<SCEVConstant>(PSE.getSCEV(Op2))->getValue();
6729 }
6730 auto Op2Info = TTI.getOperandInfo(Op2);
6731 if (Op2Info.Kind == TargetTransformInfo::OK_AnyValue &&
6734
6735 SmallVector<const Value *, 4> Operands(I->operand_values());
6737 I->getOpcode(), VectorTy, CostKind,
6738 {TargetTransformInfo::OK_AnyValue, TargetTransformInfo::OP_None},
6739 Op2Info, Operands, I, TLI);
6740 }
6741 case Instruction::FNeg: {
6743 I->getOpcode(), VectorTy, CostKind,
6744 {TargetTransformInfo::OK_AnyValue, TargetTransformInfo::OP_None},
6745 {TargetTransformInfo::OK_AnyValue, TargetTransformInfo::OP_None},
6746 I->getOperand(0), I);
6747 }
6748 case Instruction::Select: {
6749 SelectInst *SI = cast<SelectInst>(I);
6750 const SCEV *CondSCEV = SE->getSCEV(SI->getCondition());
6751 bool ScalarCond = (SE->isLoopInvariant(CondSCEV, TheLoop));
6752
6753 const Value *Op0, *Op1;
6754 using namespace llvm::PatternMatch;
6755 if (!ScalarCond && (match(I, m_LogicalAnd(m_Value(Op0), m_Value(Op1))) ||
6756 match(I, m_LogicalOr(m_Value(Op0), m_Value(Op1))))) {
6757 // select x, y, false --> x & y
6758 // select x, true, y --> x | y
6759 const auto [Op1VK, Op1VP] = TTI::getOperandInfo(Op0);
6760 const auto [Op2VK, Op2VP] = TTI::getOperandInfo(Op1);
6761 assert(Op0->getType()->getScalarSizeInBits() == 1 &&
6762 Op1->getType()->getScalarSizeInBits() == 1);
6763
6766 match(I, m_LogicalOr()) ? Instruction::Or : Instruction::And, VectorTy,
6767 CostKind, {Op1VK, Op1VP}, {Op2VK, Op2VP}, Operands, I);
6768 }
6769
6770 Type *CondTy = SI->getCondition()->getType();
6771 if (!ScalarCond)
6772 CondTy = VectorType::get(CondTy, VF);
6773
6775 if (auto *Cmp = dyn_cast<CmpInst>(SI->getCondition()))
6776 Pred = Cmp->getPredicate();
6777 return TTI.getCmpSelInstrCost(I->getOpcode(), VectorTy, CondTy, Pred,
6778 CostKind, {TTI::OK_AnyValue, TTI::OP_None},
6779 {TTI::OK_AnyValue, TTI::OP_None}, I);
6780 }
6781 case Instruction::ICmp:
6782 case Instruction::FCmp: {
6783 Type *ValTy = I->getOperand(0)->getType();
6784
6786 Instruction *Op0AsInstruction = dyn_cast<Instruction>(I->getOperand(0));
6787 (void)Op0AsInstruction;
6788 assert((!canTruncateToMinimalBitwidth(Op0AsInstruction, VF) ||
6789 MinBWs[I] == MinBWs[Op0AsInstruction]) &&
6790 "if both the operand and the compare are marked for "
6791 "truncation, they must have the same bitwidth");
6792 ValTy = IntegerType::get(ValTy->getContext(), MinBWs[I]);
6793 }
6794
6795 VectorTy = toVectorTy(ValTy, VF);
6796 return TTI.getCmpSelInstrCost(I->getOpcode(), VectorTy, nullptr,
6797 cast<CmpInst>(I)->getPredicate(), CostKind,
6798 {TTI::OK_AnyValue, TTI::OP_None},
6799 {TTI::OK_AnyValue, TTI::OP_None}, I);
6800 }
6801 case Instruction::Store:
6802 case Instruction::Load: {
6803 ElementCount Width = VF;
6804 if (Width.isVector()) {
6805 InstWidening Decision = getWideningDecision(I, Width);
6806 assert(Decision != CM_Unknown &&
6807 "CM decision should be taken at this point");
6810 if (Decision == CM_Scalarize)
6811 Width = ElementCount::getFixed(1);
6812 }
6813 VectorTy = toVectorTy(getLoadStoreType(I), Width);
6814 return getMemoryInstructionCost(I, VF);
6815 }
6816 case Instruction::BitCast:
6817 if (I->getType()->isPointerTy())
6818 return 0;
6819 [[fallthrough]];
6820 case Instruction::ZExt:
6821 case Instruction::SExt:
6822 case Instruction::FPToUI:
6823 case Instruction::FPToSI:
6824 case Instruction::FPExt:
6825 case Instruction::PtrToInt:
6826 case Instruction::IntToPtr:
6827 case Instruction::SIToFP:
6828 case Instruction::UIToFP:
6829 case Instruction::Trunc:
6830 case Instruction::FPTrunc: {
6831 // Computes the CastContextHint from a Load/Store instruction.
6832 auto ComputeCCH = [&](Instruction *I) -> TTI::CastContextHint {
6833 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
6834 "Expected a load or a store!");
6835
6836 if (VF.isScalar() || !TheLoop->contains(I))
6838
6839 switch (getWideningDecision(I, VF)) {
6851 llvm_unreachable("Instr did not go through cost modelling?");
6854 llvm_unreachable_internal("Instr has invalid widening decision");
6855 }
6856
6857 llvm_unreachable("Unhandled case!");
6858 };
6859
6860 unsigned Opcode = I->getOpcode();
6862 // For Trunc, the context is the only user, which must be a StoreInst.
6863 if (Opcode == Instruction::Trunc || Opcode == Instruction::FPTrunc) {
6864 if (I->hasOneUse())
6865 if (StoreInst *Store = dyn_cast<StoreInst>(*I->user_begin()))
6866 CCH = ComputeCCH(Store);
6867 }
6868 // For Z/Sext, the context is the operand, which must be a LoadInst.
6869 else if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt ||
6870 Opcode == Instruction::FPExt) {
6871 if (LoadInst *Load = dyn_cast<LoadInst>(I->getOperand(0)))
6872 CCH = ComputeCCH(Load);
6873 }
6874
6875 // We optimize the truncation of induction variables having constant
6876 // integer steps. The cost of these truncations is the same as the scalar
6877 // operation.
6878 if (isOptimizableIVTruncate(I, VF)) {
6879 auto *Trunc = cast<TruncInst>(I);
6880 return TTI.getCastInstrCost(Instruction::Trunc, Trunc->getDestTy(),
6881 Trunc->getSrcTy(), CCH, CostKind, Trunc);
6882 }
6883
6884 // Detect reduction patterns
6885 if (auto RedCost = getReductionPatternCost(I, VF, VectorTy, CostKind))
6886 return *RedCost;
6887
6888 Type *SrcScalarTy = I->getOperand(0)->getType();
6889 Instruction *Op0AsInstruction = dyn_cast<Instruction>(I->getOperand(0));
6890 if (canTruncateToMinimalBitwidth(Op0AsInstruction, VF))
6891 SrcScalarTy =
6892 IntegerType::get(SrcScalarTy->getContext(), MinBWs[Op0AsInstruction]);
6893 Type *SrcVecTy =
6894 VectorTy->isVectorTy() ? toVectorTy(SrcScalarTy, VF) : SrcScalarTy;
6895
6897 // If the result type is <= the source type, there will be no extend
6898 // after truncating the users to the minimal required bitwidth.
6899 if (VectorTy->getScalarSizeInBits() <= SrcVecTy->getScalarSizeInBits() &&
6900 (I->getOpcode() == Instruction::ZExt ||
6901 I->getOpcode() == Instruction::SExt))
6902 return 0;
6903 }
6904
6905 return TTI.getCastInstrCost(Opcode, VectorTy, SrcVecTy, CCH, CostKind, I);
6906 }
6907 case Instruction::Call:
6908 return getVectorCallCost(cast<CallInst>(I), VF);
6909 case Instruction::ExtractValue:
6911 case Instruction::Alloca:
6912 // We cannot easily widen alloca to a scalable alloca, as
6913 // the result would need to be a vector of pointers.
6914 if (VF.isScalable())
6916 [[fallthrough]];
6917 default:
6918 // This opcode is unknown. Assume that it is the same as 'mul'.
6919 return TTI.getArithmeticInstrCost(Instruction::Mul, VectorTy, CostKind);
6920 } // end of switch.
6921}
6922
6924 // Ignore ephemeral values.
6926
6927 SmallVector<Value *, 4> DeadInterleavePointerOps;
6929
6930 // If a scalar epilogue is required, users outside the loop won't use
6931 // live-outs from the vector loop but from the scalar epilogue. Ignore them if
6932 // that is the case.
6933 bool RequiresScalarEpilogue = requiresScalarEpilogue(true);
6934 auto IsLiveOutDead = [this, RequiresScalarEpilogue](User *U) {
6935 return RequiresScalarEpilogue &&
6936 !TheLoop->contains(cast<Instruction>(U)->getParent());
6937 };
6938
6940 DFS.perform(LI);
6941 MapVector<Value *, SmallVector<Value *>> DeadInvariantStoreOps;
6942 for (BasicBlock *BB : reverse(make_range(DFS.beginRPO(), DFS.endRPO())))
6943 for (Instruction &I : reverse(*BB)) {
6944 // Find all stores to invariant variables. Since they are going to sink
6945 // outside the loop we do not need calculate cost for them.
6946 StoreInst *SI;
6947 if ((SI = dyn_cast<StoreInst>(&I)) &&
6948 Legal->isInvariantAddressOfReduction(SI->getPointerOperand())) {
6949 ValuesToIgnore.insert(&I);
6950 DeadInvariantStoreOps[SI->getPointerOperand()].push_back(
6951 SI->getValueOperand());
6952 }
6953
6954 if (VecValuesToIgnore.contains(&I) || ValuesToIgnore.contains(&I))
6955 continue;
6956
6957 // Add instructions that would be trivially dead and are only used by
6958 // values already ignored to DeadOps to seed worklist.
6960 all_of(I.users(), [this, IsLiveOutDead](User *U) {
6961 return VecValuesToIgnore.contains(U) ||
6962 ValuesToIgnore.contains(U) || IsLiveOutDead(U);
6963 }))
6964 DeadOps.push_back(&I);
6965
6966 // For interleave groups, we only create a pointer for the start of the
6967 // interleave group. Queue up addresses of group members except the insert
6968 // position for further processing.
6969 if (isAccessInterleaved(&I)) {
6970 auto *Group = getInterleavedAccessGroup(&I);
6971 if (Group->getInsertPos() == &I)
6972 continue;
6973 Value *PointerOp = getLoadStorePointerOperand(&I);
6974 DeadInterleavePointerOps.push_back(PointerOp);
6975 }
6976
6977 // Queue branches for analysis. They are dead, if their successors only
6978 // contain dead instructions.
6979 if (auto *Br = dyn_cast<BranchInst>(&I)) {
6980 if (Br->isConditional())
6981 DeadOps.push_back(&I);
6982 }
6983 }
6984
6985 // Mark ops feeding interleave group members as free, if they are only used
6986 // by other dead computations.
6987 for (unsigned I = 0; I != DeadInterleavePointerOps.size(); ++I) {
6988 auto *Op = dyn_cast<Instruction>(DeadInterleavePointerOps[I]);
6989 if (!Op || !TheLoop->contains(Op) || any_of(Op->users(), [this](User *U) {
6990 Instruction *UI = cast<Instruction>(U);
6991 return !VecValuesToIgnore.contains(U) &&
6992 (!isAccessInterleaved(UI) ||
6993 getInterleavedAccessGroup(UI)->getInsertPos() == UI);
6994 }))
6995 continue;
6996 VecValuesToIgnore.insert(Op);
6997 DeadInterleavePointerOps.append(Op->op_begin(), Op->op_end());
6998 }
6999
7000 for (const auto &[_, Ops] : DeadInvariantStoreOps) {
7001 for (Value *Op : ArrayRef(Ops).drop_back())
7002 DeadOps.push_back(Op);
7003 }
7004 // Mark ops that would be trivially dead and are only used by ignored
7005 // instructions as free.
7006 BasicBlock *Header = TheLoop->getHeader();
7007
7008 // Returns true if the block contains only dead instructions. Such blocks will
7009 // be removed by VPlan-to-VPlan transforms and won't be considered by the
7010 // VPlan-based cost model, so skip them in the legacy cost-model as well.
7011 auto IsEmptyBlock = [this](BasicBlock *BB) {
7012 return all_of(*BB, [this](Instruction &I) {
7013 return ValuesToIgnore.contains(&I) || VecValuesToIgnore.contains(&I) ||
7014 (isa<BranchInst>(&I) && !cast<BranchInst>(&I)->isConditional());
7015 });
7016 };
7017 for (unsigned I = 0; I != DeadOps.size(); ++I) {
7018 auto *Op = dyn_cast<Instruction>(DeadOps[I]);
7019
7020 // Check if the branch should be considered dead.
7021 if (auto *Br = dyn_cast_or_null<BranchInst>(Op)) {
7022 BasicBlock *ThenBB = Br->getSuccessor(0);
7023 BasicBlock *ElseBB = Br->getSuccessor(1);
7024 // Don't considers branches leaving the loop for simplification.
7025 if (!TheLoop->contains(ThenBB) || !TheLoop->contains(ElseBB))
7026 continue;
7027 bool ThenEmpty = IsEmptyBlock(ThenBB);
7028 bool ElseEmpty = IsEmptyBlock(ElseBB);
7029 if ((ThenEmpty && ElseEmpty) ||
7030 (ThenEmpty && ThenBB->getSingleSuccessor() == ElseBB &&
7031 ElseBB->phis().empty()) ||
7032 (ElseEmpty && ElseBB->getSingleSuccessor() == ThenBB &&
7033 ThenBB->phis().empty())) {
7034 VecValuesToIgnore.insert(Br);
7035 DeadOps.push_back(Br->getCondition());
7036 }
7037 continue;
7038 }
7039
7040 // Skip any op that shouldn't be considered dead.
7041 if (!Op || !TheLoop->contains(Op) ||
7042 (isa<PHINode>(Op) && Op->getParent() == Header) ||
7044 any_of(Op->users(), [this, IsLiveOutDead](User *U) {
7045 return !VecValuesToIgnore.contains(U) &&
7046 !ValuesToIgnore.contains(U) && !IsLiveOutDead(U);
7047 }))
7048 continue;
7049
7050 if (!TheLoop->contains(Op->getParent()))
7051 continue;
7052
7053 // If all of Op's users are in ValuesToIgnore, add it to ValuesToIgnore
7054 // which applies for both scalar and vector versions. Otherwise it is only
7055 // dead in vector versions, so only add it to VecValuesToIgnore.
7056 if (all_of(Op->users(),
7057 [this](User *U) { return ValuesToIgnore.contains(U); }))
7058 ValuesToIgnore.insert(Op);
7059
7060 VecValuesToIgnore.insert(Op);
7061 DeadOps.append(Op->op_begin(), Op->op_end());
7062 }
7063
7064 // Ignore type-promoting instructions we identified during reduction
7065 // detection.
7066 for (const auto &Reduction : Legal->getReductionVars()) {
7067 const RecurrenceDescriptor &RedDes = Reduction.second;
7068 const SmallPtrSetImpl<Instruction *> &Casts = RedDes.getCastInsts();
7069 VecValuesToIgnore.insert(Casts.begin(), Casts.end());
7070 }
7071 // Ignore type-casting instructions we identified during induction
7072 // detection.
7073 for (const auto &Induction : Legal->getInductionVars()) {
7074 const InductionDescriptor &IndDes = Induction.second;
7075 const SmallVectorImpl<Instruction *> &Casts = IndDes.getCastInsts();
7076 VecValuesToIgnore.insert(Casts.begin(), Casts.end());
7077 }
7078}
7079
7081 for (const auto &Reduction : Legal->getReductionVars()) {
7082 PHINode *Phi = Reduction.first;
7083 const RecurrenceDescriptor &RdxDesc = Reduction.second;
7084
7085 // We don't collect reductions that are type promoted (yet).
7086 if (RdxDesc.getRecurrenceType() != Phi->getType())
7087 continue;
7088
7089 // If the target would prefer this reduction to happen "in-loop", then we
7090 // want to record it as such.
7091 unsigned Opcode = RdxDesc.getOpcode();
7092 if (!PreferInLoopReductions && !useOrderedReductions(RdxDesc) &&
7093 !TTI.preferInLoopReduction(Opcode, Phi->getType(),
7095 continue;
7096
7097 // Check that we can correctly put the reductions into the loop, by
7098 // finding the chain of operations that leads from the phi to the loop
7099 // exit value.
7100 SmallVector<Instruction *, 4> ReductionOperations =
7101 RdxDesc.getReductionOpChain(Phi, TheLoop);
7102 bool InLoop = !ReductionOperations.empty();
7103
7104 if (InLoop) {
7105 InLoopReductions.insert(Phi);
7106 // Add the elements to InLoopReductionImmediateChains for cost modelling.
7107 Instruction *LastChain = Phi;
7108 for (auto *I : ReductionOperations) {
7109 InLoopReductionImmediateChains[I] = LastChain;
7110 LastChain = I;
7111 }
7112 }
7113 LLVM_DEBUG(dbgs() << "LV: Using " << (InLoop ? "inloop" : "out of loop")
7114 << " reduction for phi: " << *Phi << "\n");
7115 }
7116}
7117
7118// This function will select a scalable VF if the target supports scalable
7119// vectors and a fixed one otherwise.
7120// TODO: we could return a pair of values that specify the max VF and
7121// min VF, to be used in `buildVPlans(MinVF, MaxVF)` instead of
7122// `buildVPlans(VF, VF)`. We cannot do it because VPLAN at the moment
7123// doesn't have a cost model that can choose which plan to execute if
7124// more than one is generated.
7127 unsigned WidestType;
7128 std::tie(std::ignore, WidestType) = CM.getSmallestAndWidestTypes();
7129
7134
7136 unsigned N = RegSize.getKnownMinValue() / WidestType;
7137 return ElementCount::get(N, RegSize.isScalable());
7138}
7139
7142 ElementCount VF = UserVF;
7143 // Outer loop handling: They may require CFG and instruction level
7144 // transformations before even evaluating whether vectorization is profitable.
7145 // Since we cannot modify the incoming IR, we need to build VPlan upfront in
7146 // the vectorization pipeline.
7147 if (!OrigLoop->isInnermost()) {
7148 // If the user doesn't provide a vectorization factor, determine a
7149 // reasonable one.
7150 if (UserVF.isZero()) {
7151 VF = determineVPlanVF(TTI, CM);
7152 LLVM_DEBUG(dbgs() << "LV: VPlan computed VF " << VF << ".\n");
7153
7154 // Make sure we have a VF > 1 for stress testing.
7155 if (VPlanBuildStressTest && (VF.isScalar() || VF.isZero())) {
7156 LLVM_DEBUG(dbgs() << "LV: VPlan stress testing: "
7157 << "overriding computed VF.\n");
7158 VF = ElementCount::getFixed(4);
7159 }
7160 } else if (UserVF.isScalable() && !TTI.supportsScalableVectors() &&
7162 LLVM_DEBUG(dbgs() << "LV: Not vectorizing. Scalable VF requested, but "
7163 << "not supported by the target.\n");
7165 "Scalable vectorization requested but not supported by the target",
7166 "the scalable user-specified vectorization width for outer-loop "
7167 "vectorization cannot be used because the target does not support "
7168 "scalable vectors.",
7169 "ScalableVFUnfeasible", ORE, OrigLoop);
7171 }
7172 assert(EnableVPlanNativePath && "VPlan-native path is not enabled.");
7174 "VF needs to be a power of two");
7175 LLVM_DEBUG(dbgs() << "LV: Using " << (!UserVF.isZero() ? "user " : "")
7176 << "VF " << VF << " to build VPlans.\n");
7177 buildVPlans(VF, VF);
7178
7179 // For VPlan build stress testing, we bail out after VPlan construction.
7182
7183 return {VF, 0 /*Cost*/, 0 /* ScalarCost */};
7184 }
7185
7186 LLVM_DEBUG(
7187 dbgs() << "LV: Not vectorizing. Inner loops aren't supported in the "
7188 "VPlan-native path.\n");
7190}
7191
7192void LoopVectorizationPlanner::plan(ElementCount UserVF, unsigned UserIC) {
7193 assert(OrigLoop->isInnermost() && "Inner loop expected.");
7196
7197 FixedScalableVFPair MaxFactors = CM.computeMaxVF(UserVF, UserIC);
7198 if (!MaxFactors) // Cases that should not to be vectorized nor interleaved.
7199 return;
7200
7201 // Invalidate interleave groups if all blocks of loop will be predicated.
7202 if (CM.blockNeedsPredicationForAnyReason(OrigLoop->getHeader()) &&
7204 LLVM_DEBUG(
7205 dbgs()
7206 << "LV: Invalidate all interleaved groups due to fold-tail by masking "
7207 "which requires masked-interleaved support.\n");
7209 // Invalidating interleave groups also requires invalidating all decisions
7210 // based on them, which includes widening decisions and uniform and scalar
7211 // values.
7213 }
7214
7215 if (CM.foldTailByMasking())
7217
7218 ElementCount MaxUserVF =
7219 UserVF.isScalable() ? MaxFactors.ScalableVF : MaxFactors.FixedVF;
7220 if (UserVF) {
7221 if (!ElementCount::isKnownLE(UserVF, MaxUserVF)) {
7223 "UserVF ignored because it may be larger than the maximal safe VF",
7224 "InvalidUserVF", ORE, OrigLoop);
7225 } else {
7227 "VF needs to be a power of two");
7228 // Collect the instructions (and their associated costs) that will be more
7229 // profitable to scalarize.
7231 if (CM.selectUserVectorizationFactor(UserVF)) {
7232 LLVM_DEBUG(dbgs() << "LV: Using user VF " << UserVF << ".\n");
7233 buildVPlansWithVPRecipes(UserVF, UserVF);
7235 return;
7236 }
7237 reportVectorizationInfo("UserVF ignored because of invalid costs.",
7238 "InvalidCost", ORE, OrigLoop);
7239 }
7240 }
7241
7242 // Collect the Vectorization Factor Candidates.
7243 SmallVector<ElementCount> VFCandidates;
7244 for (auto VF = ElementCount::getFixed(1);
7245 ElementCount::isKnownLE(VF, MaxFactors.FixedVF); VF *= 2)
7246 VFCandidates.push_back(VF);
7247 for (auto VF = ElementCount::getScalable(1);
7248 ElementCount::isKnownLE(VF, MaxFactors.ScalableVF); VF *= 2)
7249 VFCandidates.push_back(VF);
7250
7252 for (const auto &VF : VFCandidates) {
7253 // Collect Uniform and Scalar instructions after vectorization with VF.
7255
7256 // Collect the instructions (and their associated costs) that will be more
7257 // profitable to scalarize.
7258 if (VF.isVector())
7260 }
7261
7262 buildVPlansWithVPRecipes(ElementCount::getFixed(1), MaxFactors.FixedVF);
7263 buildVPlansWithVPRecipes(ElementCount::getScalable(1), MaxFactors.ScalableVF);
7264
7266}
7267
7269 ElementCount VF) const {
7270 if (ForceTargetInstructionCost.getNumOccurrences())
7271 return InstructionCost(ForceTargetInstructionCost.getNumOccurrences());
7272 return CM.getInstructionCost(UI, VF);
7273}
7274
7275bool VPCostContext::skipCostComputation(Instruction *UI, bool IsVector) const {
7276 return CM.ValuesToIgnore.contains(UI) ||
7277 (IsVector && CM.VecValuesToIgnore.contains(UI)) ||
7278 SkipCostComputation.contains(UI);
7279}
7280
7282LoopVectorizationPlanner::precomputeCosts(VPlan &Plan, ElementCount VF,
7283 VPCostContext &CostCtx) const {
7285 // Cost modeling for inductions is inaccurate in the legacy cost model
7286 // compared to the recipes that are generated. To match here initially during
7287 // VPlan cost model bring up directly use the induction costs from the legacy
7288 // cost model. Note that we do this as pre-processing; the VPlan may not have
7289 // any recipes associated with the original induction increment instruction
7290 // and may replace truncates with VPWidenIntOrFpInductionRecipe. We precompute
7291 // the cost of induction phis and increments (both that are represented by
7292 // recipes and those that are not), to avoid distinguishing between them here,
7293 // and skip all recipes that represent induction phis and increments (the
7294 // former case) later on, if they exist, to avoid counting them twice.
7295 // Similarly we pre-compute the cost of any optimized truncates.
7296 // TODO: Switch to more accurate costing based on VPlan.
7297 for (const auto &[IV, IndDesc] : Legal->getInductionVars()) {
7298 Instruction *IVInc = cast<Instruction>(
7299 IV->getIncomingValueForBlock(OrigLoop->getLoopLatch()));
7300 SmallVector<Instruction *> IVInsts = {IVInc};
7301 for (unsigned I = 0; I != IVInsts.size(); I++) {
7302 for (Value *Op : IVInsts[I]->operands()) {
7303 auto *OpI = dyn_cast<Instruction>(Op);
7304 if (Op == IV || !OpI || !OrigLoop->contains(OpI) || !Op->hasOneUse())
7305 continue;
7306 IVInsts.push_back(OpI);
7307 }
7308 }
7309 IVInsts.push_back(IV);
7310 for (User *U : IV->users()) {
7311 auto *CI = cast<Instruction>(U);
7312 if (!CostCtx.CM.isOptimizableIVTruncate(CI, VF))
7313 continue;
7314 IVInsts.push_back(CI);
7315 }
7316
7317 // If the vector loop gets executed exactly once with the given VF, ignore
7318 // the costs of comparison and induction instructions, as they'll get
7319 // simplified away.
7320 // TODO: Remove this code after stepping away from the legacy cost model and
7321 // adding code to simplify VPlans before calculating their costs.
7322 auto TC = PSE.getSE()->getSmallConstantTripCount(OrigLoop);
7323 if (VF.isFixed() && TC == VF.getFixedValue() && !CM.foldTailByMasking())
7325 CostCtx.SkipCostComputation);
7326
7327 for (Instruction *IVInst : IVInsts) {
7328 if (CostCtx.skipCostComputation(IVInst, VF.isVector()))
7329 continue;
7330 InstructionCost InductionCost = CostCtx.getLegacyCost(IVInst, VF);
7331 LLVM_DEBUG({
7332 dbgs() << "Cost of " << InductionCost << " for VF " << VF
7333 << ": induction instruction " << *IVInst << "\n";
7334 });
7335 Cost += InductionCost;
7336 CostCtx.SkipCostComputation.insert(IVInst);
7337 }
7338 }
7339
7340 /// Compute the cost of all exiting conditions of the loop using the legacy
7341 /// cost model. This is to match the legacy behavior, which adds the cost of
7342 /// all exit conditions. Note that this over-estimates the cost, as there will
7343 /// be a single condition to control the vector loop.
7345 CM.TheLoop->getExitingBlocks(Exiting);
7346 SetVector<Instruction *> ExitInstrs;
7347 // Collect all exit conditions.
7348 for (BasicBlock *EB : Exiting) {
7349 auto *Term = dyn_cast<BranchInst>(EB->getTerminator());
7350 if (!Term)
7351 continue;
7352 if (auto *CondI = dyn_cast<Instruction>(Term->getOperand(0))) {
7353 ExitInstrs.insert(CondI);
7354 }
7355 }
7356 // Compute the cost of all instructions only feeding the exit conditions.
7357 for (unsigned I = 0; I != ExitInstrs.size(); ++I) {
7358 Instruction *CondI = ExitInstrs[I];
7359 if (!OrigLoop->contains(CondI) ||
7360 !CostCtx.SkipCostComputation.insert(CondI).second)
7361 continue;
7362 InstructionCost CondICost = CostCtx.getLegacyCost(CondI, VF);
7363 LLVM_DEBUG({
7364 dbgs() << "Cost of " << CondICost << " for VF " << VF
7365 << ": exit condition instruction " << *CondI << "\n";
7366 });
7367 Cost += CondICost;
7368 for (Value *Op : CondI->operands()) {
7369 auto *OpI = dyn_cast<Instruction>(Op);
7370 if (!OpI || any_of(OpI->users(), [&ExitInstrs, this](User *U) {
7371 return OrigLoop->contains(cast<Instruction>(U)->getParent()) &&
7372 !ExitInstrs.contains(cast<Instruction>(U));
7373 }))
7374 continue;
7375 ExitInstrs.insert(OpI);
7376 }
7377 }
7378
7379 // The legacy cost model has special logic to compute the cost of in-loop
7380 // reductions, which may be smaller than the sum of all instructions involved
7381 // in the reduction.
7382 // TODO: Switch to costing based on VPlan once the logic has been ported.
7383 for (const auto &[RedPhi, RdxDesc] : Legal->getReductionVars()) {
7384 if (ForceTargetInstructionCost.getNumOccurrences())
7385 continue;
7386
7387 if (!CM.isInLoopReduction(RedPhi))
7388 continue;
7389
7390 const auto &ChainOps = RdxDesc.getReductionOpChain(RedPhi, OrigLoop);
7391 SetVector<Instruction *> ChainOpsAndOperands(ChainOps.begin(),
7392 ChainOps.end());
7393 auto IsZExtOrSExt = [](const unsigned Opcode) -> bool {
7394 return Opcode == Instruction::ZExt || Opcode == Instruction::SExt;
7395 };
7396 // Also include the operands of instructions in the chain, as the cost-model
7397 // may mark extends as free.
7398 //
7399 // For ARM, some of the instruction can folded into the reducion
7400 // instruction. So we need to mark all folded instructions free.
7401 // For example: We can fold reduce(mul(ext(A), ext(B))) into one
7402 // instruction.
7403 for (auto *ChainOp : ChainOps) {
7404 for (Value *Op : ChainOp->operands()) {
7405 if (auto *I = dyn_cast<Instruction>(Op)) {
7406 ChainOpsAndOperands.insert(I);
7407 if (I->getOpcode() == Instruction::Mul) {
7408 auto *Ext0 = dyn_cast<Instruction>(I->getOperand(0));
7409 auto *Ext1 = dyn_cast<Instruction>(I->getOperand(1));
7410 if (Ext0 && IsZExtOrSExt(Ext0->getOpcode()) && Ext1 &&
7411 Ext0->getOpcode() == Ext1->getOpcode()) {
7412 ChainOpsAndOperands.insert(Ext0);
7413 ChainOpsAndOperands.insert(Ext1);
7414 }
7415 }
7416 }
7417 }
7418 }
7419
7420 // Pre-compute the cost for I, if it has a reduction pattern cost.
7421 for (Instruction *I : ChainOpsAndOperands) {
7422 auto ReductionCost = CM.getReductionPatternCost(
7423 I, VF, toVectorTy(I->getType(), VF), TTI::TCK_RecipThroughput);
7424 if (!ReductionCost)
7425 continue;
7426
7427 assert(!CostCtx.SkipCostComputation.contains(I) &&
7428 "reduction op visited multiple times");
7429 CostCtx.SkipCostComputation.insert(I);
7430 LLVM_DEBUG(dbgs() << "Cost of " << ReductionCost << " for VF " << VF
7431 << ":\n in-loop reduction " << *I << "\n");
7432 Cost += *ReductionCost;
7433 }
7434 }
7435
7436 // Pre-compute the costs for branches except for the backedge, as the number
7437 // of replicate regions in a VPlan may not directly match the number of
7438 // branches, which would lead to different decisions.
7439 // TODO: Compute cost of branches for each replicate region in the VPlan,
7440 // which is more accurate than the legacy cost model.
7441 for (BasicBlock *BB : OrigLoop->blocks()) {
7442 if (CostCtx.skipCostComputation(BB->getTerminator(), VF.isVector()))
7443 continue;
7444 CostCtx.SkipCostComputation.insert(BB->getTerminator());
7445 if (BB == OrigLoop->getLoopLatch())
7446 continue;
7447 auto BranchCost = CostCtx.getLegacyCost(BB->getTerminator(), VF);
7448 Cost += BranchCost;
7449 }
7450
7451 // Pre-compute costs for instructions that are forced-scalar or profitable to
7452 // scalarize. Their costs will be computed separately in the legacy cost
7453 // model.
7454 for (Instruction *ForcedScalar : CM.ForcedScalars[VF]) {
7455 if (CostCtx.skipCostComputation(ForcedScalar, VF.isVector()))
7456 continue;
7457 CostCtx.SkipCostComputation.insert(ForcedScalar);
7458 InstructionCost ForcedCost = CostCtx.getLegacyCost(ForcedScalar, VF);
7459 LLVM_DEBUG({
7460 dbgs() << "Cost of " << ForcedCost << " for VF " << VF
7461 << ": forced scalar " << *ForcedScalar << "\n";
7462 });
7463 Cost += ForcedCost;
7464 }
7465 for (const auto &[Scalarized, ScalarCost] : CM.InstsToScalarize[VF]) {
7466 if (CostCtx.skipCostComputation(Scalarized, VF.isVector()))
7467 continue;
7468 CostCtx.SkipCostComputation.insert(Scalarized);
7469 LLVM_DEBUG({
7470 dbgs() << "Cost of " << ScalarCost << " for VF " << VF
7471 << ": profitable to scalarize " << *Scalarized << "\n";
7472 });
7473 Cost += ScalarCost;
7474 }
7475
7476 return Cost;
7477}
7478
7479InstructionCost LoopVectorizationPlanner::cost(VPlan &Plan,
7480 ElementCount VF) const {
7481 VPCostContext CostCtx(CM.TTI, *CM.TLI, Legal->getWidestInductionType(), CM);
7482 InstructionCost Cost = precomputeCosts(Plan, VF, CostCtx);
7483
7484 // Now compute and add the VPlan-based cost.
7485 Cost += Plan.cost(VF, CostCtx);
7486#ifndef NDEBUG
7487 unsigned EstimatedWidth = getEstimatedRuntimeVF(OrigLoop, CM.TTI, VF);
7488 LLVM_DEBUG(dbgs() << "Cost for VF " << VF << ": " << Cost
7489 << " (Estimated cost per lane: ");
7490 if (Cost.isValid()) {
7491 double CostPerLane = double(*Cost.getValue()) / EstimatedWidth;
7492 LLVM_DEBUG(dbgs() << format("%.1f", CostPerLane));
7493 } else /* No point dividing an invalid cost - it will still be invalid */
7494 LLVM_DEBUG(dbgs() << "Invalid");
7495 LLVM_DEBUG(dbgs() << ")\n");
7496#endif
7497 return Cost;
7498}
7499
7500#ifndef NDEBUG
7501/// Return true if the original loop \ TheLoop contains any instructions that do
7502/// not have corresponding recipes in \p Plan and are not marked to be ignored
7503/// in \p CostCtx. This means the VPlan contains simplification that the legacy
7504/// cost-model did not account for.
7506 VPCostContext &CostCtx,
7507 Loop *TheLoop) {
7508 // First collect all instructions for the recipes in Plan.
7509 auto GetInstructionForCost = [](const VPRecipeBase *R) -> Instruction * {
7510 if (auto *S = dyn_cast<VPSingleDefRecipe>(R))
7511 return dyn_cast_or_null<Instruction>(S->getUnderlyingValue());
7512 if (auto *WidenMem = dyn_cast<VPWidenMemoryRecipe>(R))
7513 return &WidenMem->getIngredient();
7514 return nullptr;
7515 };
7516
7517 DenseSet<Instruction *> SeenInstrs;
7518 auto Iter = vp_depth_first_deep(Plan.getVectorLoopRegion()->getEntry());
7519 for (VPBasicBlock *VPBB : VPBlockUtils::blocksOnly<VPBasicBlock>(Iter)) {
7520 for (VPRecipeBase &R : *VPBB) {
7521 if (auto *IR = dyn_cast<VPInterleaveRecipe>(&R)) {
7522 auto *IG = IR->getInterleaveGroup();
7523 unsigned NumMembers = IG->getNumMembers();
7524 for (unsigned I = 0; I != NumMembers; ++I) {
7525 if (Instruction *M = IG->getMember(I))
7526 SeenInstrs.insert(M);
7527 }
7528 continue;
7529 }
7530 if (Instruction *UI = GetInstructionForCost(&R))
7531 SeenInstrs.insert(UI);
7532 }
7533 }
7534
7535 // Return true if the loop contains any instructions that are not also part of
7536 // the VPlan or are skipped for VPlan-based cost computations. This indicates
7537 // that the VPlan contains extra simplifications.
7538 return any_of(TheLoop->blocks(), [&SeenInstrs, &CostCtx,
7539 TheLoop](BasicBlock *BB) {
7540 return any_of(*BB, [&SeenInstrs, &CostCtx, TheLoop, BB](Instruction &I) {
7541 if (isa<PHINode>(&I) && BB == TheLoop->getHeader())
7542 return false;
7543 return !SeenInstrs.contains(&I) && !CostCtx.skipCostComputation(&I, true);
7544 });
7545 });
7546}
7547#endif
7548
7550 if (VPlans.empty())
7552 // If there is a single VPlan with a single VF, return it directly.
7553 VPlan &FirstPlan = *VPlans[0];
7554 if (VPlans.size() == 1 && size(FirstPlan.vectorFactors()) == 1)
7555 return {*FirstPlan.vectorFactors().begin(), 0, 0};
7556
7558 assert(hasPlanWithVF(ScalarVF) &&
7559 "More than a single plan/VF w/o any plan having scalar VF");
7560
7561 // TODO: Compute scalar cost using VPlan-based cost model.
7562 InstructionCost ScalarCost = CM.expectedCost(ScalarVF);
7563 LLVM_DEBUG(dbgs() << "LV: Scalar loop costs: " << ScalarCost << ".\n");
7564 VectorizationFactor ScalarFactor(ScalarVF, ScalarCost, ScalarCost);
7565 VectorizationFactor BestFactor = ScalarFactor;
7566
7567 bool ForceVectorization = Hints.getForce() == LoopVectorizeHints::FK_Enabled;
7568 if (ForceVectorization) {
7569 // Ignore scalar width, because the user explicitly wants vectorization.
7570 // Initialize cost to max so that VF = 2 is, at least, chosen during cost
7571 // evaluation.
7572 BestFactor.Cost = InstructionCost::getMax();
7573 }
7574
7575 for (auto &P : VPlans) {
7576 for (ElementCount VF : P->vectorFactors()) {
7577 if (VF.isScalar())
7578 continue;
7579 if (!ForceVectorization && !willGenerateVectors(*P, VF, TTI)) {
7580 LLVM_DEBUG(
7581 dbgs()
7582 << "LV: Not considering vector loop of width " << VF
7583 << " because it will not generate any vector instructions.\n");
7584 continue;
7585 }
7586
7587 InstructionCost Cost = cost(*P, VF);
7588 VectorizationFactor CurrentFactor(VF, Cost, ScalarCost);
7589 if (isMoreProfitable(CurrentFactor, BestFactor))
7590 BestFactor = CurrentFactor;
7591
7592 // If profitable add it to ProfitableVF list.
7593 if (isMoreProfitable(CurrentFactor, ScalarFactor))
7594 ProfitableVFs.push_back(CurrentFactor);
7595 }
7596 }
7597
7598#ifndef NDEBUG
7599 // Select the optimal vectorization factor according to the legacy cost-model.
7600 // This is now only used to verify the decisions by the new VPlan-based
7601 // cost-model and will be retired once the VPlan-based cost-model is
7602 // stabilized.
7603 VectorizationFactor LegacyVF = selectVectorizationFactor();
7604 VPlan &BestPlan = getPlanFor(BestFactor.Width);
7605
7606 // Pre-compute the cost and use it to check if BestPlan contains any
7607 // simplifications not accounted for in the legacy cost model. If that's the
7608 // case, don't trigger the assertion, as the extra simplifications may cause a
7609 // different VF to be picked by the VPlan-based cost model.
7610 VPCostContext CostCtx(CM.TTI, *CM.TLI, Legal->getWidestInductionType(), CM);
7611 precomputeCosts(BestPlan, BestFactor.Width, CostCtx);
7612 assert((BestFactor.Width == LegacyVF.Width ||
7614 CostCtx, OrigLoop) ||
7616 CostCtx, OrigLoop)) &&
7617 " VPlan cost model and legacy cost model disagreed");
7618 assert((BestFactor.Width.isScalar() || BestFactor.ScalarCost > 0) &&
7619 "when vectorizing, the scalar cost must be computed.");
7620#endif
7621
7622 return BestFactor;
7623}
7624
7627 // Reserve first location for self reference to the LoopID metadata node.
7628 MDs.push_back(nullptr);
7629 bool IsUnrollMetadata = false;
7630 MDNode *LoopID = L->getLoopID();
7631 if (LoopID) {
7632 // First find existing loop unrolling disable metadata.
7633 for (unsigned I = 1, IE = LoopID->getNumOperands(); I < IE; ++I) {
7634 auto *MD = dyn_cast<MDNode>(LoopID->getOperand(I));
7635 if (MD) {
7636 const auto *S = dyn_cast<MDString>(MD->getOperand(0));
7637 IsUnrollMetadata =
7638 S && S->getString().starts_with("llvm.loop.unroll.disable");
7639 }
7640 MDs.push_back(LoopID->getOperand(I));
7641 }
7642 }
7643
7644 if (!IsUnrollMetadata) {
7645 // Add runtime unroll disable metadata.
7646 LLVMContext &Context = L->getHeader()->getContext();
7647 SmallVector<Metadata *, 1> DisableOperands;
7648 DisableOperands.push_back(
7649 MDString::get(Context, "llvm.loop.unroll.runtime.disable"));
7650 MDNode *DisableNode = MDNode::get(Context, DisableOperands);
7651 MDs.push_back(DisableNode);
7652 MDNode *NewLoopID = MDNode::get(Context, MDs);
7653 // Set operand 0 to refer to the loop id itself.
7654 NewLoopID->replaceOperandWith(0, NewLoopID);
7655 L->setLoopID(NewLoopID);
7656 }
7657}
7658
7659// If \p R is a ComputeReductionResult when vectorizing the epilog loop,
7660// fix the reduction's scalar PHI node by adding the incoming value from the
7661// main vector loop.
7663 VPRecipeBase *R, VPTransformState &State, BasicBlock *LoopMiddleBlock,
7664 BasicBlock *BypassBlock) {
7665 auto *EpiRedResult = dyn_cast<VPInstruction>(R);
7666 if (!EpiRedResult ||
7667 EpiRedResult->getOpcode() != VPInstruction::ComputeReductionResult)
7668 return;
7669
7670 auto *EpiRedHeaderPhi =
7671 cast<VPReductionPHIRecipe>(EpiRedResult->getOperand(0));
7672 const RecurrenceDescriptor &RdxDesc =
7673 EpiRedHeaderPhi->getRecurrenceDescriptor();
7674 Value *MainResumeValue =
7675 EpiRedHeaderPhi->getStartValue()->getUnderlyingValue();
7677 RdxDesc.getRecurrenceKind())) {
7678 auto *Cmp = cast<ICmpInst>(MainResumeValue);
7679 assert(Cmp->getPredicate() == CmpInst::ICMP_NE &&
7680 "AnyOf expected to start with ICMP_NE");
7681 assert(Cmp->getOperand(1) == RdxDesc.getRecurrenceStartValue() &&
7682 "AnyOf expected to start by comparing main resume value to original "
7683 "start value");
7684 MainResumeValue = Cmp->getOperand(0);
7685 }
7686 PHINode *MainResumePhi = cast<PHINode>(MainResumeValue);
7687
7688 // When fixing reductions in the epilogue loop we should already have
7689 // created a bc.merge.rdx Phi after the main vector body. Ensure that we carry
7690 // over the incoming values correctly.
7691 using namespace VPlanPatternMatch;
7692 auto IsResumePhi = [](VPUser *U) {
7693 return match(
7694 U, m_VPInstruction<VPInstruction::ResumePhi>(m_VPValue(), m_VPValue()));
7695 };
7696 assert(count_if(EpiRedResult->users(), IsResumePhi) == 1 &&
7697 "ResumePhi must have a single user");
7698 auto *EpiResumePhiVPI =
7699 cast<VPInstruction>(*find_if(EpiRedResult->users(), IsResumePhi));
7700 auto *EpiResumePhi = cast<PHINode>(State.get(EpiResumePhiVPI, true));
7701 EpiResumePhi->setIncomingValueForBlock(
7702 BypassBlock, MainResumePhi->getIncomingValueForBlock(BypassBlock));
7703}
7704
7706 ElementCount BestVF, unsigned BestUF, VPlan &BestVPlan,
7707 InnerLoopVectorizer &ILV, DominatorTree *DT, bool VectorizingEpilogue,
7708 const DenseMap<const SCEV *, Value *> *ExpandedSCEVs) {
7709 assert(BestVPlan.hasVF(BestVF) &&
7710 "Trying to execute plan with unsupported VF");
7711 assert(BestVPlan.hasUF(BestUF) &&
7712 "Trying to execute plan with unsupported UF");
7713 assert(
7714 ((VectorizingEpilogue && ExpandedSCEVs) ||
7715 (!VectorizingEpilogue && !ExpandedSCEVs)) &&
7716 "expanded SCEVs to reuse can only be used during epilogue vectorization");
7717
7718 // TODO: Move to VPlan transform stage once the transition to the VPlan-based
7719 // cost model is complete for better cost estimates.
7720 VPlanTransforms::unrollByUF(BestVPlan, BestUF,
7721 OrigLoop->getHeader()->getContext());
7722 VPlanTransforms::optimizeForVFAndUF(BestVPlan, BestVF, BestUF, PSE);
7724
7725 // Perform the actual loop transformation.
7726 VPTransformState State(&TTI, BestVF, BestUF, LI, DT, ILV.Builder, &ILV,
7727 &BestVPlan, OrigLoop->getParentLoop(),
7728 Legal->getWidestInductionType());
7729
7730#ifdef EXPENSIVE_CHECKS
7731 assert(DT->verify(DominatorTree::VerificationLevel::Fast));
7732#endif
7733
7734 // 0. Generate SCEV-dependent code in the entry, including TripCount, before
7735 // making any changes to the CFG.
7736 if (!BestVPlan.getEntry()->empty())
7737 BestVPlan.getEntry()->execute(&State);
7738
7739 if (!ILV.getTripCount())
7740 ILV.setTripCount(State.get(BestVPlan.getTripCount(), VPLane(0)));
7741 else
7742 assert(VectorizingEpilogue && "should only re-use the existing trip "
7743 "count during epilogue vectorization");
7744
7745 // 1. Set up the skeleton for vectorization, including vector pre-header and
7746 // middle block. The vector loop is created during VPlan execution.
7748 ExpandedSCEVs ? *ExpandedSCEVs : State.ExpandedSCEVs);
7749 if (VectorizingEpilogue)
7751
7752 // Only use noalias metadata when using memory checks guaranteeing no overlap
7753 // across all iterations.
7754 const LoopAccessInfo *LAI = ILV.Legal->getLAI();
7755 std::unique_ptr<LoopVersioning> LVer = nullptr;
7756 if (LAI && !LAI->getRuntimePointerChecking()->getChecks().empty() &&
7758
7759 // We currently don't use LoopVersioning for the actual loop cloning but we
7760 // still use it to add the noalias metadata.
7761 // TODO: Find a better way to re-use LoopVersioning functionality to add
7762 // metadata.
7763 LVer = std::make_unique<LoopVersioning>(
7764 *LAI, LAI->getRuntimePointerChecking()->getChecks(), OrigLoop, LI, DT,
7765 PSE.getSE());
7766 State.LVer = &*LVer;
7768 }
7769
7771
7772 //===------------------------------------------------===//
7773 //
7774 // Notice: any optimization or new instruction that go
7775 // into the code below should also be implemented in
7776 // the cost-model.
7777 //
7778 //===------------------------------------------------===//
7779
7780 // 2. Copy and widen instructions from the old loop into the new loop.
7781 BestVPlan.prepareToExecute(
7782 ILV.getTripCount(),
7785
7786 BestVPlan.execute(&State);
7787
7788 auto *ExitVPBB = BestVPlan.getMiddleBlock();
7789 // 2.5 When vectorizing the epilogue, fix reduction and induction resume
7790 // values from the additional bypass block.
7791 if (VectorizingEpilogue) {
7793 "Epilogue vectorisation not yet supported with early exits");
7794 BasicBlock *BypassBlock = ILV.getAdditionalBypassBlock();
7795 for (VPRecipeBase &R : *ExitVPBB) {
7797 &R, State, State.CFG.VPBB2IRBB[ExitVPBB], BypassBlock);
7798 }
7799 BasicBlock *PH = OrigLoop->getLoopPreheader();
7800 for (const auto &[IVPhi, _] : Legal->getInductionVars()) {
7801 auto *Inc = cast<PHINode>(IVPhi->getIncomingValueForBlock(PH));
7803 Inc->setIncomingValueForBlock(BypassBlock, V);
7804 }
7805 }
7806
7807 // 2.6. Maintain Loop Hints
7808 // Keep all loop hints from the original loop on the vector loop (we'll
7809 // replace the vectorizer-specific hints below).
7810 MDNode *OrigLoopID = OrigLoop->getLoopID();
7811
7812 std::optional<MDNode *> VectorizedLoopID =
7815
7816 VPBasicBlock *HeaderVPBB =
7818 Loop *L = LI->getLoopFor(State.CFG.VPBB2IRBB[HeaderVPBB]);
7819 if (VectorizedLoopID)
7820 L->setLoopID(*VectorizedLoopID);
7821 else {
7822 // Keep all loop hints from the original loop on the vector loop (we'll
7823 // replace the vectorizer-specific hints below).
7824 if (MDNode *LID = OrigLoop->getLoopID())
7825 L->setLoopID(LID);
7826
7827 LoopVectorizeHints Hints(L, true, *ORE);
7828 Hints.setAlreadyVectorized();
7829 }
7831 TTI.getUnrollingPreferences(L, *PSE.getSE(), UP, ORE);
7832 if (!UP.UnrollVectorizedLoop || VectorizingEpilogue)
7834
7835 // 3. Fix the vectorized code: take care of header phi's, live-outs,
7836 // predication, updating analyses.
7837 ILV.fixVectorizedLoop(State);
7838
7840
7841 // 4. Adjust branch weight of the branch in the middle block.
7842 auto *MiddleTerm =
7843 cast<BranchInst>(State.CFG.VPBB2IRBB[ExitVPBB]->getTerminator());
7844 if (MiddleTerm->isConditional() &&
7845 hasBranchWeightMD(*OrigLoop->getLoopLatch()->getTerminator())) {
7846 // Assume that `Count % VectorTripCount` is equally distributed.
7847 unsigned TripCount = BestVPlan.getUF() * State.VF.getKnownMinValue();
7848 assert(TripCount > 0 && "trip count should not be zero");
7849 const uint32_t Weights[] = {1, TripCount - 1};
7850 setBranchWeights(*MiddleTerm, Weights, /*IsExpected=*/false);
7851 }
7852
7853 return State.ExpandedSCEVs;
7854}
7855
7856//===--------------------------------------------------------------------===//
7857// EpilogueVectorizerMainLoop
7858//===--------------------------------------------------------------------===//
7859
7860/// This function is partially responsible for generating the control flow
7861/// depicted in https://llvm.org/docs/Vectorizers.html#epilogue-vectorization.
7863 const SCEV2ValueTy &ExpandedSCEVs) {
7865
7866 // Generate the code to check the minimum iteration count of the vector
7867 // epilogue (see below).
7871
7872 // Generate the code to check any assumptions that we've made for SCEV
7873 // expressions.
7875
7876 // Generate the code that checks at runtime if arrays overlap. We put the
7877 // checks into a separate block to make the more common case of few elements
7878 // faster.
7880
7881 // Generate the iteration count check for the main loop, *after* the check
7882 // for the epilogue loop, so that the path-length is shorter for the case
7883 // that goes directly through the vector epilogue. The longer-path length for
7884 // the main loop is compensated for, by the gain from vectorizing the larger
7885 // trip count. Note: the branch will get updated later on when we vectorize
7886 // the epilogue.
7889
7890 // Generate the induction variable.
7892
7893 return LoopVectorPreHeader;
7894}
7895
7897 LLVM_DEBUG({
7898 dbgs() << "Create Skeleton for epilogue vectorized loop (first pass)\n"
7899 << "Main Loop VF:" << EPI.MainLoopVF
7900 << ", Main Loop UF:" << EPI.MainLoopUF
7901 << ", Epilogue Loop VF:" << EPI.EpilogueVF
7902 << ", Epilogue Loop UF:" << EPI.EpilogueUF << "\n";
7903 });
7904}
7905
7908 dbgs() << "intermediate fn:\n"
7909 << *OrigLoop->getHeader()->getParent() << "\n";
7910 });
7911}
7912
7913BasicBlock *
7915 bool ForEpilogue) {
7916 assert(Bypass && "Expected valid bypass basic block.");
7917 ElementCount VFactor = ForEpilogue ? EPI.EpilogueVF : VF;
7918 unsigned UFactor = ForEpilogue ? EPI.EpilogueUF : UF;
7919 Value *Count = getTripCount();
7920 // Reuse existing vector loop preheader for TC checks.
7921 // Note that new preheader block is generated for vector loop.
7922 BasicBlock *const TCCheckBlock = LoopVectorPreHeader;
7923 IRBuilder<> Builder(TCCheckBlock->getTerminator());
7924
7925 // Generate code to check if the loop's trip count is less than VF * UF of the
7926 // main vector loop.
7927 auto P = Cost->requiresScalarEpilogue(ForEpilogue ? EPI.EpilogueVF.isVector()
7928 : VF.isVector())
7931
7932 Value *CheckMinIters = Builder.CreateICmp(
7933 P, Count, createStepForVF(Builder, Count->getType(), VFactor, UFactor),
7934 "min.iters.check");
7935
7936 if (!ForEpilogue)
7937 TCCheckBlock->setName("vector.main.loop.iter.check");
7938
7939 // Create new preheader for vector loop.
7940 LoopVectorPreHeader = SplitBlock(TCCheckBlock, TCCheckBlock->getTerminator(),
7941 DT, LI, nullptr, "vector.ph");
7942
7943 if (ForEpilogue) {
7944 assert(DT->properlyDominates(DT->getNode(TCCheckBlock),
7945 DT->getNode(Bypass)->getIDom()) &&
7946 "TC check is expected to dominate Bypass");
7947
7948 LoopBypassBlocks.push_back(TCCheckBlock);
7949
7950 // Save the trip count so we don't have to regenerate it in the
7951 // vec.epilog.iter.check. This is safe to do because the trip count
7952 // generated here dominates the vector epilog iter check.
7953 EPI.TripCount = Count;
7954 }
7955
7956 BranchInst &BI =
7957 *BranchInst::Create(Bypass, LoopVectorPreHeader, CheckMinIters);
7959 setBranchWeights(BI, MinItersBypassWeights, /*IsExpected=*/false);
7960 ReplaceInstWithInst(TCCheckBlock->getTerminator(), &BI);
7961
7962 introduceCheckBlockInVPlan(TCCheckBlock);
7963 return TCCheckBlock;
7964}
7965
7966//===--------------------------------------------------------------------===//
7967// EpilogueVectorizerEpilogueLoop
7968//===--------------------------------------------------------------------===//
7969
7970/// This function is partially responsible for generating the control flow
7971/// depicted in https://llvm.org/docs/Vectorizers.html#epilogue-vectorization.
7972BasicBlock *
7974 const SCEV2ValueTy &ExpandedSCEVs) {
7975 createVectorLoopSkeleton("vec.epilog.");
7976
7977 // Now, compare the remaining count and if there aren't enough iterations to
7978 // execute the vectorized epilogue skip to the scalar part.
7979 LoopVectorPreHeader->setName("vec.epilog.ph");
7980 BasicBlock *VecEpilogueIterationCountCheck =
7982 nullptr, "vec.epilog.iter.check", true);
7984 VecEpilogueIterationCountCheck);
7985 AdditionalBypassBlock = VecEpilogueIterationCountCheck;
7986
7987 // Adjust the control flow taking the state info from the main loop
7988 // vectorization into account.
7990 "expected this to be saved from the previous pass.");
7992 VecEpilogueIterationCountCheck, LoopVectorPreHeader);
7993
7995 VecEpilogueIterationCountCheck, LoopScalarPreHeader);
7996
7997 if (EPI.SCEVSafetyCheck)
7999 VecEpilogueIterationCountCheck, LoopScalarPreHeader);
8000 if (EPI.MemSafetyCheck)
8002 VecEpilogueIterationCountCheck, LoopScalarPreHeader);
8003
8006 // Keep track of bypass blocks, as they feed start values to the induction and
8007 // reduction phis in the scalar loop preheader.
8008 if (EPI.SCEVSafetyCheck)
8010 if (EPI.MemSafetyCheck)
8013
8014 // The vec.epilog.iter.check block may contain Phi nodes from inductions or
8015 // reductions which merge control-flow from the latch block and the middle
8016 // block. Update the incoming values here and move the Phi into the preheader.
8017 SmallVector<PHINode *, 4> PhisInBlock;
8018 for (PHINode &Phi : VecEpilogueIterationCountCheck->phis())
8019 PhisInBlock.push_back(&Phi);
8020
8021 for (PHINode *Phi : PhisInBlock) {
8022 Phi->moveBefore(LoopVectorPreHeader->getFirstNonPHI());
8023 Phi->replaceIncomingBlockWith(
8024 VecEpilogueIterationCountCheck->getSinglePredecessor(),
8025 VecEpilogueIterationCountCheck);
8026
8027 // If the phi doesn't have an incoming value from the
8028 // EpilogueIterationCountCheck, we are done. Otherwise remove the incoming
8029 // value and also those from other check blocks. This is needed for
8030 // reduction phis only.
8031 if (none_of(Phi->blocks(), [&](BasicBlock *IncB) {
8032 return EPI.EpilogueIterationCountCheck == IncB;
8033 }))
8034 continue;
8035 Phi->removeIncomingValue(EPI.EpilogueIterationCountCheck);
8036 if (EPI.SCEVSafetyCheck)
8037 Phi->removeIncomingValue(EPI.SCEVSafetyCheck);
8038 if (EPI.MemSafetyCheck)
8039 Phi->removeIncomingValue(EPI.MemSafetyCheck);
8040 }
8041
8042 // Generate bypass values from the additional bypass block. Note that when the
8043 // vectorized epilogue is skipped due to iteration count check, then the
8044 // resume value for the induction variable comes from the trip count of the
8045 // main vector loop, passed as the second argument.
8047 return LoopVectorPreHeader;
8048}
8049
8050BasicBlock *
8052 BasicBlock *Bypass, BasicBlock *Insert) {
8053
8055 "Expected trip count to have been saved in the first pass.");
8056 assert(
8057 (!isa<Instruction>(EPI.TripCount) ||
8058 DT->dominates(cast<Instruction>(EPI.TripCount)->getParent(), Insert)) &&
8059 "saved trip count does not dominate insertion point.");
8060 Value *TC = EPI.TripCount;
8061 IRBuilder<> Builder(Insert->getTerminator());
8062 Value *Count = Builder.CreateSub(TC, EPI.VectorTripCount, "n.vec.remaining");
8063
8064 // Generate code to check if the loop's trip count is less than VF * UF of the
8065 // vector epilogue loop.
8066 auto P = Cost->requiresScalarEpilogue(EPI.EpilogueVF.isVector())
8069
8070 Value *CheckMinIters =
8071 Builder.CreateICmp(P, Count,
8074 "min.epilog.iters.check");
8075
8076 BranchInst &BI =
8077 *BranchInst::Create(Bypass, LoopVectorPreHeader, CheckMinIters);
8079 unsigned MainLoopStep = UF * VF.getKnownMinValue();
8080 unsigned EpilogueLoopStep =
8082 // We assume the remaining `Count` is equally distributed in
8083 // [0, MainLoopStep)
8084 // So the probability for `Count < EpilogueLoopStep` should be
8085 // min(MainLoopStep, EpilogueLoopStep) / MainLoopStep
8086 unsigned EstimatedSkipCount = std::min(MainLoopStep, EpilogueLoopStep);
8087 const uint32_t Weights[] = {EstimatedSkipCount,
8088 MainLoopStep - EstimatedSkipCount};
8089 setBranchWeights(BI, Weights, /*IsExpected=*/false);
8090 }
8091 ReplaceInstWithInst(Insert->getTerminator(), &BI);
8092 LoopBypassBlocks.push_back(Insert);
8093
8094 // A new entry block has been created for the epilogue VPlan. Hook it in, as
8095 // otherwise we would try to modify the entry to the main vector loop.
8096 VPIRBasicBlock *NewEntry = Plan.createVPIRBasicBlock(Insert);
8097 VPBasicBlock *OldEntry = Plan.getEntry();
8098 VPBlockUtils::reassociateBlocks(OldEntry, NewEntry);
8099 Plan.setEntry(NewEntry);
8100 // OldEntry is now dead and will be cleaned up when the plan gets destroyed.
8101
8103 return Insert;
8104}
8105
8107 LLVM_DEBUG({
8108 dbgs() << "Create Skeleton for epilogue vectorized loop (second pass)\n"
8109 << "Epilogue Loop VF:" << EPI.EpilogueVF
8110 << ", Epilogue Loop UF:" << EPI.EpilogueUF << "\n";
8111 });
8112}
8113
8116 dbgs() << "final fn:\n" << *OrigLoop->getHeader()->getParent() << "\n";
8117 });
8118}
8119
8120iterator_range<mapped_iterator<Use *, std::function<VPValue *(Value *)>>>
8122 std::function<VPValue *(Value *)> Fn = [this](Value *Op) {
8123 return getVPValueOrAddLiveIn(Op);
8124 };
8125 return map_range(Operands, Fn);
8126}
8127
8129 BasicBlock *Src = SI->getParent();
8130 assert(!OrigLoop->isLoopExiting(Src) &&
8131 all_of(successors(Src),
8132 [this](BasicBlock *Succ) {
8133 return OrigLoop->getHeader() != Succ;
8134 }) &&
8135 "unsupported switch either exiting loop or continuing to header");
8136 // Create masks where the terminator in Src is a switch. We create mask for
8137 // all edges at the same time. This is more efficient, as we can create and
8138 // collect compares for all cases once.
8139 VPValue *Cond = getVPValueOrAddLiveIn(SI->getCondition());
8140 BasicBlock *DefaultDst = SI->getDefaultDest();
8142 for (auto &C : SI->cases()) {
8143 BasicBlock *Dst = C.getCaseSuccessor();
8144 assert(!EdgeMaskCache.contains({Src, Dst}) && "Edge masks already created");
8145 // Cases whose destination is the same as default are redundant and can be
8146 // ignored - they will get there anyhow.
8147 if (Dst == DefaultDst)
8148 continue;
8149 auto &Compares = Dst2Compares[Dst];
8150 VPValue *V = getVPValueOrAddLiveIn(C.getCaseValue());
8151 Compares.push_back(Builder.createICmp(CmpInst::ICMP_EQ, Cond, V));
8152 }
8153
8154 // We need to handle 2 separate cases below for all entries in Dst2Compares,
8155 // which excludes destinations matching the default destination.
8156 VPValue *SrcMask = getBlockInMask(Src);
8157 VPValue *DefaultMask = nullptr;
8158 for (const auto &[Dst, Conds] : Dst2Compares) {
8159 // 1. Dst is not the default destination. Dst is reached if any of the cases
8160 // with destination == Dst are taken. Join the conditions for each case
8161 // whose destination == Dst using an OR.
8162 VPValue *Mask = Conds[0];
8163 for (VPValue *V : ArrayRef<VPValue *>(Conds).drop_front())
8164 Mask = Builder.createOr(Mask, V);
8165 if (SrcMask)
8166 Mask = Builder.createLogicalAnd(SrcMask, Mask);
8167 EdgeMaskCache[{Src, Dst}] = Mask;
8168
8169 // 2. Create the mask for the default destination, which is reached if none
8170 // of the cases with destination != default destination are taken. Join the
8171 // conditions for each case where the destination is != Dst using an OR and
8172 // negate it.
8173 DefaultMask = DefaultMask ? Builder.createOr(DefaultMask, Mask) : Mask;
8174 }
8175
8176 if (DefaultMask) {
8177 DefaultMask = Builder.createNot(DefaultMask);
8178 if (SrcMask)
8179 DefaultMask = Builder.createLogicalAnd(SrcMask, DefaultMask);
8180 }
8181 EdgeMaskCache[{Src, DefaultDst}] = DefaultMask;
8182}
8183
8185 assert(is_contained(predecessors(Dst), Src) && "Invalid edge");
8186
8187 // Look for cached value.
8188 std::pair<BasicBlock *, BasicBlock *> Edge(Src, Dst);
8189 EdgeMaskCacheTy::iterator ECEntryIt = EdgeMaskCache.find(Edge);
8190 if (ECEntryIt != EdgeMaskCache.end())
8191 return ECEntryIt->second;
8192
8193 if (auto *SI = dyn_cast<SwitchInst>(Src->getTerminator())) {
8195 assert(EdgeMaskCache.contains(Edge) && "Mask for Edge not created?");
8196 return EdgeMaskCache[Edge];
8197 }
8198
8199 VPValue *SrcMask = getBlockInMask(Src);
8200
8201 // The terminator has to be a branch inst!
8202 BranchInst *BI = dyn_cast<BranchInst>(Src->getTerminator());
8203 assert(BI && "Unexpected terminator found");
8204 if (!BI->isConditional() || BI->getSuccessor(0) == BI->getSuccessor(1))
8205 return EdgeMaskCache[Edge] = SrcMask;
8206
8207 // If source is an exiting block, we know the exit edge is dynamically dead
8208 // in the vector loop, and thus we don't need to restrict the mask. Avoid
8209 // adding uses of an otherwise potentially dead instruction unless we are
8210 // vectorizing a loop with uncountable exits. In that case, we always
8211 // materialize the mask.
8212 if (OrigLoop->isLoopExiting(Src) &&
8213 Src != Legal->getUncountableEarlyExitingBlock())
8214 return EdgeMaskCache[Edge] = SrcMask;
8215
8216 VPValue *EdgeMask = getVPValueOrAddLiveIn(BI->getCondition());
8217 assert(EdgeMask && "No Edge Mask found for condition");
8218
8219 if (BI->getSuccessor(0) != Dst)
8220 EdgeMask = Builder.createNot(EdgeMask, BI->getDebugLoc());
8221
8222 if (SrcMask) { // Otherwise block in-mask is all-one, no need to AND.
8223 // The bitwise 'And' of SrcMask and EdgeMask introduces new UB if SrcMask
8224 // is false and EdgeMask is poison. Avoid that by using 'LogicalAnd'
8225 // instead which generates 'select i1 SrcMask, i1 EdgeMask, i1 false'.
8226 EdgeMask = Builder.createLogicalAnd(SrcMask, EdgeMask, BI->getDebugLoc());
8227 }
8228
8229 return EdgeMaskCache[Edge] = EdgeMask;
8230}
8231
8233 assert(is_contained(predecessors(Dst), Src) && "Invalid edge");
8234
8235 // Look for cached value.
8236 std::pair<BasicBlock *, BasicBlock *> Edge(Src, Dst);
8237 EdgeMaskCacheTy::const_iterator ECEntryIt = EdgeMaskCache.find(Edge);
8238 assert(ECEntryIt != EdgeMaskCache.end() &&
8239 "looking up mask for edge which has not been created");
8240 return ECEntryIt->second;
8241}
8242
8244 BasicBlock *Header = OrigLoop->getHeader();
8245
8246 // When not folding the tail, use nullptr to model all-true mask.
8247 if (!CM.foldTailByMasking()) {
8248 BlockMaskCache[Header] = nullptr;
8249 return;
8250 }
8251
8252 // Introduce the early-exit compare IV <= BTC to form header block mask.
8253 // This is used instead of IV < TC because TC may wrap, unlike BTC. Start by
8254 // constructing the desired canonical IV in the header block as its first
8255 // non-phi instructions.
8256
8257 VPBasicBlock *HeaderVPBB = Plan.getVectorLoopRegion()->getEntryBasicBlock();
8258 auto NewInsertionPoint = HeaderVPBB->getFirstNonPhi();
8259 auto *IV = new VPWidenCanonicalIVRecipe(Plan.getCanonicalIV());
8260 HeaderVPBB->insert(IV, NewInsertionPoint);
8261
8262 VPBuilder::InsertPointGuard Guard(Builder);
8263 Builder.setInsertPoint(HeaderVPBB, NewInsertionPoint);
8264 VPValue *BlockMask = nullptr;
8266 BlockMask = Builder.createICmp(CmpInst::ICMP_ULE, IV, BTC);
8267 BlockMaskCache[Header] = BlockMask;
8268}
8269
8271 // Return the cached value.
8272 BlockMaskCacheTy::const_iterator BCEntryIt = BlockMaskCache.find(BB);
8273 assert(BCEntryIt != BlockMaskCache.end() &&
8274 "Trying to access mask for block without one.");
8275 return BCEntryIt->second;
8276}
8277
8279 assert(OrigLoop->contains(BB) && "Block is not a part of a loop");
8280 assert(BlockMaskCache.count(BB) == 0 && "Mask for block already computed");
8281 assert(OrigLoop->getHeader() != BB &&
8282 "Loop header must have cached block mask");
8283
8284 // All-one mask is modelled as no-mask following the convention for masked
8285 // load/store/gather/scatter. Initialize BlockMask to no-mask.
8286 VPValue *BlockMask = nullptr;
8287 // This is the block mask. We OR all unique incoming edges.
8288 for (auto *Predecessor :
8290 VPValue *EdgeMask = createEdgeMask(Predecessor, BB);
8291 if (!EdgeMask) { // Mask of predecessor is all-one so mask of block is too.
8292 BlockMaskCache[BB] = EdgeMask;
8293 return;
8294 }
8295
8296 if (!BlockMask) { // BlockMask has its initialized nullptr value.
8297 BlockMask = EdgeMask;
8298 continue;
8299 }
8300
8301 BlockMask = Builder.createOr(BlockMask, EdgeMask, {});
8302 }
8303
8304 BlockMaskCache[BB] = BlockMask;
8305}
8306
8308VPRecipeBuilder::tryToWidenMemory(Instruction *I, ArrayRef<VPValue *> Operands,
8309 VFRange &Range) {
8310 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
8311 "Must be called with either a load or store");
8312
8313 auto WillWiden = [&](ElementCount VF) -> bool {
8315 CM.getWideningDecision(I, VF);
8317 "CM decision should be taken at this point.");
8319 return true;
8320 if (CM.isScalarAfterVectorization(I, VF) ||
8321 CM.isProfitableToScalarize(I, VF))
8322 return false;
8324 };
8325
8327 return nullptr;
8328
8329 VPValue *Mask = nullptr;
8330 if (Legal->isMaskRequired(I))
8331 Mask = getBlockInMask(I->getParent());
8332
8333 // Determine if the pointer operand of the access is either consecutive or
8334 // reverse consecutive.
8336 CM.getWideningDecision(I, Range.Start);
8338 bool Consecutive =
8340
8341 VPValue *Ptr = isa<LoadInst>(I) ? Operands[0] : Operands[1];
8342 if (Consecutive) {
8343 auto *GEP = dyn_cast<GetElementPtrInst>(
8344 Ptr->getUnderlyingValue()->stripPointerCasts());
8345 VPSingleDefRecipe *VectorPtr;
8346 if (Reverse)
8347 VectorPtr = new VPReverseVectorPointerRecipe(
8348 Ptr, &Plan.getVF(), getLoadStoreType(I),
8349 GEP && GEP->isInBounds() ? GEPNoWrapFlags::inBounds()
8351 I->getDebugLoc());
8352 else
8353 VectorPtr = new VPVectorPointerRecipe(Ptr, getLoadStoreType(I),
8354 GEP ? GEP->getNoWrapFlags()
8356 I->getDebugLoc());
8357 Builder.getInsertBlock()->appendRecipe(VectorPtr);
8358 Ptr = VectorPtr;
8359 }
8360 if (LoadInst *Load = dyn_cast<LoadInst>(I))
8361 return new VPWidenLoadRecipe(*Load, Ptr, Mask, Consecutive, Reverse,
8362 I->getDebugLoc());
8363
8364 StoreInst *Store = cast<StoreInst>(I);
8365 return new VPWidenStoreRecipe(*Store, Ptr, Operands[0], Mask, Consecutive,
8366 Reverse, I->getDebugLoc());
8367}
8368
8369/// Creates a VPWidenIntOrFpInductionRecpipe for \p Phi. If needed, it will also
8370/// insert a recipe to expand the step for the induction recipe.
8373 VPValue *Start, const InductionDescriptor &IndDesc,
8374 VPlan &Plan, ScalarEvolution &SE, Loop &OrigLoop) {
8375 assert(IndDesc.getStartValue() ==
8376 Phi->getIncomingValueForBlock(OrigLoop.getLoopPreheader()));
8377 assert(SE.isLoopInvariant(IndDesc.getStep(), &OrigLoop) &&
8378 "step must be loop invariant");
8379
8380 VPValue *Step =
8382 if (auto *TruncI = dyn_cast<TruncInst>(PhiOrTrunc)) {
8383 return new VPWidenIntOrFpInductionRecipe(Phi, Start, Step, &Plan.getVF(),
8384 IndDesc, TruncI,
8385 TruncI->getDebugLoc());
8386 }
8387 assert(isa<PHINode>(PhiOrTrunc) && "must be a phi node here");
8388 return new VPWidenIntOrFpInductionRecipe(Phi, Start, Step, &Plan.getVF(),
8389 IndDesc, Phi->getDebugLoc());
8390}
8391
8392VPHeaderPHIRecipe *VPRecipeBuilder::tryToOptimizeInductionPHI(
8394
8395 // Check if this is an integer or fp induction. If so, build the recipe that
8396 // produces its scalar and vector values.
8397 if (auto *II = Legal->getIntOrFpInductionDescriptor(Phi))
8398 return createWidenInductionRecipes(Phi, Phi, Operands[0], *II, Plan,
8399 *PSE.getSE(), *OrigLoop);
8400
8401 // Check if this is pointer induction. If so, build the recipe for it.
8402 if (auto *II = Legal->getPointerInductionDescriptor(Phi)) {
8403 VPValue *Step = vputils::getOrCreateVPValueForSCEVExpr(Plan, II->getStep(),
8404 *PSE.getSE());
8406 Phi, Operands[0], Step, *II,
8408 [&](ElementCount VF) {
8409 return CM.isScalarAfterVectorization(Phi, VF);
8410 },
8411 Range),
8412 Phi->getDebugLoc());
8413 }
8414 return nullptr;
8415}
8416
8417VPWidenIntOrFpInductionRecipe *VPRecipeBuilder::tryToOptimizeInductionTruncate(
8419 // Optimize the special case where the source is a constant integer
8420 // induction variable. Notice that we can only optimize the 'trunc' case
8421 // because (a) FP conversions lose precision, (b) sext/zext may wrap, and
8422 // (c) other casts depend on pointer size.
8423
8424 // Determine whether \p K is a truncation based on an induction variable that
8425 // can be optimized.
8426 auto IsOptimizableIVTruncate =
8427 [&](Instruction *K) -> std::function<bool(ElementCount)> {
8428 return [=](ElementCount VF) -> bool {
8429 return CM.isOptimizableIVTruncate(K, VF);
8430 };
8431 };
8432
8434 IsOptimizableIVTruncate(I), Range)) {
8435
8436 auto *Phi = cast<PHINode>(I->getOperand(0));
8438 VPValue *Start = Plan.getOrAddLiveIn(II.getStartValue());
8439 return createWidenInductionRecipes(Phi, I, Start, II, Plan, *PSE.getSE(),
8440 *OrigLoop);
8441 }
8442 return nullptr;
8443}
8444
8445VPBlendRecipe *VPRecipeBuilder::tryToBlend(PHINode *Phi,
8447 unsigned NumIncoming = Phi->getNumIncomingValues();
8448
8449 // We know that all PHIs in non-header blocks are converted into selects, so
8450 // we don't have to worry about the insertion order and we can just use the
8451 // builder. At this point we generate the predication tree. There may be
8452 // duplications since this is a simple recursive scan, but future
8453 // optimizations will clean it up.
8454 SmallVector<VPValue *, 2> OperandsWithMask;
8455
8456 for (unsigned In = 0; In < NumIncoming; In++) {
8457 OperandsWithMask.push_back(Operands[In]);
8458 VPValue *EdgeMask =
8459 getEdgeMask(Phi->getIncomingBlock(In), Phi->getParent());
8460 if (!EdgeMask) {
8461 assert(In == 0 && "Both null and non-null edge masks found");
8463 "Distinct incoming values with one having a full mask");
8464 break;
8465 }
8466 OperandsWithMask.push_back(EdgeMask);
8467 }
8468 return new VPBlendRecipe(Phi, OperandsWithMask);
8469}
8470
8471VPSingleDefRecipe *VPRecipeBuilder::tryToWidenCall(CallInst *CI,
8473 VFRange &Range) {
8475 [this, CI](ElementCount VF) {
8476 return CM.isScalarWithPredication(CI, VF);
8477 },
8478 Range);
8479
8480 if (IsPredicated)
8481 return nullptr;
8482
8484 if (ID && (ID == Intrinsic::assume || ID == Intrinsic::lifetime_end ||
8485 ID == Intrinsic::lifetime_start || ID == Intrinsic::sideeffect ||
8486 ID == Intrinsic::pseudoprobe ||
8487 ID == Intrinsic::experimental_noalias_scope_decl))
8488 return nullptr;
8489
8490 SmallVector<VPValue *, 4> Ops(Operands.take_front(CI->arg_size()));
8491
8492 // Is it beneficial to perform intrinsic call compared to lib call?
8493 bool ShouldUseVectorIntrinsic =
8495 [&](ElementCount VF) -> bool {
8496 return CM.getCallWideningDecision(CI, VF).Kind ==
8498 },
8499 Range);
8500 if (ShouldUseVectorIntrinsic)
8501 return new VPWidenIntrinsicRecipe(*CI, ID, Ops, CI->getType(),
8502 CI->getDebugLoc());
8503
8504 Function *Variant = nullptr;
8505 std::optional<unsigned> MaskPos;
8506 // Is better to call a vectorized version of the function than to to scalarize
8507 // the call?
8508 auto ShouldUseVectorCall = LoopVectorizationPlanner::getDecisionAndClampRange(
8509 [&](ElementCount VF) -> bool {
8510 // The following case may be scalarized depending on the VF.
8511 // The flag shows whether we can use a usual Call for vectorized
8512 // version of the instruction.
8513
8514 // If we've found a variant at a previous VF, then stop looking. A
8515 // vectorized variant of a function expects input in a certain shape
8516 // -- basically the number of input registers, the number of lanes
8517 // per register, and whether there's a mask required.
8518 // We store a pointer to the variant in the VPWidenCallRecipe, so
8519 // once we have an appropriate variant it's only valid for that VF.
8520 // This will force a different vplan to be generated for each VF that
8521 // finds a valid variant.
8522 if (Variant)
8523 return false;
8525 CM.getCallWideningDecision(CI, VF);
8527 Variant = Decision.Variant;
8528 MaskPos = Decision.MaskPos;
8529 return true;
8530 }
8531
8532 return false;
8533 },
8534 Range);
8535 if (ShouldUseVectorCall) {
8536 if (MaskPos.has_value()) {
8537 // We have 2 cases that would require a mask:
8538 // 1) The block needs to be predicated, either due to a conditional
8539 // in the scalar loop or use of an active lane mask with
8540 // tail-folding, and we use the appropriate mask for the block.
8541 // 2) No mask is required for the block, but the only available
8542 // vector variant at this VF requires a mask, so we synthesize an
8543 // all-true mask.
8544 VPValue *Mask = nullptr;
8545 if (Legal->isMaskRequired(CI))
8546 Mask = getBlockInMask(CI->getParent());
8547 else
8548 Mask = Plan.getOrAddLiveIn(
8550
8551 Ops.insert(Ops.begin() + *MaskPos, Mask);
8552 }
8553
8554 Ops.push_back(Operands.back());
8555 return new VPWidenCallRecipe(CI, Variant, Ops, CI->getDebugLoc());
8556 }
8557
8558 return nullptr;
8559}
8560
8561bool VPRecipeBuilder::shouldWiden(Instruction *I, VFRange &Range) const {
8562 assert(!isa<BranchInst>(I) && !isa<PHINode>(I) && !isa<LoadInst>(I) &&
8563 !isa<StoreInst>(I) && "Instruction should have been handled earlier");
8564 // Instruction should be widened, unless it is scalar after vectorization,
8565 // scalarization is profitable or it is predicated.
8566 auto WillScalarize = [this, I](ElementCount VF) -> bool {
8567 return CM.isScalarAfterVectorization(I, VF) ||
8568 CM.isProfitableToScalarize(I, VF) ||
8569 CM.isScalarWithPredication(I, VF);
8570 };
8572 Range);
8573}
8574
8575VPWidenRecipe *VPRecipeBuilder::tryToWiden(Instruction *I,
8577 VPBasicBlock *VPBB) {
8578 switch (I->getOpcode()) {
8579 default:
8580 return nullptr;
8581 case Instruction::SDiv:
8582 case Instruction::UDiv:
8583 case Instruction::SRem:
8584 case Instruction::URem: {
8585 // If not provably safe, use a select to form a safe divisor before widening the
8586 // div/rem operation itself. Otherwise fall through to general handling below.
8587 if (CM.isPredicatedInst(I)) {
8589 VPValue *Mask = getBlockInMask(I->getParent());
8590 VPValue *One =
8591 Plan.getOrAddLiveIn(ConstantInt::get(I->getType(), 1u, false));
8592 auto *SafeRHS = Builder.createSelect(Mask, Ops[1], One, I->getDebugLoc());
8593 Ops[1] = SafeRHS;
8594 return new VPWidenRecipe(*I, make_range(Ops.begin(), Ops.end()));
8595 }
8596 [[fallthrough]];
8597 }
8598 case Instruction::Add:
8599 case Instruction::And:
8600 case Instruction::AShr:
8601 case Instruction::FAdd:
8602 case Instruction::FCmp:
8603 case Instruction::FDiv:
8604 case Instruction::FMul:
8605 case Instruction::FNeg:
8606 case Instruction::FRem:
8607 case Instruction::FSub:
8608 case Instruction::ICmp:
8609 case Instruction::LShr:
8610 case Instruction::Mul:
8611 case Instruction::Or:
8612 case Instruction::Select:
8613 case Instruction::Shl:
8614 case Instruction::Sub:
8615 case Instruction::Xor:
8616 case Instruction::Freeze:
8618 if (Instruction::isBinaryOp(I->getOpcode())) {
8619 // The legacy cost model uses SCEV to check if some of the operands are
8620 // constants. To match the legacy cost model's behavior, use SCEV to try
8621 // to replace operands with constants.
8622 ScalarEvolution &SE = *PSE.getSE();
8623 auto GetConstantViaSCEV = [this, &SE](VPValue *Op) {
8624 Value *V = Op->getUnderlyingValue();
8625 if (isa<Constant>(V) || !SE.isSCEVable(V->getType()))
8626 return Op;
8627 auto *C = dyn_cast<SCEVConstant>(SE.getSCEV(V));
8628 if (!C)
8629 return Op;
8630 return Plan.getOrAddLiveIn(C->getValue());
8631 };
8632 // For Mul, the legacy cost model checks both operands.
8633 if (I->getOpcode() == Instruction::Mul)
8634 NewOps[0] = GetConstantViaSCEV(NewOps[0]);
8635 // For other binops, the legacy cost model only checks the second operand.
8636 NewOps[1] = GetConstantViaSCEV(NewOps[1]);
8637 }
8638 return new VPWidenRecipe(*I, make_range(NewOps.begin(), NewOps.end()));
8639 };
8640}
8641
8643VPRecipeBuilder::tryToWidenHistogram(const HistogramInfo *HI,
8645 // FIXME: Support other operations.
8646 unsigned Opcode = HI->Update->getOpcode();
8647 assert((Opcode == Instruction::Add || Opcode == Instruction::Sub) &&
8648 "Histogram update operation must be an Add or Sub");
8649
8651 // Bucket address.
8652 HGramOps.push_back(Operands[1]);
8653 // Increment value.
8654 HGramOps.push_back(getVPValueOrAddLiveIn(HI->Update->getOperand(1)));
8655
8656 // In case of predicated execution (due to tail-folding, or conditional
8657 // execution, or both), pass the relevant mask.
8658 if (Legal->isMaskRequired(HI->Store))
8659 HGramOps.push_back(getBlockInMask(HI->Store->getParent()));
8660
8661 return new VPHistogramRecipe(Opcode,
8662 make_range(HGramOps.begin(), HGramOps.end()),
8663 HI->Store->getDebugLoc());
8664}
8665
8667 BasicBlock *OrigLatch = OrigLoop->getLoopLatch();
8668 for (VPHeaderPHIRecipe *R : PhisToFix) {
8669 auto *PN = cast<PHINode>(R->getUnderlyingValue());
8670 VPRecipeBase *IncR =
8671 getRecipe(cast<Instruction>(PN->getIncomingValueForBlock(OrigLatch)));
8672 R->addOperand(IncR->getVPSingleValue());
8673 }
8674}
8675
8677 VFRange &Range) {
8679 [&](ElementCount VF) { return CM.isUniformAfterVectorization(I, VF); },
8680 Range);
8681
8682 bool IsPredicated = CM.isPredicatedInst(I);
8683
8684 // Even if the instruction is not marked as uniform, there are certain
8685 // intrinsic calls that can be effectively treated as such, so we check for
8686 // them here. Conservatively, we only do this for scalable vectors, since
8687 // for fixed-width VFs we can always fall back on full scalarization.
8688 if (!IsUniform && Range.Start.isScalable() && isa<IntrinsicInst>(I)) {
8689 switch (cast<IntrinsicInst>(I)->getIntrinsicID()) {
8690 case Intrinsic::assume:
8691 case Intrinsic::lifetime_start:
8692 case Intrinsic::lifetime_end:
8693 // For scalable vectors if one of the operands is variant then we still
8694 // want to mark as uniform, which will generate one instruction for just
8695 // the first lane of the vector. We can't scalarize the call in the same
8696 // way as for fixed-width vectors because we don't know how many lanes
8697 // there are.
8698 //
8699 // The reasons for doing it this way for scalable vectors are:
8700 // 1. For the assume intrinsic generating the instruction for the first
8701 // lane is still be better than not generating any at all. For
8702 // example, the input may be a splat across all lanes.
8703 // 2. For the lifetime start/end intrinsics the pointer operand only
8704 // does anything useful when the input comes from a stack object,
8705 // which suggests it should always be uniform. For non-stack objects
8706 // the effect is to poison the object, which still allows us to
8707 // remove the call.
8708 IsUniform = true;
8709 break;
8710 default:
8711 break;
8712 }
8713 }
8714 VPValue *BlockInMask = nullptr;
8715 if (!IsPredicated) {
8716 // Finalize the recipe for Instr, first if it is not predicated.
8717 LLVM_DEBUG(dbgs() << "LV: Scalarizing:" << *I << "\n");
8718 } else {
8719 LLVM_DEBUG(dbgs() << "LV: Scalarizing and predicating:" << *I << "\n");
8720 // Instructions marked for predication are replicated and a mask operand is
8721 // added initially. Masked replicate recipes will later be placed under an
8722 // if-then construct to prevent side-effects. Generate recipes to compute
8723 // the block mask for this region.
8724 BlockInMask = getBlockInMask(I->getParent());
8725 }
8726
8727 // Note that there is some custom logic to mark some intrinsics as uniform
8728 // manually above for scalable vectors, which this assert needs to account for
8729 // as well.
8730 assert((Range.Start.isScalar() || !IsUniform || !IsPredicated ||
8731 (Range.Start.isScalable() && isa<IntrinsicInst>(I))) &&
8732 "Should not predicate a uniform recipe");
8733 auto *Recipe = new VPReplicateRecipe(I, mapToVPValues(I->operands()),
8734 IsUniform, BlockInMask);
8735 return Recipe;
8736}
8737
8741 VFRange &Range, VPBasicBlock *VPBB) {
8742 // First, check for specific widening recipes that deal with inductions, Phi
8743 // nodes, calls and memory operations.
8744 VPRecipeBase *Recipe;
8745 if (auto *Phi = dyn_cast<PHINode>(Instr)) {
8746 if (Phi->getParent() != OrigLoop->getHeader())
8747 return tryToBlend(Phi, Operands);
8748
8749 if ((Recipe = tryToOptimizeInductionPHI(Phi, Operands, Range)))
8750 return Recipe;
8751
8752 VPHeaderPHIRecipe *PhiRecipe = nullptr;
8753 assert((Legal->isReductionVariable(Phi) ||
8754 Legal->isFixedOrderRecurrence(Phi)) &&
8755 "can only widen reductions and fixed-order recurrences here");
8756 VPValue *StartV = Operands[0];
8757 if (Legal->isReductionVariable(Phi)) {
8758 const RecurrenceDescriptor &RdxDesc =
8759 Legal->getReductionVars().find(Phi)->second;
8760 assert(RdxDesc.getRecurrenceStartValue() ==
8761 Phi->getIncomingValueForBlock(OrigLoop->getLoopPreheader()));
8762 PhiRecipe = new VPReductionPHIRecipe(Phi, RdxDesc, *StartV,
8763 CM.isInLoopReduction(Phi),
8764 CM.useOrderedReductions(RdxDesc));
8765 } else {
8766 // TODO: Currently fixed-order recurrences are modeled as chains of
8767 // first-order recurrences. If there are no users of the intermediate
8768 // recurrences in the chain, the fixed order recurrence should be modeled
8769 // directly, enabling more efficient codegen.
8770 PhiRecipe = new VPFirstOrderRecurrencePHIRecipe(Phi, *StartV);
8771 }
8772
8773 PhisToFix.push_back(PhiRecipe);
8774 return PhiRecipe;
8775 }
8776
8777 if (isa<TruncInst>(Instr) && (Recipe = tryToOptimizeInductionTruncate(
8778 cast<TruncInst>(Instr), Operands, Range)))
8779 return Recipe;
8780
8781 // All widen recipes below deal only with VF > 1.
8783 [&](ElementCount VF) { return VF.isScalar(); }, Range))
8784 return nullptr;
8785
8786 if (auto *CI = dyn_cast<CallInst>(Instr))
8787 return tryToWidenCall(CI, Operands, Range);
8788
8789 if (StoreInst *SI = dyn_cast<StoreInst>(Instr))
8790 if (auto HistInfo = Legal->getHistogramInfo(SI))
8791 return tryToWidenHistogram(*HistInfo, Operands);
8792
8793 if (isa<LoadInst>(Instr) || isa<StoreInst>(Instr))
8794 return tryToWidenMemory(Instr, Operands, Range);
8795
8796 if (!shouldWiden(Instr, Range))
8797 return nullptr;
8798
8799 if (auto *GEP = dyn_cast<GetElementPtrInst>(Instr))
8800 return new VPWidenGEPRecipe(GEP,
8801 make_range(Operands.begin(), Operands.end()));
8802
8803 if (auto *SI = dyn_cast<SelectInst>(Instr)) {
8804 return new VPWidenSelectRecipe(
8805 *SI, make_range(Operands.begin(), Operands.end()));
8806 }
8807
8808 if (auto *CI = dyn_cast<CastInst>(Instr)) {
8809 return new VPWidenCastRecipe(CI->getOpcode(), Operands[0], CI->getType(),
8810 *CI);
8811 }
8812
8813 return tryToWiden(Instr, Operands, VPBB);
8814}
8815
8816void LoopVectorizationPlanner::buildVPlansWithVPRecipes(ElementCount MinVF,
8817 ElementCount MaxVF) {
8818 assert(OrigLoop->isInnermost() && "Inner loop expected.");
8819
8820 auto MaxVFTimes2 = MaxVF * 2;
8821 for (ElementCount VF = MinVF; ElementCount::isKnownLT(VF, MaxVFTimes2);) {
8822 VFRange SubRange = {VF, MaxVFTimes2};
8823 if (auto Plan = tryToBuildVPlanWithVPRecipes(SubRange)) {
8824 // Now optimize the initial VPlan.
8825 if (!Plan->hasVF(ElementCount::getFixed(1)))
8827 CM.getMinimalBitwidths());
8829 // TODO: try to put it close to addActiveLaneMask().
8830 // Discard the plan if it is not EVL-compatible
8832 *Plan, CM.getMaxSafeElements()))
8833 break;
8834 assert(verifyVPlanIsValid(*Plan) && "VPlan is invalid");
8835 VPlans.push_back(std::move(Plan));
8836 }
8837 VF = SubRange.End;
8838 }
8839}
8840
8841// Add the necessary canonical IV and branch recipes required to control the
8842// loop.
8843static void addCanonicalIVRecipes(VPlan &Plan, Type *IdxTy, bool HasNUW,
8844 DebugLoc DL) {
8845 Value *StartIdx = ConstantInt::get(IdxTy, 0);
8846 auto *StartV = Plan.getOrAddLiveIn(StartIdx);
8847
8848 // Add a VPCanonicalIVPHIRecipe starting at 0 to the header.
8849 auto *CanonicalIVPHI = new VPCanonicalIVPHIRecipe(StartV, DL);
8850 VPRegionBlock *TopRegion = Plan.getVectorLoopRegion();
8851 VPBasicBlock *Header = TopRegion->getEntryBasicBlock();
8852 Header->insert(CanonicalIVPHI, Header->begin());
8853
8854 VPBuilder Builder(TopRegion->getExitingBasicBlock());
8855 // Add a VPInstruction to increment the scalar canonical IV by VF * UF.
8856 auto *CanonicalIVIncrement = Builder.createOverflowingOp(
8857 Instruction::Add, {CanonicalIVPHI, &Plan.getVFxUF()}, {HasNUW, false}, DL,
8858 "index.next");
8859 CanonicalIVPHI->addOperand(CanonicalIVIncrement);
8860
8861 // Add the BranchOnCount VPInstruction to the latch.
8863 {CanonicalIVIncrement, &Plan.getVectorTripCount()}, DL);
8864}
8865
8866/// Create and return a ResumePhi for \p WideIV, unless it is truncated. If the
8867/// induction recipe is not canonical, creates a VPDerivedIVRecipe to compute
8868/// the end value of the induction.
8870 VPBuilder &VectorPHBuilder,
8871 VPBuilder &ScalarPHBuilder,
8872 VPTypeAnalysis &TypeInfo,
8873 VPValue *VectorTC) {
8874 auto *WideIntOrFp = dyn_cast<VPWidenIntOrFpInductionRecipe>(WideIV);
8875 // Truncated wide inductions resume from the last lane of their vector value
8876 // in the last vector iteration which is handled elsewhere.
8877 if (WideIntOrFp && WideIntOrFp->getTruncInst())
8878 return nullptr;
8879
8880 VPValue *Start = WideIV->getStartValue();
8881 VPValue *Step = WideIV->getStepValue();
8883 VPValue *EndValue = VectorTC;
8884 if (!WideIntOrFp || !WideIntOrFp->isCanonical()) {
8885 EndValue = VectorPHBuilder.createDerivedIV(
8886 ID.getKind(), dyn_cast_or_null<FPMathOperator>(ID.getInductionBinOp()),
8887 Start, VectorTC, Step);
8888 }
8889
8890 // EndValue is derived from the vector trip count (which has the same type as
8891 // the widest induction) and thus may be wider than the induction here.
8892 Type *ScalarTypeOfWideIV = TypeInfo.inferScalarType(WideIV);
8893 if (ScalarTypeOfWideIV != TypeInfo.inferScalarType(EndValue)) {
8894 EndValue = VectorPHBuilder.createScalarCast(Instruction::Trunc, EndValue,
8895 ScalarTypeOfWideIV);
8896 }
8897
8898 auto *ResumePhiRecipe =
8899 ScalarPHBuilder.createNaryOp(VPInstruction::ResumePhi, {EndValue, Start},
8900 WideIV->getDebugLoc(), "bc.resume.val");
8901 return ResumePhiRecipe;
8902}
8903
8904/// Create resume phis in the scalar preheader for first-order recurrences,
8905/// reductions and inductions, and update the VPIRInstructions wrapping the
8906/// original phis in the scalar header.
8907static void addScalarResumePhis(VPRecipeBuilder &Builder, VPlan &Plan) {
8908 VPTypeAnalysis TypeInfo(Plan.getCanonicalIV()->getScalarType());
8909 auto *ScalarPH = Plan.getScalarPreheader();
8910 auto *MiddleVPBB = cast<VPBasicBlock>(ScalarPH->getSinglePredecessor());
8911 VPBuilder VectorPHBuilder(
8912 cast<VPBasicBlock>(Plan.getVectorLoopRegion()->getSinglePredecessor()));
8913 VPBuilder MiddleBuilder(MiddleVPBB, MiddleVPBB->getFirstNonPhi());
8914 VPBuilder ScalarPHBuilder(ScalarPH);
8915 VPValue *OneVPV = Plan.getOrAddLiveIn(
8916 ConstantInt::get(Plan.getCanonicalIV()->getScalarType(), 1));
8917 for (VPRecipeBase &ScalarPhiR : *Plan.getScalarHeader()) {
8918 auto *ScalarPhiIRI = cast<VPIRInstruction>(&ScalarPhiR);
8919 auto *ScalarPhiI = dyn_cast<PHINode>(&ScalarPhiIRI->getInstruction());
8920 if (!ScalarPhiI)
8921 break;
8922
8923 auto *VectorPhiR = cast<VPHeaderPHIRecipe>(Builder.getRecipe(ScalarPhiI));
8924 if (auto *WideIVR = dyn_cast<VPWidenInductionRecipe>(VectorPhiR)) {
8925 if (VPValue *ResumePhi = addResumePhiRecipeForInduction(
8926 WideIVR, VectorPHBuilder, ScalarPHBuilder, TypeInfo,
8927 &Plan.getVectorTripCount())) {
8928 ScalarPhiIRI->addOperand(ResumePhi);
8929 continue;
8930 }
8931 // TODO: Also handle truncated inductions here. Computing end-values
8932 // separately should be done as VPlan-to-VPlan optimization, after
8933 // legalizing all resume values to use the last lane from the loop.
8934 assert(cast<VPWidenIntOrFpInductionRecipe>(VectorPhiR)->getTruncInst() &&
8935 "should only skip truncated wide inductions");
8936 continue;
8937 }
8938
8939 // The backedge value provides the value to resume coming out of a loop,
8940 // which for FORs is a vector whose last element needs to be extracted. The
8941 // start value provides the value if the loop is bypassed.
8942 bool IsFOR = isa<VPFirstOrderRecurrencePHIRecipe>(VectorPhiR);
8943 auto *ResumeFromVectorLoop = VectorPhiR->getBackedgeValue();
8944 if (IsFOR)
8945 ResumeFromVectorLoop = MiddleBuilder.createNaryOp(
8946 VPInstruction::ExtractFromEnd, {ResumeFromVectorLoop, OneVPV}, {},
8947 "vector.recur.extract");
8948 StringRef Name = IsFOR ? "scalar.recur.init" : "bc.merge.rdx";
8949 auto *ResumePhiR = ScalarPHBuilder.createNaryOp(
8951 {ResumeFromVectorLoop, VectorPhiR->getStartValue()}, {}, Name);
8952 ScalarPhiIRI->addOperand(ResumePhiR);
8953 }
8954}
8955
8956// Collect VPIRInstructions for phis in the exit blocks that are modeled
8957// in VPlan and add the exiting VPValue as operand. Some exiting values are not
8958// modeled explicitly yet and won't be included. Those are un-truncated
8959// VPWidenIntOrFpInductionRecipe, VPWidenPointerInductionRecipe and induction
8960// increments.
8962 Loop *OrigLoop, VPRecipeBuilder &Builder, VPlan &Plan,
8964 auto *MiddleVPBB = Plan.getMiddleBlock();
8965 SetVector<VPIRInstruction *> ExitUsersToFix;
8966 for (VPIRBasicBlock *ExitVPBB : Plan.getExitBlocks()) {
8967 for (VPRecipeBase &R : *ExitVPBB) {
8968 auto *ExitIRI = dyn_cast<VPIRInstruction>(&R);
8969 if (!ExitIRI)
8970 continue;
8971 auto *ExitPhi = dyn_cast<PHINode>(&ExitIRI->getInstruction());
8972 if (!ExitPhi)
8973 break;
8974 for (VPBlockBase *PredVPBB : ExitVPBB->getPredecessors()) {
8975 BasicBlock *ExitingBB = OrigLoop->getLoopLatch();
8976 if (PredVPBB != MiddleVPBB) {
8977 SmallVector<BasicBlock *> ExitingBlocks;
8978 OrigLoop->getExitingBlocks(ExitingBlocks);
8979 assert(ExitingBlocks.size() == 2 && "only support 2 exiting blocks");
8980 ExitingBB = ExitingBB == ExitingBlocks[0] ? ExitingBlocks[1]
8981 : ExitingBlocks[0];
8982 }
8983 Value *IncomingValue = ExitPhi->getIncomingValueForBlock(ExitingBB);
8984 VPValue *V = Builder.getVPValueOrAddLiveIn(IncomingValue);
8985 // Exit values for inductions are computed and updated outside of VPlan
8986 // and independent of induction recipes.
8987 // TODO: Compute induction exit values in VPlan.
8988 if ((isa<VPWidenIntOrFpInductionRecipe>(V) &&
8989 !cast<VPWidenIntOrFpInductionRecipe>(V)->getTruncInst()) ||
8990 isa<VPWidenPointerInductionRecipe>(V) ||
8991 (isa<Instruction>(IncomingValue) &&
8992 OrigLoop->contains(cast<Instruction>(IncomingValue)) &&
8993 any_of(IncomingValue->users(), [&Inductions](User *U) {
8994 auto *P = dyn_cast<PHINode>(U);
8995 return P && Inductions.contains(P);
8996 }))) {
8997 if (ExitVPBB->getSinglePredecessor() == MiddleVPBB)
8998 continue;
8999 }
9000 ExitUsersToFix.insert(ExitIRI);
9001 ExitIRI->addOperand(V);
9002 }
9003 }
9004 }
9005 return ExitUsersToFix;
9006}
9007
9008// Add exit values to \p Plan. Extracts are added for each entry in \p
9009// ExitUsersToFix if needed and their operands are updated. Returns true if all
9010// exit users can be handled, otherwise return false.
9011static bool
9013 const SetVector<VPIRInstruction *> &ExitUsersToFix) {
9014 if (ExitUsersToFix.empty())
9015 return true;
9016
9017 auto *MiddleVPBB = Plan.getMiddleBlock();
9018 VPBuilder B(MiddleVPBB, MiddleVPBB->getFirstNonPhi());
9019
9020 // Introduce extract for exiting values and update the VPIRInstructions
9021 // modeling the corresponding LCSSA phis.
9022 for (VPIRInstruction *ExitIRI : ExitUsersToFix) {
9023 for (const auto &[Idx, Op] : enumerate(ExitIRI->operands())) {
9024 // Pass live-in values used by exit phis directly through to their users
9025 // in the exit block.
9026 if (Op->isLiveIn())
9027 continue;
9028
9029 // Currently only live-ins can be used by exit values from blocks not
9030 // exiting via the vector latch through to the middle block.
9031 if (ExitIRI->getParent()->getSinglePredecessor() != MiddleVPBB)
9032 return false;
9033
9034 LLVMContext &Ctx = ExitIRI->getInstruction().getContext();
9035 VPValue *Ext = B.createNaryOp(VPInstruction::ExtractFromEnd,
9036 {Op, Plan.getOrAddLiveIn(ConstantInt::get(
9037 IntegerType::get(Ctx, 32), 1))});
9038 ExitIRI->setOperand(Idx, Ext);
9039 }
9040 }
9041 return true;
9042}
9043
9044/// Handle users in the exit block for first order reductions in the original
9045/// exit block. The penultimate value of recurrences is fed to their LCSSA phi
9046/// users in the original exit block using the VPIRInstruction wrapping to the
9047/// LCSSA phi.
9049 VPlan &Plan, SetVector<VPIRInstruction *> &ExitUsersToFix) {
9050 VPRegionBlock *VectorRegion = Plan.getVectorLoopRegion();
9051 auto *ScalarPHVPBB = Plan.getScalarPreheader();
9052 auto *MiddleVPBB = Plan.getMiddleBlock();
9053 VPBuilder ScalarPHBuilder(ScalarPHVPBB);
9054 VPBuilder MiddleBuilder(MiddleVPBB, MiddleVPBB->getFirstNonPhi());
9055 VPValue *TwoVPV = Plan.getOrAddLiveIn(
9056 ConstantInt::get(Plan.getCanonicalIV()->getScalarType(), 2));
9057
9058 for (auto &HeaderPhi : VectorRegion->getEntryBasicBlock()->phis()) {
9059 auto *FOR = dyn_cast<VPFirstOrderRecurrencePHIRecipe>(&HeaderPhi);
9060 if (!FOR)
9061 continue;
9062
9063 // This is the second phase of vectorizing first-order recurrences, creating
9064 // extract for users outside the loop. An overview of the transformation is
9065 // described below. Suppose we have the following loop with some use after
9066 // the loop of the last a[i-1],
9067 //
9068 // for (int i = 0; i < n; ++i) {
9069 // t = a[i - 1];
9070 // b[i] = a[i] - t;
9071 // }
9072 // use t;
9073 //
9074 // There is a first-order recurrence on "a". For this loop, the shorthand
9075 // scalar IR looks like:
9076 //
9077 // scalar.ph:
9078 // s.init = a[-1]
9079 // br scalar.body
9080 //
9081 // scalar.body:
9082 // i = phi [0, scalar.ph], [i+1, scalar.body]
9083 // s1 = phi [s.init, scalar.ph], [s2, scalar.body]
9084 // s2 = a[i]
9085 // b[i] = s2 - s1
9086 // br cond, scalar.body, exit.block
9087 //
9088 // exit.block:
9089 // use = lcssa.phi [s1, scalar.body]
9090 //
9091 // In this example, s1 is a recurrence because it's value depends on the
9092 // previous iteration. In the first phase of vectorization, we created a
9093 // VPFirstOrderRecurrencePHIRecipe v1 for s1. Now we create the extracts
9094 // for users in the scalar preheader and exit block.
9095 //
9096 // vector.ph:
9097 // v_init = vector(..., ..., ..., a[-1])
9098 // br vector.body
9099 //
9100 // vector.body
9101 // i = phi [0, vector.ph], [i+4, vector.body]
9102 // v1 = phi [v_init, vector.ph], [v2, vector.body]
9103 // v2 = a[i, i+1, i+2, i+3]
9104 // b[i] = v2 - v1
9105 // // Next, third phase will introduce v1' = splice(v1(3), v2(0, 1, 2))
9106 // b[i, i+1, i+2, i+3] = v2 - v1
9107 // br cond, vector.body, middle.block
9108 //
9109 // middle.block:
9110 // vector.recur.extract.for.phi = v2(2)
9111 // vector.recur.extract = v2(3)
9112 // br cond, scalar.ph, exit.block
9113 //
9114 // scalar.ph:
9115 // scalar.recur.init = phi [vector.recur.extract, middle.block],
9116 // [s.init, otherwise]
9117 // br scalar.body
9118 //
9119 // scalar.body:
9120 // i = phi [0, scalar.ph], [i+1, scalar.body]
9121 // s1 = phi [scalar.recur.init, scalar.ph], [s2, scalar.body]
9122 // s2 = a[i]
9123 // b[i] = s2 - s1
9124 // br cond, scalar.body, exit.block
9125 //
9126 // exit.block:
9127 // lo = lcssa.phi [s1, scalar.body],
9128 // [vector.recur.extract.for.phi, middle.block]
9129 //
9130 // Now update VPIRInstructions modeling LCSSA phis in the exit block.
9131 // Extract the penultimate value of the recurrence and use it as operand for
9132 // the VPIRInstruction modeling the phi.
9133 for (VPIRInstruction *ExitIRI : ExitUsersToFix) {
9134 if (ExitIRI->getOperand(0) != FOR)
9135 continue;
9136 VPValue *PenultimateElement = MiddleBuilder.createNaryOp(
9137 VPInstruction::ExtractFromEnd, {FOR->getBackedgeValue(), TwoVPV}, {},
9138 "vector.recur.extract.for.phi");
9139 ExitIRI->setOperand(0, PenultimateElement);
9140 ExitUsersToFix.remove(ExitIRI);
9141 }
9142 }
9143}
9144
9146LoopVectorizationPlanner::tryToBuildVPlanWithVPRecipes(VFRange &Range) {
9147
9149
9150 // ---------------------------------------------------------------------------
9151 // Build initial VPlan: Scan the body of the loop in a topological order to
9152 // visit each basic block after having visited its predecessor basic blocks.
9153 // ---------------------------------------------------------------------------
9154
9155 // Create initial VPlan skeleton, having a basic block for the pre-header
9156 // which contains SCEV expansions that need to happen before the CFG is
9157 // modified; a basic block for the vector pre-header, followed by a region for
9158 // the vector loop, followed by the middle basic block. The skeleton vector
9159 // loop region contains a header and latch basic blocks.
9160
9161 bool RequiresScalarEpilogueCheck =
9163 [this](ElementCount VF) {
9164 return !CM.requiresScalarEpilogue(VF.isVector());
9165 },
9166 Range);
9168 PSE, RequiresScalarEpilogueCheck,
9169 CM.foldTailByMasking(), OrigLoop);
9170
9171 // Don't use getDecisionAndClampRange here, because we don't know the UF
9172 // so this function is better to be conservative, rather than to split
9173 // it up into different VPlans.
9174 // TODO: Consider using getDecisionAndClampRange here to split up VPlans.
9175 bool IVUpdateMayOverflow = false;
9176 for (ElementCount VF : Range)
9177 IVUpdateMayOverflow |= !isIndvarOverflowCheckKnownFalse(&CM, VF);
9178
9180 TailFoldingStyle Style = CM.getTailFoldingStyle(IVUpdateMayOverflow);
9181 // Use NUW for the induction increment if we proved that it won't overflow in
9182 // the vector loop or when not folding the tail. In the later case, we know
9183 // that the canonical induction increment will not overflow as the vector trip
9184 // count is >= increment and a multiple of the increment.
9185 bool HasNUW = !IVUpdateMayOverflow || Style == TailFoldingStyle::None;
9186 addCanonicalIVRecipes(*Plan, Legal->getWidestInductionType(), HasNUW, DL);
9187
9188 VPRecipeBuilder RecipeBuilder(*Plan, OrigLoop, TLI, Legal, CM, PSE, Builder);
9189
9190 // ---------------------------------------------------------------------------
9191 // Pre-construction: record ingredients whose recipes we'll need to further
9192 // process after constructing the initial VPlan.
9193 // ---------------------------------------------------------------------------
9194
9195 // For each interleave group which is relevant for this (possibly trimmed)
9196 // Range, add it to the set of groups to be later applied to the VPlan and add
9197 // placeholders for its members' Recipes which we'll be replacing with a
9198 // single VPInterleaveRecipe.
9200 auto ApplyIG = [IG, this](ElementCount VF) -> bool {
9201 bool Result = (VF.isVector() && // Query is illegal for VF == 1
9202 CM.getWideningDecision(IG->getInsertPos(), VF) ==
9204 // For scalable vectors, the only interleave factor currently supported
9205 // is 2 since we require the (de)interleave2 intrinsics instead of
9206 // shufflevectors.
9207 assert((!Result || !VF.isScalable() || IG->getFactor() == 2) &&
9208 "Unsupported interleave factor for scalable vectors");
9209 return Result;
9210 };
9211 if (!getDecisionAndClampRange(ApplyIG, Range))
9212 continue;
9213 InterleaveGroups.insert(IG);
9214 }
9215
9216 // ---------------------------------------------------------------------------
9217 // Construct recipes for the instructions in the loop
9218 // ---------------------------------------------------------------------------
9219
9220 // Scan the body of the loop in a topological order to visit each basic block
9221 // after having visited its predecessor basic blocks.
9222 LoopBlocksDFS DFS(OrigLoop);
9223 DFS.perform(LI);
9224
9225 VPBasicBlock *HeaderVPBB = Plan->getVectorLoopRegion()->getEntryBasicBlock();
9226 VPBasicBlock *VPBB = HeaderVPBB;
9227 BasicBlock *HeaderBB = OrigLoop->getHeader();
9228 bool NeedsMasks =
9229 CM.foldTailByMasking() ||
9230 any_of(OrigLoop->blocks(), [this, HeaderBB](BasicBlock *BB) {
9231 bool NeedsBlends = BB != HeaderBB && !BB->phis().empty();
9232 return Legal->blockNeedsPredication(BB) || NeedsBlends;
9233 });
9234 auto *MiddleVPBB = Plan->getMiddleBlock();
9235 VPBasicBlock::iterator MBIP = MiddleVPBB->getFirstNonPhi();
9236 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO())) {
9237 // Relevant instructions from basic block BB will be grouped into VPRecipe
9238 // ingredients and fill a new VPBasicBlock.
9239 if (VPBB != HeaderVPBB)
9240 VPBB->setName(BB->getName());
9241 Builder.setInsertPoint(VPBB);
9242
9243 if (VPBB == HeaderVPBB)
9244 RecipeBuilder.createHeaderMask();
9245 else if (NeedsMasks)
9246 RecipeBuilder.createBlockInMask(BB);
9247
9248 // Introduce each ingredient into VPlan.
9249 // TODO: Model and preserve debug intrinsics in VPlan.
9250 for (Instruction &I : drop_end(BB->instructionsWithoutDebug(false))) {
9251 Instruction *Instr = &I;
9253 auto *Phi = dyn_cast<PHINode>(Instr);
9254 if (Phi && Phi->getParent() == HeaderBB) {
9255 Operands.push_back(Plan->getOrAddLiveIn(
9256 Phi->getIncomingValueForBlock(OrigLoop->getLoopPreheader())));
9257 } else {
9258 auto OpRange = RecipeBuilder.mapToVPValues(Instr->operands());
9259 Operands = {OpRange.begin(), OpRange.end()};
9260 }
9261
9262 // The stores with invariant address inside the loop will be deleted, and
9263 // in the exit block, a uniform store recipe will be created for the final
9264 // invariant store of the reduction.
9265 StoreInst *SI;
9266 if ((SI = dyn_cast<StoreInst>(&I)) &&
9267 Legal->isInvariantAddressOfReduction(SI->getPointerOperand())) {
9268 // Only create recipe for the final invariant store of the reduction.
9269 if (!Legal->isInvariantStoreOfReduction(SI))
9270 continue;
9271 auto *Recipe = new VPReplicateRecipe(
9272 SI, RecipeBuilder.mapToVPValues(Instr->operands()),
9273 true /* IsUniform */);
9274 Recipe->insertBefore(*MiddleVPBB, MBIP);
9275 continue;
9276 }
9277
9278 VPRecipeBase *Recipe =
9279 RecipeBuilder.tryToCreateWidenRecipe(Instr, Operands, Range, VPBB);
9280 if (!Recipe)
9281 Recipe = RecipeBuilder.handleReplication(Instr, Range);
9282
9283 RecipeBuilder.setRecipe(Instr, Recipe);
9284 if (isa<VPHeaderPHIRecipe>(Recipe)) {
9285 // VPHeaderPHIRecipes must be kept in the phi section of HeaderVPBB. In
9286 // the following cases, VPHeaderPHIRecipes may be created after non-phi
9287 // recipes and need to be moved to the phi section of HeaderVPBB:
9288 // * tail-folding (non-phi recipes computing the header mask are
9289 // introduced earlier than regular header phi recipes, and should appear
9290 // after them)
9291 // * Optimizing truncates to VPWidenIntOrFpInductionRecipe.
9292
9293 assert((HeaderVPBB->getFirstNonPhi() == VPBB->end() ||
9294 CM.foldTailByMasking() || isa<TruncInst>(Instr)) &&
9295 "unexpected recipe needs moving");
9296 Recipe->insertBefore(*HeaderVPBB, HeaderVPBB->getFirstNonPhi());
9297 } else
9298 VPBB->appendRecipe(Recipe);
9299 }
9300
9301 VPBlockUtils::insertBlockAfter(Plan->createVPBasicBlock(""), VPBB);
9302 VPBB = cast<VPBasicBlock>(VPBB->getSingleSuccessor());
9303 }
9304
9305 // After here, VPBB should not be used.
9306 VPBB = nullptr;
9307
9308 assert(isa<VPRegionBlock>(Plan->getVectorLoopRegion()) &&
9309 !Plan->getVectorLoopRegion()->getEntryBasicBlock()->empty() &&
9310 "entry block must be set to a VPRegionBlock having a non-empty entry "
9311 "VPBasicBlock");
9312 RecipeBuilder.fixHeaderPhis();
9313
9314 if (auto *UncountableExitingBlock =
9317 *Plan, *PSE.getSE(), OrigLoop, UncountableExitingBlock, RecipeBuilder);
9318 }
9319 addScalarResumePhis(RecipeBuilder, *Plan);
9321 OrigLoop, RecipeBuilder, *Plan, Legal->getInductionVars());
9322 addExitUsersForFirstOrderRecurrences(*Plan, ExitUsersToFix);
9323 if (!addUsersInExitBlocks(*Plan, ExitUsersToFix)) {
9325 "Some exit values in loop with uncountable exit not supported yet",
9326 "UncountableEarlyExitLoopsUnsupportedExitValue", ORE, OrigLoop);
9327 return nullptr;
9328 }
9329
9330 // ---------------------------------------------------------------------------
9331 // Transform initial VPlan: Apply previously taken decisions, in order, to
9332 // bring the VPlan to its final state.
9333 // ---------------------------------------------------------------------------
9334
9335 // Adjust the recipes for any inloop reductions.
9336 adjustRecipesForReductions(Plan, RecipeBuilder, Range.Start);
9337
9338 // Interleave memory: for each Interleave Group we marked earlier as relevant
9339 // for this VPlan, replace the Recipes widening its memory instructions with a
9340 // single VPInterleaveRecipe at its insertion point.
9342 *Plan, InterleaveGroups, RecipeBuilder, CM.isScalarEpilogueAllowed());
9343
9344 for (ElementCount VF : Range)
9345 Plan->addVF(VF);
9346 Plan->setName("Initial VPlan");
9347
9348 // Replace VPValues for known constant strides guaranteed by predicate scalar
9349 // evolution.
9350 auto CanUseVersionedStride = [&Plan](VPUser &U, unsigned) {
9351 auto *R = cast<VPRecipeBase>(&U);
9352 return R->getParent()->getParent() ||
9353 R->getParent() ==
9354 Plan->getVectorLoopRegion()->getSinglePredecessor();
9355 };
9356 for (auto [_, Stride] : Legal->getLAI()->getSymbolicStrides()) {
9357 auto *StrideV = cast<SCEVUnknown>(Stride)->getValue();
9358 auto *ScevStride = dyn_cast<SCEVConstant>(PSE.getSCEV(StrideV));
9359 // Only handle constant strides for now.
9360 if (!ScevStride)
9361 continue;
9362
9363 auto *CI = Plan->getOrAddLiveIn(
9364 ConstantInt::get(Stride->getType(), ScevStride->getAPInt()));
9365 if (VPValue *StrideVPV = Plan->getLiveIn(StrideV))
9366 StrideVPV->replaceUsesWithIf(CI, CanUseVersionedStride);
9367
9368 // The versioned value may not be used in the loop directly but through a
9369 // sext/zext. Add new live-ins in those cases.
9370 for (Value *U : StrideV->users()) {
9371 if (!isa<SExtInst, ZExtInst>(U))
9372 continue;
9373 VPValue *StrideVPV = Plan->getLiveIn(U);
9374 if (!StrideVPV)
9375 continue;
9376 unsigned BW = U->getType()->getScalarSizeInBits();
9377 APInt C = isa<SExtInst>(U) ? ScevStride->getAPInt().sext(BW)
9378 : ScevStride->getAPInt().zext(BW);
9379 VPValue *CI = Plan->getOrAddLiveIn(ConstantInt::get(U->getType(), C));
9380 StrideVPV->replaceUsesWithIf(CI, CanUseVersionedStride);
9381 }
9382 }
9383
9385 return Legal->blockNeedsPredication(BB);
9386 });
9387
9388 // Sink users of fixed-order recurrence past the recipe defining the previous
9389 // value and introduce FirstOrderRecurrenceSplice VPInstructions.
9391 return nullptr;
9392
9393 if (useActiveLaneMask(Style)) {
9394 // TODO: Move checks to VPlanTransforms::addActiveLaneMask once
9395 // TailFoldingStyle is visible there.
9396 bool ForControlFlow = useActiveLaneMaskForControlFlow(Style);
9397 bool WithoutRuntimeCheck =
9399 VPlanTransforms::addActiveLaneMask(*Plan, ForControlFlow,
9400 WithoutRuntimeCheck);
9401 }
9402 return Plan;
9403}
9404
9405VPlanPtr LoopVectorizationPlanner::buildVPlan(VFRange &Range) {
9406 // Outer loop handling: They may require CFG and instruction level
9407 // transformations before even evaluating whether vectorization is profitable.
9408 // Since we cannot modify the incoming IR, we need to build VPlan upfront in
9409 // the vectorization pipeline.
9410 assert(!OrigLoop->isInnermost());
9411 assert(EnableVPlanNativePath && "VPlan-native path is not enabled.");
9412
9413 // Create new empty VPlan
9414 auto Plan = VPlan::createInitialVPlan(Legal->getWidestInductionType(), PSE,
9415 true, false, OrigLoop);
9416
9417 // Build hierarchical CFG
9418 VPlanHCFGBuilder HCFGBuilder(OrigLoop, LI, *Plan);
9419 HCFGBuilder.buildHierarchicalCFG();
9420
9421 for (ElementCount VF : Range)
9422 Plan->addVF(VF);
9423
9425 Plan,
9426 [this](PHINode *P) { return Legal->getIntOrFpInductionDescriptor(P); },
9427 *PSE.getSE(), *TLI);
9428
9429 // Remove the existing terminator of the exiting block of the top-most region.
9430 // A BranchOnCount will be added instead when adding the canonical IV recipes.
9431 auto *Term =
9432 Plan->getVectorLoopRegion()->getExitingBasicBlock()->getTerminator();
9433 Term->eraseFromParent();
9434
9435 // Tail folding is not supported for outer loops, so the induction increment
9436 // is guaranteed to not wrap.
9437 bool HasNUW = true;
9438 addCanonicalIVRecipes(*Plan, Legal->getWidestInductionType(), HasNUW,
9439 DebugLoc());
9440
9441 // Collect mapping of IR header phis to header phi recipes, to be used in
9442 // addScalarResumePhis.
9443 VPRecipeBuilder RecipeBuilder(*Plan, OrigLoop, TLI, Legal, CM, PSE, Builder);
9444 for (auto &R : Plan->getVectorLoopRegion()->getEntryBasicBlock()->phis()) {
9445 if (isa<VPCanonicalIVPHIRecipe>(&R))
9446 continue;
9447 auto *HeaderR = cast<VPHeaderPHIRecipe>(&R);
9448 RecipeBuilder.setRecipe(HeaderR->getUnderlyingInstr(), HeaderR);
9449 }
9450 addScalarResumePhis(RecipeBuilder, *Plan);
9451
9452 assert(verifyVPlanIsValid(*Plan) && "VPlan is invalid");
9453 return Plan;
9454}
9455
9456// Adjust the recipes for reductions. For in-loop reductions the chain of
9457// instructions leading from the loop exit instr to the phi need to be converted
9458// to reductions, with one operand being vector and the other being the scalar
9459// reduction chain. For other reductions, a select is introduced between the phi
9460// and users outside the vector region when folding the tail.
9461//
9462// A ComputeReductionResult recipe is added to the middle block, also for
9463// in-loop reductions which compute their result in-loop, because generating
9464// the subsequent bc.merge.rdx phi is driven by ComputeReductionResult recipes.
9465//
9466// Adjust AnyOf reductions; replace the reduction phi for the selected value
9467// with a boolean reduction phi node to check if the condition is true in any
9468// iteration. The final value is selected by the final ComputeReductionResult.
9469void LoopVectorizationPlanner::adjustRecipesForReductions(
9470 VPlanPtr &Plan, VPRecipeBuilder &RecipeBuilder, ElementCount MinVF) {
9471 using namespace VPlanPatternMatch;
9472 VPRegionBlock *VectorLoopRegion = Plan->getVectorLoopRegion();
9473 VPBasicBlock *Header = VectorLoopRegion->getEntryBasicBlock();
9474 VPBasicBlock *MiddleVPBB = Plan->getMiddleBlock();
9475 for (VPRecipeBase &R : Header->phis()) {
9476 auto *PhiR = dyn_cast<VPReductionPHIRecipe>(&R);
9477 if (!PhiR || !PhiR->isInLoop() || (MinVF.isScalar() && !PhiR->isOrdered()))
9478 continue;
9479
9480 const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor();
9481 RecurKind Kind = RdxDesc.getRecurrenceKind();
9482 assert(
9485 "AnyOf and FindLast reductions are not allowed for in-loop reductions");
9486
9487 // Collect the chain of "link" recipes for the reduction starting at PhiR.
9489 Worklist.insert(PhiR);
9490 for (unsigned I = 0; I != Worklist.size(); ++I) {
9491 VPSingleDefRecipe *Cur = Worklist[I];
9492 for (VPUser *U : Cur->users()) {
9493 auto *UserRecipe = cast<VPSingleDefRecipe>(U);
9494 if (!UserRecipe->getParent()->getEnclosingLoopRegion()) {
9495 assert((UserRecipe->getParent() == MiddleVPBB ||
9496 UserRecipe->getParent() == Plan->getScalarPreheader()) &&
9497 "U must be either in the loop region, the middle block or the "
9498 "scalar preheader.");
9499 continue;
9500 }
9501 Worklist.insert(UserRecipe);
9502 }
9503 }
9504
9505 // Visit operation "Links" along the reduction chain top-down starting from
9506 // the phi until LoopExitValue. We keep track of the previous item
9507 // (PreviousLink) to tell which of the two operands of a Link will remain
9508 // scalar and which will be reduced. For minmax by select(cmp), Link will be
9509 // the select instructions. Blend recipes of in-loop reduction phi's will
9510 // get folded to their non-phi operand, as the reduction recipe handles the
9511 // condition directly.
9512 VPSingleDefRecipe *PreviousLink = PhiR; // Aka Worklist[0].
9513 for (VPSingleDefRecipe *CurrentLink : Worklist.getArrayRef().drop_front()) {
9514 Instruction *CurrentLinkI = CurrentLink->getUnderlyingInstr();
9515
9516 // Index of the first operand which holds a non-mask vector operand.
9517 unsigned IndexOfFirstOperand;
9518 // Recognize a call to the llvm.fmuladd intrinsic.
9519 bool IsFMulAdd = (Kind == RecurKind::FMulAdd);
9520 VPValue *VecOp;
9521 VPBasicBlock *LinkVPBB = CurrentLink->getParent();
9522 if (IsFMulAdd) {
9523 assert(
9525 "Expected instruction to be a call to the llvm.fmuladd intrinsic");
9526 assert(((MinVF.isScalar() && isa<VPReplicateRecipe>(CurrentLink)) ||
9527 isa<VPWidenIntrinsicRecipe>(CurrentLink)) &&
9528 CurrentLink->getOperand(2) == PreviousLink &&
9529 "expected a call where the previous link is the added operand");
9530
9531 // If the instruction is a call to the llvm.fmuladd intrinsic then we
9532 // need to create an fmul recipe (multiplying the first two operands of
9533 // the fmuladd together) to use as the vector operand for the fadd
9534 // reduction.
9535 VPInstruction *FMulRecipe = new VPInstruction(
9536 Instruction::FMul,
9537 {CurrentLink->getOperand(0), CurrentLink->getOperand(1)},
9538 CurrentLinkI->getFastMathFlags());
9539 LinkVPBB->insert(FMulRecipe, CurrentLink->getIterator());
9540 VecOp = FMulRecipe;
9541 } else {
9542 auto *Blend = dyn_cast<VPBlendRecipe>(CurrentLink);
9543 if (PhiR->isInLoop() && Blend) {
9544 assert(Blend->getNumIncomingValues() == 2 &&
9545 "Blend must have 2 incoming values");
9546 if (Blend->getIncomingValue(0) == PhiR)
9547 Blend->replaceAllUsesWith(Blend->getIncomingValue(1));
9548 else {
9549 assert(Blend->getIncomingValue(1) == PhiR &&
9550 "PhiR must be an operand of the blend");
9551 Blend->replaceAllUsesWith(Blend->getIncomingValue(0));
9552 }
9553 continue;
9554 }
9555
9557 if (isa<VPWidenRecipe>(CurrentLink)) {
9558 assert(isa<CmpInst>(CurrentLinkI) &&
9559 "need to have the compare of the select");
9560 continue;
9561 }
9562 assert(isa<VPWidenSelectRecipe>(CurrentLink) &&
9563 "must be a select recipe");
9564 IndexOfFirstOperand = 1;
9565 } else {
9566 assert((MinVF.isScalar() || isa<VPWidenRecipe>(CurrentLink)) &&
9567 "Expected to replace a VPWidenSC");
9568 IndexOfFirstOperand = 0;
9569 }
9570 // Note that for non-commutable operands (cmp-selects), the semantics of
9571 // the cmp-select are captured in the recurrence kind.
9572 unsigned VecOpId =
9573 CurrentLink->getOperand(IndexOfFirstOperand) == PreviousLink
9574 ? IndexOfFirstOperand + 1
9575 : IndexOfFirstOperand;
9576 VecOp = CurrentLink->getOperand(VecOpId);
9577 assert(VecOp != PreviousLink &&
9578 CurrentLink->getOperand(CurrentLink->getNumOperands() - 1 -
9579 (VecOpId - IndexOfFirstOperand)) ==
9580 PreviousLink &&
9581 "PreviousLink must be the operand other than VecOp");
9582 }
9583
9584 BasicBlock *BB = CurrentLinkI->getParent();
9585 VPValue *CondOp = nullptr;
9587 CondOp = RecipeBuilder.getBlockInMask(BB);
9588
9589 auto *RedRecipe = new VPReductionRecipe(
9590 RdxDesc, CurrentLinkI, PreviousLink, VecOp, CondOp,
9591 CM.useOrderedReductions(RdxDesc), CurrentLinkI->getDebugLoc());
9592 // Append the recipe to the end of the VPBasicBlock because we need to
9593 // ensure that it comes after all of it's inputs, including CondOp.
9594 // Note that this transformation may leave over dead recipes (including
9595 // CurrentLink), which will be cleaned by a later VPlan transform.
9596 LinkVPBB->appendRecipe(RedRecipe);
9597 CurrentLink->replaceAllUsesWith(RedRecipe);
9598 PreviousLink = RedRecipe;
9599 }
9600 }
9601 VPBasicBlock *LatchVPBB = VectorLoopRegion->getExitingBasicBlock();
9602 Builder.setInsertPoint(&*LatchVPBB->begin());
9603 VPBasicBlock::iterator IP = MiddleVPBB->getFirstNonPhi();
9604 for (VPRecipeBase &R :
9605 Plan->getVectorLoopRegion()->getEntryBasicBlock()->phis()) {
9606 VPReductionPHIRecipe *PhiR = dyn_cast<VPReductionPHIRecipe>(&R);
9607 if (!PhiR)
9608 continue;
9609
9610 const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor();
9611 // If tail is folded by masking, introduce selects between the phi
9612 // and the users outside the vector region of each reduction, at the
9613 // beginning of the dedicated latch block.
9614 auto *OrigExitingVPV = PhiR->getBackedgeValue();
9615 auto *NewExitingVPV = PhiR->getBackedgeValue();
9616 if (!PhiR->isInLoop() && CM.foldTailByMasking()) {
9617 VPValue *Cond = RecipeBuilder.getBlockInMask(OrigLoop->getHeader());
9618 assert(OrigExitingVPV->getDefiningRecipe()->getParent() != LatchVPBB &&
9619 "reduction recipe must be defined before latch");
9620 Type *PhiTy = PhiR->getOperand(0)->getLiveInIRValue()->getType();
9621 std::optional<FastMathFlags> FMFs =
9622 PhiTy->isFloatingPointTy()
9623 ? std::make_optional(RdxDesc.getFastMathFlags())
9624 : std::nullopt;
9625 NewExitingVPV =
9626 Builder.createSelect(Cond, OrigExitingVPV, PhiR, {}, "", FMFs);
9627 OrigExitingVPV->replaceUsesWithIf(NewExitingVPV, [](VPUser &U, unsigned) {
9628 return isa<VPInstruction>(&U) &&
9629 cast<VPInstruction>(&U)->getOpcode() ==
9631 });
9633 PhiR->getRecurrenceDescriptor().getOpcode(), PhiTy))
9634 PhiR->setOperand(1, NewExitingVPV);
9635 }
9636
9637 // If the vector reduction can be performed in a smaller type, we truncate
9638 // then extend the loop exit value to enable InstCombine to evaluate the
9639 // entire expression in the smaller type.
9640 Type *PhiTy = PhiR->getStartValue()->getLiveInIRValue()->getType();
9641 if (MinVF.isVector() && PhiTy != RdxDesc.getRecurrenceType() &&
9643 RdxDesc.getRecurrenceKind())) {
9644 assert(!PhiR->isInLoop() && "Unexpected truncated inloop reduction!");
9645 Type *RdxTy = RdxDesc.getRecurrenceType();
9646 auto *Trunc =
9647 new VPWidenCastRecipe(Instruction::Trunc, NewExitingVPV, RdxTy);
9648 auto *Extnd =
9649 RdxDesc.isSigned()
9650 ? new VPWidenCastRecipe(Instruction::SExt, Trunc, PhiTy)
9651 : new VPWidenCastRecipe(Instruction::ZExt, Trunc, PhiTy);
9652
9653 Trunc->insertAfter(NewExitingVPV->getDefiningRecipe());
9654 Extnd->insertAfter(Trunc);
9655 if (PhiR->getOperand(1) == NewExitingVPV)
9656 PhiR->setOperand(1, Extnd->getVPSingleValue());
9657 NewExitingVPV = Extnd;
9658 }
9659
9660 // We want code in the middle block to appear to execute on the location of
9661 // the scalar loop's latch terminator because: (a) it is all compiler
9662 // generated, (b) these instructions are always executed after evaluating
9663 // the latch conditional branch, and (c) other passes may add new
9664 // predecessors which terminate on this line. This is the easiest way to
9665 // ensure we don't accidentally cause an extra step back into the loop while
9666 // debugging.
9667 DebugLoc ExitDL = OrigLoop->getLoopLatch()->getTerminator()->getDebugLoc();
9668
9669 // TODO: At the moment ComputeReductionResult also drives creation of the
9670 // bc.merge.rdx phi nodes, hence it needs to be created unconditionally here
9671 // even for in-loop reductions, until the reduction resume value handling is
9672 // also modeled in VPlan.
9673 auto *FinalReductionResult = new VPInstruction(
9674 VPInstruction::ComputeReductionResult, {PhiR, NewExitingVPV}, ExitDL);
9675 // Update all users outside the vector region.
9676 OrigExitingVPV->replaceUsesWithIf(
9677 FinalReductionResult, [](VPUser &User, unsigned) {
9678 auto *Parent = cast<VPRecipeBase>(&User)->getParent();
9679 return Parent && !Parent->getParent();
9680 });
9681 FinalReductionResult->insertBefore(*MiddleVPBB, IP);
9682
9683 // Adjust AnyOf reductions; replace the reduction phi for the selected value
9684 // with a boolean reduction phi node to check if the condition is true in
9685 // any iteration. The final value is selected by the final
9686 // ComputeReductionResult.
9688 RdxDesc.getRecurrenceKind())) {
9689 auto *Select = cast<VPRecipeBase>(*find_if(PhiR->users(), [](VPUser *U) {
9690 return isa<VPWidenSelectRecipe>(U) ||
9691 (isa<VPReplicateRecipe>(U) &&
9692 cast<VPReplicateRecipe>(U)->getUnderlyingInstr()->getOpcode() ==
9693 Instruction::Select);
9694 }));
9695 VPValue *Cmp = Select->getOperand(0);
9696 // If the compare is checking the reduction PHI node, adjust it to check
9697 // the start value.
9698 if (VPRecipeBase *CmpR = Cmp->getDefiningRecipe()) {
9699 for (unsigned I = 0; I != CmpR->getNumOperands(); ++I)
9700 if (CmpR->getOperand(I) == PhiR)
9701 CmpR->setOperand(I, PhiR->getStartValue());
9702 }
9703 VPBuilder::InsertPointGuard Guard(Builder);
9704 Builder.setInsertPoint(Select);
9705
9706 // If the true value of the select is the reduction phi, the new value is
9707 // selected if the negated condition is true in any iteration.
9708 if (Select->getOperand(1) == PhiR)
9709 Cmp = Builder.createNot(Cmp);
9710 VPValue *Or = Builder.createOr(PhiR, Cmp);
9711 Select->getVPSingleValue()->replaceAllUsesWith(Or);
9712
9713 // Convert the reduction phi to operate on bools.
9714 PhiR->setOperand(0, Plan->getOrAddLiveIn(ConstantInt::getFalse(
9715 OrigLoop->getHeader()->getContext())));
9716 continue;
9717 }
9718
9720 RdxDesc.getRecurrenceKind())) {
9721 // Adjust the start value for FindLastIV recurrences to use the sentinel
9722 // value after generating the ResumePhi recipe, which uses the original
9723 // start value.
9724 PhiR->setOperand(0, Plan->getOrAddLiveIn(RdxDesc.getSentinelValue()));
9725 }
9726 }
9727
9729}
9730
9732 assert(!State.Lane && "VPDerivedIVRecipe being replicated.");
9733
9734 // Fast-math-flags propagate from the original induction instruction.
9736 if (FPBinOp)
9737 State.Builder.setFastMathFlags(FPBinOp->getFastMathFlags());
9738
9739 Value *Step = State.get(getStepValue(), VPLane(0));
9740 Value *Index = State.get(getOperand(1), VPLane(0));
9741 Value *DerivedIV = emitTransformedIndex(
9742 State.Builder, Index, getStartValue()->getLiveInIRValue(), Step, Kind,
9743 cast_if_present<BinaryOperator>(FPBinOp));
9744 DerivedIV->setName(Name);
9745 // If index is the vector trip count, the concrete value will only be set in
9746 // prepareToExecute, leading to missed simplifications, e.g. if it is 0.
9747 // TODO: Remove the special case for the vector trip count once it is computed
9748 // in VPlan and can be used during VPlan simplification.
9749 assert((DerivedIV != Index ||
9750 getOperand(1) == &getParent()->getPlan()->getVectorTripCount()) &&
9751 "IV didn't need transforming?");
9752 State.set(this, DerivedIV, VPLane(0));
9753}
9754
9757 if (State.Lane) { // Generate a single instance.
9758 assert((State.VF.isScalar() || !isUniform()) &&
9759 "uniform recipe shouldn't be predicated");
9760 assert(!State.VF.isScalable() && "Can't scalarize a scalable vector");
9761 State.ILV->scalarizeInstruction(UI, this, *State.Lane, State);
9762 // Insert scalar instance packing it into a vector.
9763 if (State.VF.isVector() && shouldPack()) {
9764 // If we're constructing lane 0, initialize to start from poison.
9765 if (State.Lane->isFirstLane()) {
9766 assert(!State.VF.isScalable() && "VF is assumed to be non scalable.");
9768 VectorType::get(UI->getType(), State.VF));
9769 State.set(this, Poison);
9770 }
9771 State.packScalarIntoVectorValue(this, *State.Lane);
9772 }
9773 return;
9774 }
9775
9776 if (IsUniform) {
9777 // Uniform within VL means we need to generate lane 0.
9778 State.ILV->scalarizeInstruction(UI, this, VPLane(0), State);
9779 return;
9780 }
9781
9782 // A store of a loop varying value to a uniform address only needs the last
9783 // copy of the store.
9784 if (isa<StoreInst>(UI) &&
9786 auto Lane = VPLane::getLastLaneForVF(State.VF);
9787 State.ILV->scalarizeInstruction(UI, this, VPLane(Lane), State);
9788 return;
9789 }
9790
9791 // Generate scalar instances for all VF lanes.
9792 assert(!State.VF.isScalable() && "Can't scalarize a scalable vector");
9793 const unsigned EndLane = State.VF.getKnownMinValue();
9794 for (unsigned Lane = 0; Lane < EndLane; ++Lane)
9795 State.ILV->scalarizeInstruction(UI, this, VPLane(Lane), State);
9796}
9797
9798// Determine how to lower the scalar epilogue, which depends on 1) optimising
9799// for minimum code-size, 2) predicate compiler options, 3) loop hints forcing
9800// predication, and 4) a TTI hook that analyses whether the loop is suitable
9801// for predication.
9806 // 1) OptSize takes precedence over all other options, i.e. if this is set,
9807 // don't look at hints or options, and don't request a scalar epilogue.
9808 // (For PGSO, as shouldOptimizeForSize isn't currently accessible from
9809 // LoopAccessInfo (due to code dependency and not being able to reliably get
9810 // PSI/BFI from a loop analysis under NPM), we cannot suppress the collection
9811 // of strides in LoopAccessInfo::analyzeLoop() and vectorize without
9812 // versioning when the vectorization is forced, unlike hasOptSize. So revert
9813 // back to the old way and vectorize with versioning when forced. See D81345.)
9814 if (F->hasOptSize() || (llvm::shouldOptimizeForSize(L->getHeader(), PSI, BFI,
9818
9819 // 2) If set, obey the directives
9820 if (PreferPredicateOverEpilogue.getNumOccurrences()) {
9828 };
9829 }
9830
9831 // 3) If set, obey the hints
9832 switch (Hints.getPredicate()) {
9837 };
9838
9839 // 4) if the TTI hook indicates this is profitable, request predication.
9840 TailFoldingInfo TFI(TLI, &LVL, IAI);
9843
9845}
9846
9847// Process the loop in the VPlan-native vectorization path. This path builds
9848// VPlan upfront in the vectorization pipeline, which allows to apply
9849// VPlan-to-VPlan transformations from the very beginning without modifying the
9850// input LLVM IR.
9857 LoopVectorizationRequirements &Requirements) {
9858
9859 if (isa<SCEVCouldNotCompute>(PSE.getBackedgeTakenCount())) {
9860 LLVM_DEBUG(dbgs() << "LV: cannot compute the outer-loop trip count\n");
9861 return false;
9862 }
9863 assert(EnableVPlanNativePath && "VPlan-native path is disabled.");
9864 Function *F = L->getHeader()->getParent();
9865 InterleavedAccessInfo IAI(PSE, L, DT, LI, LVL->getLAI());
9866
9868 getScalarEpilogueLowering(F, L, Hints, PSI, BFI, TTI, TLI, *LVL, &IAI);
9869
9870 LoopVectorizationCostModel CM(SEL, L, PSE, LI, LVL, *TTI, TLI, DB, AC, ORE, F,
9871 &Hints, IAI);
9872 // Use the planner for outer loop vectorization.
9873 // TODO: CM is not used at this point inside the planner. Turn CM into an
9874 // optional argument if we don't need it in the future.
9875 LoopVectorizationPlanner LVP(L, LI, DT, TLI, *TTI, LVL, CM, IAI, PSE, Hints,
9876 ORE);
9877
9878 // Get user vectorization factor.
9879 ElementCount UserVF = Hints.getWidth();
9880
9882
9883 // Plan how to best vectorize, return the best VF and its cost.
9884 const VectorizationFactor VF = LVP.planInVPlanNativePath(UserVF);
9885
9886 // If we are stress testing VPlan builds, do not attempt to generate vector
9887 // code. Masked vector code generation support will follow soon.
9888 // Also, do not attempt to vectorize if no vector code will be produced.
9890 return false;
9891
9892 VPlan &BestPlan = LVP.getPlanFor(VF.Width);
9893
9894 {
9895 bool AddBranchWeights =
9896 hasBranchWeightMD(*L->getLoopLatch()->getTerminator());
9897 GeneratedRTChecks Checks(PSE, DT, LI, TTI, F->getDataLayout(),
9898 AddBranchWeights);
9899 InnerLoopVectorizer LB(L, PSE, LI, DT, TLI, TTI, AC, ORE, VF.Width,
9900 VF.Width, 1, LVL, &CM, BFI, PSI, Checks, BestPlan);
9901 LLVM_DEBUG(dbgs() << "Vectorizing outer loop in \""
9902 << L->getHeader()->getParent()->getName() << "\"\n");
9903 LVP.executePlan(VF.Width, 1, BestPlan, LB, DT, false);
9904 }
9905
9906 reportVectorization(ORE, L, VF, 1);
9907
9908 // Mark the loop as already vectorized to avoid vectorizing again.
9909 Hints.setAlreadyVectorized();
9910 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs()));
9911 return true;
9912}
9913
9914// Emit a remark if there are stores to floats that required a floating point
9915// extension. If the vectorized loop was generated with floating point there
9916// will be a performance penalty from the conversion overhead and the change in
9917// the vector width.
9920 for (BasicBlock *BB : L->getBlocks()) {
9921 for (Instruction &Inst : *BB) {
9922 if (auto *S = dyn_cast<StoreInst>(&Inst)) {
9923 if (S->getValueOperand()->getType()->isFloatTy())
9924 Worklist.push_back(S);
9925 }
9926 }
9927 }
9928
9929 // Traverse the floating point stores upwards searching, for floating point
9930 // conversions.
9933 while (!Worklist.empty()) {
9934 auto *I = Worklist.pop_back_val();
9935 if (!L->contains(I))
9936 continue;
9937 if (!Visited.insert(I).second)
9938 continue;
9939
9940 // Emit a remark if the floating point store required a floating
9941 // point conversion.
9942 // TODO: More work could be done to identify the root cause such as a
9943 // constant or a function return type and point the user to it.
9944 if (isa<FPExtInst>(I) && EmittedRemark.insert(I).second)
9945 ORE->emit([&]() {
9946 return OptimizationRemarkAnalysis(LV_NAME, "VectorMixedPrecision",
9947 I->getDebugLoc(), L->getHeader())
9948 << "floating point conversion changes vector width. "
9949 << "Mixed floating point precision requires an up/down "
9950 << "cast that will negatively impact performance.";
9951 });
9952
9953 for (Use &Op : I->operands())
9954 if (auto *OpI = dyn_cast<Instruction>(Op))
9955 Worklist.push_back(OpI);
9956 }
9957}
9958
9959static bool areRuntimeChecksProfitable(GeneratedRTChecks &Checks,
9960 VectorizationFactor &VF, Loop *L,
9961 const TargetTransformInfo &TTI,
9964 InstructionCost CheckCost = Checks.getCost();
9965 if (!CheckCost.isValid())
9966 return false;
9967
9968 // When interleaving only scalar and vector cost will be equal, which in turn
9969 // would lead to a divide by 0. Fall back to hard threshold.
9970 if (VF.Width.isScalar()) {
9971 if (CheckCost > VectorizeMemoryCheckThreshold) {
9972 LLVM_DEBUG(
9973 dbgs()
9974 << "LV: Interleaving only is not profitable due to runtime checks\n");
9975 return false;
9976 }
9977 return true;
9978 }
9979
9980 // The scalar cost should only be 0 when vectorizing with a user specified VF/IC. In those cases, runtime checks should always be generated.
9981 uint64_t ScalarC = *VF.ScalarCost.getValue();
9982 if (ScalarC == 0)
9983 return true;
9984
9985 // First, compute the minimum iteration count required so that the vector
9986 // loop outperforms the scalar loop.
9987 // The total cost of the scalar loop is
9988 // ScalarC * TC
9989 // where
9990 // * TC is the actual trip count of the loop.
9991 // * ScalarC is the cost of a single scalar iteration.
9992 //
9993 // The total cost of the vector loop is
9994 // RtC + VecC * (TC / VF) + EpiC
9995 // where
9996 // * RtC is the cost of the generated runtime checks
9997 // * VecC is the cost of a single vector iteration.
9998 // * TC is the actual trip count of the loop
9999 // * VF is the vectorization factor
10000 // * EpiCost is the cost of the generated epilogue, including the cost
10001 // of the remaining scalar operations.
10002 //
10003 // Vectorization is profitable once the total vector cost is less than the
10004 // total scalar cost:
10005 // RtC + VecC * (TC / VF) + EpiC < ScalarC * TC
10006 //
10007 // Now we can compute the minimum required trip count TC as
10008 // VF * (RtC + EpiC) / (ScalarC * VF - VecC) < TC
10009 //
10010 // For now we assume the epilogue cost EpiC = 0 for simplicity. Note that
10011 // the computations are performed on doubles, not integers and the result
10012 // is rounded up, hence we get an upper estimate of the TC.
10013 unsigned IntVF = getEstimatedRuntimeVF(L, TTI, VF.Width);
10014 uint64_t RtC = *CheckCost.getValue();
10015 uint64_t Div = ScalarC * IntVF - *VF.Cost.getValue();
10016 uint64_t MinTC1 = Div == 0 ? 0 : divideCeil(RtC * IntVF, Div);
10017
10018 // Second, compute a minimum iteration count so that the cost of the
10019 // runtime checks is only a fraction of the total scalar loop cost. This
10020 // adds a loop-dependent bound on the overhead incurred if the runtime
10021 // checks fail. In case the runtime checks fail, the cost is RtC + ScalarC
10022 // * TC. To bound the runtime check to be a fraction 1/X of the scalar
10023 // cost, compute
10024 // RtC < ScalarC * TC * (1 / X) ==> RtC * X / ScalarC < TC
10025 uint64_t MinTC2 = divideCeil(RtC * 10, ScalarC);
10026
10027 // Now pick the larger minimum. If it is not a multiple of VF and a scalar
10028 // epilogue is allowed, choose the next closest multiple of VF. This should
10029 // partly compensate for ignoring the epilogue cost.
10030 uint64_t MinTC = std::max(MinTC1, MinTC2);
10031 if (SEL == CM_ScalarEpilogueAllowed)
10032 MinTC = alignTo(MinTC, IntVF);
10034
10035 LLVM_DEBUG(
10036 dbgs() << "LV: Minimum required TC for runtime checks to be profitable:"
10037 << VF.MinProfitableTripCount << "\n");
10038
10039 // Skip vectorization if the expected trip count is less than the minimum
10040 // required trip count.
10041 if (auto ExpectedTC = getSmallBestKnownTC(PSE, L)) {
10044 LLVM_DEBUG(dbgs() << "LV: Vectorization is not beneficial: expected "
10045 "trip count < minimum profitable VF ("
10046 << *ExpectedTC << " < " << VF.MinProfitableTripCount
10047 << ")\n");
10048
10049 return false;
10050 }
10051 }
10052 return true;
10053}
10054
10056 : InterleaveOnlyWhenForced(Opts.InterleaveOnlyWhenForced ||
10058 VectorizeOnlyWhenForced(Opts.VectorizeOnlyWhenForced ||
10060
10061/// Prepare \p MainPlan for vectorizing the main vector loop during epilogue
10062/// vectorization. Remove ResumePhis from \p MainPlan for inductions that
10063/// don't have a corresponding wide induction in \p EpiPlan.
10064static void preparePlanForMainVectorLoop(VPlan &MainPlan, VPlan &EpiPlan) {
10065 // Collect PHI nodes of widened phis in the VPlan for the epilogue. Those
10066 // will need their resume-values computed in the main vector loop. Others
10067 // can be removed from the main VPlan.
10068 SmallPtrSet<PHINode *, 2> EpiWidenedPhis;
10069 for (VPRecipeBase &R :
10071 if (isa<VPCanonicalIVPHIRecipe>(&R))
10072 continue;
10073 EpiWidenedPhis.insert(
10074 cast<PHINode>(R.getVPSingleValue()->getUnderlyingValue()));
10075 }
10077 *cast<VPIRBasicBlock>(MainPlan.getScalarHeader()))) {
10078 auto *VPIRInst = cast<VPIRInstruction>(&R);
10079 auto *IRI = dyn_cast<PHINode>(&VPIRInst->getInstruction());
10080 if (!IRI)
10081 break;
10082 if (EpiWidenedPhis.contains(IRI))
10083 continue;
10084 // There is no corresponding wide induction in the epilogue plan that would
10085 // need a resume value. Remove the VPIRInst wrapping the scalar header phi
10086 // together with the corresponding ResumePhi. The resume values for the
10087 // scalar loop will be created during execution of EpiPlan.
10088 VPRecipeBase *ResumePhi = VPIRInst->getOperand(0)->getDefiningRecipe();
10089 VPIRInst->eraseFromParent();
10090 ResumePhi->eraseFromParent();
10091 }
10093
10094 using namespace VPlanPatternMatch;
10095 VPBasicBlock *MainScalarPH = MainPlan.getScalarPreheader();
10096 VPValue *VectorTC = &MainPlan.getVectorTripCount();
10097 // If there is a suitable resume value for the canonical induction in the
10098 // scalar (which will become vector) epilogue loop we are done. Otherwise
10099 // create it below.
10100 if (any_of(*MainScalarPH, [VectorTC](VPRecipeBase &R) {
10101 return match(&R, m_VPInstruction<VPInstruction::ResumePhi>(
10102 m_Specific(VectorTC), m_SpecificInt(0)));
10103 }))
10104 return;
10105 VPBuilder ScalarPHBuilder(MainScalarPH, MainScalarPH->begin());
10106 ScalarPHBuilder.createNaryOp(
10108 {VectorTC, MainPlan.getCanonicalIV()->getStartValue()}, {},
10109 "vec.epilog.resume.val");
10110}
10111
10112/// Prepare \p Plan for vectorizing the epilogue loop. That is, re-use expanded
10113/// SCEVs from \p ExpandedSCEVs and set resume values for header recipes.
10114static void
10116 const SCEV2ValueTy &ExpandedSCEVs,
10117 const EpilogueLoopVectorizationInfo &EPI) {
10118 VPRegionBlock *VectorLoop = Plan.getVectorLoopRegion();
10119 VPBasicBlock *Header = VectorLoop->getEntryBasicBlock();
10120 Header->setName("vec.epilog.vector.body");
10121
10122 // Re-use the trip count and steps expanded for the main loop, as
10123 // skeleton creation needs it as a value that dominates both the scalar
10124 // and vector epilogue loops
10125 // TODO: This is a workaround needed for epilogue vectorization and it
10126 // should be removed once induction resume value creation is done
10127 // directly in VPlan.
10128 for (auto &R : make_early_inc_range(*Plan.getEntry())) {
10129 auto *ExpandR = dyn_cast<VPExpandSCEVRecipe>(&R);
10130 if (!ExpandR)
10131 continue;
10132 auto *ExpandedVal =
10133 Plan.getOrAddLiveIn(ExpandedSCEVs.find(ExpandR->getSCEV())->second);
10134 ExpandR->replaceAllUsesWith(ExpandedVal);
10135 if (Plan.getTripCount() == ExpandR)
10136 Plan.resetTripCount(ExpandedVal);
10137 ExpandR->eraseFromParent();
10138 }
10139
10140 // Ensure that the start values for all header phi recipes are updated before
10141 // vectorizing the epilogue loop.
10142 for (VPRecipeBase &R : Header->phis()) {
10143 if (auto *IV = dyn_cast<VPCanonicalIVPHIRecipe>(&R)) {
10144 // When vectorizing the epilogue loop, the canonical induction start
10145 // value needs to be changed from zero to the value after the main
10146 // vector loop. Find the resume value created during execution of the main
10147 // VPlan.
10148 // FIXME: Improve modeling for canonical IV start values in the epilogue
10149 // loop.
10150 BasicBlock *MainMiddle = find_singleton<BasicBlock>(
10151 predecessors(L->getLoopPreheader()),
10152 [&EPI](BasicBlock *BB, bool) -> BasicBlock * {
10153 if (BB != EPI.MainLoopIterationCountCheck &&
10154 BB != EPI.EpilogueIterationCountCheck &&
10155 BB != EPI.SCEVSafetyCheck && BB != EPI.MemSafetyCheck)
10156 return BB;
10157 return nullptr;
10158 });
10159 using namespace llvm::PatternMatch;
10160 Type *IdxTy = IV->getScalarType();
10161 PHINode *EPResumeVal = find_singleton<PHINode>(
10162 L->getLoopPreheader()->phis(),
10163 [&EPI, IdxTy, MainMiddle](PHINode &P, bool) -> PHINode * {
10164 if (P.getType() == IdxTy &&
10165 P.getIncomingValueForBlock(MainMiddle) == EPI.VectorTripCount &&
10166 match(
10167 P.getIncomingValueForBlock(EPI.MainLoopIterationCountCheck),
10168 m_SpecificInt(0)))
10169 return &P;
10170 return nullptr;
10171 });
10172 assert(EPResumeVal && "must have a resume value for the canonical IV");
10173 VPValue *VPV = Plan.getOrAddLiveIn(EPResumeVal);
10174 assert(all_of(IV->users(),
10175 [](const VPUser *U) {
10176 return isa<VPScalarIVStepsRecipe>(U) ||
10177 isa<VPScalarCastRecipe>(U) ||
10178 isa<VPDerivedIVRecipe>(U) ||
10179 cast<VPInstruction>(U)->getOpcode() ==
10180 Instruction::Add;
10181 }) &&
10182 "the canonical IV should only be used by its increment or "
10183 "ScalarIVSteps when resetting the start value");
10184 IV->setOperand(0, VPV);
10185 continue;
10186 }
10187
10188 Value *ResumeV = nullptr;
10189 // TODO: Move setting of resume values to prepareToExecute.
10190 if (auto *ReductionPhi = dyn_cast<VPReductionPHIRecipe>(&R)) {
10191 ResumeV = cast<PHINode>(ReductionPhi->getUnderlyingInstr())
10192 ->getIncomingValueForBlock(L->getLoopPreheader());
10193 const RecurrenceDescriptor &RdxDesc =
10194 ReductionPhi->getRecurrenceDescriptor();
10195 RecurKind RK = RdxDesc.getRecurrenceKind();
10197 // VPReductionPHIRecipes for AnyOf reductions expect a boolean as
10198 // start value; compare the final value from the main vector loop
10199 // to the start value.
10200 IRBuilder<> Builder(
10201 cast<Instruction>(ResumeV)->getParent()->getFirstNonPHI());
10202 ResumeV =
10203 Builder.CreateICmpNE(ResumeV, RdxDesc.getRecurrenceStartValue());
10204 }
10205 } else {
10206 // Retrieve the induction resume values for wide inductions from
10207 // their original phi nodes in the scalar loop.
10208 PHINode *IndPhi = cast<VPWidenInductionRecipe>(&R)->getPHINode();
10209 // Hook up to the PHINode generated by a ResumePhi recipe of main
10210 // loop VPlan, which feeds the scalar loop.
10211 ResumeV = IndPhi->getIncomingValueForBlock(L->getLoopPreheader());
10212 }
10213 assert(ResumeV && "Must have a resume value");
10214 VPValue *StartVal = Plan.getOrAddLiveIn(ResumeV);
10215 cast<VPHeaderPHIRecipe>(&R)->setStartValue(StartVal);
10216 }
10217}
10218
10220 assert((EnableVPlanNativePath || L->isInnermost()) &&
10221 "VPlan-native path is not enabled. Only process inner loops.");
10222
10223 LLVM_DEBUG(dbgs() << "\nLV: Checking a loop in '"
10224 << L->getHeader()->getParent()->getName() << "' from "
10225 << L->getLocStr() << "\n");
10226
10227 LoopVectorizeHints Hints(L, InterleaveOnlyWhenForced, *ORE, TTI);
10228
10229 LLVM_DEBUG(
10230 dbgs() << "LV: Loop hints:"
10231 << " force="
10233 ? "disabled"
10235 ? "enabled"
10236 : "?"))
10237 << " width=" << Hints.getWidth()
10238 << " interleave=" << Hints.getInterleave() << "\n");
10239
10240 // Function containing loop
10241 Function *F = L->getHeader()->getParent();
10242
10243 // Looking at the diagnostic output is the only way to determine if a loop
10244 // was vectorized (other than looking at the IR or machine code), so it
10245 // is important to generate an optimization remark for each loop. Most of
10246 // these messages are generated as OptimizationRemarkAnalysis. Remarks
10247 // generated as OptimizationRemark and OptimizationRemarkMissed are
10248 // less verbose reporting vectorized loops and unvectorized loops that may
10249 // benefit from vectorization, respectively.
10250
10251 if (!Hints.allowVectorization(F, L, VectorizeOnlyWhenForced)) {
10252 LLVM_DEBUG(dbgs() << "LV: Loop hints prevent vectorization.\n");
10253 return false;
10254 }
10255
10256 PredicatedScalarEvolution PSE(*SE, *L);
10257
10258 // Check if it is legal to vectorize the loop.
10259 LoopVectorizationRequirements Requirements;
10260 LoopVectorizationLegality LVL(L, PSE, DT, TTI, TLI, F, *LAIs, LI, ORE,
10261 &Requirements, &Hints, DB, AC, BFI, PSI);
10263 LLVM_DEBUG(dbgs() << "LV: Not vectorizing: Cannot prove legality.\n");
10264 Hints.emitRemarkWithHints();
10265 return false;
10266 }
10267
10269 reportVectorizationFailure("Auto-vectorization of loops with uncountable "
10270 "early exit is not enabled",
10271 "UncountableEarlyExitLoopsDisabled", ORE, L);
10272 return false;
10273 }
10274
10275 // Entrance to the VPlan-native vectorization path. Outer loops are processed
10276 // here. They may require CFG and instruction level transformations before
10277 // even evaluating whether vectorization is profitable. Since we cannot modify
10278 // the incoming IR, we need to build VPlan upfront in the vectorization
10279 // pipeline.
10280 if (!L->isInnermost())
10281 return processLoopInVPlanNativePath(L, PSE, LI, DT, &LVL, TTI, TLI, DB, AC,
10282 ORE, BFI, PSI, Hints, Requirements);
10283
10284 assert(L->isInnermost() && "Inner loop expected.");
10285
10286 InterleavedAccessInfo IAI(PSE, L, DT, LI, LVL.getLAI());
10287 bool UseInterleaved = TTI->enableInterleavedAccessVectorization();
10288
10289 // If an override option has been passed in for interleaved accesses, use it.
10290 if (EnableInterleavedMemAccesses.getNumOccurrences() > 0)
10291 UseInterleaved = EnableInterleavedMemAccesses;
10292
10293 // Analyze interleaved memory accesses.
10294 if (UseInterleaved)
10296
10297 if (LVL.hasUncountableEarlyExit()) {
10298 BasicBlock *LoopLatch = L->getLoopLatch();
10299 if (IAI.requiresScalarEpilogue() ||
10301 [LoopLatch](BasicBlock *BB) { return BB != LoopLatch; })) {
10302 reportVectorizationFailure("Auto-vectorization of early exit loops "
10303 "requiring a scalar epilogue is unsupported",
10304 "UncountableEarlyExitUnsupported", ORE, L);
10305 return false;
10306 }
10307 }
10308
10309 // Check the function attributes and profiles to find out if this function
10310 // should be optimized for size.
10312 getScalarEpilogueLowering(F, L, Hints, PSI, BFI, TTI, TLI, LVL, &IAI);
10313
10314 // Check the loop for a trip count threshold: vectorize loops with a tiny trip
10315 // count by optimizing for size, to minimize overheads.
10316 auto ExpectedTC = getSmallBestKnownTC(PSE, L);
10317 if (ExpectedTC && *ExpectedTC < TinyTripCountVectorThreshold) {
10318 LLVM_DEBUG(dbgs() << "LV: Found a loop with a very small trip count. "
10319 << "This loop is worth vectorizing only if no scalar "
10320 << "iteration overheads are incurred.");
10322 LLVM_DEBUG(dbgs() << " But vectorizing was explicitly forced.\n");
10323 else {
10324 if (*ExpectedTC > TTI->getMinTripCountTailFoldingThreshold()) {
10325 LLVM_DEBUG(dbgs() << "\n");
10326 // Predicate tail-folded loops are efficient even when the loop
10327 // iteration count is low. However, setting the epilogue policy to
10328 // `CM_ScalarEpilogueNotAllowedLowTripLoop` prevents vectorizing loops
10329 // with runtime checks. It's more effective to let
10330 // `areRuntimeChecksProfitable` determine if vectorization is beneficial
10331 // for the loop.
10334 } else {
10335 LLVM_DEBUG(dbgs() << " But the target considers the trip count too "
10336 "small to consider vectorizing.\n");
10338 "The trip count is below the minial threshold value.",
10339 "loop trip count is too low, avoiding vectorization",
10340 "LowTripCount", ORE, L);
10341 Hints.emitRemarkWithHints();
10342 return false;
10343 }
10344 }
10345 }
10346
10347 // Check the function attributes to see if implicit floats or vectors are
10348 // allowed.
10349 if (F->hasFnAttribute(Attribute::NoImplicitFloat)) {
10351 "Can't vectorize when the NoImplicitFloat attribute is used",
10352 "loop not vectorized due to NoImplicitFloat attribute",
10353 "NoImplicitFloat", ORE, L);
10354 Hints.emitRemarkWithHints();
10355 return false;
10356 }
10357
10358 // Check if the target supports potentially unsafe FP vectorization.
10359 // FIXME: Add a check for the type of safety issue (denormal, signaling)
10360 // for the target we're vectorizing for, to make sure none of the
10361 // additional fp-math flags can help.
10362 if (Hints.isPotentiallyUnsafe() &&
10365 "Potentially unsafe FP op prevents vectorization",
10366 "loop not vectorized due to unsafe FP support.",
10367 "UnsafeFP", ORE, L);
10368 Hints.emitRemarkWithHints();
10369 return false;
10370 }
10371
10372 bool AllowOrderedReductions;
10373 // If the flag is set, use that instead and override the TTI behaviour.
10374 if (ForceOrderedReductions.getNumOccurrences() > 0)
10375 AllowOrderedReductions = ForceOrderedReductions;
10376 else
10377 AllowOrderedReductions = TTI->enableOrderedReductions();
10378 if (!LVL.canVectorizeFPMath(AllowOrderedReductions)) {
10379 ORE->emit([&]() {
10380 auto *ExactFPMathInst = Requirements.getExactFPInst();
10381 return OptimizationRemarkAnalysisFPCommute(DEBUG_TYPE, "CantReorderFPOps",
10382 ExactFPMathInst->getDebugLoc(),
10383 ExactFPMathInst->getParent())
10384 << "loop not vectorized: cannot prove it is safe to reorder "
10385 "floating-point operations";
10386 });
10387 LLVM_DEBUG(dbgs() << "LV: loop not vectorized: cannot prove it is safe to "
10388 "reorder floating-point operations\n");
10389 Hints.emitRemarkWithHints();
10390 return false;
10391 }
10392
10393 // Use the cost model.
10394 LoopVectorizationCostModel CM(SEL, L, PSE, LI, &LVL, *TTI, TLI, DB, AC, ORE,
10395 F, &Hints, IAI);
10396 // Use the planner for vectorization.
10397 LoopVectorizationPlanner LVP(L, LI, DT, TLI, *TTI, &LVL, CM, IAI, PSE, Hints,
10398 ORE);
10399
10400 // Get user vectorization factor and interleave count.
10401 ElementCount UserVF = Hints.getWidth();
10402 unsigned UserIC = Hints.getInterleave();
10403
10404 // Plan how to best vectorize.
10405 LVP.plan(UserVF, UserIC);
10407 unsigned IC = 1;
10408
10411
10412 bool AddBranchWeights =
10413 hasBranchWeightMD(*L->getLoopLatch()->getTerminator());
10414 GeneratedRTChecks Checks(PSE, DT, LI, TTI, F->getDataLayout(),
10415 AddBranchWeights);
10416 if (LVP.hasPlanWithVF(VF.Width)) {
10417 // Select the interleave count.
10418 IC = CM.selectInterleaveCount(VF.Width, VF.Cost);
10419
10420 unsigned SelectedIC = std::max(IC, UserIC);
10421 // Optimistically generate runtime checks if they are needed. Drop them if
10422 // they turn out to not be profitable.
10423 if (VF.Width.isVector() || SelectedIC > 1)
10424 Checks.create(L, *LVL.getLAI(), PSE.getPredicate(), VF.Width, SelectedIC);
10425
10426 // Check if it is profitable to vectorize with runtime checks.
10427 bool ForceVectorization =
10429 if (!ForceVectorization &&
10430 !areRuntimeChecksProfitable(Checks, VF, L, *TTI, PSE, SEL)) {
10431 ORE->emit([&]() {
10433 DEBUG_TYPE, "CantReorderMemOps", L->getStartLoc(),
10434 L->getHeader())
10435 << "loop not vectorized: cannot prove it is safe to reorder "
10436 "memory operations";
10437 });
10438 LLVM_DEBUG(dbgs() << "LV: Too many memory checks needed.\n");
10439 Hints.emitRemarkWithHints();
10440 return false;
10441 }
10442 }
10443
10444 // Identify the diagnostic messages that should be produced.
10445 std::pair<StringRef, std::string> VecDiagMsg, IntDiagMsg;
10446 bool VectorizeLoop = true, InterleaveLoop = true;
10447 if (VF.Width.isScalar()) {
10448 LLVM_DEBUG(dbgs() << "LV: Vectorization is possible but not beneficial.\n");
10449 VecDiagMsg = std::make_pair(
10450 "VectorizationNotBeneficial",
10451 "the cost-model indicates that vectorization is not beneficial");
10452 VectorizeLoop = false;
10453 }
10454
10455 if (!LVP.hasPlanWithVF(VF.Width) && UserIC > 1) {
10456 // Tell the user interleaving was avoided up-front, despite being explicitly
10457 // requested.
10458 LLVM_DEBUG(dbgs() << "LV: Ignoring UserIC, because vectorization and "
10459 "interleaving should be avoided up front\n");
10460 IntDiagMsg = std::make_pair(
10461 "InterleavingAvoided",
10462 "Ignoring UserIC, because interleaving was avoided up front");
10463 InterleaveLoop = false;
10464 } else if (IC == 1 && UserIC <= 1) {
10465 // Tell the user interleaving is not beneficial.
10466 LLVM_DEBUG(dbgs() << "LV: Interleaving is not beneficial.\n");
10467 IntDiagMsg = std::make_pair(
10468 "InterleavingNotBeneficial",
10469 "the cost-model indicates that interleaving is not beneficial");
10470 InterleaveLoop = false;
10471 if (UserIC == 1) {
10472 IntDiagMsg.first = "InterleavingNotBeneficialAndDisabled";
10473 IntDiagMsg.second +=
10474 " and is explicitly disabled or interleave count is set to 1";
10475 }
10476 } else if (IC > 1 && UserIC == 1) {
10477 // Tell the user interleaving is beneficial, but it explicitly disabled.
10478 LLVM_DEBUG(
10479 dbgs() << "LV: Interleaving is beneficial but is explicitly disabled.");
10480 IntDiagMsg = std::make_pair(
10481 "InterleavingBeneficialButDisabled",
10482 "the cost-model indicates that interleaving is beneficial "
10483 "but is explicitly disabled or interleave count is set to 1");
10484 InterleaveLoop = false;
10485 }
10486
10487 // If there is a histogram in the loop, do not just interleave without
10488 // vectorizing. The order of operations will be incorrect without the
10489 // histogram intrinsics, which are only used for recipes with VF > 1.
10490 if (!VectorizeLoop && InterleaveLoop && LVL.hasHistograms()) {
10491 LLVM_DEBUG(dbgs() << "LV: Not interleaving without vectorization due "
10492 << "to histogram operations.\n");
10493 IntDiagMsg = std::make_pair(
10494 "HistogramPreventsScalarInterleaving",
10495 "Unable to interleave without vectorization due to constraints on "
10496 "the order of histogram operations");
10497 InterleaveLoop = false;
10498 }
10499
10500 // Override IC if user provided an interleave count.
10501 IC = UserIC > 0 ? UserIC : IC;
10502
10503 // Emit diagnostic messages, if any.
10504 const char *VAPassName = Hints.vectorizeAnalysisPassName();
10505 if (!VectorizeLoop && !InterleaveLoop) {
10506 // Do not vectorize or interleaving the loop.
10507 ORE->emit([&]() {
10508 return OptimizationRemarkMissed(VAPassName, VecDiagMsg.first,
10509 L->getStartLoc(), L->getHeader())
10510 << VecDiagMsg.second;
10511 });
10512 ORE->emit([&]() {
10513 return OptimizationRemarkMissed(LV_NAME, IntDiagMsg.first,
10514 L->getStartLoc(), L->getHeader())
10515 << IntDiagMsg.second;
10516 });
10517 return false;
10518 }
10519
10520 if (!VectorizeLoop && InterleaveLoop) {
10521 LLVM_DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n');
10522 ORE->emit([&]() {
10523 return OptimizationRemarkAnalysis(VAPassName, VecDiagMsg.first,
10524 L->getStartLoc(), L->getHeader())
10525 << VecDiagMsg.second;
10526 });
10527 } else if (VectorizeLoop && !InterleaveLoop) {
10528 LLVM_DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width
10529 << ") in " << L->getLocStr() << '\n');
10530 ORE->emit([&]() {
10531 return OptimizationRemarkAnalysis(LV_NAME, IntDiagMsg.first,
10532 L->getStartLoc(), L->getHeader())
10533 << IntDiagMsg.second;
10534 });
10535 } else if (VectorizeLoop && InterleaveLoop) {
10536 LLVM_DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width
10537 << ") in " << L->getLocStr() << '\n');
10538 LLVM_DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n');
10539 }
10540
10541 bool DisableRuntimeUnroll = false;
10542 MDNode *OrigLoopID = L->getLoopID();
10543 {
10544 using namespace ore;
10545 if (!VectorizeLoop) {
10546 assert(IC > 1 && "interleave count should not be 1 or 0");
10547 // If we decided that it is not legal to vectorize the loop, then
10548 // interleave it.
10549 VPlan &BestPlan = LVP.getPlanFor(VF.Width);
10550 InnerLoopVectorizer Unroller(
10551 L, PSE, LI, DT, TLI, TTI, AC, ORE, ElementCount::getFixed(1),
10552 ElementCount::getFixed(1), IC, &LVL, &CM, BFI, PSI, Checks, BestPlan);
10553
10554 LVP.executePlan(VF.Width, IC, BestPlan, Unroller, DT, false);
10555
10556 ORE->emit([&]() {
10557 return OptimizationRemark(LV_NAME, "Interleaved", L->getStartLoc(),
10558 L->getHeader())
10559 << "interleaved loop (interleaved count: "
10560 << NV("InterleaveCount", IC) << ")";
10561 });
10562 } else {
10563 // If we decided that it is *legal* to vectorize the loop, then do it.
10564
10565 VPlan &BestPlan = LVP.getPlanFor(VF.Width);
10566 // Consider vectorizing the epilogue too if it's profitable.
10567 VectorizationFactor EpilogueVF =
10569 if (EpilogueVF.Width.isVector()) {
10570 std::unique_ptr<VPlan> BestMainPlan(BestPlan.duplicate());
10571
10572 // The first pass vectorizes the main loop and creates a scalar epilogue
10573 // to be vectorized by executing the plan (potentially with a different
10574 // factor) again shortly afterwards.
10575 VPlan &BestEpiPlan = LVP.getPlanFor(EpilogueVF.Width);
10576 preparePlanForMainVectorLoop(*BestMainPlan, BestEpiPlan);
10577 EpilogueLoopVectorizationInfo EPI(VF.Width, IC, EpilogueVF.Width, 1,
10578 BestEpiPlan);
10579 EpilogueVectorizerMainLoop MainILV(L, PSE, LI, DT, TLI, TTI, AC, ORE,
10580 EPI, &LVL, &CM, BFI, PSI, Checks,
10581 *BestMainPlan);
10582 auto ExpandedSCEVs = LVP.executePlan(EPI.MainLoopVF, EPI.MainLoopUF,
10583 *BestMainPlan, MainILV, DT, false);
10584 ++LoopsVectorized;
10585
10586 // Second pass vectorizes the epilogue and adjusts the control flow
10587 // edges from the first pass.
10588 EPI.MainLoopVF = EPI.EpilogueVF;
10589 EPI.MainLoopUF = EPI.EpilogueUF;
10590 EpilogueVectorizerEpilogueLoop EpilogILV(L, PSE, LI, DT, TLI, TTI, AC,
10591 ORE, EPI, &LVL, &CM, BFI, PSI,
10592 Checks, BestEpiPlan);
10593 EpilogILV.setTripCount(MainILV.getTripCount());
10594 preparePlanForEpilogueVectorLoop(BestEpiPlan, L, ExpandedSCEVs, EPI);
10595
10596 LVP.executePlan(EPI.EpilogueVF, EPI.EpilogueUF, BestEpiPlan, EpilogILV,
10597 DT, true, &ExpandedSCEVs);
10598 ++LoopsEpilogueVectorized;
10599
10600 if (!MainILV.areSafetyChecksAdded())
10601 DisableRuntimeUnroll = true;
10602 } else {
10603 InnerLoopVectorizer LB(L, PSE, LI, DT, TLI, TTI, AC, ORE, VF.Width,
10604 VF.MinProfitableTripCount, IC, &LVL, &CM, BFI,
10605 PSI, Checks, BestPlan);
10606 LVP.executePlan(VF.Width, IC, BestPlan, LB, DT, false);
10607 ++LoopsVectorized;
10608
10609 // Add metadata to disable runtime unrolling a scalar loop when there
10610 // are no runtime checks about strides and memory. A scalar loop that is
10611 // rarely used is not worth unrolling.
10612 if (!LB.areSafetyChecksAdded())
10613 DisableRuntimeUnroll = true;
10614 }
10615 // Report the vectorization decision.
10616 reportVectorization(ORE, L, VF, IC);
10617 }
10618
10621 }
10622
10623 assert(DT->verify(DominatorTree::VerificationLevel::Fast) &&
10624 "DT not preserved correctly");
10625
10626 std::optional<MDNode *> RemainderLoopID =
10629 if (RemainderLoopID) {
10630 L->setLoopID(*RemainderLoopID);
10631 } else {
10632 if (DisableRuntimeUnroll)
10634
10635 // Mark the loop as already vectorized to avoid vectorizing again.
10636 Hints.setAlreadyVectorized();
10637 }
10638
10639 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs()));
10640 return true;
10641}
10642
10644
10645 // Don't attempt if
10646 // 1. the target claims to have no vector registers, and
10647 // 2. interleaving won't help ILP.
10648 //
10649 // The second condition is necessary because, even if the target has no
10650 // vector registers, loop vectorization may still enable scalar
10651 // interleaving.
10654 return LoopVectorizeResult(false, false);
10655
10656 bool Changed = false, CFGChanged = false;
10657
10658 // The vectorizer requires loops to be in simplified form.
10659 // Since simplification may add new inner loops, it has to run before the
10660 // legality and profitability checks. This means running the loop vectorizer
10661 // will simplify all loops, regardless of whether anything end up being
10662 // vectorized.
10663 for (const auto &L : *LI)
10664 Changed |= CFGChanged |=
10665 simplifyLoop(L, DT, LI, SE, AC, nullptr, false /* PreserveLCSSA */);
10666
10667 // Build up a worklist of inner-loops to vectorize. This is necessary as
10668 // the act of vectorizing or partially unrolling a loop creates new loops
10669 // and can invalidate iterators across the loops.
10670 SmallVector<Loop *, 8> Worklist;
10671
10672 for (Loop *L : *LI)
10673 collectSupportedLoops(*L, LI, ORE, Worklist);
10674
10675 LoopsAnalyzed += Worklist.size();
10676
10677 // Now walk the identified inner loops.
10678 while (!Worklist.empty()) {
10679 Loop *L = Worklist.pop_back_val();
10680
10681 // For the inner loops we actually process, form LCSSA to simplify the
10682 // transform.
10683 Changed |= formLCSSARecursively(*L, *DT, LI, SE);
10684
10685 Changed |= CFGChanged |= processLoop(L);
10686
10687 if (Changed) {
10688 LAIs->clear();
10689
10690#ifndef NDEBUG
10691 if (VerifySCEV)
10692 SE->verify();
10693#endif
10694 }
10695 }
10696
10697 // Process each loop nest in the function.
10698 return LoopVectorizeResult(Changed, CFGChanged);
10699}
10700
10703 LI = &AM.getResult<LoopAnalysis>(F);
10704 // There are no loops in the function. Return before computing other
10705 // expensive analyses.
10706 if (LI->empty())
10707 return PreservedAnalyses::all();
10716
10717 auto &MAMProxy = AM.getResult<ModuleAnalysisManagerFunctionProxy>(F);
10718 PSI = MAMProxy.getCachedResult<ProfileSummaryAnalysis>(*F.getParent());
10719 BFI = nullptr;
10720 if (PSI && PSI->hasProfileSummary())
10722 LoopVectorizeResult Result = runImpl(F);
10723 if (!Result.MadeAnyChange)
10724 return PreservedAnalyses::all();
10726
10727 if (isAssignmentTrackingEnabled(*F.getParent())) {
10728 for (auto &BB : F)
10730 }
10731
10732 PA.preserve<LoopAnalysis>();
10736
10737 if (Result.MadeCFGChange) {
10738 // Making CFG changes likely means a loop got vectorized. Indicate that
10739 // extra simplification passes should be run.
10740 // TODO: MadeCFGChanges is not a prefect proxy. Extra passes should only
10741 // be run if runtime checks have been added.
10744 } else {
10746 }
10747 return PA;
10748}
10749
10751 raw_ostream &OS, function_ref<StringRef(StringRef)> MapClassName2PassName) {
10752 static_cast<PassInfoMixin<LoopVectorizePass> *>(this)->printPipeline(
10753 OS, MapClassName2PassName);
10754
10755 OS << '<';
10756 OS << (InterleaveOnlyWhenForced ? "" : "no-") << "interleave-forced-only;";
10757 OS << (VectorizeOnlyWhenForced ? "" : "no-") << "vectorize-forced-only;";
10758 OS << '>';
10759}
@ Poison
static unsigned getIntrinsicID(const SDNode *N)
unsigned RegSize
AMDGPU Lower Kernel Arguments
AMDGPU Register Bank Select
Rewrite undef for PHI
This file implements a class to represent arbitrary precision integral constant values and operations...
@ PostInc
ReachingDefAnalysis InstSet & ToRemove
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static bool isEqual(const Function &Caller, const Function &Callee)
This file contains the simple types necessary to represent the attributes associated with functions a...
static const Function * getParent(const Value *V)
This is the interface for LLVM's primary stateless and local alias analysis.
static bool IsEmptyBlock(MachineBasicBlock *MBB)
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
#define clEnumValN(ENUMVAL, FLAGNAME, DESC)
Definition: CommandLine.h:686
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
return RetTy
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
#define LLVM_DEBUG(...)
Definition: Debug.h:106
#define DEBUG_WITH_TYPE(TYPE,...)
DEBUG_WITH_TYPE macro - This macro should be used by passes to emit debug information.
Definition: Debug.h:64
This file defines DenseMapInfo traits for DenseMap.
This file defines the DenseMap class.
std::string Name
bool End
Definition: ELF_riscv.cpp:480
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
#define Check(C,...)
#define DEBUG_TYPE
This is the interface for a simple mod/ref and alias analysis over globals.
Hexagon Common GEP
#define _
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
Module.h This file contains the declarations for the Module class.
This defines the Use class.
This file defines an InstructionCost class that is used when calculating the cost of an instruction,...
Legalize the Machine IR a function s Machine IR
Definition: Legalizer.cpp:80
This header provides classes for managing per-loop analyses.
static const char * VerboseDebug
loop Loop Strength Reduction
#define LV_NAME
This file defines the LoopVectorizationLegality class.
This file provides a LoopVectorizationPlanner class.
static void collectSupportedLoops(Loop &L, LoopInfo *LI, OptimizationRemarkEmitter *ORE, SmallVectorImpl< Loop * > &V)
static cl::opt< unsigned > EpilogueVectorizationMinVF("epilogue-vectorization-minimum-VF", cl::Hidden, cl::desc("Only loops with vectorization factor equal to or larger than " "the specified value are considered for epilogue vectorization."))
static cl::opt< unsigned > EpilogueVectorizationForceVF("epilogue-vectorization-force-VF", cl::init(1), cl::Hidden, cl::desc("When epilogue vectorization is enabled, and a value greater than " "1 is specified, forces the given VF for all applicable epilogue " "loops."))
static void addRuntimeUnrollDisableMetaData(Loop *L)
static ElementCount determineVPlanVF(const TargetTransformInfo &TTI, LoopVectorizationCostModel &CM)
static cl::opt< unsigned > VectorizeMemoryCheckThreshold("vectorize-memory-check-threshold", cl::init(128), cl::Hidden, cl::desc("The maximum allowed number of runtime memory checks"))
static void preparePlanForMainVectorLoop(VPlan &MainPlan, VPlan &EpiPlan)
Prepare MainPlan for vectorizing the main vector loop during epilogue vectorization.
static cl::opt< unsigned > TinyTripCountVectorThreshold("vectorizer-min-trip-count", cl::init(16), cl::Hidden, cl::desc("Loops with a constant trip count that is smaller than this " "value are vectorized only if no scalar iteration overheads " "are incurred."))
Loops with a known constant trip count below this number are vectorized only if no scalar iteration o...
static void debugVectorizationMessage(const StringRef Prefix, const StringRef DebugMsg, Instruction *I)
Write a DebugMsg about vectorization to the debug output stream.
static cl::opt< bool > EnableCondStoresVectorization("enable-cond-stores-vec", cl::init(true), cl::Hidden, cl::desc("Enable if predication of stores during vectorization."))
static SetVector< VPIRInstruction * > collectUsersInExitBlocks(Loop *OrigLoop, VPRecipeBuilder &Builder, VPlan &Plan, const MapVector< PHINode *, InductionDescriptor > &Inductions)
static Value * emitTransformedIndex(IRBuilderBase &B, Value *Index, Value *StartValue, Value *Step, InductionDescriptor::InductionKind InductionKind, const BinaryOperator *InductionBinOp)
Compute the transformed value of Index at offset StartValue using step StepValue.
static DebugLoc getDebugLocFromInstOrOperands(Instruction *I)
Look for a meaningful debug location on the instruction or its operands.
static bool areRuntimeChecksProfitable(GeneratedRTChecks &Checks, VectorizationFactor &VF, Loop *L, const TargetTransformInfo &TTI, PredicatedScalarEvolution &PSE, ScalarEpilogueLowering SEL)
static void replaceVPBBWithIRVPBB(VPBasicBlock *VPBB, BasicBlock *IRBB)
Replace VPBB with a VPIRBasicBlock wrapping IRBB.
const char LLVMLoopVectorizeFollowupAll[]
static void addExitUsersForFirstOrderRecurrences(VPlan &Plan, SetVector< VPIRInstruction * > &ExitUsersToFix)
Handle users in the exit block for first order reductions in the original exit block.
static cl::opt< bool > ForceTargetSupportsScalableVectors("force-target-supports-scalable-vectors", cl::init(false), cl::Hidden, cl::desc("Pretend that scalable vectors are supported, even if the target does " "not support them. This flag should only be used for testing."))
static void addCanonicalIVRecipes(VPlan &Plan, Type *IdxTy, bool HasNUW, DebugLoc DL)
static std::optional< unsigned > getVScaleForTuning(const Loop *L, const TargetTransformInfo &TTI)
Convenience function that returns the value of vscale_range iff vscale_range.min == vscale_range....
static bool useActiveLaneMaskForControlFlow(TailFoldingStyle Style)
static constexpr uint32_t MemCheckBypassWeights[]
cl::opt< unsigned > ForceTargetInstructionCost("force-target-instruction-cost", cl::init(0), cl::Hidden, cl::desc("A flag that overrides the target's expected cost for " "an instruction to a single constant value. Mostly " "useful for getting consistent testing."))
std::optional< unsigned > getMaxVScale(const Function &F, const TargetTransformInfo &TTI)
static constexpr uint32_t MinItersBypassWeights[]
static cl::opt< unsigned > ForceTargetNumScalarRegs("force-target-num-scalar-regs", cl::init(0), cl::Hidden, cl::desc("A flag that overrides the target's number of scalar registers."))
static cl::opt< bool > UseWiderVFIfCallVariantsPresent("vectorizer-maximize-bandwidth-for-vector-calls", cl::init(true), cl::Hidden, cl::desc("Try wider VFs if they enable the use of vector variants"))
static bool planContainsAdditionalSimplifications(VPlan &Plan, VPCostContext &CostCtx, Loop *TheLoop)
Return true if the original loop \ TheLoop contains any instructions that do not have corresponding r...
static cl::opt< unsigned > SmallLoopCost("small-loop-cost", cl::init(20), cl::Hidden, cl::desc("The cost of a loop that is considered 'small' by the interleaver."))
static cl::opt< unsigned > ForceTargetNumVectorRegs("force-target-num-vector-regs", cl::init(0), cl::Hidden, cl::desc("A flag that overrides the target's number of vector registers."))
static VPValue * addResumePhiRecipeForInduction(VPWidenInductionRecipe *WideIV, VPBuilder &VectorPHBuilder, VPBuilder &ScalarPHBuilder, VPTypeAnalysis &TypeInfo, VPValue *VectorTC)
Create and return a ResumePhi for WideIV, unless it is truncated.
static bool isExplicitVecOuterLoop(Loop *OuterLp, OptimizationRemarkEmitter *ORE)
static cl::opt< bool > EnableIndVarRegisterHeur("enable-ind-var-reg-heur", cl::init(true), cl::Hidden, cl::desc("Count the induction variable only once when interleaving"))
static Type * maybeVectorizeType(Type *Elt, ElementCount VF)
static std::optional< unsigned > getSmallBestKnownTC(PredicatedScalarEvolution &PSE, Loop *L, bool CanUseConstantMax=true)
Returns "best known" trip count for the specified loop L as defined by the following procedure: 1) Re...
static cl::opt< TailFoldingStyle > ForceTailFoldingStyle("force-tail-folding-style", cl::desc("Force the tail folding style"), cl::init(TailFoldingStyle::None), cl::values(clEnumValN(TailFoldingStyle::None, "none", "Disable tail folding"), clEnumValN(TailFoldingStyle::Data, "data", "Create lane mask for data only, using active.lane.mask intrinsic"), clEnumValN(TailFoldingStyle::DataWithoutLaneMask, "data-without-lane-mask", "Create lane mask with compare/stepvector"), clEnumValN(TailFoldingStyle::DataAndControlFlow, "data-and-control", "Create lane mask using active.lane.mask intrinsic, and use " "it for both data and control flow"), clEnumValN(TailFoldingStyle::DataAndControlFlowWithoutRuntimeCheck, "data-and-control-without-rt-check", "Similar to data-and-control, but remove the runtime check"), clEnumValN(TailFoldingStyle::DataWithEVL, "data-with-evl", "Use predicated EVL instructions for tail folding. If EVL " "is unsupported, fallback to data-without-lane-mask.")))
static cl::opt< bool > EnableEpilogueVectorization("enable-epilogue-vectorization", cl::init(true), cl::Hidden, cl::desc("Enable vectorization of epilogue loops."))
static ScalarEpilogueLowering getScalarEpilogueLowering(Function *F, Loop *L, LoopVectorizeHints &Hints, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI, TargetTransformInfo *TTI, TargetLibraryInfo *TLI, LoopVectorizationLegality &LVL, InterleavedAccessInfo *IAI)
const char VerboseDebug[]
static void fixReductionScalarResumeWhenVectorizingEpilog(VPRecipeBase *R, VPTransformState &State, BasicBlock *LoopMiddleBlock, BasicBlock *BypassBlock)
static cl::opt< bool > PreferPredicatedReductionSelect("prefer-predicated-reduction-select", cl::init(false), cl::Hidden, cl::desc("Prefer predicating a reduction operation over an after loop select."))
static VPWidenIntOrFpInductionRecipe * createWidenInductionRecipes(PHINode *Phi, Instruction *PhiOrTrunc, VPValue *Start, const InductionDescriptor &IndDesc, VPlan &Plan, ScalarEvolution &SE, Loop &OrigLoop)
Creates a VPWidenIntOrFpInductionRecpipe for Phi.
static constexpr uint32_t SCEVCheckBypassWeights[]
static cl::opt< bool > PreferInLoopReductions("prefer-inloop-reductions", cl::init(false), cl::Hidden, cl::desc("Prefer in-loop vector reductions, " "overriding the targets preference."))
const char LLVMLoopVectorizeFollowupVectorized[]
static cl::opt< bool > EnableLoadStoreRuntimeInterleave("enable-loadstore-runtime-interleave", cl::init(true), cl::Hidden, cl::desc("Enable runtime interleaving until load/store ports are saturated"))
static cl::opt< bool > VPlanBuildStressTest("vplan-build-stress-test", cl::init(false), cl::Hidden, cl::desc("Build VPlan for every supported loop nest in the function and bail " "out right after the build (stress test the VPlan H-CFG construction " "in the VPlan-native vectorization path)."))
static bool hasIrregularType(Type *Ty, const DataLayout &DL)
A helper function that returns true if the given type is irregular.
static cl::opt< bool > LoopVectorizeWithBlockFrequency("loop-vectorize-with-block-frequency", cl::init(true), cl::Hidden, cl::desc("Enable the use of the block frequency analysis to access PGO " "heuristics minimizing code growth in cold regions and being more " "aggressive in hot regions."))
static Value * getExpandedStep(const InductionDescriptor &ID, const SCEV2ValueTy &ExpandedSCEVs)
Return the expanded step for ID using ExpandedSCEVs to look up SCEV expansion results.
const char LLVMLoopVectorizeFollowupEpilogue[]
static void preparePlanForEpilogueVectorLoop(VPlan &Plan, Loop *L, const SCEV2ValueTy &ExpandedSCEVs, const EpilogueLoopVectorizationInfo &EPI)
Prepare Plan for vectorizing the epilogue loop.
static bool useActiveLaneMask(TailFoldingStyle Style)
static unsigned getEstimatedRuntimeVF(const Loop *L, const TargetTransformInfo &TTI, ElementCount VF)
This function attempts to return a value that represents the vectorization factor at runtime.
static bool isIndvarOverflowCheckKnownFalse(const LoopVectorizationCostModel *Cost, ElementCount VF, std::optional< unsigned > UF=std::nullopt)
For the given VF and UF and maximum trip count computed for the loop, return whether the induction va...
static void addFullyUnrolledInstructionsToIgnore(Loop *L, const LoopVectorizationLegality::InductionList &IL, SmallPtrSetImpl< Instruction * > &InstsToIgnore)
Knowing that loop L executes a single vector iteration, add instructions that will get simplified and...
static cl::opt< PreferPredicateTy::Option > PreferPredicateOverEpilogue("prefer-predicate-over-epilogue", cl::init(PreferPredicateTy::ScalarEpilogue), cl::Hidden, cl::desc("Tail-folding and predication preferences over creating a scalar " "epilogue loop."), cl::values(clEnumValN(PreferPredicateTy::ScalarEpilogue, "scalar-epilogue", "Don't tail-predicate loops, create scalar epilogue"), clEnumValN(PreferPredicateTy::PredicateElseScalarEpilogue, "predicate-else-scalar-epilogue", "prefer tail-folding, create scalar epilogue if tail " "folding fails."), clEnumValN(PreferPredicateTy::PredicateOrDontVectorize, "predicate-dont-vectorize", "prefers tail-folding, don't attempt vectorization if " "tail-folding fails.")))
static cl::opt< bool > EnableInterleavedMemAccesses("enable-interleaved-mem-accesses", cl::init(false), cl::Hidden, cl::desc("Enable vectorization on interleaved memory accesses in a loop"))
static bool addUsersInExitBlocks(VPlan &Plan, const SetVector< VPIRInstruction * > &ExitUsersToFix)
static cl::opt< bool > EnableMaskedInterleavedMemAccesses("enable-masked-interleaved-mem-accesses", cl::init(false), cl::Hidden, cl::desc("Enable vectorization on masked interleaved memory accesses in a loop"))
An interleave-group may need masking if it resides in a block that needs predication,...
static void addScalarResumePhis(VPRecipeBuilder &Builder, VPlan &Plan)
Create resume phis in the scalar preheader for first-order recurrences, reductions and inductions,...
static cl::opt< bool > ForceOrderedReductions("force-ordered-reductions", cl::init(false), cl::Hidden, cl::desc("Enable the vectorisation of loops with in-order (strict) " "FP reductions"))
static void cse(BasicBlock *BB)
Perform cse of induction variable instructions.
static const SCEV * getAddressAccessSCEV(Value *Ptr, LoopVectorizationLegality *Legal, PredicatedScalarEvolution &PSE, const Loop *TheLoop)
Gets Address Access SCEV after verifying that the access pattern is loop invariant except the inducti...
static cl::opt< cl::boolOrDefault > ForceSafeDivisor("force-widen-divrem-via-safe-divisor", cl::Hidden, cl::desc("Override cost based safe divisor widening for div/rem instructions"))
#define DEBUG_TYPE
static cl::opt< unsigned > ForceTargetMaxVectorInterleaveFactor("force-target-max-vector-interleave", cl::init(0), cl::Hidden, cl::desc("A flag that overrides the target's max interleave factor for " "vectorized loops."))
static bool processLoopInVPlanNativePath(Loop *L, PredicatedScalarEvolution &PSE, LoopInfo *LI, DominatorTree *DT, LoopVectorizationLegality *LVL, TargetTransformInfo *TTI, TargetLibraryInfo *TLI, DemandedBits *DB, AssumptionCache *AC, OptimizationRemarkEmitter *ORE, BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, LoopVectorizeHints &Hints, LoopVectorizationRequirements &Requirements)
static bool useMaskedInterleavedAccesses(const TargetTransformInfo &TTI)
static cl::opt< unsigned > NumberOfStoresToPredicate("vectorize-num-stores-pred", cl::init(1), cl::Hidden, cl::desc("Max number of stores to be predicated behind an if."))
The number of stores in a loop that are allowed to need predication.
static cl::opt< unsigned > MaxNestedScalarReductionIC("max-nested-scalar-reduction-interleave", cl::init(2), cl::Hidden, cl::desc("The maximum interleave count to use when interleaving a scalar " "reduction in a nested loop."))
static cl::opt< unsigned > ForceTargetMaxScalarInterleaveFactor("force-target-max-scalar-interleave", cl::init(0), cl::Hidden, cl::desc("A flag that overrides the target's max interleave factor for " "scalar loops."))
static void checkMixedPrecision(Loop *L, OptimizationRemarkEmitter *ORE)
static bool willGenerateVectors(VPlan &Plan, ElementCount VF, const TargetTransformInfo &TTI)
Check if any recipe of Plan will generate a vector value, which will be assigned a vector register.
static cl::opt< bool > EnableEarlyExitVectorization("enable-early-exit-vectorization", cl::init(false), cl::Hidden, cl::desc("Enable vectorization of early exit loops with uncountable exits."))
static cl::opt< bool > MaximizeBandwidth("vectorizer-maximize-bandwidth", cl::init(false), cl::Hidden, cl::desc("Maximize bandwidth when selecting vectorization factor which " "will be determined by the smallest type in loop."))
static OptimizationRemarkAnalysis createLVAnalysis(const char *PassName, StringRef RemarkName, Loop *TheLoop, Instruction *I, DebugLoc DL={})
Create an analysis remark that explains why vectorization failed.
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
mir Rename Register Operands
This file implements a map that provides insertion order iteration.
std::pair< uint64_t, uint64_t > Interval
This file contains the declarations for metadata subclasses.
ConstantRange Range(APInt(BitWidth, Low), APInt(BitWidth, High))
uint64_t IntrinsicInst * II
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
#define P(N)
if(PassOpts->AAPipeline)
This file contains the declarations for profiling metadata utility functions.
const SmallVectorImpl< MachineOperand > & Cond
static BinaryOperator * CreateMul(Value *S1, Value *S2, const Twine &Name, BasicBlock::iterator InsertBefore, Value *FlagsOp)
static BinaryOperator * CreateAdd(Value *S1, Value *S2, const Twine &Name, BasicBlock::iterator InsertBefore, Value *FlagsOp)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file contains some templates that are useful if you are working with the STL at all.
raw_pwrite_stream & OS
#define OP(OPC)
Definition: Instruction.h:45
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Definition: Statistic.h:166
This pass exposes codegen information to IR-level passes.
This file implements the TypeSwitch template, which mimics a switch() statement whose cases are type ...
This file defines the VPlanHCFGBuilder class which contains the public interface (buildHierarchicalCF...
This file provides utility VPlan to VPlan transformations.
This file declares the class VPlanVerifier, which contains utility functions to check the consistency...
This file contains the declarations of the Vectorization Plan base classes:
static const char PassName[]
Value * RHS
Value * LHS
static const uint32_t IV[8]
Definition: blake3_impl.h:78
Class for arbitrary precision integers.
Definition: APInt.h:78
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition: APInt.h:234
uint64_t getZExtValue() const
Get zero extended value.
Definition: APInt.h:1520
int64_t getSExtValue() const
Get sign extended value.
Definition: APInt.h:1542
A container for analyses that lazily runs them and caches their results.
Definition: PassManager.h:253
PassT::Result & getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs)
Get the result of an analysis pass for a given IR unit.
Definition: PassManager.h:410
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:168
A function analysis which provides an AssumptionCache.
A cache of @llvm.assume calls within a function.
void registerAssumption(AssumeInst *CI)
Add an @llvm.assume intrinsic to this function's cache.
unsigned getVScaleRangeMin() const
Returns the minimum value for the vscale_range attribute.
Definition: Attributes.cpp:460
LLVM Basic Block Representation.
Definition: BasicBlock.h:61
iterator begin()
Instruction iterator methods.
Definition: BasicBlock.h:448
iterator_range< const_phi_iterator > phis() const
Returns a range that iterates over the phis in the basic block.
Definition: BasicBlock.h:517
const Instruction * getFirstNonPHI() const
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
Definition: BasicBlock.cpp:367
const BasicBlock * getSinglePredecessor() const
Return the predecessor of this block if it has a single predecessor block.
Definition: BasicBlock.cpp:459
const BasicBlock * getSingleSuccessor() const
Return the successor of this block if it has a single successor.
Definition: BasicBlock.cpp:489
const Function * getParent() const
Return the enclosing method, or null if none.
Definition: BasicBlock.h:219
LLVMContext & getContext() const
Get the context in which this basic block lives.
Definition: BasicBlock.cpp:168
const Instruction * getTerminator() const LLVM_READONLY
Returns the terminator instruction if the block is well formed or null if the block is not well forme...
Definition: BasicBlock.h:239
BinaryOps getOpcode() const
Definition: InstrTypes.h:370
Analysis pass which computes BlockFrequencyInfo.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
bool isConditional() const
static BranchInst * Create(BasicBlock *IfTrue, InsertPosition InsertBefore=nullptr)
BasicBlock * getSuccessor(unsigned i) const
Value * getCondition() const
Represents analyses that only rely on functions' control flow.
Definition: Analysis.h:72
bool isNoBuiltin() const
Return true if the call should not be treated as a call to a builtin.
Definition: InstrTypes.h:1873
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
Definition: InstrTypes.h:1349
Value * getArgOperand(unsigned i) const
Definition: InstrTypes.h:1294
iterator_range< User::op_iterator > args()
Iteration adapter for range-for loops.
Definition: InstrTypes.h:1285
unsigned arg_size() const
Definition: InstrTypes.h:1292
This class represents a function call, abstracting a target machine's calling convention.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:673
@ ICMP_UGT
unsigned greater than
Definition: InstrTypes.h:696
@ ICMP_ULT
unsigned less than
Definition: InstrTypes.h:698
@ ICMP_EQ
equal
Definition: InstrTypes.h:694
@ ICMP_NE
not equal
Definition: InstrTypes.h:695
@ ICMP_ULE
unsigned less or equal
Definition: InstrTypes.h:699
Predicate getInversePredicate() const
For example, EQ -> NE, UGT -> ULE, SLT -> SGE, OEQ -> UNE, UGT -> OLE, OLT -> UGE,...
Definition: InstrTypes.h:787
This is the shared class of boolean and integer constants.
Definition: Constants.h:83
static ConstantInt * getTrue(LLVMContext &Context)
Definition: Constants.cpp:866
static ConstantInt * getFalse(LLVMContext &Context)
Definition: Constants.cpp:873
This class represents an Operation in the Expression.
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:63
A debug info location.
Definition: DebugLoc.h:33
An analysis that produces DemandedBits for a function.
Definition: DemandedBits.h:103
ValueT lookup(const_arg_type_t< KeyT > Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
Definition: DenseMap.h:194
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:156
bool empty() const
Definition: DenseMap.h:98
iterator begin()
Definition: DenseMap.h:75
size_type count(const_arg_type_t< KeyT > Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: DenseMap.h:152
iterator end()
Definition: DenseMap.h:84
const ValueT & at(const_arg_type_t< KeyT > Val) const
at - Return the entry for the specified key, or abort if no such entry exists.
Definition: DenseMap.h:202
bool contains(const_arg_type_t< KeyT > Val) const
Return true if the specified key is in the map, false otherwise.
Definition: DenseMap.h:147
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:211
Implements a dense probed hash-table based set.
Definition: DenseSet.h:278
DomTreeNodeBase * getIDom() const
Analysis pass which computes a DominatorTree.
Definition: Dominators.h:279
bool verify(VerificationLevel VL=VerificationLevel::Full) const
verify - checks if the tree is correct.
void changeImmediateDominator(DomTreeNodeBase< NodeT > *N, DomTreeNodeBase< NodeT > *NewIDom)
changeImmediateDominator - This method is used to update the dominator tree information when a node's...
DomTreeNodeBase< NodeT > * addNewBlock(NodeT *BB, NodeT *DomBB)
Add a new node to the dominator tree information.
void eraseNode(NodeT *BB)
eraseNode - Removes a node from the dominator tree.
DomTreeNodeBase< NodeT > * getNode(const NodeT *BB) const
getNode - return the (Post)DominatorTree node for the specified basic block.
bool properlyDominates(const DomTreeNodeBase< NodeT > *A, const DomTreeNodeBase< NodeT > *B) const
properlyDominates - Returns true iff A dominates B and A != B.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition: Dominators.h:162
bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Definition: Dominators.cpp:122
constexpr bool isVector() const
One or more elements.
Definition: TypeSize.h:326
static constexpr ElementCount getScalable(ScalarTy MinVal)
Definition: TypeSize.h:314
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition: TypeSize.h:311
static constexpr ElementCount get(ScalarTy MinVal, bool Scalable)
Definition: TypeSize.h:317
constexpr bool isScalar() const
Exactly one element.
Definition: TypeSize.h:322
BasicBlock * emitMinimumVectorEpilogueIterCountCheck(BasicBlock *Bypass, BasicBlock *Insert)
Emits an iteration count bypass check after the main vector loop has finished to see if there are any...
EpilogueVectorizerEpilogueLoop(Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, DominatorTree *DT, const TargetLibraryInfo *TLI, const TargetTransformInfo *TTI, AssumptionCache *AC, OptimizationRemarkEmitter *ORE, EpilogueLoopVectorizationInfo &EPI, LoopVectorizationLegality *LVL, llvm::LoopVectorizationCostModel *CM, BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, GeneratedRTChecks &Checks, VPlan &Plan)
void printDebugTracesAtStart() override
Allow subclasses to override and print debug traces before/after vplan execution, when trace informat...
BasicBlock * createEpilogueVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs) final
Implements the interface for creating a vectorized skeleton using the epilogue loop strategy (ie the ...
A specialized derived class of inner loop vectorizer that performs vectorization of main loops in the...
BasicBlock * createEpilogueVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs) final
Implements the interface for creating a vectorized skeleton using the main loop strategy (ie the firs...
EpilogueVectorizerMainLoop(Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, DominatorTree *DT, const TargetLibraryInfo *TLI, const TargetTransformInfo *TTI, AssumptionCache *AC, OptimizationRemarkEmitter *ORE, EpilogueLoopVectorizationInfo &EPI, LoopVectorizationLegality *LVL, llvm::LoopVectorizationCostModel *CM, BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, GeneratedRTChecks &Check, VPlan &Plan)
void printDebugTracesAtStart() override
Allow subclasses to override and print debug traces before/after vplan execution, when trace informat...
void fixupIVUsers(PHINode *OrigPhi, const InductionDescriptor &II, Value *VectorTripCount, BasicBlock *MiddleBlock, VPTransformState &State) override
Set up the values of the IVs correctly when exiting the vector loop.
BasicBlock * emitIterationCountCheck(BasicBlock *Bypass, bool ForEpilogue)
Emits an iteration count bypass check once for the main loop (when ForEpilogue is false) and once for...
FastMathFlags getFastMathFlags() const
Convenience function for getting all the fast-math flags.
Definition: Operator.h:338
Convenience struct for specifying and reasoning about fast-math flags.
Definition: FMF.h:20
Class to represent function types.
Definition: DerivedTypes.h:105
param_iterator param_begin() const
Definition: DerivedTypes.h:130
param_iterator param_end() const
Definition: DerivedTypes.h:131
bool hasOptSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
Definition: Function.h:707
FunctionType * getFunctionType() const
Returns the FunctionType for me.
Definition: Function.h:216
const DataLayout & getDataLayout() const
Get the data layout of the module this function belongs to.
Definition: Function.cpp:373
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
Definition: Function.cpp:766
bool hasMinSize() const
Optimize this function for minimum size (-Oz).
Definition: Function.h:704
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:731
static GEPNoWrapFlags inBounds()
static GEPNoWrapFlags none()
Common base class shared among various IRBuilders.
Definition: IRBuilder.h:91
Value * CreateBinaryIntrinsic(Intrinsic::ID ID, Value *LHS, Value *RHS, Instruction *FMFSource=nullptr, const Twine &Name="")
Create a call to intrinsic ID with 2 operands which is mangled on the first type.
Definition: IRBuilder.cpp:879
ConstantInt * getTrue()
Get the constant value for i1 true.
Definition: IRBuilder.h:463
Value * CreateSelect(Value *C, Value *True, Value *False, const Twine &Name="", Instruction *MDFrom=nullptr)
Definition: IRBuilder.cpp:1048
void setFastMathFlags(FastMathFlags NewFMF)
Set the fast-math flags to be used with generated fp-math operators.
Definition: IRBuilder.h:308
Value * CreateICmpNE(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:2277
Value * CreateICmpEQ(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:2273
InstTy * Insert(InstTy *I, const Twine &Name="") const
Insert and return the specified instruction.
Definition: IRBuilder.h:142
Value * CreateSub(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1367
Value * CreateAdd(Value *LHS, Value *RHS, const Twine &Name="", bool HasNUW=false, bool HasNSW=false)
Definition: IRBuilder.h:1350
ConstantInt * getFalse()
Get the constant value for i1 false.
Definition: IRBuilder.h:468
void SetInsertPoint(BasicBlock *TheBB)
This specifies that created instructions should be appended to the end of the specified block.
Definition: IRBuilder.h:177
Value * CreateICmp(CmpInst::Predicate P, Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:2383
Value * CreateURem(Value *LHS, Value *RHS, const Twine &Name="")
Definition: IRBuilder.h:1427
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
Definition: IRBuilder.h:2697
A struct for saving information about induction variables.
const SCEV * getStep() const
InductionKind
This enum represents the kinds of inductions that we support.
@ IK_NoInduction
Not an induction variable.
@ IK_FpInduction
Floating point induction variable.
@ IK_PtrInduction
Pointer induction var. Step = C.
@ IK_IntInduction
Integer induction variable. Step = C.
const SmallVectorImpl< Instruction * > & getCastInsts() const
Returns a reference to the type cast instructions in the induction update chain, that are redundant w...
Value * getStartValue() const
An extension of the inner loop vectorizer that creates a skeleton for a vectorized loop that has its ...
InnerLoopAndEpilogueVectorizer(Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, DominatorTree *DT, const TargetLibraryInfo *TLI, const TargetTransformInfo *TTI, AssumptionCache *AC, OptimizationRemarkEmitter *ORE, EpilogueLoopVectorizationInfo &EPI, LoopVectorizationLegality *LVL, llvm::LoopVectorizationCostModel *CM, BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, GeneratedRTChecks &Checks, VPlan &Plan)
BasicBlock * createVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs) final
Create a new empty loop that will contain vectorized instructions later on, while the old loop will b...
virtual BasicBlock * createEpilogueVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs)=0
The interface for creating a vectorized skeleton using one of two different strategies,...
EpilogueLoopVectorizationInfo & EPI
Holds and updates state information required to vectorize the main loop and its epilogue in two separ...
InnerLoopVectorizer vectorizes loops which contain only one basic block to a specified vectorization ...
virtual void printDebugTracesAtStart()
Allow subclasses to override and print debug traces before/after vplan execution, when trace informat...
Value * TripCount
Trip count of the original loop.
void sinkScalarOperands(Instruction *PredInst)
Iteratively sink the scalarized operands of a predicated instruction into the block that was created ...
const TargetLibraryInfo * TLI
Target Library Info.
virtual void fixupIVUsers(PHINode *OrigPhi, const InductionDescriptor &II, Value *VectorTripCount, BasicBlock *MiddleBlock, VPTransformState &State)
Set up the values of the IVs correctly when exiting the vector loop.
ElementCount MinProfitableTripCount
const TargetTransformInfo * TTI
Target Transform Info.
Value * VectorTripCount
Trip count of the widened loop (TripCount - TripCount % (VF*UF))
BasicBlock * emitSCEVChecks(BasicBlock *Bypass)
Emit a bypass check to see if all of the SCEV assumptions we've had to make are correct.
virtual BasicBlock * createVectorizedLoopSkeleton(const SCEV2ValueTy &ExpandedSCEVs)
Create a new empty loop that will contain vectorized instructions later on, while the old loop will b...
LoopVectorizationCostModel * Cost
The profitablity analysis.
BasicBlock * AdditionalBypassBlock
The additional bypass block which conditionally skips over the epilogue loop after executing the main...
BlockFrequencyInfo * BFI
BFI and PSI are used to check for profile guided size optimizations.
Value * getTripCount() const
Returns the original loop trip count.
BasicBlock * LoopMiddleBlock
Middle Block between the vector and the scalar.
OptimizationRemarkEmitter * ORE
Interface to emit optimization remarks.
void scalarizeInstruction(const Instruction *Instr, VPReplicateRecipe *RepRecipe, const VPLane &Lane, VPTransformState &State)
A helper function to scalarize a single Instruction in the innermost loop.
SmallVector< Instruction *, 4 > PredicatedInstructions
Store instructions that were predicated.
DenseMap< PHINode *, Value * > Induction2AdditionalBypassValue
Mapping of induction phis to their additional bypass values.
void introduceCheckBlockInVPlan(BasicBlock *CheckIRBB)
Introduces a new VPIRBasicBlock for CheckIRBB to Plan between the vector preheader and its predecesso...
void createVectorLoopSkeleton(StringRef Prefix)
Emit basic blocks (prefixed with Prefix) for the iteration check, vector loop preheader,...
BasicBlock * emitMemRuntimeChecks(BasicBlock *Bypass)
Emit bypass checks to check any memory assumptions we may have made.
BasicBlock * LoopScalarPreHeader
The scalar-loop preheader.
void createInductionAdditionalBypassValues(const SCEV2ValueTy &ExpandedSCEVs, Value *MainVectorTripCount)
Create and record the values for induction variables to resume coming from the additional bypass bloc...
VPBlockBase * VectorPHVPB
The vector preheader block of Plan, used as target for check blocks introduced during skeleton creati...
LoopVectorizationLegality * Legal
The legality analysis.
InnerLoopVectorizer(Loop *OrigLoop, PredicatedScalarEvolution &PSE, LoopInfo *LI, DominatorTree *DT, const TargetLibraryInfo *TLI, const TargetTransformInfo *TTI, AssumptionCache *AC, OptimizationRemarkEmitter *ORE, ElementCount VecWidth, ElementCount MinProfitableTripCount, unsigned UnrollFactor, LoopVectorizationLegality *LVL, LoopVectorizationCostModel *CM, BlockFrequencyInfo *BFI, ProfileSummaryInfo *PSI, GeneratedRTChecks &RTChecks, VPlan &Plan)
void emitIterationCountCheck(BasicBlock *Bypass)
Emit a bypass check to see if the vector trip count is zero, including if it overflows.
PredicatedScalarEvolution & PSE
A wrapper around ScalarEvolution used to add runtime SCEV checks.
LoopInfo * LI
Loop Info.
ProfileSummaryInfo * PSI
Value * getInductionAdditionalBypassValue(PHINode *OrigPhi) const
induction header phi.
BasicBlock * getAdditionalBypassBlock() const
Return the additional bypass block which targets the scalar loop by skipping the epilogue loop after ...
DominatorTree * DT
Dominator Tree.
void setTripCount(Value *TC)
Used to set the trip count after ILV's construction and after the preheader block has been executed.
void fixVectorizedLoop(VPTransformState &State)
Fix the vectorized code, taking care of header phi's, and more.
BasicBlock * LoopVectorPreHeader
The vector-loop preheader.
virtual void printDebugTracesAtEnd()
AssumptionCache * AC
Assumption Cache.
Value * getOrCreateVectorTripCount(BasicBlock *InsertBlock)
Returns (and creates if needed) the trip count of the widened loop.
IRBuilder Builder
The builder that we use.
void fixNonInductionPHIs(VPTransformState &State)
Fix the non-induction PHIs in Plan.
unsigned UF
The vectorization unroll factor to use.
SmallVector< BasicBlock *, 4 > LoopBypassBlocks
A list of all bypass blocks. The first block is the entry of the loop.
GeneratedRTChecks & RTChecks
Structure to hold information about generated runtime checks, responsible for cleaning the checks,...
virtual ~InnerLoopVectorizer()=default
ElementCount VF
The vectorization SIMD factor to use.
Loop * OrigLoop
The original loop.
static InstructionCost getInvalid(CostType Val=0)
static InstructionCost getMax()
std::optional< CostType > getValue() const
This function is intended to be used as sparingly as possible, since the class provides the full rang...
const DebugLoc & getDebugLoc() const
Return the debug location for this node as a DebugLoc.
Definition: Instruction.h:475
const Module * getModule() const
Return the module owning the function this instruction belongs to or nullptr it the function does not...
Definition: Instruction.cpp:68
bool isBinaryOp() const
Definition: Instruction.h:279
InstListType::iterator eraseFromParent()
This method unlinks 'this' from the containing basic block and deletes it.
Definition: Instruction.cpp:94
void replaceSuccessorWith(BasicBlock *OldBB, BasicBlock *NewBB)
Replace specified successor OldBB to point at the provided block.
Instruction * user_back()
Specialize the methods defined in Value, as we know that an instruction can only be used by other ins...
Definition: Instruction.h:169
FastMathFlags getFastMathFlags() const LLVM_READONLY
Convenience function for getting all the fast-math flags, which must be an operator which supports th...
const char * getOpcodeName() const
Definition: Instruction.h:276
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
Definition: Instruction.h:274
void moveBefore(Instruction *MovePos)
Unlink this instruction from its current basic block and insert it into the basic block that MovePos ...
static IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition: Type.cpp:311
The group of interleaved loads/stores sharing the same stride and close to each other.
Definition: VectorUtils.h:480
uint32_t getFactor() const
Definition: VectorUtils.h:496
InstTy * getMember(uint32_t Index) const
Get the member with the given index Index.
Definition: VectorUtils.h:550
InstTy * getInsertPos() const
Definition: VectorUtils.h:566
uint32_t getNumMembers() const
Definition: VectorUtils.h:498
Drive the analysis of interleaved memory accesses in the loop.
Definition: VectorUtils.h:622
InterleaveGroup< Instruction > * getInterleaveGroup(const Instruction *Instr) const
Get the interleave group that Instr belongs to.
Definition: VectorUtils.h:667
bool requiresScalarEpilogue() const
Returns true if an interleaved group that may access memory out-of-bounds requires a scalar epilogue ...
Definition: VectorUtils.h:678
bool isInterleaved(Instruction *Instr) const
Check if Instr belongs to any interleave group.
Definition: VectorUtils.h:659
bool invalidateGroups()
Invalidate groups, e.g., in case all blocks in loop will be predicated contrary to original assumptio...
Definition: VectorUtils.h:642
iterator_range< SmallPtrSetIterator< llvm::InterleaveGroup< Instruction > * > > getInterleaveGroups()
Definition: VectorUtils.h:672
void analyzeInterleaving(bool EnableMaskedInterleavedGroup)
Analyze the interleaved accesses and collect them in interleave groups.
void invalidateGroupsRequiringScalarEpilogue()
Invalidate groups that require a scalar epilogue (due to gaps).
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:48
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
An instruction for reading from memory.
Definition: Instructions.h:176
Type * getPointerOperandType() const
Definition: Instructions.h:258
This analysis provides dependence information for the memory accesses of a loop.
Drive the analysis of memory accesses in the loop.
const RuntimePointerChecking * getRuntimePointerChecking() const
unsigned getNumRuntimePointerChecks() const
Number of memchecks required to prove independence of otherwise may-alias pointers.
const DenseMap< Value *, const SCEV * > & getSymbolicStrides() const
If an access has a symbolic strides, this maps the pointer value to the stride symbol.
Analysis pass that exposes the LoopInfo for a function.
Definition: LoopInfo.h:566
bool contains(const LoopT *L) const
Return true if the specified loop is contained within in this loop.
BlockT * getLoopLatch() const
If there is a single latch block for this loop, return it.
bool isInnermost() const
Return true if the loop does not contain any (natural) loops.
void getExitBlocks(SmallVectorImpl< BlockT * > &ExitBlocks) const
Return all of the successor blocks of this loop.
BlockT * getUniqueLatchExitBlock() const
Return the unique exit block for the latch, or null if there are multiple different exit blocks or th...
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
BlockT * getHeader() const
unsigned getLoopDepth() const
Return the nesting level of this loop.
void addBasicBlockToLoop(BlockT *NewBB, LoopInfoBase< BlockT, LoopT > &LI)
This method is used by other analyses to update loop information.
iterator_range< block_iterator > blocks() const
BlockT * getLoopPreheader() const
If there is a preheader for this loop, return it.
ArrayRef< BlockT * > getBlocks() const
Get a list of the basic blocks which make up this loop.
BlockT * getExitingBlock() const
If getExitingBlocks would return exactly one block, return that block.
LoopT * getParentLoop() const
Return the parent loop if it exists or nullptr for top level loops.
bool isLoopExiting(const BlockT *BB) const
True if terminator in the block can branch to another block that is outside of the current loop.
Store the result of a depth first search within basic blocks contained by a single loop.
Definition: LoopIterator.h:97
RPOIterator beginRPO() const
Reverse iterate over the cached postorder blocks.
Definition: LoopIterator.h:136
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
Definition: LoopInfo.cpp:1254
RPOIterator endRPO() const
Definition: LoopIterator.h:140
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
Definition: LoopIterator.h:172
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
Definition: LoopIterator.h:180
void removeBlock(BlockT *BB)
This method completely removes BB from all data structures, including all of the Loop objects it is n...
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
LoopVectorizationCostModel - estimates the expected speedups due to vectorization.
SmallPtrSet< Type *, 16 > ElementTypesInLoop
All element types found in the loop.
void collectElementTypesForWidening()
Collect all element types in the loop for which widening is needed.
bool canVectorizeReductions(ElementCount VF) const
Returns true if the target machine supports all of the reduction variables found for the given VF.
bool isEpilogueVectorizationProfitable(const ElementCount VF, const unsigned IC) const
Returns true if epilogue vectorization is considered profitable, and false otherwise.
bool requiresScalarEpilogue(VFRange Range) const
Returns true if we're required to use a scalar epilogue for at least the final iteration of the origi...
bool isPredicatedInst(Instruction *I) const
Returns true if I is an instruction that needs to be predicated at runtime.
void collectValuesToIgnore()
Collect values we want to ignore in the cost model.
void collectInLoopReductions()
Split reductions into those that happen in the loop, and those that happen outside.
std::pair< unsigned, unsigned > getSmallestAndWidestTypes()
bool isUniformAfterVectorization(Instruction *I, ElementCount VF) const
Returns true if I is known to be uniform after vectorization.
bool usePredicatedReductionSelect(unsigned Opcode, Type *PhiTy) const
Returns true if the predicated reduction select should be used to set the incoming value for the redu...
PredicatedScalarEvolution & PSE
Predicated scalar evolution analysis.
const LoopVectorizeHints * Hints
Loop Vectorize Hint.
std::optional< unsigned > getMaxSafeElements() const
Return maximum safe number of elements to be processed per vector iteration, which do not prevent sto...
std::optional< InstructionCost > getReductionPatternCost(Instruction *I, ElementCount VF, Type *VectorTy, TTI::TargetCostKind CostKind) const
Return the cost of instructions in an inloop reduction pattern, if I is part of that pattern.
const TargetTransformInfo & TTI
Vector target information.
LoopVectorizationCostModel(ScalarEpilogueLowering SEL, Loop *L, PredicatedScalarEvolution &PSE, LoopInfo *LI, LoopVectorizationLegality *Legal, const TargetTransformInfo &TTI, const TargetLibraryInfo *TLI, DemandedBits *DB, AssumptionCache *AC, OptimizationRemarkEmitter *ORE, const Function *F, const LoopVectorizeHints *Hints, InterleavedAccessInfo &IAI)
LoopVectorizationLegality * Legal
Vectorization legality.
bool isLegalMaskedLoad(Type *DataType, Value *Ptr, Align Alignment) const
Returns true if the target machine supports masked load operation for the given DataType and kind of ...
InstructionCost getInstructionCost(Instruction *I, ElementCount VF)
Returns the execution time cost of an instruction for a given vector width.
DemandedBits * DB
Demanded bits analysis.
bool interleavedAccessCanBeWidened(Instruction *I, ElementCount VF) const
Returns true if I is a memory instruction in an interleaved-group of memory accesses that can be vect...
const TargetLibraryInfo * TLI
Target Library Info.
bool memoryInstructionCanBeWidened(Instruction *I, ElementCount VF)
Returns true if I is a memory instruction with consecutive memory access that can be widened.
const InterleaveGroup< Instruction > * getInterleavedAccessGroup(Instruction *Instr) const
Get the interleaved access group that Instr belongs to.
InstructionCost getVectorIntrinsicCost(CallInst *CI, ElementCount VF) const
Estimate cost of an intrinsic call instruction CI if it were vectorized with factor VF.
bool isScalarAfterVectorization(Instruction *I, ElementCount VF) const
Returns true if I is known to be scalar after vectorization.
bool isOptimizableIVTruncate(Instruction *I, ElementCount VF)
Return True if instruction I is an optimizable truncate whose operand is an induction variable.
FixedScalableVFPair computeMaxVF(ElementCount UserVF, unsigned UserIC)
Loop * TheLoop
The loop that we evaluate.
TailFoldingStyle getTailFoldingStyle(bool IVUpdateMayOverflow=true) const
Returns the TailFoldingStyle that is best for the current loop.
InterleavedAccessInfo & InterleaveInfo
The interleave access information contains groups of interleaved accesses with the same stride and cl...
SmallPtrSet< const Value *, 16 > ValuesToIgnore
Values to ignore in the cost model.
void setVectorizedCallDecision(ElementCount VF)
A call may be vectorized in different ways depending on whether we have vectorized variants available...
void invalidateCostModelingDecisions()
Invalidates decisions already taken by the cost model.
bool isAccessInterleaved(Instruction *Instr) const
Check if Instr belongs to any interleaved access group.
bool selectUserVectorizationFactor(ElementCount UserVF)
Setup cost-based decisions for user vectorization factor.
OptimizationRemarkEmitter * ORE
Interface to emit optimization remarks.
bool isLegalMaskedStore(Type *DataType, Value *Ptr, Align Alignment) const
Returns true if the target machine supports masked store operation for the given DataType and kind of...
LoopInfo * LI
Loop Info analysis.
bool requiresScalarEpilogue(bool IsVectorizing) const
Returns true if we're required to use a scalar epilogue for at least the final iteration of the origi...
SmallVector< RegisterUsage, 8 > calculateRegisterUsage(ArrayRef< ElementCount > VFs)
SmallPtrSet< const Value *, 16 > VecValuesToIgnore
Values to ignore in the cost model when VF > 1.
bool isInLoopReduction(PHINode *Phi) const
Returns true if the Phi is part of an inloop reduction.
bool isProfitableToScalarize(Instruction *I, ElementCount VF) const
void setWideningDecision(const InterleaveGroup< Instruction > *Grp, ElementCount VF, InstWidening W, InstructionCost Cost)
Save vectorization decision W and Cost taken by the cost model for interleaving group Grp and vector ...
const MapVector< Instruction *, uint64_t > & getMinimalBitwidths() const
CallWideningDecision getCallWideningDecision(CallInst *CI, ElementCount VF) const
bool isLegalGatherOrScatter(Value *V, ElementCount VF)
Returns true if the target machine can represent V as a masked gather or scatter operation.
bool canTruncateToMinimalBitwidth(Instruction *I, ElementCount VF) const
bool shouldConsiderInvariant(Value *Op)
Returns true if Op should be considered invariant and if it is trivially hoistable.
bool foldTailByMasking() const
Returns true if all loop blocks should be masked to fold tail loop.
bool foldTailWithEVL() const
Returns true if VP intrinsics with explicit vector length support should be generated in the tail fol...
void collectUniformsAndScalars(ElementCount VF)
Collect Uniform and Scalar values for the given VF.
bool blockNeedsPredicationForAnyReason(BasicBlock *BB) const
Returns true if the instructions in this block requires predication for any reason,...
void setCallWideningDecision(CallInst *CI, ElementCount VF, InstWidening Kind, Function *Variant, Intrinsic::ID IID, std::optional< unsigned > MaskPos, InstructionCost Cost)
void setTailFoldingStyles(bool IsScalableVF, unsigned UserIC)
Selects and saves TailFoldingStyle for 2 options - if IV update may overflow or not.
AssumptionCache * AC
Assumption cache.
void setWideningDecision(Instruction *I, ElementCount VF, InstWidening W, InstructionCost Cost)
Save vectorization decision W and Cost taken by the cost model for instruction I and vector width VF.
InstWidening
Decision that was taken during cost calculation for memory instruction.
bool isScalarWithPredication(Instruction *I, ElementCount VF) const
Returns true if I is an instruction which requires predication and for which our chosen predication s...
InstructionCost getVectorCallCost(CallInst *CI, ElementCount VF) const
Estimate cost of a call instruction CI if it were vectorized with factor VF.
bool useOrderedReductions(const RecurrenceDescriptor &RdxDesc) const
Returns true if we should use strict in-order reductions for the given RdxDesc.
std::pair< InstructionCost, InstructionCost > getDivRemSpeculationCost(Instruction *I, ElementCount VF) const
Return the costs for our two available strategies for lowering a div/rem operation which requires spe...
bool isDivRemScalarWithPredication(InstructionCost ScalarCost, InstructionCost SafeDivisorCost) const
Given costs for both strategies, return true if the scalar predication lowering should be used for di...
InstructionCost expectedCost(ElementCount VF)
Returns the expected execution cost.
void setCostBasedWideningDecision(ElementCount VF)
Memory access instruction may be vectorized in more than one way.
InstWidening getWideningDecision(Instruction *I, ElementCount VF) const
Return the cost model decision for the given instruction I and vector width VF.
bool isScalarEpilogueAllowed() const
Returns true if a scalar epilogue is not allowed due to optsize or a loop hint annotation.
InstructionCost getWideningCost(Instruction *I, ElementCount VF)
Return the vectorization cost for the given instruction I and vector width VF.
unsigned selectInterleaveCount(ElementCount VF, InstructionCost LoopCost)
void collectInstsToScalarize(ElementCount VF)
Collects the instructions to scalarize for each predicated instruction in the loop.
LoopVectorizationLegality checks if it is legal to vectorize a loop, and to what vectorization factor...
bool isInvariantStoreOfReduction(StoreInst *SI)
Returns True if given store is a final invariant store of one of the reductions found in the loop.
bool hasVectorCallVariants() const
Returns true if there is at least one function call in the loop which has a vectorized variant availa...
bool isInvariantAddressOfReduction(Value *V)
Returns True if given address is invariant and is used to store recurrent expression.
bool blockNeedsPredication(BasicBlock *BB) const
Return true if the block BB needs to be predicated in order for the loop to be vectorized.
bool canVectorize(bool UseVPlanNativePath)
Returns true if it is legal to vectorize this loop.
int isConsecutivePtr(Type *AccessTy, Value *Ptr) const
Check if this pointer is consecutive when vectorizing.
std::optional< const HistogramInfo * > getHistogramInfo(Instruction *I) const
Returns a HistogramInfo* for the given instruction if it was determined to be part of a load -> updat...
bool canVectorizeFPMath(bool EnableStrictReductions)
Returns true if it is legal to vectorize the FP math operations in this loop.
bool isReductionVariable(PHINode *PN) const
Returns True if PN is a reduction variable in this loop.
bool isFixedOrderRecurrence(const PHINode *Phi) const
Returns True if Phi is a fixed-order recurrence in this loop.
const InductionDescriptor * getPointerInductionDescriptor(PHINode *Phi) const
Returns a pointer to the induction descriptor, if Phi is pointer induction.
const InductionDescriptor * getIntOrFpInductionDescriptor(PHINode *Phi) const
Returns a pointer to the induction descriptor, if Phi is an integer or floating point induction.
bool isInductionPhi(const Value *V) const
Returns True if V is a Phi node of an induction variable in this loop.
PHINode * getPrimaryInduction()
Returns the primary induction variable.
const SmallVector< BasicBlock *, 4 > & getCountableExitingBlocks() const
Returns all exiting blocks with a countable exit, i.e.
const InductionList & getInductionVars() const
Returns the induction variables found in the loop.
bool isInvariant(Value *V) const
Returns true if V is invariant across all loop iterations according to SCEV.
const ReductionList & getReductionVars() const
Returns the reduction variables found in the loop.
bool canFoldTailByMasking() const
Return true if we can vectorize this loop while folding its tail by masking.
void prepareToFoldTailByMasking()
Mark all respective loads/stores for masking.
Type * getWidestInductionType()
Returns the widest induction type.
bool hasUncountableEarlyExit() const
Returns true if the loop has an uncountable early exit, i.e.
bool hasHistograms() const
Returns a list of all known histogram operations in the loop.
const LoopAccessInfo * getLAI() const
bool isUniformMemOp(Instruction &I, ElementCount VF) const
A uniform memory op is a load or store which accesses the same memory location on all VF lanes,...
BasicBlock * getUncountableEarlyExitingBlock() const
Returns the uncountable early exiting block.
bool isMaskRequired(const Instruction *I) const
Returns true if vector representation of the instruction I requires mask.
const RuntimePointerChecking * getRuntimePointerChecking() const
Returns the information that we collected about runtime memory check.
Planner drives the vectorization process after having passed Legality checks.
VectorizationFactor selectEpilogueVectorizationFactor(const ElementCount MaxVF, unsigned IC)
VPlan & getPlanFor(ElementCount VF) const
Return the VPlan for VF.
Definition: VPlan.cpp:1626
VectorizationFactor planInVPlanNativePath(ElementCount UserVF)
Use the VPlan-native path to plan how to best vectorize, return the best VF and its cost.
void buildVPlans(ElementCount MinVF, ElementCount MaxVF)
Build VPlans for power-of-2 VF's between MinVF and MaxVF inclusive, according to the information gath...
Definition: VPlan.cpp:1614
VectorizationFactor computeBestVF()
Compute and return the most profitable vectorization factor.
void emitInvalidCostRemarks(OptimizationRemarkEmitter *ORE)
Emit remarks for recipes with invalid costs in the available VPlans.
static bool getDecisionAndClampRange(const std::function< bool(ElementCount)> &Predicate, VFRange &Range)
Test a Predicate on a Range of VF's.
Definition: VPlan.cpp:1595
void printPlans(raw_ostream &O)
Definition: VPlan.cpp:1640
void plan(ElementCount UserVF, unsigned UserIC)
Build VPlans for the specified UserVF and UserIC if they are non-zero or all applicable candidate VFs...
DenseMap< const SCEV *, Value * > executePlan(ElementCount VF, unsigned UF, VPlan &BestPlan, InnerLoopVectorizer &LB, DominatorTree *DT, bool VectorizingEpilogue, const DenseMap< const SCEV *, Value * > *ExpandedSCEVs=nullptr)
Generate the IR code for the vectorized loop captured in VPlan BestPlan according to the best selecte...
bool hasPlanWithVF(ElementCount VF) const
Look through the existing plans and return true if we have one with vectorization factor VF.
This holds vectorization requirements that must be verified late in the process.
Utility class for getting and setting loop vectorizer hints in the form of loop metadata.
bool allowVectorization(Function *F, Loop *L, bool VectorizeOnlyWhenForced) const
bool allowReordering() const
When enabling loop hints are provided we allow the vectorizer to change the order of operations that ...
void emitRemarkWithHints() const
Dumps all the hint information.
void setAlreadyVectorized()
Mark the loop L as already vectorized by setting the width to 1.
const char * vectorizeAnalysisPassName() const
If hints are provided that force vectorization, use the AlwaysPrint pass name to force the frontend t...
void prepareNoAliasMetadata()
Set up the aliasing scopes based on the memchecks.
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:39
bool hasLoopInvariantOperands(const Instruction *I) const
Return true if all the operands of the specified instruction are loop invariant.
Definition: LoopInfo.cpp:67
DebugLoc getStartLoc() const
Return the debug location of the start of this loop.
Definition: LoopInfo.cpp:632
bool isLoopInvariant(const Value *V) const
Return true if the specified value is loop invariant.
Definition: LoopInfo.cpp:61
MDNode * getLoopID() const
Return the llvm.loop loop id metadata node for this loop if it is present.
Definition: LoopInfo.cpp:502
Metadata node.
Definition: Metadata.h:1069
void replaceOperandWith(unsigned I, Metadata *New)
Replace a specific operand.
Definition: Metadata.cpp:1077
const MDOperand & getOperand(unsigned I) const
Definition: Metadata.h:1430
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1545
unsigned getNumOperands() const
Return number of MDNode operands.
Definition: Metadata.h:1436
static MDString * get(LLVMContext &Context, StringRef Str)
Definition: Metadata.cpp:606
This class implements a map that also provides access to all stored values in a deterministic order.
Definition: MapVector.h:36
iterator find(const KeyT &Key)
Definition: MapVector.h:167
bool contains(const KeyT &Key) const
Definition: MapVector.h:163
bool empty() const
Definition: MapVector.h:79
size_type size() const
Definition: MapVector.h:60
Function * getFunction(StringRef Name) const
Look up the specified function in the module symbol table.
Definition: Module.cpp:228
Diagnostic information for optimization analysis remarks related to pointer aliasing.
Diagnostic information for optimization analysis remarks related to floating-point non-commutativity.
Diagnostic information for optimization analysis remarks.
The optimization diagnostic interface.
bool allowExtraAnalysis(StringRef PassName) const
Whether we allow for extra compile-time budget to perform more analysis to produce fewer false positi...
void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for missed-optimization remarks.
Diagnostic information for applied optimization remarks.
An analysis over an "inner" IR unit that provides access to an analysis manager over a "outer" IR uni...
Definition: PassManager.h:692
void addIncoming(Value *V, BasicBlock *BB)
Add an incoming value to the end of the PHI list.
Value * getIncomingValueForBlock(const BasicBlock *BB) const
static unsigned getIncomingValueNumForOperand(unsigned i)
static PoisonValue * get(Type *T)
Static factory methods - Return an 'poison' object of the specified type.
Definition: Constants.cpp:1878
An interface layer with SCEV used to manage how we see SCEV expressions for values in the context of ...
ScalarEvolution * getSE() const
Returns the ScalarEvolution analysis used.
const SCEVPredicate & getPredicate() const
unsigned getSmallConstantMaxTripCount()
Returns the upper bound of the loop trip count as a normal unsigned value, or 0 if the trip count is ...
const SCEV * getBackedgeTakenCount()
Get the (predicated) backedge count for the analyzed loop.
const SCEV * getSymbolicMaxBackedgeTakenCount()
Get the (predicated) symbolic max backedge count for the analyzed loop.
const SCEV * getSCEV(Value *V)
Returns the SCEV expression of V, in the context of the current SCEV predicate.
A set of analyses that are preserved following a run of a transformation pass.
Definition: Analysis.h:111
static PreservedAnalyses all()
Construct a special preserved set that preserves all passes.
Definition: Analysis.h:117
void preserveSet()
Mark an analysis set as preserved.
Definition: Analysis.h:146
void preserve()
Mark an analysis as preserved.
Definition: Analysis.h:131
An analysis pass based on the new PM to deliver ProfileSummaryInfo.
Analysis providing profile information.
bool hasProfileSummary() const
Returns true if profile summary is available.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
Definition: IVDescriptors.h:77
static bool isFMulAddIntrinsic(Instruction *I)
Returns true if the instruction is a call to the llvm.fmuladd intrinsic.
FastMathFlags getFastMathFlags() const
static unsigned getOpcode(RecurKind Kind)
Returns the opcode corresponding to the RecurrenceKind.
Type * getRecurrenceType() const
Returns the type of the recurrence.
const SmallPtrSet< Instruction *, 8 > & getCastInsts() const
Returns a reference to the instructions used for type-promoting the recurrence.
unsigned getMinWidthCastToRecurrenceTypeInBits() const
Returns the minimum width used by the recurrence in bits.
TrackingVH< Value > getRecurrenceStartValue() const
SmallVector< Instruction *, 4 > getReductionOpChain(PHINode *Phi, Loop *L) const
Attempts to find a chain of operations from Phi to LoopExitInst that can be treated as a set of reduc...
static bool isAnyOfRecurrenceKind(RecurKind Kind)
Returns true if the recurrence kind is of the form select(cmp(),x,y) where one of (x,...
static bool isFindLastIVRecurrenceKind(RecurKind Kind)
Returns true if the recurrence kind is of the form select(cmp(),x,y) where one of (x,...
bool isSigned() const
Returns true if all source operands of the recurrence are SExtInsts.
RecurKind getRecurrenceKind() const
bool isOrdered() const
Expose an ordered FP reduction to the instance users.
Value * getSentinelValue() const
Returns the sentinel value for FindLastIV recurrences to replace the start value.
static bool isMinMaxRecurrenceKind(RecurKind Kind)
Returns true if the recurrence kind is any min/max kind.
bool Need
This flag indicates if we need to add the runtime check.
std::optional< ArrayRef< PointerDiffInfo > > getDiffChecks() const
const SmallVectorImpl< RuntimePointerCheck > & getChecks() const
Returns the checks that generateChecks created.
This class represents a constant integer value.
const APInt & getAPInt() const
Helper to remove instructions inserted during SCEV expansion, unless they are marked as used.
This class uses information about analyze scalars to rewrite expressions in canonical form.
ScalarEvolution * getSE()
bool isInsertedInstruction(Instruction *I) const
Return true if the specified instruction was inserted by the code rewriter.
Value * expandCodeForPredicate(const SCEVPredicate *Pred, Instruction *Loc)
Generates a code sequence that evaluates this predicate.
This class represents an assumption made using SCEV expressions which can be checked at run-time.
virtual bool isAlwaysTrue() const =0
Returns true if the predicate is always true.
This class represents an analyzed expression in the program.
bool isOne() const
Return true if the expression is a constant one.
bool isZero() const
Return true if the expression is a constant zero.
Type * getType() const
Return the LLVM type of this SCEV expression.
Analysis pass that exposes the ScalarEvolution for a function.
The main scalar evolution driver.
const SCEV * getURemExpr(const SCEV *LHS, const SCEV *RHS)
Represents an unsigned remainder expression based on unsigned division.
const SCEV * getConstant(ConstantInt *V)
const SCEV * getSCEV(Value *V)
Return a SCEV expression for the full generality of the specified expression.
const SCEV * getOne(Type *Ty)
Return a SCEV for the constant 1 of a specific type.
void forgetLoop(const Loop *L)
This method should be called by the client when it has changed a loop in a way that may effect Scalar...
bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
bool isKnownPredicate(ICmpInst::Predicate Pred, const SCEV *LHS, const SCEV *RHS)
Test if the given expression is known to satisfy the condition described by Pred, LHS,...
bool isSCEVable(Type *Ty) const
Test if values of the given type are analyzable within the SCEV framework.
void forgetValue(Value *V)
This method should be called by the client when it has changed a value in a way that may effect its v...
void forgetBlockAndLoopDispositions(Value *V=nullptr)
Called when the client has changed the disposition of values in a loop or block.
void forgetLcssaPhiWithNewPredecessor(Loop *L, PHINode *V)
Forget LCSSA phi node V of loop L to which a new predecessor was added, such that it may no longer be...
unsigned getSmallConstantTripCount(const Loop *L)
Returns the exact trip count of the loop if we can compute it, and the result is a small constant.
APInt getUnsignedRangeMax(const SCEV *S)
Determine the max of the unsigned range for a particular SCEV.
const SCEV * applyLoopGuards(const SCEV *Expr, const Loop *L)
Try to apply information from loop guards for L to Expr.
const SCEV * getAddExpr(SmallVectorImpl< const SCEV * > &Ops, SCEV::NoWrapFlags Flags=SCEV::FlagAnyWrap, unsigned Depth=0)
Get a canonical add expression, or something simpler if possible.
This class represents the LLVM 'select' instruction.
A vector that has set insertion semantics.
Definition: SetVector.h:57
ArrayRef< value_type > getArrayRef() const
Definition: SetVector.h:84
size_type size() const
Determine the number of elements in the SetVector.
Definition: SetVector.h:98
iterator end()
Get an iterator to the end of the SetVector.
Definition: SetVector.h:113
size_type count(const key_type &key) const
Count the number of elements of a given key in the SetVector.
Definition: SetVector.h:264
bool empty() const
Determine if the SetVector is empty or not.
Definition: SetVector.h:93
iterator begin()
Get an iterator to the beginning of the SetVector.
Definition: SetVector.h:103
bool insert(const value_type &X)
Insert a new element into the SetVector.
Definition: SetVector.h:162
value_type pop_back_val()
Definition: SetVector.h:285
size_type size() const
Definition: SmallPtrSet.h:94
A templated base class for SmallPtrSet which provides the typesafe interface that is common across al...
Definition: SmallPtrSet.h:363
bool erase(PtrType Ptr)
Remove pointer from the set.
Definition: SmallPtrSet.h:401
size_type count(ConstPtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
Definition: SmallPtrSet.h:452
iterator end() const
Definition: SmallPtrSet.h:477
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:384
iterator begin() const
Definition: SmallPtrSet.h:472
bool contains(ConstPtrType Ptr) const
Definition: SmallPtrSet.h:458
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:519
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:370
bool empty() const
Definition: SmallVector.h:81
size_t size() const
Definition: SmallVector.h:78
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:573
reference emplace_back(ArgTypes &&... Args)
Definition: SmallVector.h:937
void append(ItTy in_start, ItTy in_end)
Add the specified range to the end of the SmallVector.
Definition: SmallVector.h:683
void push_back(const T &Elt)
Definition: SmallVector.h:413
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1196
An instruction for storing to memory.
Definition: Instructions.h:292
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:51
Multiway switch.
Analysis pass providing the TargetTransformInfo.
Analysis pass providing the TargetLibraryInfo.
Provides information about what library functions are available for the current target.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
std::optional< unsigned > getVScaleForTuning() const
bool isLegalMaskedScatter(Type *DataType, Align Alignment) const
Return true if the target supports masked scatter.
bool enableAggressiveInterleaving(bool LoopHasReductions) const
Don't restrict interleaved unrolling to small loops.
bool preferInLoopReduction(unsigned Opcode, Type *Ty, ReductionFlags Flags) const
bool supportsEfficientVectorElementLoadStore() const
If target has efficient vector element load/store instructions, it can return true here so that inser...
bool prefersVectorizedAddressing() const
Return true if target doesn't mind addresses in vectors.
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo Op1Info={OK_AnyValue, OP_None}, OperandValueInfo Op2Info={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const
bool hasBranchDivergence(const Function *F=nullptr) const
Return true if branch divergence exists.
InstructionCost getAddressComputationCost(Type *Ty, ScalarEvolution *SE=nullptr, const SCEV *Ptr=nullptr) const
void getUnrollingPreferences(Loop *L, ScalarEvolution &, UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE) const
Get target-customized preferences for the generic loop unrolling transformation.
InstructionCost getOperandsScalarizationOverhead(ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind) const
Estimate the overhead of scalarizing an instructions unique non-constant operands.
TypeSize getRegisterBitWidth(RegisterKind K) const
bool isLegalMaskedGather(Type *DataType, Align Alignment) const
Return true if the target supports masked gather.
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, OperandValueInfo OpdInfo={OK_AnyValue, OP_None}, const Instruction *I=nullptr) const
std::optional< unsigned > getMaxVScale() const
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, bool UseMaskForCond=false, bool UseMaskForGaps=false) const
bool enableOrderedReductions() const
Return true if we should be enabling ordered reductions for the target.
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of vector reduction intrinsics.
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const
bool shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const
TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true) const
Query the target what the preferred style of tail folding is.
unsigned getRegUsageForType(Type *Ty) const
Returns the estimated number of registers required to represent Ty.
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of a reduc...
static OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
InstructionCost getMulAccReductionCost(bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of an Add ...
unsigned getRegisterClassForType(bool Vector, Type *Ty=nullptr) const
bool isElementTypeLegalForScalableVector(Type *Ty) const
ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const
bool enableMaskedInterleavedAccessVectorization() const
Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore v...
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF=FastMathFlags(), TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr, const TargetLibraryInfo *TLibInfo=nullptr) const
This is an approximation of reciprocal throughput of a math/logic op.
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput) const
bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty, ReductionFlags Flags) const
InstructionCost getShuffleCost(ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask={}, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, int Index=0, VectorType *SubTp=nullptr, ArrayRef< const Value * > Args={}, const Instruction *CxtI=nullptr) const
const char * getRegisterClassName(unsigned ClassID) const
bool preferEpilogueVectorization() const
Return true if the loop vectorizer should consider vectorizing an otherwise scalar epilogue loop.
InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind=TTI::TCK_RecipThroughput, const Instruction *I=nullptr) const
bool hasActiveVectorLength(unsigned Opcode, Type *DataType, Align Alignment) const
unsigned getEpilogueVectorizationMinVF() const
unsigned getNumberOfRegisters(unsigned ClassID) const
bool isFPVectorizationPotentiallyUnsafe() const
Indicate that it is potentially unsafe to automatically vectorize floating-point operations because t...
bool isLegalMaskedStore(Type *DataType, Align Alignment) const
Return true if the target supports masked store.
@ TCC_Free
Expected to fold away in lowering.
InstructionCost getScalarizationOverhead(VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind, ArrayRef< Value * > VL={}) const
Estimate the overhead of scalarizing an instruction.
bool enableInterleavedAccessVectorization() const
Enable matching of interleaved access groups.
unsigned getMinTripCountTailFoldingThreshold() const
InstructionCost getInstructionCost(const User *U, ArrayRef< const Value * > Operands, TargetCostKind CostKind) const
Estimate the cost of a given IR user when lowered.
unsigned getMaxInterleaveFactor(ElementCount VF) const
unsigned getNumberOfParts(Type *Tp) const
bool isTruncateFree(Type *Ty1, Type *Ty2) const
Return true if it's free to truncate a value of type Ty1 to type Ty2.
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const
Query the target whether it would be prefered to create a predicated vector loop, which can avoid the...
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index=-1, Value *Op0=nullptr, Value *Op1=nullptr) const
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_Reverse
Reverse the order of the vector.
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency) const
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const
CastContextHint
Represents a hint about the context in which a cast is used.
@ Reversed
The cast is used with a reversed load/store.
@ Masked
The cast is used with a masked load/store.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
@ Interleave
The cast is used with an interleaved load/store.
@ GatherScatter
The cast is used with a gather/scatter.
bool isLegalMaskedLoad(Type *DataType, Align Alignment) const
Return true if the target supports masked load.
This class represents a truncation of integer types.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
This class implements a switch-like dispatch statement for a value of 'T' using dyn_cast functionalit...
Definition: TypeSwitch.h:87
TypeSwitch< T, ResultT > & Case(CallableT &&caseFn)
Add a case on the given type.
Definition: TypeSwitch.h:96
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
unsigned getIntegerBitWidth() const
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:270
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:264
static IntegerType * getInt1Ty(LLVMContext &C)
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
static Type * getVoidTy(LLVMContext &C)
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:128
bool isFloatingPointTy() const
Return true if this is one of the floating-point types.
Definition: Type.h:184
bool isIntOrPtrTy() const
Return true if this is an integer type or a pointer type.
Definition: Type.h:252
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:237
bool isTokenTy() const
Return true if this is 'token'.
Definition: Type.h:234
bool isVoidTy() const
Return true if this is 'void'.
Definition: Type.h:139
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition: Type.h:355
This function has undefined behavior.
A Use represents the edge between a Value definition and its users.
Definition: Use.h:43
op_range operands()
Definition: User.h:288
bool replaceUsesOfWith(Value *From, Value *To)
Replace uses of one Value with another.
Definition: User.cpp:21
op_iterator op_begin()
Definition: User.h:280
void setOperand(unsigned i, Value *Val)
Definition: User.h:233
Value * getOperand(unsigned i) const
Definition: User.h:228
op_iterator op_end()
Definition: User.h:282
static SmallVector< VFInfo, 8 > getMappings(const CallInst &CI)
Retrieve all the VFInfo instances associated to the CallInst CI.
Definition: VectorUtils.h:72
VPBasicBlock serves as the leaf of the Hierarchical Control-Flow Graph.
Definition: VPlan.h:3464
void appendRecipe(VPRecipeBase *Recipe)
Augment the existing recipes of a VPBasicBlock with an additional Recipe as the last recipe.
Definition: VPlan.h:3536
RecipeListTy::iterator iterator
Instruction iterators...
Definition: VPlan.h:3488
void execute(VPTransformState *State) override
The method which generates the output IR instructions that correspond to this VPBasicBlock,...
Definition: VPlan.cpp:480
iterator end()
Definition: VPlan.h:3498
iterator begin()
Recipe iterator methods.
Definition: VPlan.h:3496
iterator_range< iterator > phis()
Returns an iterator range over the PHI-like recipes in the block.
Definition: VPlan.h:3549
iterator getFirstNonPhi()
Return the position of the first non-phi node recipe in the block.
Definition: VPlan.cpp:208
void insert(VPRecipeBase *Recipe, iterator InsertPt)
Definition: VPlan.h:3527
bool empty() const
Definition: VPlan.h:3507
A recipe for vectorizing a phi-node as a sequence of mask-based select instructions.
Definition: VPlan.h:2422
VPBlockBase is the building block of the Hierarchical Control-Flow Graph.
Definition: VPlan.h:397
VPRegionBlock * getParent()
Definition: VPlan.h:489
const VPBasicBlock * getExitingBasicBlock() const
Definition: VPlan.cpp:178
void setName(const Twine &newName)
Definition: VPlan.h:482
size_t getNumSuccessors() const
Definition: VPlan.h:535
void swapSuccessors()
Swap successors of the block. The block must have exactly 2 successors.
Definition: VPlan.h:628
const VPBlocksTy & getPredecessors() const
Definition: VPlan.h:520
VPlan * getPlan()
Definition: VPlan.cpp:153
VPBlockBase * getSinglePredecessor() const
Definition: VPlan.h:531
const VPBasicBlock * getEntryBasicBlock() const
Definition: VPlan.cpp:158
VPBlockBase * getSingleSuccessor() const
Definition: VPlan.h:525
const VPBlocksTy & getSuccessors() const
Definition: VPlan.h:514
static void insertBlockAfter(VPBlockBase *NewBlock, VPBlockBase *BlockPtr)
Insert disconnected VPBlockBase NewBlock after BlockPtr.
Definition: VPlan.h:4134
static void insertOnEdge(VPBlockBase *From, VPBlockBase *To, VPBlockBase *BlockPtr)
Inserts BlockPtr on the edge between From and To.
Definition: VPlan.h:4250
static void connectBlocks(VPBlockBase *From, VPBlockBase *To, unsigned PredIdx=-1u, unsigned SuccIdx=-1u)
Connect VPBlockBases From and To bi-directionally.
Definition: VPlan.h:4188
static void reassociateBlocks(VPBlockBase *Old, VPBlockBase *New)
Reassociate all the blocks connected to Old so that they now point to New.
Definition: VPlan.h:4215
RAII object that stores the current insertion point and restores it when the object is destroyed.
VPlan-based builder utility analogous to IRBuilder.
VPValue * createICmp(CmpInst::Predicate Pred, VPValue *A, VPValue *B, DebugLoc DL={}, const Twine &Name="")
Create a new ICmp VPInstruction with predicate Pred and operands A and B.
VPValue * createOr(VPValue *LHS, VPValue *RHS, DebugLoc DL={}, const Twine &Name="")
VPScalarCastRecipe * createScalarCast(Instruction::CastOps Opcode, VPValue *Op, Type *ResultTy)
VPBasicBlock * getInsertBlock() const
VPDerivedIVRecipe * createDerivedIV(InductionDescriptor::InductionKind Kind, FPMathOperator *FPBinOp, VPValue *Start, VPValue *Current, VPValue *Step, const Twine &Name="")
Convert the input value Current to the corresponding value of an induction with Start and Step values...
VPInstruction * createOverflowingOp(unsigned Opcode, std::initializer_list< VPValue * > Operands, VPRecipeWithIRFlags::WrapFlagsTy WrapFlags, DebugLoc DL={}, const Twine &Name="")
VPInstruction * createNaryOp(unsigned Opcode, ArrayRef< VPValue * > Operands, Instruction *Inst=nullptr, const Twine &Name="")
Create an N-ary operation with Opcode, Operands and set Inst as its underlying Instruction.
VPValue * createNot(VPValue *Operand, DebugLoc DL={}, const Twine &Name="")
VPValue * createLogicalAnd(VPValue *LHS, VPValue *RHS, DebugLoc DL={}, const Twine &Name="")
VPValue * createSelect(VPValue *Cond, VPValue *TrueVal, VPValue *FalseVal, DebugLoc DL={}, const Twine &Name="", std::optional< FastMathFlags > FMFs=std::nullopt)
void setInsertPoint(VPBasicBlock *TheBB)
This specifies that created VPInstructions should be appended to the end of the specified block.
Canonical scalar induction phi of the vector loop.
Definition: VPlan.h:3161
Type * getScalarType() const
Returns the scalar type of the induction.
Definition: VPlan.h:3192
VPValue * getVPSingleValue()
Returns the only VPValue defined by the VPDef.
Definition: VPlanValue.h:387
void execute(VPTransformState &State) override
Generate the transformed value of the induction at offset StartValue (1.
VPValue * getStepValue() const
Definition: VPlan.h:3394
VPValue * getStartValue() const
Definition: VPlan.h:3393
A pure virtual base class for all recipes modeling header phis, including phis for first order recurr...
Definition: VPlan.h:2020
virtual VPValue * getBackedgeValue()
Returns the incoming value from the loop backedge.
Definition: VPlan.h:2068
VPValue * getStartValue()
Returns the start value of the phi, if one is set.
Definition: VPlan.h:2057
A recipe representing a sequence of load -> update -> store as part of a histogram operation.
Definition: VPlan.h:1769
A special type of VPBasicBlock that wraps an existing IR basic block.
Definition: VPlan.h:3603
A recipe to wrap on original IR instruction not to be modified during execution, execept for PHIs.
Definition: VPlan.h:1376
This is a concrete Recipe that models a single VPlan-level instruction.
Definition: VPlan.h:1191
@ ResumePhi
Creates a scalar phi in a leaf VPBB with a single predecessor in VPlan.
Definition: VPlan.h:1209
VPInterleaveRecipe is a recipe for transforming an interleave group of load or stores into one wide l...
Definition: VPlan.h:2489
In what follows, the term "input IR" refers to code that is fed into the vectorizer whereas the term ...
Definition: VPlan.h:153
static VPLane getLastLaneForVF(const ElementCount &VF)
Definition: VPlan.h:194
static VPLane getFirstLane()
Definition: VPlan.h:178
VPRecipeBase is a base class modeling a sequence of one or more output IR instructions.
Definition: VPlan.h:714
VPBasicBlock * getParent()
Definition: VPlan.h:739
DebugLoc getDebugLoc() const
Returns the debug location of the recipe.
Definition: VPlan.h:808
void insertBefore(VPRecipeBase *InsertPos)
Insert an unlinked recipe into a basic block immediately before the specified recipe.
void insertAfter(VPRecipeBase *InsertPos)
Insert an unlinked Recipe into a basic block immediately after the specified Recipe.
iplist< VPRecipeBase >::iterator eraseFromParent()
This method unlinks 'this' from the containing basic block and deletes it.
Helper class to create VPRecipies from IR instructions.
VPValue * createEdgeMask(BasicBlock *Src, BasicBlock *Dst)
A helper function that computes the predicate of the edge between SRC and DST.
VPReplicateRecipe * handleReplication(Instruction *I, VFRange &Range)
Build a VPReplicationRecipe for I.
void createSwitchEdgeMasks(SwitchInst *SI)
Create an edge mask for every destination of cases and/or default.
VPValue * getBlockInMask(BasicBlock *BB) const
Returns the entry mask for the block BB.
VPValue * getEdgeMask(BasicBlock *Src, BasicBlock *Dst) const
A helper that returns the previously computed predicate of the edge between SRC and DST.
iterator_range< mapped_iterator< Use *, std::function< VPValue *(Value *)> > > mapToVPValues(User::op_range Operands)
Returns a range mapping the values of the range Operands to their corresponding VPValues.
void fixHeaderPhis()
Add the incoming values from the backedge to reduction & first-order recurrence cross-iteration phis.
VPRecipeBase * tryToCreateWidenRecipe(Instruction *Instr, ArrayRef< VPValue * > Operands, VFRange &Range, VPBasicBlock *VPBB)
Create and return a widened recipe for I if one can be created within the given VF Range.
VPValue * getVPValueOrAddLiveIn(Value *V)
void createHeaderMask()
Create the mask for the vector loop header block.
void createBlockInMask(BasicBlock *BB)
A helper function that computes the predicate of the block BB, assuming that the header block of the ...
VPRecipeBase * getRecipe(Instruction *I)
Return the recipe created for given ingredient.
void setFlags(Instruction *I) const
Set the IR flags for I.
Definition: VPlan.h:1105
A recipe for handling reduction phis.
Definition: VPlan.h:2363
bool isInLoop() const
Returns true, if the phi is part of an in-loop reduction.
Definition: VPlan.h:2417
const RecurrenceDescriptor & getRecurrenceDescriptor() const
Definition: VPlan.h:2409
A recipe to represent inloop reduction operations, performing a reduction on a vector operand into a ...
Definition: VPlan.h:2584
VPRegionBlock represents a collection of VPBasicBlocks and VPRegionBlocks which form a Single-Entry-S...
Definition: VPlan.h:3635
const VPBlockBase * getEntry() const
Definition: VPlan.h:3668
bool isReplicator() const
An indicator whether this region is to generate multiple replicated instances of output IR correspond...
Definition: VPlan.h:3700
VPReplicateRecipe replicates a given instruction producing multiple scalar copies of the original sca...
Definition: VPlan.h:2705
void execute(VPTransformState &State) override
Generate replicas of the desired Ingredient.
bool isUniform() const
Definition: VPlan.h:2749
bool shouldPack() const
Returns true if the recipe is used by a widened recipe via an intervening VPPredInstPHIRecipe.
A recipe to compute the pointers for widened memory accesses of IndexTy in reverse order.
Definition: VPlan.h:1897
VPSingleDef is a base class for recipes for modeling a sequence of one or more output IR that define ...
Definition: VPlan.h:841
Instruction * getUnderlyingInstr()
Returns the underlying instruction.
Definition: VPlan.h:910
An analysis for type-inference for VPValues.
Definition: VPlanAnalysis.h:40
Type * inferScalarType(const VPValue *V)
Infer the type of V. Returns the scalar type of V.
This class augments VPValue with operands which provide the inverse def-use edges from VPValue's user...
Definition: VPlanValue.h:200
operand_range operands()
Definition: VPlanValue.h:257
void setOperand(unsigned I, VPValue *New)
Definition: VPlanValue.h:242
unsigned getNumOperands() const
Definition: VPlanValue.h:236
VPValue * getOperand(unsigned N) const
Definition: VPlanValue.h:237
void addOperand(VPValue *Operand)
Definition: VPlanValue.h:231
VPRecipeBase * getDefiningRecipe()
Returns the recipe defining this VPValue or nullptr if it is not defined by a recipe,...
Definition: VPlan.cpp:123
void replaceAllUsesWith(VPValue *New)
Definition: VPlan.cpp:1409
Value * getLiveInIRValue()
Returns the underlying IR value, if this VPValue is defined outside the scope of VPlan.
Definition: VPlanValue.h:172
bool isLiveIn() const
Returns true if this VPValue is a live-in, i.e. defined outside the VPlan.
Definition: VPlanValue.h:167
void replaceUsesWithIf(VPValue *New, llvm::function_ref< bool(VPUser &U, unsigned Idx)> ShouldReplace)
Go through the uses list for this VPValue and make each use point to New if the callback ShouldReplac...
Definition: VPlan.cpp:1413
user_range users()
Definition: VPlanValue.h:132
A recipe to compute the pointers for widened memory accesses of IndexTy.
Definition: VPlan.h:1950
A recipe for widening Call instructions using library calls.
Definition: VPlan.h:1713
A Recipe for widening the canonical induction variable of the vector loop.
Definition: VPlan.h:3302
VPWidenCastRecipe is a recipe to create vector cast instructions.
Definition: VPlan.h:1523
A recipe for handling GEP instructions.
Definition: VPlan.h:1848
Base class for widened induction (VPWidenIntOrFpInductionRecipe and VPWidenPointerInductionRecipe),...
Definition: VPlan.h:2082
VPValue * getStepValue()
Returns the step value of the induction.
Definition: VPlan.h:2101
const InductionDescriptor & getInductionDescriptor() const
Returns the induction descriptor for the recipe.
Definition: VPlan.h:2107
A recipe for handling phi nodes of integer and floating-point inductions, producing their vector valu...
Definition: VPlan.h:2126
A recipe for widening vector intrinsics.
Definition: VPlan.h:1621
A common base class for widening memory operations.
Definition: VPlan.h:2878
A recipe for handling phis that are widened in the vector loop.
Definition: VPlan.h:2286
VPValue * getIncomingValue(unsigned I)
Returns the I th incoming VPValue.
Definition: VPlan.h:2325
VPBasicBlock * getIncomingBlock(unsigned I)
Returns the I th incoming VPBasicBlock.
Definition: VPlan.h:2322
VPWidenRecipe is a recipe for producing a widened instruction using the opcode and operands of the re...
Definition: VPlan.h:1425
Main class to build the VPlan H-CFG for an incoming IR.
VPlan models a candidate for vectorization, encoding various decisions take to produce efficient outp...
Definition: VPlan.h:3731
void prepareToExecute(Value *TripCount, Value *VectorTripCount, VPTransformState &State)
Prepare the plan for execution, setting up the required live-in values.
Definition: VPlan.cpp:924
VPBasicBlock * getEntry()
Definition: VPlan.h:3844
VPValue & getVectorTripCount()
The vector trip count.
Definition: VPlan.h:3902
VPValue & getVFxUF()
Returns VF * UF of the vector loop region.
Definition: VPlan.h:3908
VPValue & getVF()
Returns the VF of the vector loop region.
Definition: VPlan.h:3905
VPValue * getTripCount() const
The trip count of the original loop.
Definition: VPlan.h:3881
VPValue * getOrCreateBackedgeTakenCount()
The backedge taken count of the original loop.
Definition: VPlan.h:3895
iterator_range< SmallSetVector< ElementCount, 2 >::iterator > vectorFactors() const
Returns an iterator range over all VFs of the plan.
Definition: VPlan.h:3925
unsigned getUF() const
Definition: VPlan.h:3933
static VPlanPtr createInitialVPlan(Type *InductionTy, PredicatedScalarEvolution &PSE, bool RequiresScalarEpilogueCheck, bool TailFolded, Loop *TheLoop)
Create initial VPlan, having an "entry" VPBasicBlock (wrapping original scalar pre-header) which cont...
Definition: VPlan.cpp:845
bool hasVF(ElementCount VF)
Definition: VPlan.h:3918
bool hasUF(unsigned UF) const
Definition: VPlan.h:3931
auto getExitBlocks()
Return an iterator range over the VPIRBasicBlock wrapping the exit blocks of the VPlan,...
Definition: VPlanCFG.h:309
VPRegionBlock * getVectorLoopRegion()
Returns the VPRegionBlock of the vector loop.
Definition: VPlan.cpp:1047
InstructionCost cost(ElementCount VF, VPCostContext &Ctx)
Return the cost of this plan.
Definition: VPlan.cpp:1041
const VPBasicBlock * getMiddleBlock() const
Returns the 'middle' block of the plan, that is the block that selects whether to execute the scalar ...
Definition: VPlan.h:3859
void resetTripCount(VPValue *NewTripCount)
Resets the trip count for the VPlan.
Definition: VPlan.h:3888
void setEntry(VPBasicBlock *VPBB)
Definition: VPlan.h:3814
VPIRBasicBlock * createVPIRBasicBlock(BasicBlock *IRBB)
Create a VPIRBasicBlock from IRBB containing VPIRInstructions for all instructions in IRBB,...
Definition: VPlan.cpp:1247
VPValue * getOrAddLiveIn(Value *V)
Gets the live-in VPValue for V or adds a new live-in (if none exists yet) for V.
Definition: VPlan.h:3951
VPBasicBlock * getScalarPreheader() const
Return the VPBasicBlock for the preheader of the scalar loop.
Definition: VPlan.h:3867
void execute(VPTransformState *State)
Generate the IR code for this VPlan.
Definition: VPlan.cpp:955
VPCanonicalIVPHIRecipe * getCanonicalIV()
Returns the canonical induction recipe of the vector loop.
Definition: VPlan.h:3985
VPIRBasicBlock * getScalarHeader() const
Return the VPIRBasicBlock wrapping the header of the scalar loop.
Definition: VPlan.h:3872
VPValue * getSCEVExpansion(const SCEV *S) const
Definition: VPlan.h:3994
VPBasicBlock * getVectorPreheader()
Returns the preheader of the vector loop region.
Definition: VPlan.h:3848
VPlan * duplicate()
Clone the current VPlan, update all VPValues of the new VPlan and cloned recipes to refer to the clon...
Definition: VPlan.cpp:1187
LLVM Value Representation.
Definition: Value.h:74
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
bool hasOneUser() const
Return true if there is exactly one user of this value.
Definition: Value.cpp:157
void setName(const Twine &Name)
Change the name of the value.
Definition: Value.cpp:377
void replaceAllUsesWith(Value *V)
Change all uses of this to point to a new Value.
Definition: Value.cpp:534
iterator_range< user_iterator > users()
Definition: Value.h:421
void replaceUsesWithIf(Value *New, llvm::function_ref< bool(Use &U)> ShouldReplace)
Go through the uses list for this definition and make each use point to "V" if the callback ShouldRep...
Definition: Value.cpp:542
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:1075
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:309
static VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
static bool isValidElementType(Type *ElemTy)
Return true if the specified type is valid as a element type.
std::pair< iterator, bool > insert(const ValueT &V)
Definition: DenseSet.h:213
bool contains(const_arg_type_t< ValueT > V) const
Check if the set contains the given element.
Definition: DenseSet.h:193
constexpr ScalarTy getFixedValue() const
Definition: TypeSize.h:202
static constexpr bool isKnownLE(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition: TypeSize.h:232
constexpr bool isNonZero() const
Definition: TypeSize.h:158
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition: TypeSize.h:218
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition: TypeSize.h:171
constexpr LeafTy multiplyCoefficientBy(ScalarTy RHS) const
Definition: TypeSize.h:258
constexpr bool isFixed() const
Returns true if the quantity is not scaled by vscale.
Definition: TypeSize.h:174
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition: TypeSize.h:168
constexpr bool isZero() const
Definition: TypeSize.h:156
static constexpr bool isKnownGT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition: TypeSize.h:225
constexpr LeafTy divideCoefficientBy(ScalarTy RHS) const
We do not provide the '/' operator here because division for polynomial types does not work in the sa...
Definition: TypeSize.h:254
static constexpr bool isKnownGE(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition: TypeSize.h:239
An efficient, type-erasing, non-owning reference to a callable.
const ParentTy * getParent() const
Definition: ilist_node.h:32
A range adaptor for a pair of iterators.
IteratorT end() const
IteratorT begin() const
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:661
This provides a very simple, boring adaptor for a begin and end iterator into a range type.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:125
@ Entry
Definition: COFF.h:844
@ Tail
Attemps to make calls as fast as possible while guaranteeing that tail call optimization can always b...
Definition: CallingConv.h:76
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
ID ArrayRef< Type * > Tys
Definition: Intrinsics.h:102
std::variant< std::monostate, Loc::Single, Loc::Multi, Loc::MMI, Loc::EntryValue > Variant
Alias for the std::variant specialization base class of DbgVariable.
Definition: DwarfDebug.h:190
specific_intval< false > m_SpecificInt(const APInt &V)
Match a specific integer value or vector with all elements equal to the value.
Definition: PatternMatch.h:982
bool match(Val *V, const Pattern &P)
Definition: PatternMatch.h:49
bind_ty< Instruction > m_Instruction(Instruction *&I)
Match an instruction, capturing it if we match.
Definition: PatternMatch.h:826
specificval_ty m_Specific(const Value *V)
Match if we have a specific specified value.
Definition: PatternMatch.h:885
BinaryOp_match< LHS, RHS, Instruction::Mul > m_Mul(const LHS &L, const RHS &R)
OneUse_match< T > m_OneUse(const T &SubPattern)
Definition: PatternMatch.h:67
auto m_LogicalOr()
Matches L || R where L and R are arbitrary values.
class_match< Value > m_Value()
Match an arbitrary value and ignore it.
Definition: PatternMatch.h:92
match_combine_or< CastInst_match< OpTy, ZExtInst >, CastInst_match< OpTy, SExtInst > > m_ZExtOrSExt(const OpTy &Op)
auto m_LogicalAnd()
Matches L && R where L and R are arbitrary values.
ValuesClass values(OptsTy... Options)
Helper to build a ValuesClass by forwarding a variable number of arguments as an initializer list to ...
Definition: CommandLine.h:711
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:443
DiagnosticInfoOptimizationBase::Argument NV
NodeAddr< InstrNode * > Instr
Definition: RDFGraph.h:389
NodeAddr< PhiNode * > Phi
Definition: RDFGraph.h:390
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:226
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:235
bool isUniformAfterVectorization(const VPValue *VPV)
Returns true if VPV is uniform after vectorization.
Definition: VPlanUtils.h:39
VPValue * getOrCreateVPValueForSCEVExpr(VPlan &Plan, const SCEV *Expr, ScalarEvolution &SE)
Get or create a VPValue that corresponds to the expansion of Expr.
Definition: VPlanUtils.cpp:26
const SCEV * getSCEVExprForVPValue(VPValue *V, ScalarEvolution &SE)
Return the SCEV expression for V.
Definition: VPlanUtils.cpp:65
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
bool simplifyLoop(Loop *L, DominatorTree *DT, LoopInfo *LI, ScalarEvolution *SE, AssumptionCache *AC, MemorySSAUpdater *MSSAU, bool PreserveLCSSA)
Simplify each loop in a loop nest recursively.
void ReplaceInstWithInst(BasicBlock *BB, BasicBlock::iterator &BI, Instruction *I)
Replace the instruction specified by BI with the instruction specified by I.
@ Offset
Definition: DWP.cpp:480
Value * addRuntimeChecks(Instruction *Loc, Loop *TheLoop, const SmallVectorImpl< RuntimePointerCheck > &PointerChecks, SCEVExpander &Expander, bool HoistRuntimeChecks=false)
Add code that checks at runtime if the accessed arrays in PointerChecks overlap.
Definition: LoopUtils.cpp:1954
bool RemoveRedundantDbgInstrs(BasicBlock *BB)
Try to remove redundant dbg.value instructions from given basic block.
std::optional< unsigned > getLoopEstimatedTripCount(Loop *L, unsigned *EstimatedLoopInvocationWeight=nullptr)
Returns a loop's estimated trip count based on branch weight metadata.
Definition: LoopUtils.cpp:850
static void reportVectorization(OptimizationRemarkEmitter *ORE, Loop *TheLoop, VectorizationFactor VF, unsigned IC)
Report successful vectorization of the loop.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1739
unsigned getLoadStoreAddressSpace(const Value *I)
A helper function that returns the address space of the pointer operand of load or store instruction.
Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
Definition: LoopUtils.cpp:989
auto size(R &&Range, std::enable_if_t< std::is_base_of< std::random_access_iterator_tag, typename std::iterator_traits< decltype(Range.begin())>::iterator_category >::value, void > *=nullptr)
Get the size of a range.
Definition: STLExtras.h:1697
Intrinsic::ID getVectorIntrinsicIDForCall(const CallInst *CI, const TargetLibraryInfo *TLI)
Returns intrinsic ID for call.
auto enumerate(FirstRange &&First, RestRanges &&...Rest)
Given two or more input ranges, returns a new range whose values are tuples (A, B,...
Definition: STLExtras.h:2448
auto pred_end(const MachineBasicBlock *BB)
bool verifyFunction(const Function &F, raw_ostream *OS=nullptr)
Check a function for errors, useful for use when debugging a pass.
Definition: Verifier.cpp:7297
auto successors(const MachineBasicBlock *BB)
const Value * getLoadStorePointerOperand(const Value *V)
A helper function that returns the pointer operand of a load or store instruction.
std::pair< Instruction *, ElementCount > InstructionVFPair
Value * getRuntimeVF(IRBuilderBase &B, Type *Ty, ElementCount VF)
Return the runtime value for VF.
bool formLCSSARecursively(Loop &L, const DominatorTree &DT, const LoopInfo *LI, ScalarEvolution *SE)
Put a loop nest into LCSSA form.
Definition: LCSSA.cpp:465
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
std::optional< MDNode * > makeFollowupLoopID(MDNode *OrigLoopID, ArrayRef< StringRef > FollowupAttrs, const char *InheritOptionsAttrsPrefix="", bool AlwaysNew=false)
Create a new loop identifier for a loop created from a loop transformation.
Definition: LoopUtils.cpp:263
void append_range(Container &C, Range &&R)
Wrapper function to append range R to container C.
Definition: STLExtras.h:2115
bool shouldOptimizeForSize(const MachineFunction *MF, ProfileSummaryInfo *PSI, const MachineBlockFrequencyInfo *BFI, PGSOQueryType QueryType=PGSOQueryType::Other)
Returns true if machine function MF is suggested to be size-optimized based on the profile.
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
Definition: STLExtras.h:657
Align getLoadStoreAlignment(const Value *I)
A helper function that returns the alignment of load or store instruction.
iterator_range< df_iterator< VPBlockShallowTraversalWrapper< VPBlockBase * > > > vp_depth_first_shallow(VPBlockBase *G)
Returns an iterator range to traverse the graph starting at G in depth-first order.
Definition: VPlanCFG.h:214
bool VerifySCEV
iterator_range< df_iterator< VPBlockDeepTraversalWrapper< VPBlockBase * > > > vp_depth_first_deep(VPBlockBase *G)
Returns an iterator range to traverse the graph starting at G in depth-first order while traversing t...
Definition: VPlanCFG.h:226
auto map_range(ContainerTy &&C, FuncTy F)
Definition: STLExtras.h:377
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1746
void collectEphemeralRecipesForVPlan(VPlan &Plan, DenseSet< VPRecipeBase * > &EphRecipes)
auto reverse(ContainerTy &&C)
Definition: STLExtras.h:420
void setBranchWeights(Instruction &I, ArrayRef< uint32_t > Weights, bool IsExpected)
Create a new branch_weights metadata node and add or overwrite a prof metadata reference to instructi...
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:291
cl::opt< bool > EnableVPlanNativePath("enable-vplan-native-path", cl::Hidden, cl::desc("Enable VPlan-native vectorization path with " "support for outer loop vectorization."))
Definition: VPlan.cpp:53
void sort(IteratorTy Start, IteratorTy End)
Definition: STLExtras.h:1664
std::unique_ptr< VPlan > VPlanPtr
Definition: VPlan.h:144
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
bool none_of(R &&Range, UnaryPredicate P)
Provide wrappers to std::none_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1753
cl::opt< bool > EnableLoopVectorization
bool wouldInstructionBeTriviallyDead(const Instruction *I, const TargetLibraryInfo *TLI=nullptr)
Return true if the result produced by the instruction would have no side effects if it was not used.
Definition: Local.cpp:425
bool isSafeToSpeculativelyExecute(const Instruction *I, const Instruction *CtxI=nullptr, AssumptionCache *AC=nullptr, const DominatorTree *DT=nullptr, const TargetLibraryInfo *TLI=nullptr, bool UseVariableInfo=true)
Return true if the instruction does not have any effects besides calculating the result and does not ...
iterator_range< filter_iterator< detail::IterOfRange< RangeT >, PredicateT > > make_filter_range(RangeT &&Range, PredicateT Pred)
Convenience function that takes a range of elements and a predicate, and return a new filter_iterator...
Definition: STLExtras.h:573
void llvm_unreachable_internal(const char *msg=nullptr, const char *file=nullptr, unsigned line=0)
This function calls abort(), and prints the optional message to stderr.
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:125
auto drop_end(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the last N elements excluded.
Definition: STLExtras.h:336
constexpr T divideCeil(U Numerator, V Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition: MathExtras.h:403
TargetTransformInfo TTI
static void reportVectorizationInfo(const StringRef Msg, const StringRef ORETag, OptimizationRemarkEmitter *ORE, Loop *TheLoop, Instruction *I=nullptr, DebugLoc DL={})
Reports an informative message: print Msg for debugging purposes as well as an optimization remark.
bool isAssignmentTrackingEnabled(const Module &M)
Return true if assignment tracking is enabled for module M.
Definition: DebugInfo.cpp:2298
RecurKind
These are the kinds of recurrences that we support.
Definition: IVDescriptors.h:33
@ Or
Bitwise or logical OR of integers.
@ FMulAdd
Sum of float products with llvm.fmuladd(a * b + sum).
void setProfileInfoAfterUnrolling(Loop *OrigLoop, Loop *UnrolledLoop, Loop *RemainderLoop, uint64_t UF)
Set weights for UnrolledLoop and RemainderLoop based on weights for OrigLoop and the following distri...
Definition: LoopUtils.cpp:1761
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:155
void reportVectorizationFailure(const StringRef DebugMsg, const StringRef OREMsg, const StringRef ORETag, OptimizationRemarkEmitter *ORE, Loop *TheLoop, Instruction *I=nullptr)
Reports a vectorization failure: print DebugMsg for debugging purposes along with the corresponding o...
DWARFExpression::Operation Op
ScalarEpilogueLowering
@ CM_ScalarEpilogueNotAllowedLowTripLoop
@ CM_ScalarEpilogueNotNeededUsePredicate
@ CM_ScalarEpilogueNotAllowedOptSize
@ CM_ScalarEpilogueAllowed
@ CM_ScalarEpilogueNotAllowedUsePredicate
auto count_if(R &&Range, UnaryPredicate P)
Wrapper function around std::count_if to count the number of times an element satisfying a given pred...
Definition: STLExtras.h:1945
auto pred_begin(const MachineBasicBlock *BB)
Value * createStepForVF(IRBuilderBase &B, Type *Ty, ElementCount VF, int64_t Step)
Return a value for Step multiplied by VF.
BasicBlock * SplitBlock(BasicBlock *Old, BasicBlock::iterator SplitPt, DominatorTree *DT, LoopInfo *LI=nullptr, MemorySSAUpdater *MSSAU=nullptr, const Twine &BBName="", bool Before=false)
Split the specified block at the specified instruction.
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1766
auto predecessors(const MachineBasicBlock *BB)
bool is_contained(R &&Range, const E &Element)
Returns true if Element is found in Range.
Definition: STLExtras.h:1903
Type * getLoadStoreType(const Value *I)
A helper function that returns the type of a load or store instruction.
Value * addDiffRuntimeChecks(Instruction *Loc, ArrayRef< PointerDiffInfo > Checks, SCEVExpander &Expander, function_ref< Value *(IRBuilderBase &, unsigned)> GetVF, unsigned IC)
Definition: LoopUtils.cpp:2012
bool all_equal(std::initializer_list< T > Values)
Returns true if all Values in the initializer lists are equal or the list.
Definition: STLExtras.h:2087
InstructionCost Cost
@ DataAndControlFlowWithoutRuntimeCheck
Use predicate to control both data and control flow, but modify the trip count so that a runtime over...
@ None
Don't use tail folding.
@ DataWithEVL
Use predicated EVL instructions for tail-folding.
@ DataWithoutLaneMask
Same as Data, but avoids using the get.active.lane.mask intrinsic to calculate the mask and instead i...
unsigned getReciprocalPredBlockProb()
A helper function that returns the reciprocal of the block probability of predicated blocks.
Definition: VPlan.h:92
bool hasBranchWeightMD(const Instruction &I)
Checks if an instructions has Branch Weight Metadata.
hash_code hash_combine(const Ts &...args)
Combine values into a single hash_code.
Definition: Hashing.h:590
T bit_floor(T Value)
Returns the largest integral power of two no greater than Value if Value is nonzero.
Definition: bit.h:327
Type * toVectorTy(Type *Scalar, ElementCount EC)
A helper function for converting Scalar types to vector types.
bool verifyVPlanIsValid(const VPlan &Plan)
Verify invariants for general VPlans.
MapVector< Instruction *, uint64_t > computeMinimumValueSizes(ArrayRef< BasicBlock * > Blocks, DemandedBits &DB, const TargetTransformInfo *TTI=nullptr)
Compute a map of integer instructions to their minimum legal type size.
hash_code hash_combine_range(InputIteratorT first, InputIteratorT last)
Compute a hash_code for a sequence of values.
Definition: Hashing.h:468
cl::opt< bool > EnableLoopInterleaving
Implement std::hash so that hash_code can be used in STL containers.
Definition: BitVector.h:858
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
A special type used by analysis passes to provide an address that identifies that particular analysis...
Definition: Analysis.h:28
static void collectEphemeralValues(const Loop *L, AssumptionCache *AC, SmallPtrSetImpl< const Value * > &EphValues)
Collect a loop's ephemeral values (those used only by an assume or similar intrinsics in the loop).
Definition: CodeMetrics.cpp:71
An information struct used to provide DenseMap with the various necessary components for a given valu...
Definition: DenseMapInfo.h:52
Encapsulate information regarding vectorization of a loop and its epilogue.
EpilogueLoopVectorizationInfo(ElementCount MVF, unsigned MUF, ElementCount EVF, unsigned EUF, VPlan &EpiloguePlan)
A class that represents two vectorization factors (initialized with 0 by default).
static FixedScalableVFPair getNone()
This holds details about a histogram operation – a load -> update -> store sequence where each lane i...
A struct that represents some properties of the register usage of a loop.
SmallMapVector< unsigned, unsigned, 4 > MaxLocalUsers
Holds the maximum number of concurrent live intervals in the loop.
SmallMapVector< unsigned, unsigned, 4 > LoopInvariantRegs
Holds the number of loop invariant values that are used in the loop.
TargetLibraryInfo * TLI
LoopVectorizeResult runImpl(Function &F)
ProfileSummaryInfo * PSI
LoopAccessInfoManager * LAIs
void printPipeline(raw_ostream &OS, function_ref< StringRef(StringRef)> MapClassName2PassName)
LoopVectorizePass(LoopVectorizeOptions Opts={})
BlockFrequencyInfo * BFI
ScalarEvolution * SE
AssumptionCache * AC
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM)
OptimizationRemarkEmitter * ORE
Storage for information about made changes.
A CRTP mix-in to automatically provide informational APIs needed for passes.
Definition: PassManager.h:69
A marker analysis to determine if extra passes should be run after loop vectorization.
A MapVector that performs no allocations if smaller than a certain size.
Definition: MapVector.h:254
Flags describing the kind of vector reduction.
Parameters that control the generic loop unrolling transformation.
bool UnrollVectorizedLoop
Don't disable runtime unroll for the loops which were vectorized.
Holds the VFShape for a specific scalar to vector function mapping.
std::optional< unsigned > getParamIndexForOptionalMask() const
Instruction Set Architecture.
Encapsulates information needed to describe a parameter.
A range of powers-of-2 vectorization factors with fixed start and adjustable end.
Definition: VPlan.h:97
ElementCount End
Definition: VPlan.h:102
Struct to hold various analysis needed for cost computations.
Definition: VPlan.h:682
LoopVectorizationCostModel & CM
Definition: VPlan.h:687
bool skipCostComputation(Instruction *UI, bool IsVector) const
Return true if the cost for UI shouldn't be computed, e.g.
InstructionCost getLegacyCost(Instruction *UI, ElementCount VF) const
Return the cost for UI with VF using the legacy cost model as fallback until computing the cost of al...
SmallPtrSet< Instruction *, 8 > SkipCostComputation
Definition: VPlan.h:688
A recipe for handling first-order recurrence phis.
Definition: VPlan.h:2331
BasicBlock * PrevBB
The previous IR BasicBlock created or used.
Definition: VPlan.h:344
SmallDenseMap< VPBasicBlock *, BasicBlock * > VPBB2IRBB
A mapping of each VPBasicBlock to the corresponding BasicBlock.
Definition: VPlan.h:352
VPTransformState holds information passed down when "executing" a VPlan, needed for generating the ou...
Definition: VPlan.h:236
DenseMap< const SCEV *, Value * > ExpandedSCEVs
Map SCEVs to their expanded values.
Definition: VPlan.h:389
VPTypeAnalysis TypeAnalysis
VPlan-based type analysis.
Definition: VPlan.h:392
void packScalarIntoVectorValue(VPValue *Def, const VPLane &Lane)
Construct the vector value of a scalarized value V one lane at a time.
Definition: VPlan.cpp:394
Value * get(VPValue *Def, bool IsScalar=false)
Get the generated vector Value for a given VPValue Def if IsScalar is false, otherwise return the gen...
Definition: VPlan.cpp:249
struct llvm::VPTransformState::CFGState CFG
LoopVersioning * LVer
LoopVersioning.
Definition: VPlan.h:385
void addNewMetadata(Instruction *To, const Instruction *Orig)
Add additional metadata to To that was not present on Orig.
Definition: VPlan.cpp:353
std::optional< VPLane > Lane
Hold the index to generate specific scalar instructions.
Definition: VPlan.h:250
IRBuilderBase & Builder
Hold a reference to the IRBuilder used to generate output IR code.
Definition: VPlan.h:369
VPlan * Plan
Pointer to the VPlan code is generated for.
Definition: VPlan.h:375
InnerLoopVectorizer * ILV
Hold a pointer to InnerLoopVectorizer to reuse its IR generation methods.
Definition: VPlan.h:372
ElementCount VF
The chosen Vectorization Factor of the loop being vectorized.
Definition: VPlan.h:245
void setDebugLocFrom(DebugLoc DL)
Set the debug location in the builder using the debug location DL.
Definition: VPlan.cpp:372
void set(VPValue *Def, Value *V, bool IsScalar=false)
Set the generated vector Value for a given VPValue, if IsScalar is false.
Definition: VPlan.h:279
A recipe for widening load operations, using the address to load from and an optional mask.
Definition: VPlan.h:2958
A recipe for widening select instructions.
Definition: VPlan.h:1810
A recipe for widening store operations, using the stored value, the address to store to and an option...
Definition: VPlan.h:3036
static void handleUncountableEarlyExit(VPlan &Plan, ScalarEvolution &SE, Loop *OrigLoop, BasicBlock *UncountableExitingBlock, VPRecipeBuilder &RecipeBuilder)
Update Plan to account for the uncountable early exit block in UncountableExitingBlock by.
static void convertToConcreteRecipes(VPlan &Plan)
Lower abstract recipes to concrete ones, that can be codegen'd.
static void unrollByUF(VPlan &Plan, unsigned UF, LLVMContext &Ctx)
Explicitly unroll Plan by UF.
static void dropPoisonGeneratingRecipes(VPlan &Plan, function_ref< bool(BasicBlock *)> BlockNeedsPredication)
Drop poison flags from recipes that may generate a poison value that is used after vectorization,...
static void createInterleaveGroups(VPlan &Plan, const SmallPtrSetImpl< const InterleaveGroup< Instruction > * > &InterleaveGroups, VPRecipeBuilder &RecipeBuilder, bool ScalarEpilogueAllowed)
static void removeDeadRecipes(VPlan &Plan)
Remove dead recipes from Plan.
static void clearReductionWrapFlags(VPlan &Plan)
Clear NSW/NUW flags from reduction instructions if necessary.
static bool tryAddExplicitVectorLength(VPlan &Plan, const std::optional< unsigned > &MaxEVLSafeElements)
Add a VPEVLBasedIVPHIRecipe and related recipes to Plan and replaces all uses except the canonical IV...
static void VPInstructionsToVPRecipes(VPlanPtr &Plan, function_ref< const InductionDescriptor *(PHINode *)> GetIntOrFpInductionDescriptor, ScalarEvolution &SE, const TargetLibraryInfo &TLI)
Replaces the VPInstructions in Plan with corresponding widen recipes.
static void addActiveLaneMask(VPlan &Plan, bool UseActiveLaneMaskForControlFlow, bool DataAndControlFlowWithoutRuntimeCheck)
Replace (ICMP_ULE, wide canonical IV, backedge-taken-count) checks with an (active-lane-mask recipe,...
static void optimize(VPlan &Plan)
Apply VPlan-to-VPlan optimizations to Plan, including induction recipe optimizations,...
static void truncateToMinimalBitwidths(VPlan &Plan, const MapVector< Instruction *, uint64_t > &MinBWs)
Insert truncates and extends for any truncated recipe.
static bool adjustFixedOrderRecurrences(VPlan &Plan, VPBuilder &Builder)
Try to have all users of fixed-order recurrences appear after the recipe defining their previous valu...
static void optimizeForVFAndUF(VPlan &Plan, ElementCount BestVF, unsigned BestUF, PredicatedScalarEvolution &PSE)
Optimize Plan based on BestVF and BestUF.
TODO: The following VectorizationFactor was pulled out of LoopVectorizationCostModel class.
InstructionCost Cost
Cost of the loop with that width.
ElementCount MinProfitableTripCount
The minimum trip count required to make vectorization profitable, e.g.
ElementCount Width
Vector width with best cost.
InstructionCost ScalarCost
Cost of the scalar loop.
static VectorizationFactor Disabled()
Width 1 means no vectorization, cost 0 means uncomputed cost.